JP5270529B2 - 再構成可能なマルチ処理粗粒アレイ - Google Patents
再構成可能なマルチ処理粗粒アレイ Download PDFInfo
- Publication number
- JP5270529B2 JP5270529B2 JP2009500674A JP2009500674A JP5270529B2 JP 5270529 B2 JP5270529 B2 JP 5270529B2 JP 2009500674 A JP2009500674 A JP 2009500674A JP 2009500674 A JP2009500674 A JP 2009500674A JP 5270529 B2 JP5270529 B2 JP 5270529B2
- Authority
- JP
- Japan
- Prior art keywords
- signal processing
- processing device
- reconfigurable signal
- application
- coarse grain
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7867—Architectures of general purpose stored program computers comprising a single central processing unit with reconfigurable architecture
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Devices For Executing Special Programs (AREA)
- Logic Circuits (AREA)
- Advance Control (AREA)
- Multi Processors (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB0605349.0 | 2006-03-17 | ||
| GBGB0605349.0A GB0605349D0 (en) | 2006-03-17 | 2006-03-17 | Reconfigurable multi-processing coarse-grain array |
| PCT/BE2007/000027 WO2007106959A2 (en) | 2006-03-17 | 2007-03-19 | Reconfigurable multi-processing coarse-grain array |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009530924A JP2009530924A (ja) | 2009-08-27 |
| JP2009530924A5 JP2009530924A5 (enExample) | 2009-11-12 |
| JP5270529B2 true JP5270529B2 (ja) | 2013-08-21 |
Family
ID=36292912
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009500674A Active JP5270529B2 (ja) | 2006-03-17 | 2007-03-19 | 再構成可能なマルチ処理粗粒アレイ |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US8261042B2 (enExample) |
| EP (1) | EP2005317A2 (enExample) |
| JP (1) | JP5270529B2 (enExample) |
| GB (1) | GB0605349D0 (enExample) |
| WO (1) | WO2007106959A2 (enExample) |
Families Citing this family (71)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2009012581A1 (en) * | 2007-07-23 | 2009-01-29 | Arne Wallin | Modular pre-cast composite flooring tile and floor system |
| GB2456879B (en) * | 2008-02-01 | 2012-02-29 | Chipidea Microelectronica Sa | Configurable integrated circuit and applications thereof |
| EP2110757A1 (en) | 2008-04-14 | 2009-10-21 | Imec | Device and method for parallelizing multicarrier demodulation |
| US7941698B1 (en) * | 2008-04-30 | 2011-05-10 | Hewlett-Packard Development Company, L.P. | Selective availability in processor systems |
| US7769984B2 (en) | 2008-09-11 | 2010-08-03 | International Business Machines Corporation | Dual-issuance of microprocessor instructions using dual dependency matrices |
| US8204734B2 (en) * | 2008-12-29 | 2012-06-19 | Verizon Patent And Licensing Inc. | Multi-platform software application simulation systems and methods |
| KR101511273B1 (ko) * | 2008-12-29 | 2015-04-10 | 삼성전자주식회사 | 멀티 코어 프로세서를 이용한 3차원 그래픽 렌더링 방법 및시스템 |
| KR101553655B1 (ko) * | 2009-01-19 | 2015-09-17 | 삼성전자 주식회사 | 재구성가능 프로세서에 대한 명령어 스케줄링 장치 및 방법 |
| CN101782893B (zh) * | 2009-01-21 | 2014-12-24 | 上海芯豪微电子有限公司 | 可重构数据处理平台 |
| KR101581882B1 (ko) * | 2009-04-20 | 2015-12-31 | 삼성전자주식회사 | 재구성 가능한 프로세서 및 그 재구성 방법 |
| KR101572879B1 (ko) * | 2009-04-29 | 2015-12-01 | 삼성전자주식회사 | 병렬 응용 프로그램을 동적으로 병렬처리 하는 시스템 및 방법 |
| JP5452125B2 (ja) * | 2009-08-11 | 2014-03-26 | クラリオン株式会社 | データ処理装置及びデータ処理方法 |
| US8566836B2 (en) * | 2009-11-13 | 2013-10-22 | Freescale Semiconductor, Inc. | Multi-core system on chip |
| US8380724B2 (en) * | 2009-11-24 | 2013-02-19 | Microsoft Corporation | Grouping mechanism for multiple processor core execution |
| EP2363812B1 (en) * | 2010-03-04 | 2018-02-28 | Karlsruher Institut für Technologie | Reconfigurable processor architecture |
| KR101647817B1 (ko) * | 2010-03-31 | 2016-08-24 | 삼성전자주식회사 | 재구성 가능한 프로세서의 시뮬레이션 장치 및 방법 |
| KR101700406B1 (ko) | 2010-11-16 | 2017-01-31 | 삼성전자주식회사 | 재구성 가능 어레이의 실행 모드를 동적으로 결정하기 위한 장치 및 방법 |
| KR101754203B1 (ko) | 2011-01-19 | 2017-07-07 | 삼성전자주식회사 | 파워 게이팅 기반의 재구성가능 프로세서, 이를 위한 컴파일 장치 및 방법 |
| KR101731929B1 (ko) | 2011-02-08 | 2017-05-02 | 삼성전자주식회사 | 재구성 가능 프로세서 및 구동 제어 방법 |
| US8656376B2 (en) * | 2011-09-01 | 2014-02-18 | National Tsing Hua University | Compiler for providing intrinsic supports for VLIW PAC processors with distributed register files and method thereof |
| KR20130028505A (ko) * | 2011-09-09 | 2013-03-19 | 삼성전자주식회사 | 재구성가능 프로세서, 재구성가능 프로세서의 코드 변환 장치 및 방법 |
| KR101949417B1 (ko) * | 2011-12-02 | 2019-02-20 | 삼성전자주식회사 | 프로세서, 명령어 생성 장치 및 방법 |
| KR101901332B1 (ko) * | 2011-12-12 | 2018-09-27 | 삼성전자 주식회사 | 부분적 전원 관리에 기반한 재구성가능 프로세서, 이 재구성가능 프로세서를 위한 코드 변환 장치 및 방법 |
| KR101912427B1 (ko) * | 2011-12-12 | 2018-10-29 | 삼성전자주식회사 | 재구성가능 프로세서 및 재구성가능 프로세서의 미니 코어 |
| KR101978409B1 (ko) * | 2012-02-28 | 2019-05-14 | 삼성전자 주식회사 | 재구성가능 프로세서, 이를 위한 코드 변환 장치 및 방법 |
| KR101929754B1 (ko) | 2012-03-16 | 2018-12-17 | 삼성전자 주식회사 | 미니 코어 기반의 재구성가능 프로세서, 이를 위한 스케줄 장치 및 방법 |
| US9324126B2 (en) * | 2012-03-20 | 2016-04-26 | Massively Parallel Technologies, Inc. | Automated latency management and cross-communication exchange conversion |
| KR101910934B1 (ko) * | 2012-03-26 | 2018-12-28 | 삼성전자 주식회사 | 루프의 프롤로그 또는 에필로그의 비유효 연산을 처리하는 장치 및 방법 |
| EP2660722B1 (en) * | 2012-04-30 | 2015-01-14 | Imec | Method and system for real-time error mitigation |
| US8826072B2 (en) * | 2012-05-09 | 2014-09-02 | Imec | Method and system for real-time error mitigation |
| KR20130131789A (ko) * | 2012-05-24 | 2013-12-04 | 삼성전자주식회사 | 미니코어 기반의 재구성 가능 프로세서 및 그 재구성 가능 프로세서를 이용한 유연한 다중 데이터 처리 방법 |
| US9098917B2 (en) | 2012-07-19 | 2015-08-04 | Samsung Electronics Co., Ltd. | Method and system for accelerating collision resolution on a reconfigurable processor |
| US9000801B1 (en) * | 2013-02-27 | 2015-04-07 | Tabula, Inc. | Implementation of related clocks |
| KR101962250B1 (ko) * | 2013-03-05 | 2019-03-26 | 삼성전자주식회사 | 재구성가능 아키텍처를 위한 스케줄러 및 스케줄링 방법 |
| WO2014152800A1 (en) | 2013-03-14 | 2014-09-25 | Massively Parallel Technologies, Inc. | Project planning and debugging from functional decomposition |
| KR102168175B1 (ko) * | 2014-02-04 | 2020-10-20 | 삼성전자주식회사 | 재구성 가능 프로세서, 재구성 가능 프로세서의 구성 메모리의 사용을 최적화하는 방법 및 장치 |
| US9727460B2 (en) * | 2013-11-01 | 2017-08-08 | Samsung Electronics Co., Ltd. | Selecting a memory mapping scheme by determining a number of functional units activated in each cycle of a loop based on analyzing parallelism of a loop |
| KR102204282B1 (ko) | 2013-11-25 | 2021-01-18 | 삼성전자주식회사 | 다수의 기능 유닛을 가지는 프로세서를 위한 루프 스케쥴링 방법 |
| CN104750659B (zh) * | 2013-12-26 | 2018-07-20 | 中国科学院电子学研究所 | 一种基于自动布线互连网络的粗粒度可重构阵列电路 |
| GB2524063B (en) | 2014-03-13 | 2020-07-01 | Advanced Risc Mach Ltd | Data processing apparatus for executing an access instruction for N threads |
| US10120685B2 (en) | 2015-11-04 | 2018-11-06 | International Business Machines Corporation | Tightly coupled processor arrays using coarse grained reconfigurable architecture with iteration level commits |
| US10528356B2 (en) | 2015-11-04 | 2020-01-07 | International Business Machines Corporation | Tightly coupled processor arrays using coarse grained reconfigurable architecture with iteration level commits |
| US10318356B2 (en) | 2016-03-31 | 2019-06-11 | International Business Machines Corporation | Operation of a multi-slice processor implementing a hardware level transfer of an execution thread |
| US10776312B2 (en) * | 2017-03-14 | 2020-09-15 | Azurengine Technologies Zhuhai Inc. | Shared memory access for a reconfigurable parallel processor with a plurality of chained memory ports |
| US11392409B2 (en) * | 2017-06-28 | 2022-07-19 | Apple Inc. | Asynchronous kernel |
| US10949328B2 (en) | 2017-08-19 | 2021-03-16 | Wave Computing, Inc. | Data flow graph computation using exceptions |
| US11106976B2 (en) | 2017-08-19 | 2021-08-31 | Wave Computing, Inc. | Neural network output layer for machine learning |
| US10564942B2 (en) | 2017-11-17 | 2020-02-18 | International Business Machines Corporation | Compiler for a processor comprising primary and non-primary functional units |
| US11048661B2 (en) | 2018-04-16 | 2021-06-29 | Simple Machines Inc. | Systems and methods for stream-dataflow acceleration wherein a delay is implemented so as to equalize arrival times of data packets at a destination functional unit |
| US11188497B2 (en) | 2018-11-21 | 2021-11-30 | SambaNova Systems, Inc. | Configuration unload of a reconfigurable data processor |
| US10831507B2 (en) | 2018-11-21 | 2020-11-10 | SambaNova Systems, Inc. | Configuration load of a reconfigurable data processor |
| US10698853B1 (en) | 2019-01-03 | 2020-06-30 | SambaNova Systems, Inc. | Virtualization of a reconfigurable data processor |
| US10768899B2 (en) | 2019-01-29 | 2020-09-08 | SambaNova Systems, Inc. | Matrix normal/transpose read and a reconfigurable data processor including same |
| US11227030B2 (en) | 2019-04-01 | 2022-01-18 | Wave Computing, Inc. | Matrix multiplication engine using pipelining |
| US10997102B2 (en) | 2019-04-01 | 2021-05-04 | Wave Computing, Inc. | Multidimensional address generation for direct memory access |
| US11934308B2 (en) | 2019-04-01 | 2024-03-19 | Wave Computing, Inc. | Processor cluster address generation |
| US11386038B2 (en) | 2019-05-09 | 2022-07-12 | SambaNova Systems, Inc. | Control flow barrier and reconfigurable data processor |
| US11055141B2 (en) | 2019-07-08 | 2021-07-06 | SambaNova Systems, Inc. | Quiesce reconfigurable data processor |
| US11900156B2 (en) * | 2019-09-24 | 2024-02-13 | Speedata Ltd. | Inter-thread communication in multi-threaded reconfigurable coarse-grain arrays |
| US11233515B2 (en) * | 2020-05-29 | 2022-01-25 | Microsoft Technology Licensing, Llc | Scheduling of tasks for execution in parallel based on geometric reach |
| US11809908B2 (en) | 2020-07-07 | 2023-11-07 | SambaNova Systems, Inc. | Runtime virtualization of reconfigurable data flow resources |
| US11782729B2 (en) | 2020-08-18 | 2023-10-10 | SambaNova Systems, Inc. | Runtime patching of configuration files |
| CN112306500B (zh) * | 2020-11-30 | 2022-06-07 | 上海交通大学 | 一种针对粗粒度可重构结构的降低多类访存冲突编译方法 |
| US11556494B1 (en) | 2021-07-16 | 2023-01-17 | SambaNova Systems, Inc. | Defect repair for a reconfigurable data processor for homogeneous subarrays |
| US11409540B1 (en) | 2021-07-16 | 2022-08-09 | SambaNova Systems, Inc. | Routing circuits for defect repair for a reconfigurable data processor |
| US11327771B1 (en) | 2021-07-16 | 2022-05-10 | SambaNova Systems, Inc. | Defect repair circuits for a reconfigurable data processor |
| US11487694B1 (en) | 2021-12-17 | 2022-11-01 | SambaNova Systems, Inc. | Hot-plug events in a pool of reconfigurable data flow resources |
| US12450193B2 (en) | 2022-01-27 | 2025-10-21 | SambaNova Systems, Inc. | System of heterogeneous reconfigurable processors for the data-parallel execution of applications |
| WO2024118075A1 (en) * | 2022-11-30 | 2024-06-06 | Zeku, Inc. | Heterogeneous coarse-grained reconfigurable array based architectures for vector digital signal processors |
| US12099462B1 (en) * | 2023-12-08 | 2024-09-24 | Chariot Technologies Lab, Inc. | Dynamic processor architecture |
| CN119336670B (zh) * | 2024-09-09 | 2025-09-09 | 哈尔滨工业大学 | 一种面向语境切换的嵌入式cgra二级内存设计方法 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5956518A (en) * | 1996-04-11 | 1999-09-21 | Massachusetts Institute Of Technology | Intermediate-grain reconfigurable processing device |
| US7096343B1 (en) * | 2000-03-30 | 2006-08-22 | Agere Systems Inc. | Method and apparatus for splitting packets in multithreaded VLIW processor |
| GB0019341D0 (en) * | 2000-08-08 | 2000-09-27 | Easics Nv | System-on-chip solutions |
| GB2372348B (en) * | 2001-02-20 | 2003-06-04 | Siroyan Ltd | Context preservation |
| JP3708853B2 (ja) * | 2001-09-03 | 2005-10-19 | 松下電器産業株式会社 | マルチプロセッサシステムおよびプログラム制御方法 |
| US6993639B2 (en) * | 2003-04-01 | 2006-01-31 | Hewlett-Packard Development Company, L.P. | Processing instruction addressed by received remote instruction and generating remote instruction to respective output port for another cell |
| EP1659486B1 (en) * | 2003-08-29 | 2019-04-17 | Fuji Xerox Co., Ltd. | Data processing device |
| US7490218B2 (en) * | 2004-01-22 | 2009-02-10 | University Of Washington | Building a wavecache |
| JP4484756B2 (ja) * | 2004-06-21 | 2010-06-16 | 三洋電機株式会社 | リコンフィギュラブル回路および処理装置 |
| US7814242B1 (en) * | 2005-03-25 | 2010-10-12 | Tilera Corporation | Managing data flows in a parallel processing environment |
-
2006
- 2006-03-17 GB GBGB0605349.0A patent/GB0605349D0/en not_active Ceased
-
2007
- 2007-03-19 JP JP2009500674A patent/JP5270529B2/ja active Active
- 2007-03-19 EP EP07719192A patent/EP2005317A2/en not_active Withdrawn
- 2007-03-19 WO PCT/BE2007/000027 patent/WO2007106959A2/en not_active Ceased
-
2008
- 2008-09-12 US US12/209,887 patent/US8261042B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| GB0605349D0 (en) | 2006-04-26 |
| JP2009530924A (ja) | 2009-08-27 |
| WO2007106959A2 (en) | 2007-09-27 |
| EP2005317A2 (en) | 2008-12-24 |
| US8261042B2 (en) | 2012-09-04 |
| WO2007106959A3 (en) | 2007-11-08 |
| US20090070552A1 (en) | 2009-03-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP5270529B2 (ja) | 再構成可能なマルチ処理粗粒アレイ | |
| US12136000B2 (en) | Programming flow for multi-processor system | |
| CN107347253B (zh) | 用于专用处理器的硬件指令生成单元 | |
| JP6059413B2 (ja) | 再構成可能命令セル・アレイ | |
| JP6103647B2 (ja) | プロセッサシステム及びアクセラレータ | |
| EP2523120A1 (en) | Microcomputer architecture for low power efficient baseband processing | |
| Papakonstantinou et al. | Multilevel granularity parallelism synthesis on FPGAs | |
| JP2005508029A (ja) | リコンフィギュアラブルアーキテクチャのためのプログラム変換方法 | |
| Jo et al. | SOFF: An OpenCL high-level synthesis framework for FPGAs | |
| US20160239461A1 (en) | Reconfigurable graph processor | |
| Choi | Coarse-grained reconfigurable array: Architecture and application mapping | |
| Toi et al. | Optimizing time and space multiplexed computation in a dynamically reconfigurable processor | |
| Wu et al. | MT-ADRES: Multithreading on coarse-grained reconfigurable architecture | |
| Göhringer et al. | High performance reconfigurable multi-processor-based computing on FPGAs | |
| Forsell et al. | An extended PRAM-NUMA model of computation for TCF programming | |
| Rutzig et al. | A transparent and energy aware reconfigurable multiprocessor platform for simultaneous ILP and TLP exploitation | |
| Lee et al. | Mapping loops on coarse-grain reconfigurable architectures using memory operation sharing | |
| Mayer-Lindenberg | High-level FPGA programming through mapping process networks to FPGA resources | |
| Owaida et al. | Massively parallel programming models used as hardware description languages: The OpenCL case | |
| Tanase et al. | Symbolic Parallelization of Nested Loop Programs | |
| Hußmann et al. | Compiler-driven reconfiguration of multiprocessors | |
| Rutzig | Multicore platforms: Processors, communication and memories | |
| Anjam | Run-time adaptable vliw processors | |
| Purnaprajna | Run-time reconfigurable multiprocessors | |
| Saldaña et al. | Using partial reconfiguration in an embedded message-passing system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090928 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20090928 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20111216 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120117 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20120416 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20120423 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120517 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120807 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20121106 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20121113 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20121203 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20121210 |
|
| A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20130107 |
|
| A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20130115 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130118 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20130416 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20130509 |
|
| R150 | Certificate of patent or registration of utility model |
Ref document number: 5270529 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |