JP5257183B2 - Sensing device and electronic device - Google Patents

Description

  The present invention relates to a sensing device and an electronic device that output a signal corresponding to a state of a detection element.

  2. Description of the Related Art Conventionally, a configuration is known in which a sensor circuit that generates a signal according to the state of a detection element and a circuit used for controlling the sensor circuit are formed on an insulating substrate (for example, Patent Document 1). In Patent Document 1, a glass substrate includes a sensor circuit including an optical sensor, a drive circuit for driving the sensor circuit, and a data output circuit for controlling output of signals (data) generated by the sensor circuit to the outside. The configuration formed above is disclosed.

JP-A-2005-327106

By the way, in the technique disclosed in Patent Document 1, the same type of power supply potential is supplied to each of the sensor circuit and the control circuit (drive circuit, data output circuit) formed on the substrate. Therefore, in the technique disclosed in Patent Document 1, it is considered that the power supply line connected to the sensor circuit and the control circuit is common. For this reason, when noise occurs in the power supply line, there is a problem that both the sensor circuit and the control circuit are affected by the noise.
In view of the above circumstances, an object of the present invention is to solve the problem of reducing the influence of noise generated in a power supply line on a substrate on a sensing device.

In order to solve the above problems, a sensing device according to the present invention includes a unit circuit that generates a detection signal according to a state of a detection element, a control circuit used for controlling the unit circuit, and a power supply potential of the unit circuit. The unit circuit power supply line group to be supplied and the control circuit power supply line group to which the power supply potential of the control circuit is supplied are formed on an insulating substrate, and the unit circuit power supply line group and the control circuit power supply line are formed. The control circuit includes a drive circuit for driving the unit circuit and a holding circuit for holding the detection signal, and the control circuit power supply line group includes a drive circuit for driving the unit circuit. Including a first power supply line to which a power supply potential is supplied and a second power supply line to which the power supply potential of the holding circuit is supplied. The first power supply line and the second power supply line are electrically separated on the substrate. Yes.

According to this aspect, since the unit circuit power line group and the control circuit power line group are electrically separated on the substrate, any one of the unit circuit power line group and the control circuit power line group can be used. Even when noise occurs on one side, there is an advantage that the other side can be prevented from being affected by the noise. According to this aspect, since the first power supply line and the second power supply line are electrically disconnected on the substrate, the power supply potential supplied to the first power supply line and the second power supply line are supplied. Even when noise occurs in any one of the power supply potentials, the other can be prevented from being affected by the noise.

Aspects smell sensing apparatus according to the present invention Te, the power supply line group for the unit circuit includes a first high line is the first potential is supplied, and a first low line lower than the first potential second potential is supplied The unit circuit includes a transistor that generates a detection signal, a reset transistor that is arranged between the first high-level line and the gate of the transistor and whose gate is connected to the reset line, and whether or not the detection signal can be supplied to the detection line And a selection transistor having a gate connected to the selection line, and the drive circuit outputs a reset signal to the reset line and outputs a selection signal to the selection line. According to this aspect, the unit circuit power line group (the first high level line and the first low level line) and the first power line are electrically separated on the substrate. Even when noise occurs in any one of the first power lines, there is an advantage that the other can be suppressed from being affected by the noise.

  The first power supply line includes a second high level line to which a third potential higher than the first potential is supplied and a second low level line to which a fourth potential lower than the third potential is supplied. It is preferable that the reset transistor is turned on by outputting three potentials to the reset line. According to this aspect, since the reset transistor can be reliably switched to the on state, the initialization (reset) of the gate of the transistor can be reliably performed.

  In the aspect of the sensing device according to the present invention, the control circuit includes an output control circuit that controls the output of the detection signal to the outside, and the control circuit power supply line group is supplied with the power supply potential of the output control circuit. It is preferable that the third power supply line and the first power supply line are electrically disconnected on the substrate including the power supply line. According to this aspect, since the third power supply line and the first power supply line are electrically disconnected, even when noise occurs in any one of the first power supply line and the third power supply line, It can suppress that the other power supply line receives the influence of the said noise.

A sensing device according to the present invention includes a unit circuit that generates a detection signal according to a state of a detection element, a control circuit used for controlling the unit circuit, and a power supply line group for unit circuit to which a power supply potential of the unit circuit is supplied. And a control circuit power supply line group to which a power supply potential of the control circuit is supplied are formed on an insulating substrate, and the unit circuit power supply line group and the control circuit power supply line group are electrically connected on the substrate. The control circuit may be separated, and the control circuit may include a holding circuit for holding the detection signal, and the control circuit power supply line group may include a second power supply line to which the power supply potential of the holding circuit is supplied. Also in this aspect, since the unit circuit power supply line group and the second power supply line are electrically separated on the substrate, noise is generated in either the unit circuit power supply line group or the second power supply line. Even if it occurs, there is an advantage that the other can be suppressed from being affected by the noise.

A sensing device according to the present invention includes a unit circuit that generates a detection signal according to a state of a detection element, a control circuit used for controlling the unit circuit, and a power supply line group for unit circuit to which a power supply potential of the unit circuit is supplied. And a control circuit power supply line group to which a power supply potential of the control circuit is supplied are formed on an insulating substrate, and the unit circuit power supply line group and the control circuit power supply line group are electrically connected on the substrate. The control circuit includes a holding circuit for holding the detection signal and an output control circuit for controlling the output of the detection signal to the outside. The power line for the control circuit has a power supply potential of the holding circuit. Including a second power supply line to be supplied and a third power supply line to which the power supply potential of the output control circuit is supplied. The second power supply line and the third power supply line are electrically separated on the substrate. It can also be set as an aspect. According to this aspect, since the second power supply line and the third power supply line are electrically separated on the substrate, when noise occurs in any one of the second power supply line and the third power supply line Moreover, it can suppress that the other receives the influence of the said noise.

In a specific aspect of the sensing device according to the present invention, the unit circuit power supply line group includes a first high level line to which a first potential is supplied and a first low level line to which a second potential lower than the first potential is supplied. The unit circuit includes a transistor that is disposed between the detection line to which the detection signal is supplied and the first high-level line and generates a detection signal corresponding to the gate potential, and the detection element is a gate of the transistor And the first low level line.

  Furthermore, in a specific aspect of the sensing device according to the present invention, the second power supply line includes a third high level line to which a fifth potential is supplied and a third low level line to which a sixth potential lower than the fifth potential is supplied. The holding circuit includes a capacitive element having a first electrode and a second electrode to which a third low level line is connected, a first electrode connected to the input side, a third high level line and a third high level line. And an amplifier to which a low level line is connected. In addition, the sensing device according to the present invention can be used for various electronic devices. Examples of this type of device include a touch panel, a scanner, a camera, a vein authentication sensor, and an infrared sensor.

It is a figure which shows the structure of the sensing apparatus which concerns on 1st Embodiment of this invention. It is a circuit diagram which shows the specific structure of a photon detection circuit. It is a figure which shows the specific waveform of each signal utilized for operation | movement of a sensing apparatus. It is a figure which shows operation | movement of the unit circuit in a reset period. It is a figure which shows operation | movement of the unit circuit in a sensing period. It is a figure which shows operation | movement of the unit circuit in a read-out period. It is a circuit diagram which shows the specific structure of a holding circuit. It is a figure which shows the specific structure of a shift register. It is a figure which shows the structure of contrast. It is a figure which shows the structure of the sensing apparatus which concerns on 2nd Embodiment of this invention. 2 is a circuit diagram showing a specific configuration of a holding circuit according to the same embodiment. FIG. It is a figure which shows the structure of the sensing apparatus which concerns on 3rd Embodiment of this invention. 6 is a timing chart showing a specific operation of the shift register. It is a figure which shows the structure of the sensing apparatus which concerns on 4th Embodiment of this invention. It is a figure which shows the connection aspect of the power wire group for unit circuits and the power wire group for control circuits which concerns on the modification of this invention. It is a figure which shows the structure of the sensing apparatus which concerns on the modification of this invention.

<A: First Embodiment>
FIG. 1 is a diagram illustrating a configuration of a sensing device 100 according to the first embodiment of the present invention. As shown in FIG. 1, the sensing device 100 includes a plurality of unit circuits P each having a light receiving element Q that outputs a light reception signal having a magnitude corresponding to the amount of received light, and a control circuit used to control each unit circuit P. 10, a unit circuit power supply line group 20 to which the power supply potential of each unit circuit P is supplied, and a control circuit power supply line group 30 to which the power supply potential of the control circuit 10 is supplied. The plurality of unit circuits P, the control circuit 10, the unit circuit power supply line group 20, and the control circuit power supply line group 30 are formed on the substrate 101. The substrate 101 is formed of an insulating material such as glass. The control circuit 10 includes a drive circuit 12, a holding circuit 14, and an output control circuit 16. Various signals that define the operation of the sensing device 100 are supplied to the control circuit 10 from an external signal generation circuit 40.

  The unit circuit power supply line group 20 includes a first high level line 21 and a first low level line 22. The first high level line 21 and the first low level line 22 are connected to each unit circuit P. The first potential AVDD1 generated by the potential generator 50 is supplied to the terminal T1 of the first high level line 21, and the second potential generated by the potential generator 50 is supplied to the terminal T2 of the first low level line 22. The potential AVSS1 (<AVDD1) is supplied. The control circuit power supply line group 30 includes a second high level line 31 and a second low level line 32. The second high level line 31 and the second low level line 32 are connected to the drive circuit 12, the holding circuit 14, and the output control circuit 16, respectively. The third potential DVDD1 (> AVDD1) generated by the potential generation unit 50 is supplied to the terminal T3 of the second high level line 31, and the potential generation unit 50 generates the terminal T4 of the second low level line 32. The fourth potential DVSS1 (<DVDD1) is supplied.

  The potential generator 50 generates the power supply potential (AVDD1, AVSS1) of each unit circuit P and the power supply potential (DVDD1, DVSS1) of the control circuit 10 based on the potential output from the power supply 60. The potential generation unit 50 is mounted on a wiring substrate (for example, an FPC (flexible printed circuit)) connected to the substrate 101. That is, the potential generation unit 101 is not mounted on the substrate 101.

  The unit circuit power supply line group 20 and the control circuit power supply line group 30 are electrically separated on the substrate 101. More specifically, on the substrate 101, the unit circuit power supply line group 20 (first high level line 21, first low level line 22) and control circuit power supply line group 30 (second high level line 31, second low level line). 32) are formed apart from each other and are in a non-conducting relationship with each other (electrically independent from each other).

  Each unit circuit P is arranged on the surface in the detection region 103 on the substrate 101. More specifically, it is as follows. In the detection region 103, m control lines 70 extending in the X direction and n detection lines 80 extending in the Y direction orthogonal to the X direction are formed (m and n are 2 or more). Natural number). Each unit circuit P is arranged at a position corresponding to the intersection of the control line 70 and the detection line 80. Therefore, these unit circuits P are arranged in a matrix of m rows × n columns.

  FIG. 2 is a circuit diagram showing a specific configuration of the unit circuit P. As shown in FIG. In FIG. 2, one unit circuit P belonging to the i-th row (1 ≦ i ≦ m) is shown. The unit circuit P includes an N-channel reset transistor Tre, an N-channel amplification transistor Ta, an N-channel selection transistor Tsel, and a light receiving element Q such as a photodiode. As shown in FIG. 2, the control line 70 includes a reset line 72 and a selection line 74 each extending in the X direction.

  As shown in FIG. 2, the amplification transistor Ta is disposed between the first high-level line 21 and the detection line 80, and generates a detection current It (detection signal) corresponding to the gate potential. The light receiving element Q is connected to the gate of the amplification transistor Ta. The cathode of the light receiving element Q is connected to the gate of the amplification transistor Ta, while the anode is connected to the first low level line 22. The reset transistor Tre is disposed between the first high level line 21 and the gate of the amplification transistor Ta. The drain of the reset transistor Tre is connected to the first high level line 21, while the source is connected to the gate of the amplification transistor Ta. The gate of the reset transistor Tre is connected to the reset line 72. The selection transistor Tsel is disposed between the first high level line 21 and the detection line 80 and is connected in series with the amplification transistor Ta. The gate of the selection transistor Tsel is connected to the selection line 74.

  The drive circuit 12 shown in FIG. 1 is means for driving each unit circuit P. More specifically, the drive circuit 12 outputs a reset signal RES and a selection signal SEL for driving each unit circuit P to each control line 70. The reset signal RES [i] is supplied to the reset line 72 of the control line 70 in the i-th row, and the selection signal SEL [i] is supplied to the selection line 74 of the control line 70 in the i-th row. FIG. 3 is a diagram illustrating a specific waveform of each signal used for the operation of the sensing device 100. As shown in FIG. 3, within each unit period T, the reset signals RES [1] to RES [m] and the selection signals SEL [1] to SEL [m] sequentially transition to the active level (high level).

  As shown in FIG. 3, in each unit period T, an operation period Td is set for each of m rows. Each operation period Td includes an initialization period Tr, a sensing period Ts, a reading period To, a data holding period Tk, and an output period Tu. In the reset period Tr of each operation period Td, the reset signal RES is set to a high level. In the sensing period Ts after the reset period Tr, the reset signal RES and the selection signal SEL are set to a low level. In the reading period To after the sensing period Ts, the selection signal SEL is set to a high level. In each of the data holding period Tk after the reading period To and the output period Tu after the data holding period Tk, the reset signal RES and the selection signal SEL are set to a low level.

  Next, the operation of the unit circuit P will be described with reference to FIGS. Here, a specific operation in the operation period Td of the i-th row will be described. As shown in FIG. 3, in the reset period Tr, the reset signal RES [i] is set to a high level, so that the reset transistor Tre is turned on. In the present embodiment, the drive circuit 12 outputs the third potential DVDD1 to the reset line 72 as the high level reset signal RES [i]. The third potential DVDD1 is set to a value that is higher than the first potential AVDD1 supplied to the first high level line 21 and that the reset transistor Tre is surely turned on. Therefore, as shown in FIG. 4, the gate potential of the amplification transistor Ta is set (reset) to the first potential AVDD1.

  As shown in FIG. 3, in the sensing period Ts, the reset signal RES [i] and the selection signal SEL [i] transition to a low level, so that the reset transistor Tre and the selection transistor Tsel are off as shown in FIG. Transition to the state. At this time, the potential of the gate of the amplification transistor Ta is set to a value corresponding to the voltage Vpd of the light receiving element Q. The voltage Vpd of the light receiving element Q is determined according to the amount of light incident on the light receiving element Q.

  As shown in FIG. 3, during the readout period To, the selection signal SEL [i] transitions to a high level, so that the selection transistor Tsel is turned on as shown in FIG. At this time, a detection current It (detection signal) having a magnitude corresponding to the potential of the gate of the amplification transistor Ta flows through the detection line 80.

  In the sensing period Ts, when an object such as a finger touches or approaches the detection area 103 while casting a shadow, the amount of light received by the light receiving element Q provided corresponding to the shadowed area changes, and the voltage of the light receiving element Q is changed. Vpd changes. In the reading period To, a detection current It (detection signal) corresponding to the amount of received light is output to the detection line 80.

  Returning to FIG. 1 again, the description will be continued. The holding circuit 14 is means (sample hold circuit SH) for holding the detection current It (detection signal). In the present embodiment, a holding circuit 14 is provided for each detection line 80. FIG. 7 is a circuit diagram showing a specific configuration of the holding circuit 14. FIG. 7 illustrates the configuration of the holding circuit 14 provided corresponding to the detection line 80 in the j-th column (1 ≦ j ≦ n), but the holding circuit corresponding to the detection line 80 in the other column. 14 also has the same configuration.

  As shown in FIG. 7, the holding circuit 14 includes a capacitive element C for holding the detection signal and an amplifier Ap for amplifying and outputting the detection signal held in the capacitive element C. The capacitive element C has a first electrode L1 and a second electrode L2. The first electrode L1 is connected to the input side of the amplifier Ap, while the second electrode L2 is connected to the second low potential line 32 to which the fourth potential DVSS1 is supplied. A second high level line 31 and a second low level line 32 are connected to the amplifier Ap, and a third potential DVDD1 and a fourth potential DVSS1 are supplied as power supply potentials.

  In the present embodiment, the holding circuit 14 further includes a precharging transistor Tp and a switching element G. One terminal of the switching element G is connected to the detection line 80, and the other terminal is connected to the first electrode L1 of the capacitive element C and the input side of the amplifier Ap. Note that the sampling signal SHG is simultaneously supplied to the switching elements G in each holding circuit 14. One electrode of the precharging transistor Tp is connected to the detection line 80, and the other electrode is connected to a constant potential line to which the precharge potential Vp is supplied. A precharge signal PREG output from the signal generation circuit 40 is supplied to the gate of the precharge transistor Tp. The precharge signal PREG is supplied all at once to the precharge transistors Tp in each holding circuit 14. As shown in FIG. 3, for each operation period Td within each unit period T, the precharge signal PREG and the sampling signal SHG transition to an active level (high level).

  The output control circuit 16 shown in FIG. 1 is means for controlling the output of the detection current It (detection signal) to the outside. The output control circuit 16 includes a plurality (n) of switches SW each interposed between the output line 105 connected to the outside and each holding circuit 14, and the operation signals XSEL [1] to XSEL [n]. And a shift register 18 that outputs to As shown in FIG. 3, in each output period Tu, the operation signals XSEL [1] to XSEL [n] sequentially transition to the active level (high level).

  FIG. 8 is a diagram showing a specific configuration of the shift register 18. As shown in FIG. 8, the shift register 18 includes a plurality of unit circuits 90 each including a NAND gate 91, a clocked inverter 92, and a NOT gate 93. Each unit circuit 90 generates an operation signal XSEL in accordance with clock signals (CLKA, CLKB) input to the unit circuit 90 and transfers the input signal XSP to the unit circuit 90 in the next stage. Although not shown in detail, the second high level line 31 and the second low level line 32 are connected to the shift register 18, and the third potential DVDD1 and the fourth potential DVSS1 are supplied as power supply potentials.

  Next, operations of the holding circuit 14 and the output control circuit 16 will be described with reference to FIG. Here, a specific operation in the operation period Td of the i-th row will be described. As shown in FIG. 3, in the reset period Tr, since the precharge signal PREG and the sampling signal SHG are set to a high level, the precharge transistor Tp and the switching element G are turned on. As a result, the potential of each detection line 80 is set to the precharge potential Vp, and the charge remaining in the capacitive element C is discharged (reset).

  As shown in FIG. 3, in the sensing period Ts, the precharge signal PREG transitions to a low level, so the precharge transistor Tp transitions to an off state. On the other hand, since the sampling signal SHG is maintained at a high level, the switching element G is maintained in an on state.

  As shown in FIG. 3, in the readout period To, the sampling signal SHG is maintained at a high level until just before the end point of the readout period To, so that the detection current It output to the detection line 80 is switched in the on state. It is supplied to the capacitive element C through the element G. Then, since the sampling signal SHG changes to the low level immediately before the end point of the reading period To, the switching element G is turned off. Thereby, the capacitive element C enters a floating state.

  In the present embodiment, the sampling signal SHG is set to a high level from the start point of the reset period Tr to immediately before the end point of the read period To. However, the present invention is not limited to this. For example, once the reset period Tr ends, the sampling signal SHG It is also possible to adopt a mode in which the level changes to a high level again when the reading period To starts.

  As shown in FIG. 3, in the data holding period Tk, since the selection signal SEL [i] changes to the low level, the selection transistor Tsel in the unit circuit P is turned off. Therefore, the output of the detection current It generated by the unit circuit P to the detection line 80 is also stopped. The charge of the detection current It output to each detection line 80 in the reading period To is held in the capacitive element C of each holding circuit 14.

  As shown in FIG. 3, in the output period Tu, since the operation signals XSEL [1] to XSEL [n] are sequentially shifted to a high level, each of the n switches SW is sequentially shifted to an on state. Therefore, the detection current It held in the capacitive element C of each holding circuit 14 is sequentially output to the output line 105 via the switch SW. As described above, the sensing device 100 according to the present embodiment outputs a detection signal (detection current It) corresponding to the state of the detection element (light receiving element Q) to the output line 105. In the present embodiment, the output line 105 is connected to an external detection circuit (not shown).

  9 is a diagram (corresponding to FIG. 1) showing a mode (hereinafter referred to as “proportional”) in which the unit circuit power line group 20 and the control circuit power line group 30 are electrically connected on the substrate 101. ). In contrast, the first high level line 21 and the second high level line 31 are electrically connected, and a third potential DVDD1 is supplied to both. Further, the first low level line 22 and the second low level line 32 are electrically connected, and a fourth potential DVSS1 is supplied to both. In this aspect, for example, when noise is generated in the third potential DVDD1 due to the operation of the control circuit 10 (the drive circuit 12, the holding circuit 14, and the output control circuit 16), the third potential DVDD1 is connected to the first high-level line 21 to be supplied. Noise is applied to the potential of the gate through the parasitic capacitance that exists between the drain of the amplified transistor Ta and the gate of the amplifier transistor Ta. In the readout period To, the noise is amplified and output to the detection line 80. Similarly, when noise is generated in the fourth potential DVSS1, noise is added to the potential of the gate of the amplification transistor Ta through the light receiving element Q connected to the first low potential line 22 to which the fourth potential DVSS1 is supplied. In the readout period To, the noise is amplified and output to the detection line 80. That is, when noise is generated in the power supply potential due to the operation of the control circuit 10, there is a problem that each unit circuit P is also affected by the noise. Similarly, when noise occurs in the power supply potential due to the operation of each unit circuit P, there arises a problem that the control circuit 10 is also affected by the noise.

  On the other hand, in the present embodiment, the unit circuit power supply line group 20 and the control circuit power supply line group 30 are electrically disconnected on the substrate 101, and therefore, for example, the control circuit 10 Even if noise occurs in the power supply potential (DVDD1, DVSS1) supplied to the power supply line group 30, the noise is prevented from riding on the power supply potential (AVDD1, AVSS1) supplied to the unit circuit power supply line group 20. it can. That is, there is an advantage that each unit circuit P can be prevented from being affected by noise. Similarly, for example, even if noise occurs in the power supply potential ((AVDD1, AVSS1)) supplied to the unit circuit power supply line group 20 by the operation of each unit circuit P, the control circuit 10 is prevented from being affected by the noise. There is an advantage that you can.

  Further, in this embodiment, since the substrate 101 is formed of an insulating material such as glass, there is an advantage that the manufacturing cost can be reduced as compared with an aspect in which the substrate 101 is formed of a semiconductor such as silicon. The larger the area, the greater the cost merit. By the way, in the aspect in which the substrate 101 is formed of glass, noise is more likely to ride on the power supply line formed on the substrate 101 than in the aspect in which the substrate 101 is formed of a semiconductor such as silicon. Therefore, from the viewpoint of suppressing the influence of noise while reducing the manufacturing cost, the unit circuit power line group 20 and the control circuit power line group 30 are electrically connected to each other on the substrate 101 formed of glass. The configuration of the present embodiment of separating is particularly effective.

<B: Second Embodiment>
FIG. 10 is a diagram illustrating a configuration of a sensing device 100 according to the second embodiment of the present invention. In the second embodiment, the detection circuit power supply line group 30 includes a first power supply line 33 and a second power supply line 34, and the first power supply line 33 and the second power supply line 34 are electrically connected on the substrate 101. This is different from the first embodiment in that it is separated from each other.

  As shown in FIG. 10, the first power supply line 33 includes a second high level line 31 and a second low level line 32, which are connected to each of the drive circuit 12 and the output control circuit 16. Similar to the first embodiment, the terminal T3 of the second high level line 31 is supplied with the third potential DVDD1 (> AVDD1) generated by the potential generation unit 50, and the terminal T4 of the second low level line 32 is supplied to the terminal T4. The fourth potential DVSS1 (<DVDD1) generated by the potential generation unit 50 is supplied.

  On the other hand, the second power supply line 34 includes a third high level line 35 and a third low level line 36, which are connected to the holding circuit 14. The terminal T5 of the third high level line 35 is supplied with the fifth potential AVDD2 generated by the potential generation unit 50, and the terminal T6 of the third low level line 36 is generated by the potential generation unit 50. The potential AVSS2 (<AVDD2) is supplied. Therefore, as shown in FIG. 11, the third low potential line 36 is connected to the second electrode L2 of the capacitive element C in the holding circuit 14, and the sixth potential AVSS2 is supplied to the second electrode L2. The amplifier Ap is connected to the third high level line 35 and the third low level line 36, and the fifth potential AVDD2 and the sixth potential AVSS2 are supplied as power supply potentials.

  In the first embodiment described above, the power supply lines (second high level line 31 and second low level line 32) connected to the control circuit 10 (the drive circuit 12, the holding circuit 14, and the output control circuit 16) are common. For this reason, for example, when noise is applied to the second low level line 32, the noise is applied to the amplifier Ap via the capacitive element C connected to the second low level line 32. In the output period Tu, the noise is amplified and output to the output line 105. Similarly, when noise is applied to the second high level line 31, the noise is applied to the amplifier Ap connected to the second high level line 31. In the output period Tu, the noise is amplified and output to the output line 105.

  In contrast, in the second embodiment, the second power supply line 34 to which the power supply potential (AVDD2, AVSS2) of the holding circuit 14 is supplied is the second high potential line 31 and the second low potential line 32 (first power supply line 33). ) And the substrate 101 are electrically separated from each other, so that noise generated in the first power supply line 33 can be prevented from getting on the second power supply line 34. That is, there is an advantage that the holding circuit 14 can be prevented from being affected by noise generated in the first power supply line 33.

<C: Third Embodiment>
FIG. 12 is a diagram showing a configuration of a sensing device 100 according to the third embodiment of the present invention. In the third embodiment, the detection circuit power supply line group 30 includes a first power supply line 33 and a third power supply line 37, and the first power supply line 33 and the third power supply line 37 are electrically connected on the substrate 101. This is different from the first embodiment in that it is separated from each other.

  As shown in FIG. 12, the first power supply line 33 includes a second high level line 31 and a second low level line 32, which are connected to each of the drive circuit 12 and the holding circuit 14. On the other hand, the third power supply line 37 includes a fourth high level line 38 and a fourth low level line 39, which are connected to the output control circuit 16 (shift register 18). The seventh potential DVDD2 generated by the potential generation unit 50 is supplied to the terminal T7 of the fourth high level line 38, and the eighth potential generated by the potential generation unit 50 is supplied to the terminal T8 of the fourth low level line 39. The potential DVSS2 (<DVDD2) is supplied.

  In the first embodiment described above, the power supply lines (second high level line 31 and second low level line 32) connected to the control circuit 10 (the drive circuit 12, the holding circuit 14, and the output control circuit 16) are common. For this reason, for example, when noise is applied to the second high level line 31, noise is also applied to the shift register 18 in the output control circuit 16. As a result, for example, as shown in FIG. 13, when the second potential DVDD1 drops instantaneously, each unit circuit 90 constituting the shift register 18 cannot transfer the input signal XSP to the next unit circuit 90. The problem occurs.

  On the other hand, in the third embodiment, the third power supply line 37 to which the power supply potential (DVDD2, DVSS2) of the output control circuit 16 is supplied is the second high potential line 31 and the second low potential line 32 (first power supply line). 33) is electrically disconnected from the substrate 101, so that noise generated in the first power supply line 33 can be prevented from getting on the third power supply line 37. That is, there is an advantage that the shift register 18 in the output control circuit 16 can be prevented from being affected by noise generated in the first power supply line 33.

<D: Fourth Embodiment>
FIG. 14 is a diagram showing a configuration of a sensing device 100 according to the fourth embodiment of the present invention. In the fourth embodiment, the detection circuit power supply line group 30 includes a first power supply line 33, a second power supply line 34, and a third power supply line 37, which are electrically disconnected on the substrate 101. This is different from the second embodiment. The configuration of the third power supply line 37 is the same as that of the third embodiment described above, and a detailed description thereof is omitted.

  As described above, in the second embodiment, the first power supply line 33 connected to the drive circuit 12 and the output control circuit 16 and the second power supply line 34 connected to the holding circuit 14 are electrically connected on the substrate 101. Therefore, even if noise is applied to the first power supply line 33, there is an advantage that the holding circuit 14 can be prevented from being affected by the noise. However, in the second embodiment, since the first power supply line 33 is commonly connected to the drive circuit 12 and the output control circuit 16, if noise is applied to the first power supply line 33, the shift in the output control circuit 16 is performed. Noise is also applied to the register, and the same problem as in the third embodiment occurs.

In contrast, in the fourth embodiment, the first power supply line 33 connected to the drive circuit 12, the second power supply line 34 connected to the holding circuit 14, and the third power supply connected to the output control circuit 16. Since the line 37 is electrically disconnected on the substrate 101, even if noise is applied to the first power supply line 33, the noise can be prevented from getting on the second power supply line 34 and the third power supply line 37. That is, not only the holding circuit 14 but also the output control circuit 16 (shift register 18) can be prevented from being affected by noise generated in the first power supply line 33. As described above, according to the configuration of the fourth embodiment, noise generated in any one of the first power supply line 33, the second power supply line 34, and the third power supply line 37 gets on the other power supply lines. There is an advantage that can be prevented.
<E: Modification>
The present invention is not limited to the above-described embodiments, and for example, the following modifications are possible. Also, two or more of the modifications shown below can be combined.

(1) Modification 1
In each of the embodiments described above, each of the drive circuit 12, the holding circuit 14, and the output control circuit 16 is formed on the substrate 101. However, the present invention is not limited thereto, and the drive circuit 12, the holding circuit 14, and the output control circuit 16 are not limited thereto. Only one of the elements is formed on the substrate 101, and the other elements are formed on a wiring board (for example, an FPC) connected to the substrate 101 and are not formed on the substrate 101. You can also. For example, only the drive circuit 12 can be formed on the substrate 101, only the holding circuit 14 can be formed on the substrate 101, or only the output control circuit 16 can be formed. It is also possible to adopt a mode in which it is formed on the substrate 101.

  Alternatively, any two elements of the driving circuit 12, the holding circuit 14, and the output control circuit 16 may be formed on the substrate 101, and the other elements may not be formed on the substrate 101. For example, the driving circuit 12 and the holding circuit 14 may be formed on the substrate 101 while the output control circuit 16 is not formed on the substrate 101. Alternatively, the driving circuit 12 and the output control circuit 16 may be formed on the substrate 101. While the holding circuit 14 is not formed on the substrate 101, the holding circuit 14 and the output control circuit 16 are formed on the substrate 101, while the driving circuit 12 is formed on the substrate 101. It can also be set as the aspect which is not formed on.

(2) Modification 2
In the first embodiment, the unit circuit power supply line group 20 and the control circuit power supply line group 30 are not electrically connected on the substrate 101. However, the present invention is not limited to this. The unit circuit power line group 20 and the control circuit power line group 30 may be connected via an electrostatic protection circuit. For example, as shown in FIG. 15, an electrostatic protection circuit 200 is provided between a first high level line 21 to which a first potential AVDD1 is supplied and a third high level line 31 to which a third potential DVDD1 (> AVDD1) is supplied. It is possible to adopt a configuration in which a gap is interposed. In the aspect of FIG. 15, the electrostatic protection circuit 200 includes a diode 210, and the anode of the diode 210 is connected to the first high level line 21, while the cathode is connected to the third high level line 31.

  In the aspect of FIG. 15, for example, even if the third potential DVDD1 rises momentarily due to noise on the second high level line 31, the voltage between the second high level line 31 and the first high level line 21 is As long as the reverse bias voltage of the diode 210 is not exceeded, they are not electrically connected (conducted). Similarly, even if the first potential AVDD1 drops momentarily due to noise on the first high level line 21, for example, the voltage between the first high level line 21 and the second high level line 31 is As long as the reverse bias voltage is not exceeded, they are not electrically connected. That is, it can be said that the first high-level line 21 and the second high-level line 31 are electrically disconnected as long as noise that exceeds the protection range of the electrostatic protection circuit 200 does not occur. Similarly, in the other embodiments, a configuration in which the above-described electrostatic protection circuit 200 is interposed between the unit circuit power supply line group 20 and the control circuit power supply line group 30 can be employed.

  The combination of the two power supply lines with the electrostatic protection circuit 200 interposed is arbitrary. For example, in the second embodiment, a configuration in which the electrostatic protection circuit 200 is interposed between the first power supply line 33 and the second power supply line 34 that configure the control circuit power supply line group 30 may be employed. . Similarly, in the third embodiment, a configuration in which the electrostatic protection circuit 200 is interposed between the first power supply line 33 and the third power supply line 37 constituting the control circuit power supply line group 30 may be employed. it can. Furthermore, in the fourth embodiment, the electrostatic protection circuit 200 is interposed between each of the first power supply line 33, the second power supply line 34, and the third power supply line 37 constituting the control circuit power supply line group 30. A configuration can also be adopted.

(3) Modification 3
In each of the above embodiments, the power supply potential of each unit circuit P and the power supply potential of the control circuit 10 are generated based on the potential output from the same power supply 60. However, the present invention is not limited to this. The power source potential of P and the power source potential of the control circuit 10 may be supplied from different power sources. For example, in the sensing device 100 according to the first embodiment, as shown in FIG. 16, a power supply 61 that outputs a first potential AVDD1 and a second potential AVSS1, and a power supply that outputs a third potential DVDD1 and a fourth potential DVSS1. 62 may be provided in place of the power supply 60 and the potential generation unit 50.

  The same applies to other embodiments. For example, in the sensing device 100 according to the second embodiment, the power source that outputs the first potential AVDD1 and the second potential AVSS1, the power source that outputs the third potential DVDD1 and the fourth potential DVSS1, the fifth potential AVDD2 and the second potential It is also possible to adopt a configuration in which a power source that outputs 6-potential AVSS2 is provided separately. In the sensing device 100 according to the third embodiment, the power source that outputs the first potential AVDD1 and the second potential AVSS1, the power source that outputs the third potential DVDD1 and the fourth potential DVSS1, the seventh potential DVDD2, It is also possible to adopt a configuration in which a power supply that outputs 8-potential DVSS2 is provided separately. Further, in the sensing device 100 according to the fourth embodiment, the power source that outputs the first potential AVDD1 and the second potential AVSS1, the power source that outputs the third potential DVDD1 and the fourth potential DVSS1, the fifth potential AVDD2 and the second potential It is also possible to adopt a configuration in which a power source that outputs 6 potential AVSS2 and a power source that outputs 7th potential DVDD2 and 8th potential DVSS2 are provided separately.

(4) Modification 4
In each of the above-described embodiments, each unit circuit P includes the light receiving element Q that outputs a light reception signal having a magnitude corresponding to the amount of received light. The type of is arbitrary. For example, each unit circuit P may have a contact detection capacitive element for detecting contact or approach of the object to the detection region 103. In short, each unit circuit P may have a detection element such as the light receiving element Q and generate a detection signal corresponding to the state of the detection element.

<F: Electronic equipment>
The sensing device 100 according to the present invention can be used for various electronic devices. Examples of this type of device include a touch panel, a scanner, a camera, a vein authentication sensor, and an infrared sensor.

DESCRIPTION OF SYMBOLS 10 ... Control circuit, 12 ... Drive circuit, 14 ... Holding circuit, 16 ... Output control circuit, 18 ... Shift register, 20 ... Power line group for unit circuits, 21 ... First high level line, 22 ... First low level line, 30... Control circuit power supply line group, 31... Second high level line, 32... Second low level line, 33. 3rd high level line 36 ... 3rd low level line 37 3rd power line 38 3rd high level line 39 4th low level line 39 4th low level line 70 Control line 72... Reset line 74 .. selection line 80... Detection line It .. detection current P. unit circuit Q.

Claims (9)

A unit circuit for generating a detection signal corresponding to the state of the detection element;
A control circuit used for controlling the unit circuit;
A unit circuit power supply line group to which a power supply potential of the unit circuit is supplied;
And a control circuit power supply line group to which the power supply potential of the control circuit is supplied, is formed on an insulating substrate,
The unit circuit power line group and the control circuit power line group are electrically separated on the substrate ,
The control circuit includes:
A drive circuit for driving the unit circuit;
Holding circuit for holding the detection signal,
The control circuit power supply line group includes:
A first power supply line to which a power supply potential of the driving circuit is supplied;
A second power supply line to which the power supply potential of the holding circuit is supplied,
The first power line and the second power line are electrically disconnected on the substrate;
Sensing device. The unit circuit power supply line group includes a first high potential line to which a first potential is supplied and a first low potential line to which a second potential lower than the first potential is supplied,
The unit circuit is
A transistor for generating the detection signal;
A reset transistor disposed between the first high level line and the gate of the transistor and having a gate connected to a reset line;
Determining whether the detection signal can be supplied to the detection line, and a selection transistor having a gate connected to the selection line,
The drive circuit outputs a reset signal to the reset line and outputs a selection signal to the selection line;
The sensing device according to claim 1 . The first power line includes a second high level line to which a third potential higher than the first potential is supplied and a second low level line to which a fourth potential lower than the third potential is supplied,
The reset circuit is turned on when the drive circuit outputs the third potential to the reset line.
The sensing device according to claim 2 . The control circuit includes:
An output control circuit for controlling the output of the detection signal to the outside;
The control circuit power supply line group includes a third power supply line to which a power supply potential of the output control circuit is supplied,
The third power line and the first power line are electrically separated on the substrate;
The sensing device according to claim 1 . A unit circuit for generating a detection signal corresponding to the state of the detection element;
A control circuit used for controlling the unit circuit;
A unit circuit power supply line group to which a power supply potential of the unit circuit is supplied;
And a control circuit power supply line group to which the power supply potential of the control circuit is supplied, is formed on an insulating substrate,
The unit circuit power line group and the control circuit power line group are electrically separated on the substrate ,
The control circuit includes:
A holding circuit for holding the detection signal;
The control circuit power supply line group includes a second power supply line to which a power supply potential of the holding circuit is supplied.
Sensing device. A unit circuit for generating a detection signal corresponding to the state of the detection element;
A control circuit used for controlling the unit circuit;
A unit circuit power supply line group to which a power supply potential of the unit circuit is supplied;
And a control circuit power supply line group to which the power supply potential of the control circuit is supplied, is formed on an insulating substrate,
The unit circuit power line group and the control circuit power line group are electrically separated on the substrate ,
The control circuit includes:
A holding circuit for holding the detection signal;
An output control circuit for controlling the output of the detection signal to the outside,
The control circuit power supply line group includes:
A second power supply line to which the power supply potential of the holding circuit is supplied;
A third power supply line to which a power supply potential of the output control circuit is supplied,
The second power line and the third power line are electrically separated on the substrate,
Sensing device. The unit circuit power supply line group includes a first high potential line to which a first potential is supplied and a first low potential line to which a second potential lower than the first potential is supplied,
The unit circuit is
A transistor that is disposed between a detection line to which the detection signal is output and the first high-level line and that generates the detection signal in accordance with a gate potential;
The detection element is disposed between a gate of the transistor and the first low-level line;
The sensing device according to claim 5 or 6 . The second power supply line includes a third high level line to which a fifth potential is supplied and a third low level line to which a sixth potential lower than the fifth potential is supplied.
The holding circuit is
A capacitive element having a first electrode and a second electrode to which the third low-level line is connected;
The first electrode is connected to the input side, and the amplifier is connected to the third high level line and the third low level line,
8. The sensing device according to claim 1, 2, 3, 5, 6, or 7 . An electronic device including any of the sensing device according to claim 1 to 8.

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