JP5248432B2 - Operational amplifier - Google Patents

Description

  The present invention relates to a folded cascode operational amplifier suitable for high-frequency operation, and more particularly to an operational amplifier that reduces the influence of high-frequency external noise (radiation fog).

  FIG. 3 shows a conventional folded cascode operational amplifier. Reference numeral 10 denotes an input side differential amplifier circuit, which includes PNP transistors Q1 and Q2, a current source I1 connected to the emitters of the transistors Q1 and Q2, input resistors R1 and R2, and load resistors R3 and R4. Reference numeral 20 denotes a grounded base amplifier circuit that inputs the differential output signal of the differential amplifier circuit 10 to the emitter, and includes current sources I2 and I3, grounded NPN transistors Q3 and Q4, a base bias NPN transistor Q5, and a base resistance. R5. Transistor Q5 and resistor R5 constitute a base bias circuit. The above “differential amplifier circuit 10 + base ground amplifier circuit 20” constitutes a folded cascode amplifier circuit. Reference numeral 30 denotes an emitter follower circuit that receives the output signal of the grounded base amplifier circuit 20 and converts the impedance thereof, and includes an NPN transistor Q6 and an emitter resistor R6. Reference numeral 40 denotes an output circuit, which includes a current source I4, an NPN transistor Q7, a phase compensation capacitor Cc, and an emitter resistor R7. 1 is a non-inverting input terminal, 2 is an inverting input terminal, 3 is an output terminal, 4 is a high voltage power supply terminal, and 5 is a low voltage power supply terminal.

  FIG. 4 shows a conventional operational amplifier in which the operational amplifier shown in FIG. The countermeasure for reducing high-frequency external noise is applied to the differential amplifier circuit 10 'on the input side. This countermeasure circuit is a π-type filter composed of capacitors C2 to C4. A basic high-frequency external noise reduction mechanism is a low-pass filter composed of a capacitor and a resistor. On the non-inverting input terminal 1 side, a low-pass filter composed of a capacitor C2 and a resistor R1, and on the inverting input terminal 2 side, a low-pass filter composed of a capacitor C3 and a resistor R2. A capacitor C4 connected between the bases of the transistors Q1 and Q2 is an in-phase bridge capacitor for matching impedance viewed from the respective input terminals in a high frequency region.

  In general, it is said that the high-frequency external noise reduction capability of an operational amplifier can be verified by evaluating frequency characteristics using a verification circuit shown in FIG. In FIG. 5A, RG1, RG2, RF1, RF2, and RL are resistors, and OP is an operational amplifier to be verified. The virtual model signal of high-frequency external noise is generally a signal power of −10 dBm of 400 MHz or higher, and is higher than the unity gain frequency of the operational amplifier OP when the virtual model signal Vnoise is input to the inverting input terminal 2. The lower the output gain at the frequency, the higher the external high-frequency noise can be reduced. FIG. 7 is a frequency characteristic obtained by simulating an operational amplifier using the verification circuit of FIG. 5A. S2 is a frequency characteristic of the operational amplifier of FIG. FIG. 4 shows the frequency characteristics of the operational amplifier shown in FIG. 4 in which measures against high frequency external noise are taken, and S3 is better than S2.

  In the above description, the operational amplifier described in FIG. 4 has been described as a conventional operational amplifier that has taken measures to reduce high-frequency external noise. In general, an operational amplifier that uses an operational amplifier and a CR circuit is used in an operational amplifier. High frequency noise countermeasures are known (for example, see paragraph 0009 of Patent Document 1).

JP 2006-179596 A

  However, in practice, the high-frequency external noise is applied to the entire operational amplifier chip, and the high-frequency external noise is input to all nodes of the operational amplifier. The circuit of FIG. 4 in which countermeasures against high-frequency external noise are taken has the configuration of “differential amplifier 10 ′ + base ground amplifier circuit 20”, so that the node C of the collector of the transistor Q 1 is also greatly affected by high-frequency external noise. The reason will be described below.

で表される。 The impedance R _A of the node A on the non-inverting input terminal 1 side, the impedance R _B of the node B between the resistor R1 and the base of the transistor Q1, and the magnitude of the impedance R _C of the node C are as follows: the impedance as gm1 transconductance of R _S, the transistor Q1,

It is represented by

  The resistor R1 connected to the non-inverting input terminal 1 is a resistance component that is almost installed as an ESD protection element, and is selected from 100Ω to 2kΩ, but tends to approach 0Ω as much as possible due to the strictness of recent DC specifications. It is in. Therefore, in order to filter the high-frequency external noise signal input from the node B, the value of the capacitor C2 must be selected to be a considerably large value.

となる。 In the arithmetic circuit of FIG. 4, when the values of the capacitors C2 to C4 are 2 pF and the values of the resistors R1 and R2 are 200 Ω, the cutoff frequency fc1 is

It becomes.

  As described above, the high-frequency external noise mixed from the node B can be reduced by the capacitors C2 to C4 and the resistors R1 and R2. Further, the high-frequency external noise mixed from the node A also passes through the node B, and can be similarly reduced.

By the way, for the high frequency external noise directly irradiated to the node C, if the impedance _RC is small, the amplitude of the high frequency external noise is reduced, so that there is no big problem. However, in the operational amplifier designed with low current consumption, The impedance R _{C of the} node C does not appear small.

この式（３’）によれば、インピーダンスＲ_Cの値は約２６０Ωとなる。なお、詳細に計算すると、２６０Ωよりもいくらか大きくなるが、ここでは計算は割愛する。 In practice, the collector current of the transistor Q1 is gm1 = 0.95m [1 / Ω] when the 25 .mu.A, the value of the impedance R _C is about 520Ω from equation (3). When the operational amplifier operates in the high frequency region, the current amplification factor β of the transistor Q1 becomes β≈1, and Equation (3) becomes Equation (3 ′).

According to this equation (3 ′), the value of the impedance R _C is about 260Ω. Note that, when calculated in detail, it is somewhat larger than 260Ω, but the calculation is omitted here.

What is important is that when the actual resistance component of the impedance R _C of the node C becomes larger than 200Ω, high-frequency external noise can be applied thereto as a voltage. This will be examined from the viewpoint of the gain of the operational amplifier.

となる。 The configuration of “differential amplifier 10 ′ + grounded base amplifier circuit 20” in the operational amplifier of FIG. 4 is as follows: if the node C of the emitter of transistor Q1 of differential amplifier 10 ′ is the signal input point, “base grounded amplifier circuit + base This is equivalent to the ground amplification circuit 20 ". Therefore, the voltage gain A _V in this case, the input voltage Vnoise, the impedance of the node D and R _D, the voltage of the node D and V _D, when the the transconductance of transistor Q4 gm4,

It becomes.

  This equation (5) indicates that even if a signal is input to the node C, it can be amplified with the same gain. At this time, if the collector current of the transistor Q1 is 13 mA or more, the actual resistance component in the high frequency region of the node C is 1Ω or less from the equation (3 ′), and even if a signal of −10 dBm is input and converted into voltage, Therefore, even if high frequency external noise is irradiated, it can be said that the influence is small.

  However, since the actual operational amplifier with reduced current consumption operates with a small collector current of several tens of μA, the actual resistance component of the node C takes a significant value of 200Ω or more, and the influence of high-frequency external noise cannot be ignored. As the operational amplifier is designed to have a lower current consumption, the collector current of the transistor Q1 is reduced, and as a result, the impedance of the node C tends to be very high.

  There has never been an example in which a countermeasure has been taken at node C that shows a significant resistance component as the current consumption becomes lower and requires high-frequency external noise reduction. The conventional operational amplifier of FIG. 4 can reduce high-frequency external noise superimposed from nodes A and B, but cannot reduce high-frequency external noise superimposed from node C.

  P3 in FIG. 8 causes the virtual model signal Vnoise to be directly input to the node C of the emitters of the transistors Q1 and Q2 of the differential amplifier 10 ′ of the operational amplifier in FIG. 4 as shown in FIG. It is a frequency characteristic at the time of using the verification circuit of (b). This characteristic P3 is almost the same as the characteristic P2 when the virtual model signal Vnoise is input similarly to the conventional operational amplifier of FIG. 3 without countermeasures, and has no ability to reduce high-frequency external noise.

  The calculation of the gain after the node D, which is the collector of the transistor Q4, is omitted by including it in the impedance of the node D. Even if high-frequency external noise is superimposed on a node subsequent to node D, the effect is only a small value as an input conversion error of the operational amplifier.

  An object of the present invention is to provide an operational amplifier capable of effectively reducing high-frequency external noise even if it is superimposed on the emitter node of the transistor of the differential amplifier on the input side.

  To achieve the above object, according to a first aspect of the present invention, there is provided a first current source having one end connected to the first power source terminal, and a first current source having an emitter connected in common to the other end of the first current source. First and second transistors of one conductivity type, a first load resistor connected between a collector of the first transistor and a second power supply terminal, and a collector of the second transistor and the second transistor A differential amplifier circuit on the input side composed of a second load resistor connected between the two power supply terminals, an emitter connected to the collector of the second transistor, and a collector connected to the first power supply terminal A third transistor of the second conductivity type connected via the current source of the first transistor, an emitter connected to the collector of the first transistor, and a collector connected to the first power supply terminal via the third current source Of the second conductivity type An operational amplifier comprising: a transistor; and a base-bias amplifier circuit that includes a base-bias circuit that applies a base bias to the third and fourth transistors, and that outputs an output from a collector of the fourth transistor. A first capacitor is connected between the emitter of the second transistor and the first power supply terminal, the second power supply terminal, or the ground.

  According to a second aspect of the present invention, in the operational amplifier according to the first aspect, a second capacitor is provided between the base of the first transistor and the first power supply terminal, the second power supply terminal, or the ground. A third capacitor between the base of the second transistor and the first power supply terminal, the second power supply terminal, or the ground, and the base of the first transistor and the second transistor A fourth capacitor is connected to the base, respectively.

  According to a third aspect of the present invention, in the operational amplifier according to the first or second aspect, the first to fourth transistors are replaced with FET transistors, the collector is a drain, the emitter is a source, and the base is a gate. The grounded base amplifier circuit is replaced with a grounded gate amplifier circuit.

  According to the present invention, since the first capacitor is connected to the emitters or sources of the first and second transistors of the differential amplifier on the input side, the high-frequency external noise superimposed on the emitters or sources of these transistors is reduced. Adverse effects can be effectively reduced.

1 is a circuit diagram of an operational amplifier according to a first embodiment of the present invention. It is a circuit diagram of the operational amplifier of the 2nd Example of this invention. It is a circuit diagram of the conventional operational amplifier which does not take a high frequency external noise reduction measure. It is a circuit diagram of the conventional operational amplifier which took the high frequency external noise reduction measure. (A), (b) is a circuit diagram of the verification circuit which inputs a virtual model signal to an operational amplifier. (A), (b) is a circuit diagram of the verification circuit of the operational amplifier which inputs a virtual model signal to the emitter of the transistor of the differential amplifier on the input side of the operational amplifier. It is a frequency characteristic figure of the operational amplifier by the verification circuit of Fig.5 (a). FIG. 7 is a frequency characteristic diagram of an operational amplifier using the verification circuit of FIGS. 5B and 6A and 6B.

  FIG. 1 shows an operational amplifier according to a first embodiment of the present invention. Reference numeral 10A denotes an input side differential amplifier circuit, which includes PNP transistors Q1 and Q2, a current source I1 connected to the emitters of the transistors Q1 and Q2, input resistors R1 and R2, load resistors R3 and R4, and a capacitor C1. . The capacitor C1 is connected between the emitters of the transistors Q1 and Q2 and the low voltage power supply terminal 5. The grounded base amplifier circuit 20, the emitter follower circuit 30, and the output circuit 40 have the same configuration as in FIG. Thus, the present embodiment is such that the low-pass filter capacitor C1 is connected between the emitters of the transistors Q1 and Q2 and the low-voltage power supply terminal 5 in the conventional operational amplifier of FIG.

  FIG. 2 shows an operational amplifier according to a second embodiment of the present invention. In this embodiment, in addition to the capacitor C1, capacitors C2 and C3 are connected between the bases of the transistors Q1 and Q2 and the ground, in addition to the capacitor C1, to the differential amplifier circuit 10B on the input side. The capacitor C4 connected between the bases is different from the operational amplifier of FIG.

  S1 in FIG. 7 is a frequency characteristic obtained by simulating the operational amplifier in FIG. 2 using the verification circuit in FIG. As described above, when the virtual model signal Vnoise is input to the inverting input terminal 2, the gain can be suppressed in the high-frequency region, almost equivalent to the frequency characteristic S3 of the operational amplifier of FIG.

  As shown in FIG. 6A, the virtual model signal Vnoise is input directly to the node C of the emitters of the transistors Q1 and Q2 of the differential amplifier 10B of the operational amplifier of FIG. It is a frequency characteristic at the time of using the verification circuit of (b). This characteristic P1 is similar to the characteristic P2 when the virtual model signal Vnoise is input to the conventional operational amplifier of FIG. 3 without high frequency external noise reduction measures and the conventional operational amplifier of FIG. 4 with high frequency external noise reduction measures. Similarly, when the virtual model signal Vnoise is input, the gain in the high frequency region is significantly suppressed as compared with the characteristic P3 in FIG. 6 (b). As a result, it has been clarified that even when high-frequency external noise is applied to the node C of the emitters of the transistors Q1 and Q2, it can be reduced.

Further, from equation (3), the collector impedance _RC increases as the collector currents of the transistors Q1 and Q2 are set smaller. Therefore, if the cutoff frequency is the same, the value of the capacitor C1 is reduced by equation (4). can do. That is, the value of the capacitor C1 can be reduced and the size can be reduced as the operational amplifier has a lower current consumption and the collector currents of the transistors Q1 and Q2 are designed to be lower.

  1 and 2, the capacitor C1 having one end connected to the emitters of the transistors Q1 and Q2 may be connected to the ground or the high voltage power supply terminal 4 at the other end. . Further, in the embodiment of FIG. 2, the other ends of the capacitors C2 and C3 whose one ends are connected to the bases of the transistors Q1 and Q2 are connected to the high voltage power supply terminal 4 or to the low voltage power supply terminal 5. May be. 1 and 2, the operational amplifier is composed of PNP-type and NPN-type bipolar transistors, but can be composed of NMOS and PMOS FET transistors.

1: non-inverting input terminal, 2: inverting input terminal, 3: output terminal, 4: high voltage power supply terminal, 5: low voltage power supply terminal 10, 10 ′, 10A, 10B: differential amplifier circuit on input side 20: base Grounding amplifier circuit 30: Emitter follower circuit 40: Output circuit

Claims (3)

A first current source having one end connected to a first power supply terminal; a first conductivity type first and second transistor having an emitter commonly connected to the other end of the first current source; A first load resistor connected between the collector of the first transistor and the second power supply terminal, and a second load resistor connected between the collector of the second transistor and the second power supply terminal An input side differential amplifier circuit comprising:
A third transistor of the second conductivity type having an emitter connected to the collector of the second transistor and a collector connected to the first power supply terminal via a second current source, and an emitter being the first transistor A base bias is applied to the fourth transistor of the second conductivity type, the collector of which is connected to the first power supply terminal via a third current source, and the third and fourth transistors. An operational amplifier including a base bias circuit and a grounded base amplification circuit that extracts an output from a collector of the fourth transistor;
An operational amplifier comprising a first capacitor connected between the emitters of the first and second transistors and the first power supply terminal, the second power supply terminal, or the ground. The operational amplifier according to claim 1,
A second capacitor between the base of the first transistor and the first power supply terminal, the second power supply terminal, or the ground; the base of the second transistor and the first power supply terminal; A third capacitor is connected between the second power supply terminal or the ground, and a fourth capacitor is connected between the base of the first transistor and the base of the second transistor, respectively. Operational amplifier. The operational amplifier according to claim 1 or 2,
The first to fourth transistors are replaced with FET transistors, the collector is replaced with a drain, the emitter is replaced with a source, the base is replaced with a gate, and the grounded base amplifier circuit is replaced with a grounded gate amplifier circuit. Operational amplifier.

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