JP5219646B2 - Video processing apparatus and video processing apparatus control method - Google Patents

Description

  The present invention relates to a video processing apparatus that converts a frame rate of a video signal and a control method thereof, and in particular, video processing that converts a frame rate of a composite video signal for multi-screen display that displays a plurality of videos on one screen. The present invention relates to an apparatus and a control method thereof.

  2. Description of the Related Art A technique for converting a frame rate of a video signal from a low frame rate to a high frame rate in a display device that displays a video such as a television, a mobile phone, or the like is known. Frame rate conversion is a technique in which a new interpolation frame is generated from a frame of an original video signal (low frame rate video signal), and the generated interpolation frame is interpolated between frames of the original video signal. As a result, the frame rate of the video signal can be converted from a low frame rate to a high frame rate, and the video can be displayed smoothly.

  As a method of generating an interpolated frame for converting the frame rate of the video signal from a low frame rate to a high frame rate, a motion vector is detected from the image of the frame of the original video signal, and an interpolated frame based on the detected motion vector There is a method for generating images. The motion vector is detected using, for example, a block matching method.

  In general, the block matching method is a method of detecting a motion vector by dividing an image of a plurality of frames in an original video signal into a plurality of image blocks of a predetermined size and performing matching in units of image blocks. A frame serving as a reference for detecting a motion vector among a plurality of frames is set as a reference frame. That is, the reference frame is a frame that is a target of motion vector detection. A frame that is referred to in order to detect a motion vector with respect to the reference frame is a reference frame. That is, the reference frame is an image frame that is a target of matching with the image blocks that form the base frame. Note that either the base image frame or the reference image frame may be earlier in time.

  When the input video signal is a video signal whose aspect ratio has been converted by a method such as letterbox or side panel, the video signal includes a video area where the video is displayed and a non-video area where the video is not displayed. It becomes. When block matching is performed on such a video signal, the interpolation frame image may be distorted. This is because it is difficult to detect an accurate motion vector in an image block including a boundary between a video area and a non-video area. Specifically, there is no movement (change) between the image of the base frame and the reference frame in the non-video area, whereas there is movement between the image of the base frame and the reference frame in the video area. Problems arise.

  A conventional technique in view of such a problem is disclosed in Patent Document 1, for example. Patent Document 1 discloses a technique for performing block matching only on a video region by detecting or setting a region outside the video, or acquiring information regarding the region outside the video from the outside. As a result, it is possible to prevent image distortion due to the boundary between the video area and the non-video area, and to generate an interpolated frame image with high image quality.

JP 2005006275 A

However, even if the technique disclosed in Patent Document 1 is used, the boundary of the video area cannot be detected accurately, and the image of the interpolation frame may be distorted. For example, such a problem occurs when the frame rate of a composite video signal for multi-screen display in which a plurality of videos are displayed on one screen is converted. Specifically, such a problem is that when the area where each video is arranged (arrangement area) is arranged like Picture in Picture (PinP), the boundary between the video arrangement areas is recognized as the video area. To be done. If a boundary between video arrangement areas is recognized as a video area, a motion vector is detected for an image block including such a boundary, which may cause erroneous detection of the motion vector. The same applies to the case where the arrangement areas of the respective images are arranged in Picture out Picture (PoutP) or overlapping each other.

  Therefore, the present invention can generate an interpolated frame image without image quality degradation even when the frame rate of a composite video signal for multi-screen display in which a plurality of videos are displayed on one screen is converted. An object of the present invention is to provide a video processing apparatus and a control method thereof.

The first image processing apparatus of the present invention includes:
An image processing apparatus for converting a frame rate of a composite image signal for multi-screen display that displays a plurality of images on one screen,
Motion vector detection means for detecting a motion vector from an image of an input frame of the composite image signal;
Interpolation image generation means for generating an image of an interpolation frame for interpolating between a plurality of input frames based on the detected motion vector;
Have
The motion vector detection means detects the motion vector individually for each of the arrangement areas based on layout information indicating the arrangement areas of the plurality of images arranged in the image of the input frame ,
When the size of the arrangement area of at least one image among the plurality of images arranged in the image of the input frame is changed, the same image as the image of the input frame is used as the image of the interpolation frame. It is output .

The second image processing apparatus of the present invention is
An image processing apparatus for converting a frame rate of a composite image signal for multi-screen display that displays a plurality of images on one screen,
Based on the layout information indicating the respective arrangement areas of the plurality of images arranged in the image of the input frame, the image of the input frame of the composite image signal is a plurality of corresponding to each of the plurality of arrangement areas. Dividing means for dividing into partial images;
Motion vector detection means for detecting a motion vector individually from each of the partial images;
Interpolation image generation means for generating an interpolation image corresponding to the partial image based on the detected motion vector;
A synthesis unit that synthesizes an interpolation image corresponding to each partial image generated by the interpolation image generation unit and generates an image of an interpolation frame for interpolating between a plurality of input frames;
I have a,
When the size of the arrangement area of at least one image among the plurality of images arranged in the image of the input frame is changed, the same image as the image of the input frame is used as the image of the interpolation frame. It is output .

The first image processing apparatus control method of the present invention includes:
A control method of an image processing apparatus for converting a frame rate of a composite image signal for multi-screen display for displaying a plurality of images on one screen,
Detecting a motion vector from an image of an input frame of the composite image signal;
Generating an interpolated frame image for interpolating between a plurality of input frames based on the detected motion vector;
Have
The motion vector is individually detected for each of the arrangement areas based on layout information indicating the arrangement areas of a plurality of images arranged in the image of the input frame ,
When the size of the arrangement area of at least one image among the plurality of images arranged in the image of the input frame is changed, the same image as the image of the input frame is used as the image of the interpolation frame. It is output .

The second image processing apparatus control method of the present invention includes:
A control method of an image processing apparatus for converting a frame rate of a composite image signal for multi-screen display for displaying a plurality of images on one screen,
Wherein the image of the input frame of the combined image signal, based on the respective layout information indicating the arrangement region of the plurality of images arranged in the image of the input frame, a plurality of corresponding to each of said plurality of layout areas Dividing into partial images;
Individually detecting a motion vector from each of the partial images;
Generating an interpolated image corresponding to the partial image based on the detected motion vector;
Synthesizing interpolation images corresponding to the generated partial images to generate an image of an interpolation frame for interpolating between a plurality of input frames; and
I have a,
When the size of the arrangement area of at least one image among the plurality of images arranged in the image of the input frame is changed, the same image as the image of the input frame is used as the image of the interpolation frame. It is output .

  According to the present invention, there is provided a video processing apparatus and a control method thereof capable of generating an interpolated frame without image quality degradation even when frame rate conversion is performed on a composite video signal combined on a multi-screen. Can be provided.

  The present invention relates to a video processing apparatus that converts a frame rate of a video signal and a control method thereof, and in particular, video processing that converts a frame rate of a composite video signal for multi-screen display that displays a plurality of videos on one screen. The present invention relates to an apparatus and a control method thereof. The multi-screen display includes, for example, a PinP display, a PoutP display, and a display in which a plurality of videos are arranged so as to overlap each other.

  Hereinafter, specific examples of the video processing apparatus according to the present embodiment will be described. In the following examples, a case will be described in which the video processing apparatus according to the present embodiment is applied to a multi-screen video display system that displays a composite video (video by a composite video signal). In the following examples, the video processing apparatus according to the present embodiment is an interpolation frame generation circuit unit.

<Example 1>
FIG. 1 is a block diagram showing a schematic configuration of a multi-screen video display system according to Embodiment 1 of the present invention. The multi-screen video display system 100 according to the present embodiment selects a plurality of video signals from a plurality of input video signals, and synthesizes the selected video signals into a composite video signal for multi-screen display. To do. Then, the frame rate of the composite video signal is converted.

  A multi-screen video display system 100 according to the present embodiment includes a tuner A 101, a tuner B 102, a recorder 103, a video selection circuit unit 104, a multi-screen synthesis circuit unit 105, an interpolation frame generation circuit unit 106, a control unit 109, a display device 110, and the like. Have The input video signal (input video signal) is not limited to the video signal input from the tuner A 101, the tuner B 102, and the recorder 103. The number of input video signals and the input form are not particularly limited.

  The video selection circuit unit 104 selects an arbitrary number of video signals from a plurality of input video signals.

The multi-screen synthesis circuit unit 105 synthesizes a plurality of video signals selected by the video selection circuit unit 104 based on a control signal from the control unit 109. Specifically, the multi-screen synthesis circuit unit 105 synthesizes a plurality of selected video signals into a synthesized video signal for multi-screen display. The multi-screen composition circuit unit 105 outputs a composite video signal 107 and a layout signal 108 as output signals. In this embodiment, it is assumed that the composite video signal is output in units of frames. The layout signal 108 is a signal representing layout information. The layout information indicates an arrangement area of each of a plurality of videos arranged in an image of a frame of the output synthesized video signal (a frame of the synthesized video signal input to the interpolation frame generation circuit unit 106; an input frame). This is information indicating a signal arrangement area. The layout signal 108 is, for example, a signal that represents the coordinates of the arrangement area for each video, an enable signal that represents the arrangement area for each video, and a signal that represents the color of the area outside the video.

  The interpolation frame generation circuit unit 106 generates an image of an interpolation frame for interpolating between a plurality of input frames based on the synthesized video signal 107 and the layout signal 108 synthesized by the multi-screen synthesis circuit unit 105. A detailed description of the operation of the interpolation frame generation circuit unit 106 will be described later.

  The control unit 109 is a control signal representing the enlargement / reduction ratio, arrangement coordinates, etc. of each video when the video signals selected by the video selection circuit unit 104 are combined, and the operation of the multi-screen synthesis circuit unit 105 The necessary control signal is output.

  The display device 110 displays a video according to the video signal output from the interpolation frame generation circuit unit 106. As the display device 110, a display device having an electron-emitting device, a display device having a plasma display element, a display device having a liquid crystal element, a display device having an organic EL element, or the like may be applied.

  2 and 3 show display examples of the video signal (synthesized video signal) synthesized by the multi-screen synthesis circuit unit 105. FIG. Note that FIGS. 2 and 3 are merely examples, and the number of video signals used for synthesis, the size and position of each video layout area in the synthesized video, and the like are not particularly limited. The type of signal to be combined is not limited to a video signal. The signal to be combined may be a signal related to data broadcasting or User Interface (UI) as long as the signal is suitable for frame rate conversion.

  FIG. 2 shows a display example when the synthesized video signal 107 is a video signal representing PoutP display of two videos. The composite video 200 is a video that is synthesized such that the first video 201 in the placement area A and the second video 202 in the placement area B are arranged adjacent to each other, and the other area becomes the outside video area 203.

  FIG. 3A shows a display example when the composite video signal 107 is a video signal representing a PinP display of two videos or a display arranged so that one video overlaps the other video. The composite video 300 in FIG. 3A is arranged so that the second video 302 in the placement area B exists in the first video 301 in the placement area A, and the other area becomes the outside video area 303. It is the image that was made. FIG. 3B is a diagram showing only the first video 301 in the placement area A, excluding the second video 302 and the outside video area 303 in the placement area B, in the composite video 300. FIG. 3C shows only the second video 302 in the arrangement area B in the composite video 300.

  Next, the interpolation frame generation circuit unit 106 will be described in detail. FIG. 4 is a block diagram illustrating an example of a functional configuration of the interpolation frame generation circuit unit 106. The interpolation frame generation circuit unit 106 includes a frame memory 401, a motion vector detection unit 402, an interpolation image generation unit 403, a signal switching unit 404, a timing control unit 406, and the like.

  The frame memory 401 stores an input frame image. As the frame memory 401, a recording medium such as a volatile memory, a nonvolatile memory, or a hard disk may be applied. Note that the frame memory 401 also stores images of previously input frames. The number of frame images input in the past stored in the frame memory 401 may be greater than or equal to the number necessary to generate an interpolated frame image.

  The motion vector detection unit 402 detects a motion vector from the image of the input frame of the composite video signal. For example, a block matching method may be used for detecting the motion vector. In the present embodiment, the motion vector detection unit 402 individually detects a motion vector for each arrangement region of a plurality of videos arranged in the image of the input frame based on the layout signal 108 (layout information). . A detailed description of the operation of the motion vector detection unit 402 will be described later.

  The interpolated image generation unit 403 generates an interpolated frame image based on the motion vector detected by the motion vector detection unit 402. The generated interpolated frame image is temporarily stored in the frame memory 401. A detailed description of the operation of the interpolated image generation unit 403 will be described later.

  The signal switching unit 404 switches the video signal 405 output to the display device 110. Specifically, the signal switching unit 404 switches between a signal representing an input frame image stored in the frame memory 401 and a signal representing an interpolation frame image generated by the interpolation image generation unit 403.

  The timing control unit 406 transmits signals necessary for these operations to the frame memory 401, the motion vector detection unit 402, the interpolation image generation unit 403, and the signal switching unit 404. Signals necessary for these operations are, for example, a synchronization signal, a timing control signal, a signal related to addressing of an image stored in the frame memory 401, and the like. The signal related to image addressing is used, for example, to select a video signal to be output to the display device 110 by the signal switching unit 404.

  Hereinafter, functions of the motion vector detection unit 402 and the interpolation image generation unit 403 will be described in detail.

  The motion vector detection unit 402 detects a motion vector for each image block from the image of the input frame among the images of the plurality of frames stored in the frame memory 401. Here, the motion vector detection unit 402 limits the search range of motion vectors based on the layout signal 108 (layout information). Hereinafter, a case where the layout information is information representing the coordinates of the four corners of the arrangement area of each video arranged in the image of the input frame will be described.

  For example, in the case of the synthesized video 200 illustrated in FIG. 2, the motion vector detection unit 402 detects a motion vector only within the arrangement area A based on the coordinates of the four corners of the arrangement area A included in the layout signal 108. Thereby, a motion vector for the first video 201 is detected. Similarly, for the second video 202, a motion vector is detected only from within the arrangement region B. For the out-of-video region 203, no motion vector is detected, and the magnitude of the motion vector is regarded as zero.

In the case of the composite video 300 shown in FIG. 3, the motion vector detection unit 402 moves the motion vector only from the arrangement area A based on the coordinates of the four corners of the arrangement area A and the arrangement area B included in the layout signal 108. Is detected. Specifically, the motion vector is detected only in the area between the area connecting the coordinates of the four corners of the arrangement area A and the area connecting the coordinates of the four corners of the arrangement area B.
Thereby, a motion vector for the first video 301 is detected. For the second video 302, as in the case of FIG. 2, based on the coordinates of the four corners of the arrangement area B, motion vectors are detected only from within the arrangement area B. For the out-of-video region 303, the motion vector is not detected and the magnitude of the motion vector is regarded as zero. The size and shape of the image block can be arbitrarily set.

  In this embodiment, the coordinates of the four corners of each placement area are used to distinguish between the placement area A and the placement area B, but other information and signals can be used as long as the information and signals can be used to determine each placement area. Also good.

  The interpolated image generation unit 403 generates the same pixel value as that of the image of the input frame for the out-of-video regions 203 and 303 because the magnitude of the motion vector is zero. When the layout signal 108 includes information representing the background color, the pixel value representing the background color is generated instead of generating the same pixel value as the image of the input frame for the out-of-video area. May be. For the arrangement area A and the arrangement area B, pixel values at respective positions are generated based on individually detected motion vectors. Thereby, an image of the interpolation frame is generated. The interpolated image generation unit 403 temporarily stores the generated interpolated frame image in the frame memory 401.

  As described above, in this embodiment, when the frame rate of the composite video signal is converted, a motion vector is individually detected for each arrangement region of a plurality of videos arranged in the image of the input frame. As a result, even when the frame rate of the composite video signal is converted, it is possible to eliminate the influence of the boundary line between the images arranged in the image of the input frame, so that an accurate motion vector can be detected. Can do. Further, since each of the plurality of video images arranged in the image of the input frame is identified by a simple method using a layout signal, a detection circuit for detecting these arrangement regions becomes unnecessary, which is large. Cost reduction effect can be obtained. Needless to say, it is possible to prevent an image block matching the image block of the video in one arrangement area from being detected from the video in the other arrangement area (false detection).

<Example 2>
Next, a multi-screen video display system according to Embodiment 2 of the present invention will be described. The multi-screen video display system according to the present embodiment has the same configuration as the multi-screen video display system according to the first embodiment shown in FIG. However, the configuration of the interpolation frame generation circuit unit 106 is different from that of the first embodiment (in order to distinguish from the first embodiment, the interpolation frame generation circuit unit 106 is described as the interpolation frame generation circuit unit 2106 in this embodiment). . Therefore, in this embodiment, only the interpolation frame generation circuit unit 2106 shown in FIG. 5 will be described. In the present embodiment, a case will be described in which the composite video signal is a video signal representing a composite video as shown in FIGS. However, as in the first embodiment, FIGS. 2 and 3 are merely examples, and the number of video signals used for synthesis, the size and position of the arrangement area of each video in the synthesized video are not particularly limited.

  FIG. 5 is a block diagram illustrating an example of a functional configuration of the interpolation frame generation circuit unit 2106 according to the present embodiment. The interpolation frame generation circuit unit 2106 includes a division unit 501, a frame memory 502, a motion vector detection unit 503, an interpolation image generation unit 504, an image synthesis unit 505, a timing control unit 507, and the like.

The dividing unit 501 converts an input frame image of the composite video signal 107 into a plurality of arrangement areas (arrangement areas of a plurality of videos arranged in the input frame image) based on the layout signal 108 (layout information). Are divided into a plurality of partial images corresponding to each of. For example, the composite video 200 shown in FIG. 2 is divided into a first video 201 in the placement area A, a second video 202 in the placement area B, and a non-video area 203 based on the layout signal 108. A composite image 300 shown in FIG. 3 includes a first image 301 in the arrangement area A excluding the arrangement area B shown in FIG. 3B, a second image 302 in the arrangement area B shown in FIG. It is divided into outer areas 303.

  The frame memory 502 stores a partial image (an image of each arrangement area) of the input frame image divided by the dividing unit 501 as an input frame image. The frame memory 502 also stores a partial image of a frame image input in the past. The number of partial images of the frame images input in the past stored in the frame memory 502 may be more than the number necessary to generate an interpolation image described later.

  The motion vector detection unit 503 individually detects a motion vector from each of the partial images of the input frame image. For example, a block matching method may be used for detecting the motion vector. In the case of the composite video 200 shown in FIG. 2, motion vectors are individually detected for the first video 201 and the second video 202 stored separately as partial images in the frame memory 502. Similarly, in the case of the composite video 300 shown in FIG. 3, motion vectors are individually detected for the first video 301 shown in FIG. 3B and the second video 302 shown in FIG. The size and shape of the image block can be arbitrarily set.

  The interpolation image generation unit 504 generates an interpolation image corresponding to the partial image (partial image of the interpolation frame image) based on the motion vector detected by the motion vector detection unit 503. That is, in the case of the composite video 200 shown in FIG. 2, interpolation images are individually generated from the partial image corresponding to the first video 201 in the arrangement area A and the partial image corresponding to the second video 202 in the arrangement area B. . Similarly, in the case of the composite video 300 shown in FIG. 3, interpolation images are individually generated from the partial image corresponding to the first video 301 in the arrangement area A and the partial image corresponding to the second video 302 in the arrangement area B. The Interpolated images corresponding to the generated partial images are temporarily stored in the frame memory 502. In addition, what is necessary is just to produce | generate each interpolation image by the method similar to the method of producing the image of the conventional interpolation frame.

  The image synthesis unit 505 synthesizes each partial image of the input frame or an interpolation image corresponding to each partial image generated by the interpolation image generation unit 504. As a result, an image of the input frame or an image of the interpolation frame is generated (an image of the input frame is generated by combining the partial images of the input frame, and an image of the interpolation frame is generated by combining the interpolated images. ) Specifically, the image composition unit 505 performs composition processing based on the layout signal 108 and the timing control signal from the timing control unit 507. Whether to generate an input frame image or an interpolation frame image is controlled by a timing control signal. The generated input frame image or interpolation frame image is output to the display device 110 as a video signal 506.

  The timing control unit 507 transmits signals necessary for these operations to the frame memory 502, the motion vector detection unit 503, the interpolated image generation unit 504, and the image synthesis unit 505. Signals necessary for the operations of the frame memory 502, the motion vector detection unit 503, the interpolation image generation unit 504, and the image synthesis unit 505 are, for example, synchronization signals, timing control signals, and images stored in the frame memory 502. Signals related to addressing. The signal related to image addressing is used, for example, to select a partial image or an interpolated image used for composition by the image composition unit 505.

As described above, in this embodiment, when the frame rate of the composite video signal is converted, the image of the input frame is divided into partial images, and the motion vector is detected individually from each partial image. Then, based on the detected motion vector, an interpolation image corresponding to the partial image is generated and synthesized to generate an image of the interpolation frame. As a result, even when the frame rate of the composite video signal is converted, it is possible to eliminate the influence of the boundary line between the images arranged in the image of the input frame, so that an accurate motion vector can be detected. Can do.

<Example 3>
FIG. 6 is a block diagram showing a schematic configuration of a multi-screen video display system according to Embodiment 3 of the present invention. The multi-screen video display system 3100 according to the present embodiment is obtained by adding only the control signal 600 to the multi-screen video display system 100 described in the first and second embodiments shown in FIG. The control signal 600 is a signal indicating that the size of the arrangement area of at least one video among a plurality of videos arranged in the image of the input frame is changed. Part 3106. In this embodiment, in order to distinguish from the first embodiment, the interpolation frame generation circuit unit 106 and the control unit 109 are referred to as an interpolation frame generation circuit unit 3106 and a control unit 3109, respectively. In the present embodiment, the interpolation frame generation circuit unit 3106 will be described, and the other units are the same as those in the first and second embodiments shown in FIG.

  In this embodiment, a case will be described in which the synthesized video signal is a video signal representing a synthesized video (multi-screen display) of two videos as shown in FIG. FIG. 7A is a diagram illustrating a state before the display size of two videos (the size of the arrangement area) is changed. FIG. 7B is a diagram showing a state in which the display size is changed for the video (first video 701 and second video 702) in the composite video 700 shown in FIG. Specifically, in FIG. 7B, a reduction process is performed on the first video 701 in the arrangement area A (first video 705), and an enlargement process is performed on the second video 702 in the arrangement area B. (Second video 706). However, as in the first and second embodiments, FIG. 7 is merely an example, and the number of video signals used for synthesis, the size and position of the arrangement area of each video in the synthesized video are not particularly limited.

  8, 9, 10 and 11 are block diagrams illustrating an example of a functional configuration of the interpolation frame generation circuit unit 3106 according to the present embodiment. 8 and 9 are diagrams showing a case where the control signal 600 in FIG. 6 is input to the timing control units 801 and 802, respectively. The components other than the timing control units 801 and 802 are the same as the interpolation frame generation circuit units 106 (first embodiment) and 2106 (second embodiment) shown in FIGS.

  8 and 9, when the control signal 600 is output from the control unit 3109, the input frame image stored in the frame memory (frame memories 401 and 502) is output at the timing of outputting the interpolation frame image. To do. That is, when the size of the arrangement area of at least one video among the plurality of videos arranged in the image of the input frame has changed, the processing is performed.

  Specifically, the timing control unit 801 in FIG. 8 gives a signal to the signal switching unit 404 so as to output the image of the input frame stored in the frame memory 401 while receiving the control signal 600. Further, while receiving the control signal 600, the timing control unit 802 illustrated in FIG. 9 gives a signal to the image synthesis unit 505 so as to synthesize and output a partial image of the image of the input frame.

  10 and 11 are diagrams illustrating a case where the control signal 600 in FIG. 6 is input to the motion vector detection units 803 and 804, respectively. Note that the components other than the motion vector detection units 803 and 804 are the same as the interpolation frame generation circuit units 106 (first embodiment) and 2106 (second embodiment) shown in FIGS.

  10 and 11, when the control signal 600 is output from the control unit 3109, all motion vectors to be detected are regarded as zero (whether or not motion vectors are detected). That is, when the size of the arrangement area of at least one video among the plurality of videos arranged in the image of the input frame has changed, the processing is performed. Thereby, the same image as the image of the input frame is generated as the image of the interpolation frame.

  Since it is difficult to detect an accurate motion vector from an input frame image while the size of the arrangement area is changing, an interpolated frame image is generated by a simple method for such an image. Is preferred. In the present embodiment, as described above, when the control signal is output from the control unit when the frame rate of the composite video signal is converted, the same image as the input frame image is used as the interpolation frame image. Is output. Thereby, it is possible to exclude a situation that is not suitable for detecting a motion vector from an image of an input frame.

  As described above, in the first to third embodiments, even when frame rate conversion is performed on a synthesized video signal synthesized on a multi-screen, an interpolation frame without image quality degradation can be generated. .

FIG. 1 is a block diagram showing a schematic configuration of a multi-screen video display system according to Embodiment 1 of the present invention. FIG. 2 is a diagram illustrating a display example when the composite video signal is a video signal representing PoutP display of two videos. FIG. 3A is a diagram illustrating a display example in a case where the composite video signal is a video signal representing a PinP display of two videos or a display arranged so that the other video overlaps one video. 3 (b) is a diagram showing only the first video in the synthesized video, and FIG. 3 (c) is a diagram showing only the second video in the synthesized video. FIG. 4 is a block diagram illustrating an example of a functional configuration of the interpolation frame generation circuit unit according to the first embodiment of the present invention. FIG. 5 is a block diagram illustrating an example of a functional configuration of the interpolation frame generation circuit unit according to the second embodiment of the present invention. FIG. 6 is a block diagram showing a schematic configuration of a multi-screen video display system according to Embodiment 3 of the present invention. FIG. 7 is a diagram showing a display example when the synthesized video signal is a video signal representing a synthesized video of two videos, and FIG. 7A shows a state before changing the display size of the two videos. FIG. 7B is a diagram showing a state in which the display size is changed for the video in the composite video shown in FIG. FIG. 8 is a block diagram illustrating an example of a functional configuration of the interpolation frame generation circuit unit according to the third embodiment of the present invention. FIG. 9 is a block diagram illustrating an example of a functional configuration of the interpolation frame generation circuit unit according to the third embodiment of the present invention. FIG. 10 is a block diagram illustrating an example of a functional configuration of the interpolation frame generation circuit unit according to the third embodiment of the present invention. FIG. 11 is a block diagram illustrating an example of a functional configuration of the interpolation frame generation circuit unit according to the third embodiment of the present invention.

Explanation of symbols

106, 2106, 3106 Interpolation frame generation circuit unit 107 Composite video signal 108 Layout signal 401, 502 Frame memory 402, 503, 803, 804 Motion vector detection unit 403, 504 Interpolated image generation unit 404 Signal switching unit 405, 506 Video signal 406 , 507, 801, 802 Timing control unit 501 Dividing unit 505 Image composition unit 600 Control signal

Claims (8)

An image processing apparatus for converting a frame rate of a composite image signal for multi-screen display that displays a plurality of images on one screen,
Motion vector detection means for detecting a motion vector from an image of an input frame of the composite image signal;
Interpolation image generation means for generating an image of an interpolation frame for interpolating between a plurality of input frames based on the detected motion vector;
Have
The motion vector detection means detects the motion vector individually for each of the arrangement areas based on layout information indicating the arrangement areas of the plurality of images arranged in the image of the input frame ,
When the size of the arrangement area of at least one image among the plurality of images arranged in the image of the input frame is changed, the same image as the image of the input frame is used as the image of the interpolation frame. An image processing apparatus that is output . An image processing apparatus for converting a frame rate of a composite image signal for multi-screen display that displays a plurality of images on one screen,
Based on the layout information indicating the respective arrangement areas of the plurality of images arranged in the image of the input frame, the image of the input frame of the composite image signal is a plurality of corresponding to each of the plurality of arrangement areas. Dividing means for dividing into partial images;
Motion vector detection means for detecting a motion vector individually from each of the partial images;
Interpolation image generation means for generating an interpolation image corresponding to the partial image based on the detected motion vector;
A synthesis unit that synthesizes an interpolation image corresponding to each partial image generated by the interpolation image generation unit and generates an image of an interpolation frame for interpolating between a plurality of input frames;
I have a,
When the size of the arrangement area of at least one image among the plurality of images arranged in the image of the input frame is changed, the same image as the image of the input frame is
An image processing apparatus, characterized in that it is output as an image of an interpolation frame . A frame memory for storing an image of the input frame;
Among a plurality of images arranged in the image of the input frame, when the size of the placement area of the at least one image has changed, the timing at which the image of the input frame wherein the memory outputs the image of the interpolation frame The image processing apparatus according to claim 1 , wherein the image processing apparatus outputs the image . Among a plurality of images arranged in the image of the input frame, when the size of the placement area of the at least one image is changing, by regarding the magnitude of the motion vector to zero, the input frame the image processing apparatus according to claim 1 or 2 is an image of the same image, characterized in that it is produced as an image of the interpolation frame. A control method of an image processing apparatus for converting a frame rate of a composite image signal for multi-screen display for displaying a plurality of images on one screen,
Detecting a motion vector from an image of an input frame of the composite image signal;
Generating an interpolated frame image for interpolating between a plurality of input frames based on the detected motion vector;
Have
The motion vector is individually detected for each of the arrangement areas based on layout information indicating the arrangement areas of a plurality of images arranged in the image of the input frame ,
When the size of the arrangement area of at least one image among the plurality of images arranged in the image of the input frame is changed, the same image as the image of the input frame is used as the image of the interpolation frame. A method for controlling an image processing apparatus, characterized by being output . A control method of an image processing apparatus for converting a frame rate of a composite image signal for multi-screen display for displaying a plurality of images on one screen,
Based on the layout information indicating the respective arrangement areas of the plurality of images arranged in the image of the input frame, the image of the input frame of the composite image signal is a plurality of corresponding to each of the plurality of arrangement areas. Dividing into partial images;
Individually detecting a motion vector from each of the partial images;
Generating an interpolated image corresponding to the partial image based on the detected motion vector;
Synthesizing interpolation images corresponding to the generated partial images to generate an image of an interpolation frame for interpolating between a plurality of input frames; and
I have a,
When the size of the arrangement area of at least one image among the plurality of images arranged in the image of the input frame is changed, the same image as the image of the input frame is used as the image of the interpolation frame. A method for controlling an image processing apparatus, characterized by being output .   The image processing apparatus has a frame memory for storing an image of the input frame,
  Timing at which the stored image of the input frame outputs the image of the interpolation frame when the size of the arrangement area of at least one of the plurality of images arranged in the image of the input frame has changed Output in
The method of controlling an image processing apparatus according to claim 5 or 6,   When the size of the arrangement area of at least one image among a plurality of images arranged in the image of the input frame is changed, the size of the motion vector is regarded as zero, whereby the input frame The same image as that of the interpolation frame is generated as the image of the interpolation frame
The method of controlling an image processing apparatus according to claim 5 or 6,

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