JP5211972B2 - Display device and driving method of display device - Google Patents

Description

  The present invention relates to a display device and a display device driving method.

  In an active matrix type display device used for a liquid crystal display device or the like, a plurality of scanning signal lines arranged in the row direction of the display unit and a plurality of data signal lines arranged in the column direction of the display unit A display pixel is connected in the vicinity of the intersection with and a predetermined voltage is applied to the display pixel for display. A conventional display device requires a data signal line and a scanning signal line corresponding to each display pixel. Therefore, the number of output terminals of the source driver connected to the data signal line (the number of connection terminals between the source driver and the data signal line) for driving the data signal line is also required for the number of data signal lines, and the scanning signal The number of output terminals of the gate driver connected to the line for driving the scanning signal line (the number of connection terminals between the gate driver and the scanning signal line) is also required by the number of scanning signal lines.

  As one of proposals for reducing the total number of output terminals (number of connection terminals), for example, there is a method disclosed in Patent Document 1. In Patent Document 1, two TFTs are provided on both sides of one data signal line, the first scanning signal line is connected to one of the two TFTs, and the second scanning signal line is connected to the other TFT. doing. Further, an image output circuit for applying an image signal for four pixels is provided, and a first switching element and a second switching element for switching an image signal applied to the data signal line are provided, and the first control line and the second control line are provided. By switching between the first switching element and the second switching element in accordance with the control signal from, one data signal line can be shared by two TFTs, that is, two display pixels. That is, instead of doubling the number of scanning signal lines corresponding to pixel rows designed with a relatively small number of rows, the number of data signal lines corresponding to pixel columns designed with a relatively large number of columns. By reducing the ½, the total number of output terminals is prevented from increasing.

JP 2006-201315 A

  However, in the method of Patent Document 1, as described above, the number of data signal lines can be reduced to half the number of display pixels for one row, but the number of scanning signal lines is one column. The number of display pixels is twice as many as the number of display pixels per minute, and it is not always possible to reduce the total number of output terminals (number of connection terminals).

  The present invention has been made in view of the above circumstances, and provides a display device and a display device driving method capable of reducing the number of data signal lines without significantly increasing the number of scanning signal lines. For the purpose.

In order to achieve the above object, the display device according to claim 1 includes a first scanning signal line, a second scanning signal line, and a third scanning signal line that are extended in a predetermined direction; A data signal line arranged to intersect the first scanning signal line, the second scanning signal line, and the third scanning signal line, and a gate electrode are connected to the first scanning signal line. And one of a source electrode and a drain electrode is connected to the data signal line, and is connected to the other of the source electrode and the drain electrode of the first thin film transistor, and the data A first pixel electrode to which a gray scale signal supplied to the signal line is applied via the first thin film transistor and a gate electrode are connected to the second scanning signal line, and a source electrode and a drain electrode are connected. One of the gate electrodes is connected to the second thin film transistor connected to the first pixel electrode, and the other of the source electrode and the drain electrode of the second thin film transistor, and supplied to the data signal line A second pixel electrode to which the gradation signal to be applied is applied via the first pixel electrode, a gate electrode is connected to the second scanning signal line, and one of the source electrode and the drain electrode Is connected to the other one of the source electrode and the drain electrode of the third thin film transistor, and the gradation signal supplied to the data signal line is the first thin film transistor connected to the data signal line. A third pixel electrode applied via the thin film transistor 3 and a gate electrode connected to the third scanning signal line, and a source electrode One of the drain electrodes and the drain electrode is connected to the fourth thin film transistor connected to the third pixel electrode, and the other of the source electrode and the drain electrode of the fourth thin film transistor, and is connected to the data signal line. A fourth pixel electrode to which the supplied gradation signal is applied via the third pixel electrode, a gradation signal to be held by the fourth pixel electrode, and a gradation to be held by the second pixel electrode A signal-side drive circuit that supplies each gradation signal to the data signal line in a time-sharing manner in the order of a signal, a gradation signal held in the third pixel electrode, and a gradation signal held in the first pixel electrode If the during the first period of the gradation signal to be held in the fourth pixel electrode to the data signal lines is supplied, the second thin film transistor to the second scanning signal line and the front by the signal side driving circuit Supplying a scan signal of the first signal level to the fourth TFT in the ON state to the third scan signal lines supplies a scan signal of the first signal level to the serial third thin film transistor to an on state The second scanning signal line is connected to the second scanning signal line in a second period after the first period after the supply of the gradation signal to be held in the fourth pixel electrode from the signal side driver circuit is finished. A thin-film transistor and the third thin-film transistor are turned off. A scanning signal having a second signal level different from the first signal level is supplied and a scanning signal having the first signal level is supplied to the third scanning signal line. and, the gradation signal to be held in the third pixel electrode to the data signal line by the signal side driving circuit is supplied to the third period consecutive to the second period, the second To turn off the fourth TFT in the third scanning signal line and supplies a scan signal of the first signal level to the second thin film transistor and the third thin film transistor in the ON state to the scanning signal Line A scanning side driving circuit for supplying a scanning signal of the second signal level, and the second pixel electrode and the third pixel electrode are disposed adjacent to each other along the predetermined direction, One pixel electrode and the third pixel electrode are disposed adjacent to each other along a direction orthogonal to the predetermined direction, and the second pixel electrode and the fourth pixel electrode are in the predetermined direction. Are arranged so as to be adjacent to each other in a direction orthogonal to the gray scale signal held by the first pixel electrode, the gray scale signal held by the second pixel electrode, and held by the third pixel electrode Make The tone signal and the gradation signal held in the fourth pixel electrode are such that the polarity of the voltage applied to the liquid crystal in a predetermined frame is the gradation signal held in the first pixel electrode and the third pixel electrode. Between the gradation signal held in the second pixel electrode and the gradation signal held in the fourth pixel electrode so as to be equal to each other. And the grayscale signal held in the second pixel electrode and the grayscale signal held in the third pixel electrode are set to be different from each other, and the scanning drive circuit The supply of the scanning signal of the second signal level to the third scanning signal line in two periods is started at a timing before the timing at which the second period ends, and the second scanning signal in the second period. Said first signal to the line The level scanning signal is supplied until the end of the second period .

The display device according to claim 2 is the display device according to claim 1 , wherein the scanning side driving circuit is configured to cause the data signal line to be held on the fourth pixel electrode by the signal side driving circuit. When the adjustment signal is supplied and the scanning side driving circuit supplies the second scanning signal line with the scanning signal of the first signal level for turning on the second thin film transistor and the third thin film transistor. In addition, the scanning signal of the first signal level for turning on the fourth thin film transistor is supplied to the third scanning signal line.
According to a third aspect of the present invention, in the display device according to the second aspect , the scanning side driving circuit is configured such that the second pixel electrode is held on the data signal line by the signal side driving circuit. When the adjustment signal is supplied, the first scanning signal line is supplied with the first signal level scanning signal for turning on the first thin film transistor, and the second scanning signal line is supplied with the first scanning signal line. 2 is supplied with a scanning signal of the first signal level to turn on the second thin film transistor and the third thin film transistor, and a gradation signal to be held in the first pixel electrode on the data signal line by the signal side driving circuit is provided. when being supplied, the second scan signal is supplied to the scanning signal of the first signal level to the first thin film transistor to the oN state to the first scanning signal line And supplying a scan signal of the second signal level to the second thin film transistor and the third thin film transistor in the off state to the line.
According to a fourth aspect of the present invention, in the display device according to any one of the first to third aspects, the fourth pixel electrode supplied to the data signal line by the signal side driving circuit is held by the fourth pixel electrode. The gradation signal is precharged to the second pixel electrode.

According to a fifth aspect of the present invention, in the display device according to the first aspect , the fourth scanning signal line disposed so as to intersect the data signal line, and the gate electrode is the fourth scanning. A fifth thin film transistor connected to the signal line and having one of a source electrode and a drain electrode connected to the data signal line; and the other of the source electrode and the drain electrode of the fifth thin film transistor A fifth pixel electrode connected to the grayscale signal supplied to the data signal line is applied via the fifth thin film transistor, and a gate electrode is connected to the first scanning signal line, and a source A sixth thin film transistor in which one of an electrode and a drain electrode is connected to the fifth pixel electrode; and the source electrode in the sixth thin film transistor. And a sixth pixel electrode connected to the other of the drain electrodes and applied to the data signal line through the fifth pixel electrode, and a gate electrode connected to the third pixel electrode. A seventh thin film transistor connected to the scanning signal line and having one of a source electrode and a drain electrode connected to the data signal line; and the other of the source electrode and the drain electrode in the seventh thin film transistor And a seventh pixel electrode to which a grayscale signal supplied to the data signal line is applied via the seventh thin film transistor, and the signal side driver circuit includes the fourth pixel. A gradation signal held by the electrode, a gradation signal held by the seventh pixel electrode, a gradation signal held by the second pixel electrode, and a level held by the third pixel electrode. Each of the gradation signals is time-divided in the order of a signal, a gradation signal held in the sixth pixel electrode, a gradation signal held in the first pixel electrode, and a gradation signal held in the fifth pixel electrode. In particular, the data signal line is supplied.
The display device according to a sixth aspect is the display device according to the fifth aspect , wherein the scanning side driving circuit is configured to cause the data signal line to be held on the seventh pixel electrode by the signal side driving circuit. When the adjustment signal is supplied and the scanning side driving circuit supplies the third scanning signal line with the scanning signal of the first signal level for turning on the seventh thin film transistor and the fourth thin film transistor. In addition, the scan signal of the first signal level for turning on the fifth thin film transistor is supplied to the fourth scan signal line, and the first thin film transistor and the sixth scan signal line are supplied to the first scan signal line. The scanning signal having the first signal level for turning on the thin film transistor is supplied.
A display device according to a seventh aspect is the display device according to the fifth or sixth aspect , wherein the gradation signal held in the seventh pixel electrode supplied to the data signal line by the signal side driver circuit. Is precharged to the sixth pixel electrode.

The display device according to claim 8 is the display device according to any one of claims 1 to 7 , wherein the signal-side driver circuit outputs a grayscale signal to be held in the second pixel electrode to the data signal. A precharge signal set so that the polarity of the voltage applied to the liquid crystal is equal to the gradation signal held in the second pixel electrode in a period prior to the period supplied to the line is the data signal line And the scanning side drive circuit turns on the first thin film transistor on the first scanning signal line when the precharge signal is supplied to the data signal line by the signal side driving circuit. The scanning signal having the first signal level is supplied.
In the display device according to claim 9 , in the display device according to claim 8 , the scanning side drive circuit is configured such that the precharge signal is supplied to the data signal line by the signal side drive circuit. In addition, the scan signal of the first signal level for turning on the second thin film transistor is supplied to the second scan signal line.
In the display device according to claim 10 , in the display device according to claim 8 , the scanning side drive circuit has finished supplying the precharge signal to the data signal line by the signal side drive circuit. The scanning signal of the first signal level for turning on the second thin film transistor is supplied to the second scanning signal line later.

In the display device according to claim 11 , the first scanning signal line and the second scanning signal line, the first scanning signal line, and the second scanning signal line that are extended in a predetermined direction. And a data signal line arranged to cross the gate and a gate electrode connected to the first scanning signal line, and one of a source electrode and a drain electrode connected to the data signal line A thin film transistor connected to the other one of the source electrode and the drain electrode of the first thin film transistor, and supplied with the grayscale signal supplied to the data signal line through the first thin film transistor. One pixel electrode and a gate electrode are connected to the second scanning signal line, and one of a source electrode and a drain electrode is connected to the first pixel electrode. A gray scale signal connected to the other of the source electrode and the drain electrode of the transistor and the second thin film transistor and supplied to the data signal line is applied via the first pixel electrode. A signal for supplying each of the gradation signals to the data signal line in a time-sharing manner in the order of the pixel signal of the first pixel electrode, the gradation signal held in the second pixel electrode, and the gradation signal held in the first pixel electrode. and the side driving circuit, a first period in which the gradation signal to be held in the second pixel electrode to the data signal line by the signal side driving circuit is supplied, the second to the second scanning signal line the scan signal of the first signal level to the first thin film transistor to the oN state to the first scanning signal line and supplies a scan signal of the first signal level to a thin film transistor on-state Feeding, and the second consecutive periods in the first period after the supply of the gradation signal to be held in the from the signal side driving circuit second pixel electrode is finished, the said first scan signal line No. The first thin film transistor is turned off, a scanning signal having a second signal level different from the first signal level is supplied, and a scanning signal having the first signal level is supplied to the second scanning signal line. A grayscale signal to be held in the first pixel electrode is supplied to the data signal line by the side driver circuit, and the second scanning signal line is supplied to the second scanning signal line in a third period that is continuous with the second period . to turn off the thin film transistors, scanning supplies scan signals of the first signal level to the first thin film transistor to the oN state to the first scanning signal line and supplies a scan signal of the second signal level A side drive circuit, wherein the signal side drive circuit is configured to supply a voltage applied to the liquid crystal in a period before the period in which the grayscale signal held in the second pixel electrode is supplied to the data signal line. A precharge signal set so that the polarity is equal to the gradation signal held in the second pixel electrode is supplied to the data signal line, and the scan side drive circuit is operated by the signal side drive circuit. When a charge signal is supplied to the data signal line, the first signal level scan signal for turning on the first thin film transistor is supplied to the first scan signal line, and in the second period The supply of the scanning signal of the second signal level to the second scanning signal line is started at a timing before the timing at which the second period ends, and the first scanning signal line is supplied to the first scanning signal line in the second period. Said And performing the supply of the signal level of the scanning signal to the timing of the second period ends.

A display device driving method according to a twelfth aspect of the present invention includes a first scanning signal line, a second scanning signal line, and a third scanning signal line that are extended in a predetermined direction, and the first scanning. A signal line, a data signal line arranged to intersect the second scanning signal line and the third scanning signal line, and a gate electrode are connected to the first scanning signal line, and a source One of an electrode and a drain electrode is connected to the data signal line, and the first thin film transistor is connected to the other of the source electrode and the drain electrode of the first thin film transistor and supplied to the data signal line The first pixel electrode to which the gradation signal to be applied is applied via the first thin film transistor, the gate electrode is connected to the second scanning signal line, and the source electrode and the drain electrode One is connected to the second thin film transistor connected to the first pixel electrode, and the other one of the source electrode and the drain electrode in the second thin film transistor, and is supplied to the data signal line. A second pixel electrode to which a signal is applied via the first pixel electrode, a gate electrode is connected to the second scanning signal line, and one of a source electrode and a drain electrode is the data signal. A third thin film transistor connected to a line, and a gradation signal connected to the other one of the source electrode and the drain electrode of the third thin film transistor, and supplied to the data signal line passes through the third thin film transistor. A third pixel electrode and a gate electrode applied via the first scanning signal line, a source electrode and a drain electrode; One of the electrodes is connected to the fourth thin film transistor connected to the third pixel electrode, and the other of the source electrode and the drain electrode in the fourth thin film transistor, and is supplied to the data signal line And a fourth pixel electrode to which a gradation signal is applied via the third pixel electrode, wherein the gradation signal to be held in the fourth pixel electrode, The grayscale signals to be held in the second pixel electrode, the grayscale signals to be held in the third pixel electrode, and the grayscale signals to be held in the first pixel electrode are sequentially time-divided. a data signal side driving step for supplying a data signal line, by the data signal side driving step, the first period tone signal to be held in the fourth pixel electrode to the data signal lines is supplied, the first A second scanning signal line is supplied with a scanning signal of a first signal level for turning on the second thin film transistor and the third thin film transistor, and the fourth thin film transistor is turned on on the third scanning signal line. The first period after the scanning signal of the first signal level is supplied and the supply of the gradation signal to be held in the fourth pixel electrode from the signal side driving circuit is completed by the data signal side driving step. In a second period continuous to the second scanning signal line, a scanning signal having a second signal level different from the first signal level is supplied to the second scanning signal line to turn off the second thin film transistor and the third thin film transistor. the scan signal of the first signal level is supplied to the third scan signal line as well as, by the data signal side driving step, the said data signal line Gradation signal to be held in the third pixel electrode is supplied, the in the third period consecutive second period, the second thin film transistor and the third thin film transistor in the ON state to the second scanning signal line and a scanning side drive step for supplying a scanning signal of the second signal level to turn off the fourth TFT in the third scanning signal line and supplies a scan signal of the first signal level to Yes, and the scanning side drive step, the supply of the second signal level of the scanning signal to the third scanning signal line said second period starts at a timing before the timing ends at the second period In the second period, the supply of the scanning signal of the first signal level to the second scanning signal line is performed until the end of the second period .

  According to the present invention, the number of data signal lines can be reduced without significantly increasing the number of scanning signal lines.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
[First Embodiment]
As shown in FIG. 1, a schematic overall configuration of a display device 1 according to the present invention is as follows. A display panel 10, a source driver 20, a gate driver 30, a pixel data generation circuit 40, a common voltage generation circuit 50, and timing control. A circuit 60 and a power generation circuit 70 are included.

  As shown in FIG. 2, the display panel 10 has a configuration in which a liquid crystal LC is sandwiched between two transparent substrates 16 and 17 that are arranged to face each other and are bonded by a sealing material 15. One substrate 16 has a plurality of scanning signal lines G (for example, n scanning signal lines) extended in the row direction and a plurality of data signal lines S (for example, extended in the column direction). m data signal lines), a plurality of pixel electrodes E arranged in a matrix so as to correspond to each display pixel P, and a plurality of thin film transistors in which source electrodes are connected to the corresponding pixel electrodes E (TFT). On the other substrate 17, a common electrode 18 set at a common potential between the display pixels P is formed so as to face each pixel electrode E. Note that alignment films 13 and 14 for defining the initial alignment of the liquid crystal are formed on the opposing surfaces of the pixel electrode E and the common electrode 18, respectively.

  In the display panel 10, as shown in FIG. 3, a plurality of scanning signal lines G (j) extending in the row direction and a plurality of data signal lines S (i) extending in the column direction are provided. Are arranged to cross each other, more specifically, to be orthogonal to each other. Then, the first pixel electrode E (i, j,) connected to the two thin film transistors so as to correspond to each intersection (i, j) of the scanning signal line G (j) and the data signal line S (i). a first display pixel P (i, j, a) having a) and a second display pixel P (i) having a second pixel electrode E (i, j, b) connected to one thin film transistor , J, b) are formed adjacent to each other in the extending direction of the scanning signal line G (j). That is, in each pixel row of the display panel 10, the first display pixel P (i, j, a) and the second display pixel P (i, j, b) are alternately arranged. In each pixel column, either the first display pixel P (i, j, a) or the second display pixel P (i, j, b) is arranged to be continuous. Here, i = 1, 2,..., M, j = 1, 2,.

  In the first display pixel P (i, j, a), a first pixel electrode E (i, j, a) and a first thin film transistor T (i, j, a) are formed. The electrode E (i, j, a) is connected to the source electrode of the first thin film transistor T (i, j, a). The first thin film transistor T (i, j, a) has a gate electrode connected to the scanning signal line G (j) and a drain electrode connected to the data signal line S (i).

  The second display pixel P (i, j, b) is formed with a second pixel electrode E (i, j, b) and a second thin film transistor T (i, j, b). The pixel electrode E (i, j, b) is connected to the source electrode of the second thin film transistor T (i, j, b). The second thin film transistor T (i, j, b) has a first pixel electrode E (i, j + 1) in which the gate electrode is arranged on the scanning signal line G (j) and the drain electrode is arranged as a pixel row on the rear stage side. , A), respectively. That is, the second display pixel P (i, j, b) includes the first pixel electrode E (i, j, b) in which the gradation signal supplied to the data signal line S (i) is arranged as a pixel row on the rear stage side. The second pixel electrode E (i, j, b) is written via j + 1, a).

  That is, in the display panel 10, one data signal line is assigned to two columns of display pixels. In such a pixel configuration of the display panel 10, the number of data signal lines can be halved compared to the case where one data signal line is assigned to each column of display pixels. is there. In other words, the number of data signal lines can be halved with respect to the number of display pixels for one row. At this time, it is not necessary to greatly increase the number of scanning signal lines. That is, for example, if the number of display pixels is 240 rows, the number of scanning signal lines may be 240 + 1, and the number of scanning signal lines can be made approximately equal to the number of display pixels for one column.

  Here, a specific configuration of each display pixel will be described with reference to FIGS. 4, 5, 6, and 7. One substrate 16 is provided with a scanning signal line G (j) including a gate electrode 51. A storage capacitor line 48 is provided in the same layer as the scanning signal line G (j). That is, the scanning signal line G (j) and the auxiliary capacitance line 48 are formed together. A gate insulating film 52 is provided on the entire upper surface. A semiconductor thin film 53 made of intrinsic amorphous silicon is provided on the upper surface of the gate insulating film 52. A channel protective film 54 is provided in the substantially central portion of the overlapping region with the scanning signal line G (j) on the upper surface of the semiconductor thin film 53. Contact layers 55 and 56 made of n-type amorphous silicon are provided on both sides of the upper surface of the channel protective film 54 and on the upper surface of the semiconductor thin film 53 on both sides thereof. A source electrode 57 is provided on the upper surface of one contact layer 55. Further, a data signal line S (i) or a connection wiring L including the drain electrode 58 is provided on the upper surface of the other contact layer 56. Then, the first thin film transistor T (i, j, a) or the second thin film transistor T (i, j, a) is formed by the gate electrode 51, the gate insulating film 52, the semiconductor thin film 53, the channel protective film 54, the contact layers 55 and 56, the source electrode 57, and the drain electrode 58. Thin film transistor T (i, j, b) is configured. The source electrode 57 of the first thin film transistor T (i, j, a) and the drain electrode 56 of the second thin film transistor T (i, j-1, b) formed in the previous pixel row are electrically connected to each other. It also serves as a connection wiring L for connection.

  A planarizing film 59 is provided on the entire top surface of the gate insulating film 52 including the first thin film transistor T (i, j, a), the second thin film transistor T (i, j, b), and the like. The planarizing film 59 is provided with a contact hole 60 at a location corresponding to the source electrode 57. On the upper surface of the planarizing film 59, pixel electrodes E (i, j, a) and E (i, j, b) made of ITO are provided. The pixel electrodes E (i, j, a) and E (i, i, j and b) are electrically connected to the source electrode 57 through the contact hole 60.

  Here, the portion of the auxiliary capacitance line 48 that overlaps the pixel electrodes E (i, j, a) and E (i, j, b) is an auxiliary capacitance electrode. The auxiliary capacitor Cs is formed by the overlapped portion. In each display pixel P (i, j, a), P (i, j, b), the pixel electrode E (i, j, a), between E (i, j, b) and the common electrode 18 is used. By changing the alignment state of the liquid crystal LC to be arranged on the basis of the potential difference between the pixel electrode E (i, j, a), E (i, j, b) and the common electrode 18, The display state can be controlled.

  The source driver 20 is connected to each data signal line S (i), and the pixel data generation circuit 40 is based on horizontal control signals (clock signal, start signal, latch operation control signal, etc.) output from the timing control circuit 60. The pixel data corresponding to each display pixel supplied from is acquired in a predetermined unit, and the gradation signal corresponding to the acquired pixel data is supplied to the data signal line at a predetermined timing.

  The gate driver 30 is connected to each scanning signal line G (j), receives a vertical control signal from the timing control circuit 60, and is connected to the scanning signal line G (j). A scanning signal for turning on or off a) and the second thin film transistor T (i, j, a) is supplied to the scanning signal line G (j).

  The pixel data generation circuit 40 generates pixel data corresponding to each display pixel from, for example, a video signal (analog or digital) supplied from the outside of the display device 1 and outputs the pixel data to the source driver 20. Here, an inversion signal (FRP) is input from the timing control circuit 60 to the pixel data generation circuit 40 every predetermined period (for example, one frame, one field, one line). The pixel data generation circuit 40 inverts the bit value of the pixel data output to the source driver 20 every time an inversion signal is input. In this way, the polarity of the gradation signal applied to the display pixel is inverted every predetermined period by inverting the bit value of the pixel data every predetermined period. As a result, the voltage applied to the liquid crystal in each display pixel can be AC driven.

  Based on the inverted signal output from the timing control circuit 60, the common voltage generation circuit 50 generates a common signal Vcom whose polarity is inverted every predetermined period and supplies the common signal Vcom to the common electrode 18.

  The timing control circuit 60 generates various control signals such as a vertical control signal, a horizontal control signal, and an inversion signal. For example, the inversion signal is supplied to the pixel data generation circuit 40 and the common signal generation circuit 50, and the vertical control signal is supplied to the gate driver. 30, the horizontal control signal is output to the source driver 20.

  The power supply generation circuit 70 generates power supply voltages Vgh and Vgl necessary for generating a scanning signal and supplies them to the gate driver 30, and also generates a power supply voltage Vsh necessary for generating a grayscale signal to generate a source. It is supplied to the driver 20. The power supply generation circuit 70 generates a logic power supply Vcc and supplies it to the source driver 20 and the gate driver 30.

  Next, the operation of the display device 1 will be described based on the timing chart shown in FIG. Here, in FIG. 8, in order from the top, the gradation signal supplied to the data signal line S (i), the scanning signal supplied to the first scanning signal line G (1), and the second scanning. Scan signal supplied to signal line G (2), scan signal supplied to third stage scan signal line G (3), scan signal supplied to fourth stage scan signal line G (4), 5 The scanning signal supplied to the scanning signal line G (5) at the stage, the scanning signal supplied to the scanning signal line G (6) at the sixth stage, and the first pixel electrode E corresponding to the pixel row at the third stage. Application state of gradation signal in (i, 3, a) Application state of gradation signal in second pixel electrode E (i, 3, b) corresponding to third pixel row, fourth pixel Application state of gradation signal in first pixel electrode E (i, 4, a) corresponding to the row Second pixel electrode E (i, 4, b) corresponding to the fourth pixel row The gradation signal application state in the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row and the second gradation signal application state corresponding to the fifth pixel row Application state of gradation signal in pixel electrode E (i, 5, b), application state of gradation signal in first pixel electrode E (i, 6, a) corresponding to the sixth pixel row, six stages The gradation signal application state in the second pixel electrode E (i, 6, b) corresponding to the pixel row of the eye and the common signal Vcom supplied to the common electrode 18 are shown. Further, in FIG. 8, each gradation signal supplied by the data signal line S (i) is indicated by a coordinate value on the display panel 10 corresponding to the pixel data. Note that old indicates an applied state based on the gradation signal written in the previous frame.

  Here, in the display device 1, the pixel data related to the first pixel electrode E (i, j, a) and the pixel data related to the second pixel electrode E (i, j, b) are ½ horizontal. Input to the source driver 20 alternately every period. That is, pixel data related to the second pixel electrode E (i, j, b) corresponding to a predetermined pixel row is input in the first half of each horizontal period, and the predetermined pixel row and Pixel data relating to the first pixel electrode E (i, j, a) corresponding to the same pixel row is input. Further, the inversion signal is controlled so that the bit value (that is, the polarity of the gradation signal) of the input pixel data is inverted every frame and every horizontal period. In FIG. 8, the sign of “+” is given to the gradation signal when the bit inversion of the pixel data is not performed, and “−” is applied to the gradation signal when the bit inversion of the pixel data is performed. The code | symbol is attached | subjected. That is, in the display pixel to which the gradation signal with the “+” sign is written, the voltage applied to the liquid crystal becomes positive or “+” is written, and the gradation signal with the “−” sign is written. In the display pixel, the voltage applied to the liquid crystal becomes negative or “−” is written. The relationship between the voltage level of the common signal Vcom and the voltage level of the gradation signal is, for example, as shown in FIG.

  As described above, as shown in FIG. 8, the gradation signal and the second pixel electrode E (i, j, b) related to the first pixel electrode E (i, j, a) in each pixel row in the frame. The grayscale signals according to are-(i, 1, b),-(i, 1, a), + (i, 2, b), + (i, 2, a),-(i, 3, b),-(i, 3, a),... are supplied to the data signal line S (i) in a time division manner. Then, such supply of the gradation signal to the data signal line S (i) is repeatedly executed in each frame. Note that the polarity of each gradation signal is inverted for each frame.

  In the display device 1, the scanning signal input to each scanning signal line G (j) is set to High (Vgh) twice in each frame.

  First, in a predetermined horizontal period of each frame, for example, in the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row. A gradation signal for display is written. In the horizontal period, the scanning signal of the third scanning signal line G (3) and the scanning signal of the fourth scanning signal line G (4) are High in synchronization with the start timing T11a of the horizontal period. To. Here, in the horizontal period, during the period in which the scanning signal of the third scanning signal line G (3) is High, for example, the gradation signal − (i, 3, b) is applied to the data signal line S (i). A period from when the supply is started to immediately before the supply of the gradation signal-(i, 3, a) to be supplied next to the gradation signal-(i, 3, b) is completed. Further, in the horizontal period, during the period in which the scanning signal of the fourth scanning signal line G (4) is High, for example, the gradation signal − (i, 3, b) is supplied to the data signal line S (i). Is a period from the start to the end of the supply of the gradation signal-(i, 3, b).

  By setting the scanning signal of the third scanning signal line G (3) to High at timing T11a, the first thin film transistor T (i, 3, a) connected to the third scanning signal line G (3). ) And the second thin film transistor T (i, 3, b) are turned on. Further, by setting the scanning signal of the fourth scanning signal line G (4) to High, the first thin film transistor T (i, 4, a) connected to the fourth scanning signal line G (4). Then, the second thin film transistor T (i, 4, b) is turned on. As a result, the gradation signal − (i, 3, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 3, a) corresponding to the third pixel row, and Data is written to the second pixel electrode E (i, 3, b) and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row, and corresponds to the third pixel row. The first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) and the first display pixel P (i, 4,4) corresponding to the fourth pixel row. In a), display corresponding to the gradation signal-(i, 3, b) is performed.

  Next, at timing T11b, the scanning signal of the fourth scanning signal line G (4) is changed from High to Low (Vgl) while the scanning signal of the third scanning signal line G (3) remains High. At the timing T11b, the second thin film transistor T (i, 3, b) connected to the third-stage scanning signal line G (3) remains in the on state, but the fourth-stage scanning signal line G The first thin film transistor T (i, 4, a) connected to (4) is turned off. For this reason, the second pixel electrode E (i, 3, b) corresponding to the third pixel row holds the gradation signal − (i, 3, b) corresponding to the coordinates. Note that, in the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row, a gradation signal − (i, 3, b) different from the coordinates is held. However, as will be described later, this state is resolved in approximately one horizontal period to two horizontal periods.

  At timing T11b, the gradation signal applied to the data signal line S (i) immediately after that is switched from − (i, 3, b) to − (i, 3, a). Therefore, the first pixel electrode E (i, 3, a) corresponding to the third pixel row is connected to the third scanning signal line G (3) that is continuously in the ON state. A gradation signal-(i, 3, a) is written through the first thin film transistor T (i, 3, a), and the first display pixel P (i, 3, a) corresponding to the third pixel row is written. In a), display corresponding to the gradation signal-(i, 3, a) is performed.

  Next, at timing T11c, the scanning signal of the scanning signal line G (3) at the third stage is changed from High to Low. As a result, the gradation signal − (i, 3, a) is held in the first pixel electrode E (i, 3, a) corresponding to the third pixel row. Further, between the second pixel electrode E (i, 3, b) corresponding to the third pixel row and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Is disconnected by the second thin film transistor T (i, 3, b) connected to the scanning signal line G (3) at the third stage.

  In this way, in the horizontal period, the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row are displayed. Is written for.

  In the next horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. A gradation signal is written. In the horizontal period, the scanning signal of the fourth scanning signal line G (4) and the scanning signal of the fifth scanning signal line G (5) are High in synchronization with the start timing T12a of the horizontal period. To. Here, in the horizontal period, during the period when the scanning signal of the fourth scanning signal line G (4) is High, for example, the gradation signal + (i, 4, b) is applied to the data signal line S (i). A period from when supply is started to immediately before the supply of the gradation signal + (i, 4, a) to be supplied next to the gradation signal + (i, 4, b) is completed. In the horizontal period, for example, the gradation signal + (i, 4, b) is supplied to the data signal line S (i) during the period in which the scanning signal of the fifth scanning signal line G (5) is High. Is a period from the start to the end of the supply of the gradation signal + (i, 4, b).

  By setting the scanning signal of the fourth scanning signal line G (4) to High at timing T12a, as described above, the first thin film transistor T ( i, 4, a) and the second thin film transistor T (i, 4, b) are turned on. Further, by setting the scanning signal of the fifth scanning signal line G (5) to High, the first thin film transistor T (i, 5, a) connected to the fifth scanning signal line G (5). Then, the second thin film transistor T (i, 5, b) is turned on. As a result, the gradation signal + (i, 4, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row and Data is written to the second pixel electrode E (i, 4, b) and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, and corresponds to the fourth pixel row. The first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) and the first display pixel P (i, 5,5) corresponding to the fifth pixel row. In a), display corresponding to the gradation signal + (i, 4, b) is performed.

  Next, at timing T12b, the scanning signal of the fifth scanning signal line G (5) is changed from High to Low while the scanning signal of the fourth scanning signal line G (4) is kept High. At this timing T12b, the second thin film transistor T (i, 4, b) connected to the second-stage scanning signal line G (4) remains on, but the fifth-stage scanning signal line G The first thin film transistor T (i, 5, a) connected to (5) is turned off. For this reason, the gradation signal + (i, 4, b) corresponding to the coordinates is held in the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row. In the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, a gradation signal + (i, 4, b) different from the coordinates is held. However, this state is also resolved in approximately one horizontal period to two horizontal periods.

  At timing T12b, the gradation signal applied to the data signal line S (i) immediately after that is switched from + (i, 4, b) to + (i, 4, a). For this reason, the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row is connected to the fourth scanning signal line G (4) which is continuously turned on. A gradation signal + (i, 4, a) is written through the first thin film transistor T (i, 4, a), and the first display pixel P (i, 4, a) corresponding to the fourth pixel row. In a), display corresponding to the gradation signal + (i, 4, a) is performed. That is, the display based on the gradation signal different from the coordinates is canceled, and the display based on the gradation signals corresponding to the coordinates is performed.

  Next, at a timing T12c, the scanning signal of the fourth scanning signal line G (4) is changed from High to Low. As a result, the gradation signal + (i, 4, a) is held in the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Further, between the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row. Is cut off by the second thin film transistor T (i, 4, b) connected to the fourth scanning signal line G (4).

  In this way, in the horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. Is written for.

  In the subsequent horizontal period, the above-described gradation signal is sequentially written to the display pixels corresponding to each stage, so that an appropriate video display to be displayed based on the video signal in the display device 1 is performed. Will be made.

  As described above, in the display device 1, the number of scanning signal lines is greatly increased by connecting another display pixel to a display pixel connected to a predetermined data signal line via a thin film transistor. Thus, the number of data signal lines and the number of output terminals of the source driver can be reduced. As a result, it is possible to increase the bonding pitch width of the LSI constituting the source driver, and when the LSI constituting the source driver is mounted on the display panel 10 and joined, the joining can be easily performed. It becomes possible. Further, since the number of output terminals of the source driver can be reduced, the LSI constituting the source driver 20 can be downsized.

  In the first embodiment described above, the case where the scanning signal of the fourth scanning signal line G (4) is set to High at the timing T11a has been described. However, the scanning signal line G (4) of the fourth scanning line is described. As shown in FIG. 10, the timing at which the scanning signal is initially set to High in each frame may be between the timing T11a and the timing T11x that is a half horizontal period before the timing T11a. Similarly, the timing at which the scanning signal of the scanning signal line G (5) at the fifth stage is first set to High in each frame may be between the timing T12a and the timing T12x that is a half horizontal period before the timing T12a. Good. That is, the timing at which the scanning signal of each scanning signal line G (j) is first set to High in each frame may be between the timing shown in FIG. 8 and the timing preceding by 1/2 horizontal period.

[Second Embodiment]
The display device in the second embodiment has the same general configuration as that of the display device 1 shown in FIG. In the first embodiment, the case where the scanning signal input to each scanning signal line G (j) is set to High (Vgh) twice in each frame has been described. However, in the second embodiment, The case where the scanning signal input to each scanning signal line G (j) is set to High (Vgh) three times in each frame will be described.

  Hereinafter, the operation of the display device 1 in the second embodiment will be described based on the timing chart shown in FIG. Here, in FIG. 11, in order from the top, the gradation signal supplied to the data signal line S (i), the scanning signal supplied to the first scanning signal line G (1), and the second scanning. Scan signal supplied to signal line G (2), scan signal supplied to third stage scan signal line G (3), scan signal supplied to fourth stage scan signal line G (4), 5 A scanning signal supplied to the scanning signal line G (5) at the stage, a scanning signal supplied to the scanning signal line G (6) at the sixth stage, and a scanning signal line G (7) at the seventh stage. Scan signal, scan signal supplied to the eighth-stage scan signal line G (8), gradation signal application state at the first pixel electrode E (i, 3, a) corresponding to the third-stage pixel row Application state of gradation signal in second pixel electrode E (i, 3, b) corresponding to third pixel row, first pixel electrode corresponding to fourth pixel row Application state of gradation signal at (i, 4, a) Application state of gradation signal at second pixel electrode E (i, 4, b) corresponding to fourth pixel row, fifth pixel Application state of gradation signal at first pixel electrode E (i, 5, a) corresponding to row, gradation at second pixel electrode E (i, 5, b) corresponding to fifth pixel row Signal application state, gradation signal application state at the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row, second pixel electrode E corresponding to the sixth pixel row Application state of gradation signal at (i, 6, b), application state of gradation signal at first pixel electrode E (i, 7, a) corresponding to the seventh pixel row, pixel at seventh stage The application state of the gradation signal in the second pixel electrode E (i, 7, b) corresponding to the row, and the common signal Vcom supplied to the common electrode 18 are shown. There. Also in FIG. 11, each gradation signal supplied by the data signal line S (i) is indicated by a coordinate value on the display panel 10 corresponding to the pixel data. Note that old indicates an applied state based on the gradation signal written in the previous frame.

  Also in the second embodiment, the pixel data related to the first pixel electrode E (i, j, a) and the pixel data related to the second pixel electrode E (i, j, b) are halved. The signals are input to the source driver 20 alternately every horizontal period. That is, pixel data related to the second pixel electrode E (i, j, b) corresponding to a predetermined pixel row is input in the first half of each horizontal period, and the predetermined pixel row and Pixel data relating to the first pixel electrode E (i, j, a) corresponding to the same pixel row is input. Further, the inversion signal is controlled so that the bit value (that is, the polarity of the gradation signal) of the input pixel data is inverted every frame and every horizontal period. Also in FIG. 11, the sign of “+” is given to the gradation signal when pixel data bit inversion is not performed, and “−” is applied to the gradation signal when pixel data bit inversion is performed. The code | symbol is attached | subjected. Further, the relationship between the voltage level of the common signal Vcom and the voltage level of the grayscale signal is shown, for example, as shown in FIG.

  As described above, as shown in FIG. 11, the gradation signal and the second pixel electrode E (i, j, b) related to the first pixel electrode E (i, j, a) in each pixel row in the frame. The grayscale signals according to are-(i, 1, b),-(i, 1, a), + (i, 2, b), + (i, 2, a),-(i, 3, b),-(i, 3, a),... are supplied to the data signal line S (i) in a time division manner. Then, such supply of the gradation signal to the data signal line S (i) is repeatedly executed in each frame. Note that the polarity of each gradation signal is inverted for each frame.

  On the other hand, the scanning signal input to each scanning signal line G (j) is set to High (Vgh) three times in each frame.

  First, in a predetermined horizontal period of each frame, for example, in the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row. A gradation signal for display is written. In the horizontal period, the scanning signal of the scanning signal line G (3) at the third stage is set to High in synchronization with the start timing T21a of the horizontal period. At this time, the scanning signal of the scanning signal line G (4) at the fourth stage is set to High from the half horizontal period before the timing T21a. Further, in the horizontal period, during the period in which the scanning signal of the third scanning signal line G (3) is High, for example, the gradation signal − (i, 3, b) is supplied to the data signal line S (i). Is a period from the start of the first to the end of the supply of the gradation signal-(i, 3, a) to be supplied next to the gradation signal-(i, 3, b). Further, in the horizontal period, during the period in which the scanning signal of the fourth scanning signal line G (4) is High, for example, the gradation signal − (i, 3, b) is supplied to the data signal line S (i). Is a period from the start to the end of the supply of the gradation signal-(i, 3, b).

  By setting the scanning signal of the third scanning signal line G (3) to High at timing T21a, the first thin film transistor T (i, 3, a) connected to the third scanning signal line G (3). ) And the second thin film transistor T (i, 3, b) are turned on. Further, since the scanning signal of the fourth scanning signal line G (4) is High, the first thin film transistor T (i, 4, 4) connected to the fourth scanning signal line G (4). a) and the second thin film transistor T (i, 4, b) are in the ON state. As a result, the gradation signal − (i, 3, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 3, a) corresponding to the third pixel row, and Data is written to the second pixel electrode E (i, 3, b) and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row, and corresponds to the third pixel row. The first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) and the first display pixel P (i, 4,4) corresponding to the fourth pixel row. In a), display corresponding to the gradation signal-(i, 3, b) is performed.

  Next, at timing T21b, the scanning signal of the fourth scanning signal line G (4) is changed from High to Low (Vgl) while the scanning signal of the third scanning signal line G (3) is kept High. At this timing T21b, the second thin film transistor T (i, 3, b) connected to the third-stage scanning signal line G (3) remains on, but the fourth-stage scanning signal line G. The first thin film transistor T (i, 4, a) connected to (4) is turned off. For this reason, the second pixel electrode E (i, 3, b) corresponding to the third pixel row holds the gradation signal − (i, 3, b) corresponding to the coordinates.

  Further, at the timing T21c immediately after the timing T21b, the gradation signal applied to the data signal line S (i) is switched from-(i, 3, b) to-(i, 3, a). Therefore, the first pixel electrode E (i, 3, a) corresponding to the third pixel row is connected to the third scanning signal line G (3) that is continuously in the ON state. A gradation signal-(i, 3, a) is written through the first thin film transistor T (i, 3, a), and the first display pixel P (i, 3, a) corresponding to the third pixel row is written. In a), display corresponding to the gradation signal-(i, 3, a) is performed.

  Here, at this timing T21c, as part of the preliminary charging for the second display pixel P (i, 5, b) corresponding to the fifth pixel row, the fifth scanning signal line G (5) The scanning signal and the scanning signal of the sixth-stage scanning signal line G (6) are set to High. At this time, during the period when the scanning signal of the fifth scanning signal line G (5) is High, for example, the supply of the gradation signal-(i, 3, a) to the data signal line S (i) is started. To the period immediately before the end of the supply of the gradation signal + (i, 4, b) to be supplied next to the gradation signal − (i, 3, a). Also, during the period when the scanning signal of the sixth stage scanning signal line G (6) is High, for example, after the supply of the gradation signal-(i, 3, a) to the data signal line S (i) is started. A period until immediately before the supply of the gradation signal-(i, 3, a) is completed.

  Then, at the timing T21c, the scanning signal line G (5) at the fifth stage is set to High so that the first thin film transistor T (i, 5, a) and the second thin film transistor T (i, 5, b) are turned on. Further, by setting the scanning signal of the sixth scanning signal line G (6) to High, the first thin film transistor T (i, 6, a) connected to the sixth scanning signal line G (6). Then, the second thin film transistor T (i, 6, b) is turned on. As a result, the gradation signal − (i, 3, a) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, and Data is written in the second pixel electrode E (i, 5, b) and the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row, and corresponds to the fifth pixel row. The first display pixel P (i, 5, a), the second display pixel P (i, 5, b), and the first display pixel P (i, 6,6) corresponding to the sixth pixel row. In a), display corresponding to the gradation signal-(i, 3, a) is performed.

  That is, at the timing T21c, the second display pixel P (i, 5, b) corresponding to the fifth pixel row in which the gradation signal that was “+” written in the previous frame becomes “−” written in the current frame. ) Starts pre-charging in which “-” is written in advance. The gradation signal-(i, 3, a) also serves as a precharge signal for the second pixel electrode E (i, 5, b) corresponding to the fifth pixel row.

  Next, at timing T21d, the scanning signal of the third scanning signal line G (3) is changed from High to Low. As a result, the gradation signal − (i, 3, a) is held in the first pixel electrode E (i, 3, a) corresponding to the third pixel row. Further, between the second pixel electrode E (i, 3, b) corresponding to the third pixel row and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Is disconnected by the second thin film transistor T (i, 3, b) connected to the scanning signal line G (3) at the third stage.

  In this way, in the horizontal period, the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row are displayed. Is written for.

  At the timing T21d, the scanning signal of the sixth scanning signal line G (6) is also maintained at the third scanning signal line G while the scanning signal of the fifth scanning signal line G (5) is maintained high. Like the scanning signal (3), the signal is changed from High to Low. As a result, the gradation signal − (i, 3, a) is held in the second display pixel P (i, 5, b) corresponding to the fifth pixel row. That is, at the timing T21d, the above-described preliminary charging for the second display pixel P (i, 5, b) corresponding to the fifth pixel row is finished.

  In the next horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. A gradation signal is written. In the horizontal period, the scanning signal of the fourth scanning signal line G (4) is set to High in synchronization with the start timing T22a of the horizontal period. At this time, the scanning signal of the fifth scanning signal line G (5) is set to High before 1/2 horizontal period with respect to the timing T22a, that is, from the timing T21c described above.

  In the horizontal period, during the period in which the scanning signal of the fourth scanning signal line G (4) is High, for example, supply of the gradation signal + (i, 4, b) to the data signal line S (i) is started. Then, a period from when the gradation signal + (i, 4, a) to be supplied next to the gradation signal + (i, 4, a) is supplied to immediately before the supply is finished. At this time, the period during which the scanning signal of the fifth scanning signal line G (5) is High is as described above.

  By setting the scanning signal of the fourth scanning signal line G (4) to High at timing T22a, the first thin film transistor T (i, 4, a) connected to the fourth scanning signal line G (4). ) And the second thin film transistor T (i, 4, b) are turned on. Further, since the scanning signal of the fifth scanning signal line G (5) is High, the first thin film transistor T (i, 5,5) connected to the fifth scanning signal line G (5). a) and the second thin film transistor T (i, 5, b) are in the ON state. As a result, the gradation signal + (i, 4, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row and Data is written to the second pixel electrode E (i, 4, b) and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, and corresponds to the fourth pixel row. The first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) and the first display pixel P (i, 5,5) corresponding to the fifth pixel row. In a), display corresponding to the gradation signal + (i, 4, b) is performed.

  Next, at the timing T22b, the scanning signal of the fifth scanning signal line G (5) is changed from High to Low while the scanning signal of the fourth scanning signal line G (4) remains High. At the timing T22b, the second thin film transistor T (i, 4, b) connected to the fourth-stage scanning signal line G (4) remains on, but the fifth-stage scanning signal line G The first thin film transistor T (i, 5, a) connected to (5) is turned off. For this reason, the gradation signal + (i, 4, b) corresponding to the coordinates is held in the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row.

  At timing T22c immediately after timing T22b, the gradation signal applied to the data signal line S (i) is switched from + (i, 4, b) to + (i, 4, a). For this reason, the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row is connected to the fourth scanning signal line G (4) which is continuously turned on. A gradation signal + (i, 4, a) is written through the first thin film transistor T (i, 4, a), and the first display pixel P (i, 4, a) corresponding to the fourth pixel row. In a), display corresponding to the gradation signal + (i, 4, a) is performed.

  Here, at the timing T22c, as part of the preliminary charging for the second display pixel P (i, 6, b) corresponding to the sixth pixel row, the sixth scanning signal line G (6) The scanning signal and the scanning signal of the seventh-stage scanning signal line G (7) are set to High. At this time, during the period when the scanning signal of the sixth scanning signal line G (6) is High, for example, the supply of the gradation signal + (i, 4, a) to the data signal line S (i) is started. To the period immediately before the end of the supply of the gradation signal − (i, 5, b) to be supplied next to the gradation signal + (i, 4, a). Also, during the period when the scanning signal of the seventh scanning signal line G (7) is High, for example, after the supply of the gradation signal + (i, 4, a) to the data signal line S (i) is started. A period until immediately before the supply of the gradation signal + (i, 4, a) ends.

  At the timing T22c, the scanning signal line G (6) at the sixth stage is set to High so that the first thin film transistor T (i, 6, a) and the second thin film transistor T (i, 6, b) are turned on. Further, by setting the scanning signal of the seventh scanning signal line G (7) to High, the first thin film transistor T (i, 7, a) connected to the seventh scanning signal line G (7). In addition, the second thin film transistor T (i, 7, b) is turned on. As a result, the gradation signal + (i, 4, a) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row and Data is written to the second pixel electrode E (i, 6, b) and the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row, and corresponds to the sixth pixel row. The first display pixel P (i, 6, a), the second display pixel P (i, 6, b), and the first display pixel P (i, 7, In a), display corresponding to the gradation signal + (i, 4, a) is performed.

  That is, at the timing T22c, the second display pixel P (i, 6, b) corresponding to the sixth pixel row in which the gradation signal that was “−” writing in the previous frame becomes “+” writing in the current frame. ) Starts pre-charging in which “+” is written in advance. The gradation signal + (i, 4, a) also serves as a precharge signal for the second display pixel P (i, 6, b) corresponding to the sixth pixel row.

  Next, at timing T22d, the scanning signal of the fourth scanning signal line G (4) is changed from High to Low. As a result, the gradation signal + (i, 4, a) is held in the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Further, between the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row. Is cut off by the second thin film transistor T (i, 4, b) connected to the fourth scanning signal line G (4).

  In this way, in the horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. Is written for.

  At the timing T22d, the scanning signal of the seventh scanning signal line G (7) is also maintained at the High level while the scanning signal of the sixth scanning signal line G (6) is maintained High. Similarly to the scanning signal (4), the signal is changed from High to Low. Thus, the gradation signal + (i, 4, a) is held in the second display pixel P (i, 6, b) corresponding to the sixth pixel row. That is, at the timing T22d, the above-described preliminary charging for the second display pixel P (i, 6, b) corresponding to the sixth pixel row is completed.

  Further, in the next horizontal period, for display on the first display pixel P (i, 5, a) and the second display pixel P (i, 5, b) corresponding to the fifth pixel row. A gradation signal is written. In the horizontal period, the scanning signal of the fifth scanning signal line G (5) is set to High in synchronization with the start timing T23a of the horizontal period. At this time, the scanning signal of the sixth scanning signal line G (6) is set to High before 1/2 horizontal period with respect to the timing T23a, that is, from the timing T22c described above.

  In the horizontal period, during the period in which the scanning signal of the fifth-stage scanning signal line G (5) is High, for example, supply of the gradation signal − (i, 5, b) to the data signal line S (i) is started. Then, a period from when the gradation signal − (i, 5, a) to be supplied next to the gradation signal − (i, 5, a) is supplied to immediately before the end of the supply. At this time, the period during which the scanning signal of the sixth scanning signal line G (6) is High is as described above.

  By setting the scanning signal of the fifth scanning signal line G (5) to High at timing T23a, the first thin film transistor T (i, 5, a) connected to the fifth scanning signal line G (5). ) And the second thin film transistor T (i, 5, b) are turned on. In addition, since the scanning signal of the sixth stage scanning signal line G (6) is High, the first thin film transistor T (i, 6, 6) connected to the sixth stage scanning signal line G (6). a) and the second thin film transistor T (i, 6, b) are in the ON state. As a result, the gradation signal − (i, 5, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row and Data is written in the second pixel electrode E (i, 5, b) and the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row, and corresponds to the fifth pixel row. The first display pixel P (i, 5, a), the second display pixel P (i, 5, b), and the first display pixel P (i, 6,6) corresponding to the sixth pixel row. In a), display corresponding to the gradation signal-(i, 5, b) is performed.

  At this time, the second pixel electrode E (i, 5, b) corresponding to the fifth pixel row has a gradation having the same polarity as that of the gradation signal − (i, 5, b) by the preliminary charging described above. Since the signal-(i, 3, a) is written in advance, the gradation signal-(i, 5, b) is supplied to the second pixel electrode E (i, 5, b) corresponding to the fifth pixel row. ) Is written, the second display pixel P (i, 5, b) corresponding to the fifth pixel row promptly displays corresponding to the gradation signal-(i, 5, b). It can be carried out.

  Next, at the timing T23b, the scanning signal of the sixth-stage scanning signal line G (6) is changed from High to Low while the scanning signal of the fifth-stage scanning signal line G (5) is kept High. At the timing T23b, the second thin film transistor T (i, 5, b) connected to the fifth-stage scanning signal line G (5) remains in the on state, but the sixth-stage scanning signal line G The first thin film transistor T (i, 6, a) connected to (6) is turned off. For this reason, the gradation signal − (i, 5, b) corresponding to the coordinates is held in the second pixel electrode E (i, 5, b) corresponding to the fifth pixel row.

  Further, at the timing T23c immediately after the timing T23b, the gradation signal applied to the data signal line S (i) is switched from-(i, 5, b) to-(i, 5, a). For this reason, the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row is connected to the fifth scanning signal line G (5) that is continuously turned on. A gradation signal-(i, 5, a) is written through the first thin film transistor T (i, 5, a), and the first display pixel P (i, 5,5) corresponding to the fifth pixel row is written. In a), display corresponding to the gradation signal-(i, 5, a) is performed.

  Here, at this timing T23c, as part of the preliminary charging for the second display pixel P (i, 7, b) corresponding to the seventh pixel row, the seventh scanning signal line G (7) The scanning signal and the scanning signal of the eighth scanning signal line G (8) are set to High. At this time, during the period in which the scanning signal of the seventh scanning signal line G (7) is High, for example, the supply of the gradation signal-(i, 5, a) to the data signal line S (i) is started. To the period immediately before the end of the supply of the gradation signal + (i, 6, b) to be supplied next to the gradation signal-(i, 5, a). Further, during the period when the scanning signal of the eighth scanning signal line G (8) is High, for example, after the supply of the gradation signal-(i, 5, a) to the data signal line S (i) is started. A period until immediately before the supply of the gradation signal-(i, 5, a) is completed.

  At the timing T23c, the scanning signal line G (7) at the seventh stage is set to High so that the first thin film transistor T (i, 7, a) and the second thin film transistor T (i, 7, b) are turned on. Further, by setting the scanning signal of the eighth scanning signal line G (8) to High, the first thin film transistor T (i, 8, a) connected to the eighth scanning signal line G (8). Then, the second thin film transistor T (i, 8, b) is turned on. As a result, the gradation signal − (i, 5, a) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row, and Data is written to the second pixel electrode E (i, 7, b) and the first pixel electrode E (i, 8, a) corresponding to the eighth pixel row, and corresponds to the seventh pixel row. The first display pixel P (i, 7, a), the second display pixel P (i, 7, b), and the first display pixel P (i, 8, In a), display corresponding to the gradation signal-(i, 5, a) is performed.

  That is, at the timing T23c, the second display pixel P (i, 7, b) corresponding to the seventh pixel row in which the gradation signal that was “+” written in the previous frame becomes “−” written in the current frame. ) Starts pre-charging in which “-” is written in advance. The gradation signal-(i, 5, a) also serves as a precharge signal for the second display pixel P (i, 7, b) corresponding to the seventh pixel row.

  Next, at timing T23d, the scanning signal of the fifth scanning signal line G (5) is changed from High to Low. As a result, the gradation signal-(i, 5, a) is held in the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row. Also, between the second pixel electrode E (i, 5, b) corresponding to the fifth pixel row and the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row. Is disconnected by the second thin film transistor T (i, 5, b) connected to the fifth-stage scanning signal line G (5).

  In this manner, the first display pixel P (i, 5, a) and the second display pixel P (i, 5, b) corresponding to the fifth pixel row are displayed in the horizontal period. Is written for.

  At timing T23d, the scanning signal of the eighth scanning signal line G (8) is also maintained at the fifth scanning signal line G while the scanning signal of the seventh scanning signal line G (7) is maintained high. Similarly to the scanning signal (5), the signal is changed from High to Low. As a result, the grayscale signal − (i, 5, a) is held in the second display pixel P (i, 7, b) corresponding to the seventh pixel row. That is, at the timing T23d, the above-described preliminary charging for the second display pixel P (i, 7, b) corresponding to the seventh pixel row is finished.

  In the subsequent horizontal period, the above-described gradation signal is sequentially written to the display pixels corresponding to each stage, so that an appropriate video display to be displayed based on the video signal in the display device 1 is performed. Will be made.

  That is, in the second embodiment, pixels in the next stage are displayed in the horizontal period for displaying the display pixels P (i, j, a) and P (i, j, b) corresponding to a predetermined pixel row. By performing preliminary charging of the second display pixels P (i, j + 2, b) corresponding to the rows, the target display can be quickly made possible for each second display pixel. In other words, in the horizontal period before the horizontal period for displaying the display pixels P (i, j, a) and P (i, j, b) corresponding to the predetermined pixel row, the pixel row By subjecting the second display pixels P (i, j, b) corresponding to to the preliminary charging, the target display can be promptly made possible for each second display pixel.

[Third Embodiment]
The display device in the third embodiment has the same general configuration as that of the display device 1 shown in FIG. In the third embodiment, a case where the timing for setting each scanning signal line G (j) to High (Vgh) is different from that in the second embodiment will be described.

  Hereinafter, the operation of the display device 1 in the third embodiment will be described based on the timing chart shown in FIG. Here, in FIG. 12, in order from the top, the gradation signal supplied to the data signal line S (i), the scanning signal supplied to the first scanning signal line G (1), and the second scanning. Scan signal supplied to signal line G (2), scan signal supplied to third stage scan signal line G (3), scan signal supplied to fourth stage scan signal line G (4), 5 A scanning signal supplied to the scanning signal line G (5) at the stage, a scanning signal supplied to the scanning signal line G (6) at the sixth stage, and a scanning signal line G (7) at the seventh stage. The scanning signal, the scanning signal supplied to the eighth scanning signal line G (8), the scanning signal supplied to the ninth scanning signal line G (9), and the first corresponding to the third pixel row. The application state of the gradation signal at the pixel electrode E (i, 3, a) of the second pixel electrode E (i, 3, b) corresponding to the third pixel row Application state of gradation signal at the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row, and the second pixel electrode E (i corresponding to the fourth pixel row , 4, b) gradation signal application state, the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, the gradation signal application state, the fifth pixel row The application state of the gradation signal at the corresponding second pixel electrode E (i, 5, b) and the gradation signal at the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row. Application state, application state of gradation signal in second pixel electrode E (i, 6, b) corresponding to the sixth pixel row, first pixel electrode E (i) corresponding to the seventh pixel row , 7, a) gradation signal application state, gradation signal application state at the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row, The application state of the gradation signal at the first pixel electrode E (i, 8, a) corresponding to the pixel row of the second stage, and the second pixel electrode E (i, 8, b) corresponding to the eighth pixel row. ) Shows the application state of the gradation signal and the common signal Vcom supplied to the common electrode 18. Also in FIG. 12, each gradation signal supplied by the data signal line S (i) is indicated by a coordinate value on the display panel 10 corresponding to the pixel data. Note that old indicates an applied state based on the gradation signal written in the previous frame.

  Also in the third embodiment, the pixel data related to the first pixel electrode E (i, j, a) and the pixel data related to the second pixel electrode E (i, j, b) are halved. The signals are input to the source driver 20 alternately every horizontal period. That is, pixel data related to the second pixel electrode E (i, j, b) corresponding to a predetermined pixel row is input in the first half of each horizontal period, and the predetermined pixel row and Pixel data relating to the first pixel electrode E (i, j, a) corresponding to the same pixel row is input. Further, the inversion signal is controlled so that the bit value (that is, the polarity of the gradation signal) of the input pixel data is inverted every frame and every horizontal period. Also in FIG. 12, the sign of “+” is added to the gradation signal when the pixel data is not inverted, and “−” is assigned to the gradation signal when the pixel data is inverted. The code | symbol is attached | subjected. Further, the relationship between the voltage level of the common signal Vcom and the voltage level of the grayscale signal is shown, for example, as shown in FIG.

  As described above, as shown in FIG. 12, the gradation signal and the second pixel electrode E (i, j, b) relating to the first pixel electrode E (i, j, a) in each pixel row in the frame. The grayscale signals according to are-(i, 1, b),-(i, 1, a), + (i, 2, b), + (i, 2, a),-(i, 3, b),-(i, 3, a),... are supplied to the data signal line S (i) in a time division manner. Then, such supply of the gradation signal to the data signal line S (i) is repeatedly executed in each frame. Note that the polarity of each gradation signal is inverted for each frame.

  On the other hand, the scanning signal input to each scanning signal line G (j) is set to High (Vgh) three times in each frame.

  First, in a predetermined horizontal period of each frame, for example, in the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row. A gradation signal for display is written. In the horizontal period, the scanning signal of the third scanning signal line G (3) and the scanning signal of the fourth scanning signal line G (4) are respectively high in synchronization with the start timing T31a of the horizontal period. To. Here, in the horizontal period, during the period in which the scanning signal of the third scanning signal line G (3) is High, for example, the gradation signal − (i, 3, b) is applied to the data signal line S (i). A period from when the supply is started to immediately before the supply of the gradation signal-(i, 3, a) to be supplied next to the gradation signal-(i, 3, b) is completed. Further, in the horizontal period, during the period in which the scanning signal of the fourth scanning signal line G (4) is High, for example, the gradation signal − (i, 3, b) is supplied to the data signal line S (i). Is a period from the start to the end of the supply of the gradation signal-(i, 3, b).

  By setting the scanning signal of the third scanning signal line G (3) to High at timing T31a, the first thin film transistor T (i, 3, a connected to the third scanning signal line G (3). ) And the second thin film transistor T (i, 3, b) are turned on. Further, by setting the scanning signal of the fourth scanning signal line G (4) to High, the first thin film transistor T (i, 4, a) connected to the fourth scanning signal line G (4). Then, the second thin film transistor T (i, 4, b) is turned on. As a result, the gradation signal − (i, 3, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 3, a) corresponding to the third pixel row, and Data is written to the second pixel electrode E (i, 3, b) and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row, and corresponds to the third pixel row. The first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) and the first display pixel P (i, 4,4) corresponding to the fourth pixel row. In a), display corresponding to the gradation signal-(i, 3, b) is performed.

  Next, at the timing T31b, the scanning signal of the fourth scanning signal line G (4) is changed from High to Low (Vgl) while the scanning signal of the third scanning signal line G (3) is kept High. At the timing T31b, the second thin film transistor T (i, 3, b) connected to the third-stage scanning signal line G (3) remains in the on state, but the fourth-stage scanning signal line G The first thin film transistor T (i, 4, a) connected to (4) is turned off. For this reason, the second pixel electrode E (i, 3, b) corresponding to the third pixel row holds the gradation signal − (i, 3, b) corresponding to the coordinates.

  Further, at the timing T31c immediately after the timing T31b, the gradation signal applied to the data signal line S (i) is switched from-(i, 3, b) to-(i, 3, a). Therefore, the first pixel electrode E (i, 3, a) corresponding to the third pixel row is connected to the third scanning signal line G (3) that is continuously in the ON state. A gradation signal-(i, 3, a) is written through the first thin film transistor T (i, 3, a), and the first display pixel P (i, 3, a) corresponding to the third pixel row is written. In a), display corresponding to the gradation signal-(i, 3, a) is performed.

  Here, at the timing T31c, the scanning signal of the sixth-stage scanning signal line G (6) is set to High. In the period in which the scanning signal of the sixth scanning signal line G (6) is High, for example, the supply of the gradation signal − (i, 3, a) to the data signal line S (i) is started. A period until immediately before the supply of the adjustment signal-(i, 3, a) ends.

  At the timing T31c, the scanning signal line G (6) at the sixth stage is set to High so that the first thin film transistor T (i, 6, a) is turned on. As a result, the gradation signal − (i, 3, a) supplied to the data signal line S (i) is applied to the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row. Writing is performed, and display corresponding to the gradation signal-(i, 3, a) is performed in the first display pixel P (i, 6, a) corresponding to the sixth pixel row.

  Further, at the timing T31c, the sixth scanning signal line G ((), while the first thin film transistor T (i, 7, a) connected to the seventh scanning signal line G (7) is maintained in the OFF state. The second thin film transistor T (i, 7, b) connected to 6) is turned on. Thus, the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row and the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row are formed. Then, the data signal line S (i) is cut off and becomes conductive, and the grayscale signals held in the previous frame are neutralized between the pixel electrodes. That is, when switching the polarity of the gradation signal held in each pixel electrode for each frame, the gradation signal held so that the polarity is different between both pixel electrodes in the previous frame is written before writing in the frame. By neutralizing between the two pixel electrodes, a gradation signal having a polarity to be held in the frame can be quickly written. This primary neutralized state is shown as “± old” in FIG. Timing T31c is timing when the transition period to the first neutralization state is started.

  Next, at the timing T31d, the scanning signal of the scanning signal line G (3) at the third stage is changed from High to Low. As a result, the gradation signal − (i, 3, a) is held in the first pixel electrode E (i, 3, a) corresponding to the third pixel row. Further, between the second pixel electrode E (i, 3, b) corresponding to the third pixel row and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Is disconnected by the second thin film transistor T (i, 3, b) connected to the scanning signal line G (3) at the third stage.

  In this way, in the horizontal period, the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row are displayed. Is written for.

  At timing T31d, the scanning signal of the sixth-stage scanning signal line G (6) is also changed from High to Low similarly to the scanning signal of the third-stage scanning signal line G (3). As a result, the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row and the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row. The electrical connection between them is interrupted by the second thin film transistor T (i, 6, b) connected to the sixth-stage scanning signal line G (6), and the transition period to the first neutralization state described above Ends.

  Note that the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row holds a gradation signal − (i, 3, a) different from the coordinates. However, the held gradation signal is obtained by using the second pixel electrode E (i, 5, b) corresponding to the fifth pixel row and the first pixel electrode E (corresponding to the sixth pixel row. It is utilized by the secondary neutralization state described later with i, 6, a).

  In the next horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. A gradation signal is written. In the horizontal period, the scanning signal of the fourth scanning signal line G (4) and the scanning signal of the fifth scanning signal line G (5) are respectively high in synchronization with the start timing T32a of the horizontal period. To. Here, in the horizontal period, during the period when the scanning signal of the fourth scanning signal line G (4) is High, for example, the gradation signal + (i, 4, b) is applied to the data signal line S (i). A period from when supply is started to immediately before the supply of the gradation signal + (i, 4, a) to be supplied next to the gradation signal + (i, 4, b) is completed. In the horizontal period, for example, the gradation signal + (i, 4, b) is supplied to the data signal line S (i) during the period in which the scanning signal of the fifth scanning signal line G (5) is High. Is a period from the start to the end of the supply of the gradation signal + (i, 4, b).

  By setting the scanning signal of the fourth scanning signal line G (4) to High at timing T32a, as described above, the first thin film transistor T ( i, 4, a) and the second thin film transistor T (i, 4, b) are turned on. Further, by setting the scanning signal of the fifth scanning signal line G (5) to High, the first thin film transistor T (i, 5, a) connected to the fifth scanning signal line G (5). Then, the second thin film transistor T (i, 5, b) is turned on. As a result, the gradation signal + (i, 4, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row and Data is written to the second pixel electrode E (i, 4, b) and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, and corresponds to the fourth pixel row. The first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) and the first display pixel P (i, 5,5) corresponding to the fifth pixel row. In a), display corresponding to the gradation signal + (i, 4, b) is performed.

  Next, at the timing T32b, the scanning signal of the fifth scanning signal line G (5) is changed from High to Low while the scanning signal of the fourth scanning signal line G (4) is kept High. At the timing T32b, the second thin film transistor T (i, 4, b) connected to the fourth-stage scanning signal line G (4) remains on, but the fifth-stage scanning signal line G The first thin film transistor T (i, 5, a) connected to (5) is turned off. For this reason, the gradation signal + (i, 4, b) corresponding to the coordinates is held in the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row.

  Further, at the timing T32c immediately after the timing T32b, the gradation signal applied to the data signal line S (i) is switched from + (i, 4, b) to + (i, 4, a). For this reason, the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row is connected to the fourth scanning signal line G (4) which is continuously turned on. A gradation signal + (i, 4, a) is written through the first thin film transistor T (i, 4, a), and the first display pixel P (i, 4, a) corresponding to the fourth pixel row. In a), display corresponding to the gradation signal + (i, 4, a) is performed.

  Here, at the timing T32c, the scanning signal of the seventh-stage scanning signal line G (7) is set to High. In the period when the scanning signal of the seventh scanning signal line G (7) is High, for example, the supply of the gradation signal + (i, 4, a) to the data signal line S (i) is started. A period until immediately before the supply of the adjustment signal + (i, 4, a) ends.

  Then, at timing T32c, the scanning signal line G (7) at the seventh stage is set to High so that the first thin film transistor T (i, i, connected to the scanning signal line G (7) at the seventh stage. 7, a) is turned on. Thus, the gradation signal + (i, 4, a) supplied to the data signal line S (i) is applied to the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row. Writing is performed, and display corresponding to the gradation signal + (i, 4, a) is performed in the first display pixel P (i, 7, a) corresponding to the seventh pixel row. On the other hand, between the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row and the first display pixel P (i, 8, a) corresponding to the eighth pixel row. Then, the transition period to the first neutralization state described above is started.

  Next, at timing T32d, the scanning signal of the fourth scanning signal line G (4) is changed from High to Low. As a result, the gradation signal + (i, 4, a) is held in the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Further, between the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row. Is cut off by the second thin film transistor T (i, 4, b) connected to the fourth scanning signal line G (4).

  In this way, in the horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. Is written for.

  At timing T32d, the scanning signal of the seventh scanning signal line G (7) is also changed from High to Low in the same manner as the scanning signal of the fourth scanning signal line G (4). As a result, the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row and the first pixel electrode E (i, 8, a) corresponding to the eighth pixel row. The electrical connection between the pixel electrodes is interrupted by the second thin film transistor T (i, 7, b) connected to the seventh-stage scanning signal line G (7). The transition period to the neutralized state ends.

  Note that the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row holds a gradation signal + (i, 4, a) different from the coordinates. However, the held gradation signals are obtained from the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row and the first pixel electrode E (corresponding to the seventh pixel row. This is utilized by the second neutralization state described later with i, 7, a).

  In the next horizontal period, the first display pixel P (i, 5, a) and the second display pixel P (i, 5, b) corresponding to the fifth pixel row are displayed. A gradation signal is written. In the horizontal period, the scanning signal of the fifth scanning signal line G (5) and the scanning signal of the sixth scanning signal line G (6) are respectively High in synchronization with the start timing T33a of the horizontal period. To. Here, in the horizontal period, during the period in which the scanning signal of the fifth scanning signal line G (5) is High, for example, the gradation signal − (i, 5, b) is applied to the data signal line S (i). A period from when the supply is started to immediately before the supply of the gradation signal − (i, 5, a) to be supplied next to the gradation signal − (i, 5, b) is completed. In the horizontal period, for example, the gradation signal − (i, 5, b) is supplied to the data signal line S (i) during the period in which the scanning signal of the sixth scanning signal line G (6) is High. Is a period from the start of the operation until the end of the supply of the gradation signal-(i, 5, b).

  By setting the scanning signal of the fifth scanning signal line G (5) to High at timing T33a, as described above, the first thin film transistor T ( i, 5, a) and the second thin film transistor T (i, 5, b) are turned on. Further, by setting the scanning signal of the sixth scanning signal line G (6) to High, the first thin film transistor T (i, 6, a) connected to the sixth scanning signal line G (6). Then, the second thin film transistor T (i, 6, b) is turned on. As a result, the gradation signal − (i, 5, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row and Data is written in the second pixel electrode E (i, 5, b) and the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row, and corresponds to the fifth pixel row. The first display pixel P (i, 5, a), the second display pixel P (i, 5, b), and the first display pixel P (i, 6,6) corresponding to the sixth pixel row. In a), display corresponding to the gradation signal-(i, 5, b) is performed.

  At the timing T33a, the sixth scanning signal line G ((), while the first thin film transistor T (i, 7, a) connected to the seventh scanning signal line G (7) is maintained in the OFF state. Since the second thin film transistor T (i, 6, b) connected to 6) is turned on, the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row and the seventh stage The first pixel electrode E (i, 7, a) corresponding to the pixel row of the eye is in a conductive state while being cut off from the data signal line S (i), and is held between the two pixel electrodes so far. The tone signals that have been neutralized are neutralized. In order to distinguish the neutralization state here from the primary neutralization state described above, the secondary neutralization state is used.

  Here, the gradation signal held so far is “± old” as described above for the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row. Further, the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row is the gradation signal + (i, 4, a) described above, and the gradation signal having the polarity “+”. Is held. Therefore, in the secondary neutralization state, neutralization is performed so as to approach the gradation signal on the “+” side. The secondary neutralization state neutralized so as to approach the gradation signal on the “+” side is shown as “+ ±” in FIG.

  That is, at the timing T33a, the second display pixel P (i, 6, b) corresponding to the sixth pixel row in which the gradation signal that was “−” writing in the previous frame becomes “+” writing in the current frame. ), A secondary neutralization state for preliminary charging, in which “+” is written in advance, is started. The gradation signal + (i, 4, a) also serves as a precharge signal for the second display pixel P (i, 6, b) corresponding to the sixth pixel row.

  Next, at the timing T33b, the scanning signal of the sixth scanning signal line G (6) is changed from High to Low while the scanning signal of the fifth scanning signal line G (5) remains High. At this timing T33b, the second thin film transistor T (i, 5, b) connected to the fifth-stage scanning signal line G (5) remains on, but the sixth-stage scanning signal line G The first thin film transistor T (i, 6, a) connected to (6) is turned off. For this reason, the gradation signal − (i, 5, b) corresponding to the coordinates is held in the second pixel electrode E (i, 5, b) corresponding to the fifth pixel row. Further, between the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row and the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row. Is disconnected by the second thin film transistor T (i, 6, b) connected to the sixth-stage scanning signal line G (6), and the transition period to the second neutralization state described above is reduced. finish.

  Further, at the timing T33c immediately after the timing T33b, the gradation signal applied to the data signal line S (i) is switched from-(i, 5, b) to-(i, 5, a). For this reason, the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row is connected to the fifth scanning signal line G (5) that is continuously turned on. A gradation signal-(i, 5, a) is written through the first thin film transistor T (i, 5, a), and the first display pixel P (i, 5,5) corresponding to the fifth pixel row is written. In a), display corresponding to the gradation signal-(i, 5, a) is performed.

  Here, at the timing T33c, the scanning signal of the eighth scanning signal line G (8) is set to High. In the period when the scanning signal of the eighth scanning signal line G (8) is High, for example, the supply of the gradation signal − (i, 5, a) to the data signal line S (i) is started, A period until immediately before the supply of the adjustment signal-(i, 5, a) ends.

  At timing T33c, the second pixel electrode E (i, 8, b) corresponding to the eighth pixel row and the first display pixel P (i, 9, a) corresponding to the ninth pixel row. ), The transition period to the above-described first neutralization state is started.

  Next, at timing T33d, the scanning signal of the fifth scanning signal line G (5) is changed from High to Low. As a result, the gradation signal-(i, 5, a) is held in the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row. Also, between the second pixel electrode E (i, 5, b) corresponding to the fifth pixel row and the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row. Is disconnected by the second thin film transistor T (i, 5, b) connected to the fifth-stage scanning signal line G (5).

  In this manner, the first display pixel P (i, 5, a) and the second display pixel P (i, 5, b) corresponding to the fifth pixel row are displayed in the horizontal period. Is written for.

  At the timing T33d, the scanning signal of the eighth scanning signal line G (8) is also changed from High to Low in the same manner as the scanning signal of the fifth scanning signal line G (5). As a result, the second pixel electrode E (i, 8, b) corresponding to the eighth pixel row and the first pixel electrode E (i, 9, a) corresponding to the ninth pixel row. The electrical connection between the pixel electrodes is interrupted by the second thin film transistor T (i, 8, b) connected to the eighth-stage scanning signal line G (8). The transition period to the neutralized state ends. At this time, the gradation signal − (i, 5, a) held in the first pixel electrode E (i, 8, a) corresponding to the eighth pixel row is the seventh pixel. The second middle electrode between the second pixel electrode E (i, 7, b) corresponding to the row and the first pixel electrode E (i, 8, a) corresponding to the eighth pixel row It is utilized depending on the Japanese state.

  In the next horizontal period, the first display pixel P (i, 6, a) and the second display pixel P (i, 6, b) corresponding to the sixth pixel row are displayed. A gradation signal is written. In the horizontal period, the scanning signal of the sixth scanning signal line G (6) and the scanning signal of the seventh scanning signal line G (7) are respectively high in synchronization with the start timing T34a of the horizontal period. To. Here, in the horizontal period, during the period in which the scanning signal of the sixth-stage scanning signal line G (6) is High, for example, the gradation signal + (i, 6, b) is applied to the data signal line S (i). A period from when the supply is started to immediately before the supply of the gradation signal + (i, 6, a) to be supplied next to the gradation signal + (i, 6, b) is completed. In the horizontal period, for example, the gradation signal + (i, 6, b) is supplied to the data signal line S (i) during the period in which the scanning signal of the seventh scanning signal line G (7) is High. Is a period from the start to the end of the supply of the gradation signal + (i, 6, b).

  By setting the scanning signal of the sixth stage scanning signal line G (6) to High at timing T34a, as described above, the first thin film transistor T ( i, 6, a) and the second thin film transistor T (i, 6, b) are turned on. Further, by setting the scanning signal of the seventh scanning signal line G (7) to High, the first thin film transistor T (i, 7, a) connected to the seventh scanning signal line G (7). In addition, the second thin film transistor T (i, 7, b) is turned on. As a result, the gradation signal + (i, 6, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row and Data is written to the second pixel electrode E (i, 6, b) and the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row, and corresponds to the sixth pixel row. The first display pixel P (i, 6, a), the second display pixel P (i, 6, b), and the first display pixel P (i, 7, In a), display corresponding to the gradation signal + (i, 6, b) is performed.

  At this time, the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row is precharged through the first neutralization state and the second neutralization state described above. Since the gradation signal “+ ±” having a potential relatively close to the gradation signal + (i, 6, b) is written in advance, the second pixel electrode E (i, 6, when the gradation signal + (i, 6, b) is written in the second display pixel P (i, 6, b) corresponding to the sixth pixel row, Display corresponding to the adjustment signal + (i, 6, b) can be performed.

  Further, at the timing T34a, the seventh scanning signal line G ((), while the first thin film transistor T (i, 8, a) connected to the eighth scanning signal line G (8) is kept off. Since the second thin film transistor T (i, 7, b) connected to 7) is turned on, the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row and the eighth stage The first pixel electrode E (i, 8, a) corresponding to the pixel row of the eye is in a conductive state while being cut off from the data signal line S (i), and is held between the two pixel electrodes so far. The tone signals that have been neutralized are neutralized. That is, between the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row and the first pixel electrode E (i, 8, a) corresponding to the eighth pixel row. Thus, the secondary neutralization state described above is achieved.

  By the way, the gradation signal held so far is the above-mentioned “± old” in the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row. The first pixel electrode E (i, 8, a) corresponding to the eighth pixel row is the gradation signal − (i, 5, a) described above, and the gradation signal having the polarity “−”. Is held. Therefore, in the secondary neutralization state here, neutralization is performed so as to approach the gradation signal on the “−” side. The secondary neutralization state neutralized so as to approach the gradation signal on the “−” side is shown as “− ±” in FIG.

  That is, at the timing T34a, the second display pixel P (i, 7, b) corresponding to the seventh pixel row in which the gradation signal that was “+” written in the previous frame becomes “−” written in the current frame. ), A secondary neutralization state for preliminary charging in which “−” is written in advance is started. The gradation signal-(i, 5, a) also serves as a precharge signal for the second display pixel P (i, 7, b) corresponding to the seventh pixel row.

  Next, at the timing T34b, the scanning signal of the seventh scanning signal line G (7) is changed from High to Low while the scanning signal of the sixth scanning signal line G (6) remains High. At the timing T34b, the second thin film transistor T (i, 6, b) connected to the sixth-stage scanning signal line G (6) remains in the on state, but the seventh-stage scanning signal line G The first thin film transistor T (i, 7, a) connected to (7) is turned off. For this reason, the gradation signal + (i, 6, b) corresponding to the coordinates is held in the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row. Further, between the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row and the first pixel electrode E (i, 8, a) corresponding to the eighth pixel row. Are disconnected by the second thin film transistor T (i, 7, b) connected to the seventh-stage scanning signal line G (7), and the transition period to the second neutralization state described above is achieved. finish.

  Further, at timing T34c immediately after timing T34b, the gradation signal applied to the data signal line S (i) is switched from + (i, 6, b) to + (i, 6, a). For this reason, the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row is connected to the sixth scanning signal line G (6) that is continuously in the on state. A gradation signal + (i, 6, a) is written through the first thin film transistor T (i, 6, a), and the first display pixel P (i, 6, a) corresponding to the sixth pixel row. In a), display corresponding to the gradation signal + (i, 6, a) is performed.

  Here, at the timing T34c, the scanning signal of the ninth scanning signal line G (9) is set to High. In the period in which the scanning signal of the ninth scanning signal line G (9) is set to High, for example, the supply of the gradation signal + (i, 6, a) to the data signal line S (i) is started. A period until immediately before the supply of the adjustment signal + (i, 6, a) ends.

  At timing T34c, the second pixel electrode E (i, 9, b) corresponding to the ninth pixel row and the first display pixel P (i, 10, a) corresponding to the tenth pixel row. ), The transition period to the above-described first neutralization state is started.

  Next, at timing T34d, the scanning signal of the sixth-stage scanning signal line G (6) is changed from High to Low. As a result, the gradation signal + (i, 6, a) is held in the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row. Further, between the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row and the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row. Is disconnected by the second thin film transistor T (i, 6, b) connected to the sixth-stage scanning signal line G (6).

  In this way, the display of the first display pixel P (i, 6, a) and the second display pixel P (i, 6, b) corresponding to the sixth pixel row is performed in the horizontal period. Is written for.

  At the timing T34d, the scanning signal of the ninth scanning signal line G (9) is also changed from High to Low in the same manner as the scanning signal of the sixth scanning signal line G (6). As a result, the second pixel electrode E (i, 9, b) corresponding to the ninth pixel row and the first pixel electrode E (i, 10, a) corresponding to the tenth pixel row. The electrical connection between the pixel electrodes is interrupted by the second thin film transistor T (i, 9, b) connected to the 9th-stage scanning signal line G (9), and the above-described first order between the pixel electrodes is performed. The transition period to the neutralized state ends.

  In the subsequent horizontal period, the above-described gradation signal is sequentially written to the display pixels corresponding to each stage, so that an appropriate video display to be displayed based on the video signal in the display device 1 is performed. Will be made.

  That is, in the third embodiment, pixels are successively arranged in the horizontal period for displaying the display pixels P (i, j, a) and P (i, j, b) corresponding to a predetermined pixel row. The first preliminary charge is performed on the second display pixels P (i, j + 3, b) corresponding to the rows, and the display pixels P (i, j + 2, a) and P (i, j + 2, b) By performing the second preliminary charging for the same display pixel during the horizontal period for performing the display, the target display can be promptly performed for each second display pixel. In other words, in the horizontal period before the horizontal period for displaying the display pixels P (i, j, a) and P (i, j, b) corresponding to the predetermined pixel row, the pixel row The second display pixel P (i, j, b) corresponding to the second display pixel P (i, j, b) is precharged twice, so that the target display can be quickly made to each second display pixel. .

[Fourth Embodiment]
The display device according to the fourth embodiment has the same general configuration as that of the display device 1 shown in FIG. In the first embodiment, the second embodiment, and the third embodiment described above, as shown in FIG. 13, the polarity of the gradation signal held between adjacent pixel rows is different, and the adjacent pixels The case of so-called line inversion driving in which the polarity of the gradation signal held between the columns is the same has been described, but in the fourth embodiment, the gradation held between adjacent pixel rows as shown in FIG. A case of so-called column inversion driving in which the polarities of the signals are equal and the polarities of the grayscale signals held between adjacent pixel columns are different will be described.

  Hereinafter, the operation of the display device 1 according to the fourth embodiment will be described based on the timing chart shown in FIG. Here, in FIG. 15, in order from the top, the gradation signal supplied to the data signal line S (i), the scanning signal supplied to the first scanning signal line G (1), and the second scanning. Scan signal supplied to signal line G (2), scan signal supplied to third stage scan signal line G (3), scan signal supplied to fourth stage scan signal line G (4), 5 The scanning signal supplied to the scanning signal line G (5) at the stage, the scanning signal supplied to the scanning signal line G (6) at the sixth stage, and the first pixel electrode E corresponding to the pixel row at the third stage. Application state of gradation signal in (i, 3, a) Application state of gradation signal in second pixel electrode E (i, 3, b) corresponding to third pixel row, fourth pixel Application state of gradation signal at first pixel electrode E (i, 4, a) corresponding to the row Second pixel electrode E (i, 4, b) corresponding to the fourth pixel row The gradation signal application state at, and the gradation signal application state at the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, the second pixel line corresponding to the fifth pixel row. Application state of gradation signal in pixel electrode E (i, 5, b), application state of gradation signal in first pixel electrode E (i, 6, a) corresponding to the sixth pixel row, six stages The gradation signal application state in the second pixel electrode E (i, 6, b) corresponding to the pixel row of the eye and the common signal Vcom supplied to the common electrode 18 are shown. Also in FIG. 15, each gradation signal supplied by the data signal line S (i) is indicated by a coordinate value on the display panel 10 corresponding to the pixel data. Note that old indicates an applied state based on the gradation signal written in the previous frame.

  In the display device 1 according to the fourth embodiment, pixel data related to the first pixel electrode E (i, j, a) and pixel data related to the second pixel electrode E (i, j, b) are 1 / 2 alternately input to the source driver 20 every horizontal period. That is, pixel data related to the second pixel electrode E (i, j, b) corresponding to a predetermined pixel row is input in the first half of each horizontal period, and the predetermined pixel row and Pixel data relating to the first pixel electrode E (i, j, a) corresponding to the same pixel row is input. Further, the inverted signal is controlled so that the bit value of the input pixel data (that is, the polarity of the gradation signal) is inverted every frame. In FIG. 15, the sign of “+” is given to the gradation signal when the bit inversion of the pixel data is not performed, and “−” is applied to the gradation signal when the bit inversion of the pixel data is performed. The code | symbol is attached | subjected. Further, the relationship between the voltage level of the common signal Vcom and the voltage level of the grayscale signal is shown, for example, as shown in FIG.

  Here, in the fourth embodiment, the polarity of the gradation signal written to the first pixel electrode E (i, j, a) for the display of the first display pixel P (i, j, a) The polarity of the gradation signal written to the second pixel electrode E (i, j, b) for displaying the second display pixel P (i, j, b) is different within the frame. The inversion signal is controlled.

  As described above, as shown in FIG. 15, the gradation signal and the second pixel electrode E (i, j, b) related to the first pixel electrode E (i, j, a) in each pixel row in the frame. The gradation signals according to are + (i, 1, b), − (i, 1, a), + (i, 2, b), − (i, 2, a), + (i, 3, b),-(i, 3, a),... are supplied to the data signal line S (i) in a time division manner. Then, such supply of the gradation signal to the data signal line S (i) is repeatedly executed in each frame. Note that the polarity of each gradation signal is inverted for each frame.

  On the other hand, the scanning signal input to each scanning signal line G (j) is set to High (Vgh) twice in each frame.

  First, in a predetermined horizontal period of each frame, for example, in the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row. A gradation signal for display is written. In the horizontal period, the scanning signal of the third scanning signal line G (3) and the scanning signal of the fourth scanning signal line G (4) are respectively high in synchronization with the start timing T41a of the horizontal period. To. Here, in the horizontal period, during the period in which the scanning signal of the third scanning signal line G (3) is High, for example, the gradation signal + (i, 3, b) is applied to the data signal line S (i). A period from when the supply is started to immediately before the supply of the gradation signal-(i, 3, a) to be supplied next to the gradation signal-(i, 3, b) is completed. In the horizontal period, for example, the gradation signal + (i, 3, b) is supplied to the data signal line S (i) during the period when the scanning signal of the fourth scanning signal line G (4) is High. Is a period from the start of the operation until immediately before the supply of the gradation signal + (i, 3, b) ends.

  By setting the scanning signal of the third scanning signal line G (3) to High at timing T41a, the first thin film transistor T (i, 3, a) connected to the third scanning signal line G (3). ) And the second thin film transistor T (i, 3, b) are turned on. Further, by setting the scanning signal of the fourth scanning signal line G (4) to High, the first thin film transistor T (i, 4, a) connected to the fourth scanning signal line G (4). Then, the second thin film transistor T (i, 4, b) is turned on. As a result, the gradation signal + (i, 3, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 3, a) corresponding to the third pixel row and Data is written to the second pixel electrode E (i, 3, b) and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row, and corresponds to the third pixel row. The first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) and the first display pixel P (i, 4,4) corresponding to the fourth pixel row. In a), display corresponding to the gradation signal + (i, 3, b) is performed.

  Next, at timing T41b, the scanning signal of the fourth scanning signal line G (4) is changed from High to Low (Vgl) while the scanning signal of the third scanning signal line G (3) is kept High. At the timing T41b, the second thin film transistor T (i, 3, b) connected to the third-stage scanning signal line G (3) remains in the on state, but the fourth-stage scanning signal line G The first thin film transistor T (i, 4, a) connected to (4) is turned off. For this reason, the gradation signal + (i, 3, b) corresponding to the coordinates is held in the second pixel electrode E (i, 3, b) corresponding to the third pixel row. In the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row, a gradation signal + (i, 3, b) different from the coordinates is held. However, as will be described later, this state is resolved in approximately one horizontal period to two horizontal periods.

  Further, at the timing T41b, the gradation signal applied to the data signal line S (i) immediately after that is switched from + (i, 3, b) to − (i, 3, a). Therefore, the first pixel electrode E (i, 3, a) corresponding to the third pixel row is connected to the third scanning signal line G (3) that is continuously in the ON state. A gradation signal-(i, 3, a) is written through the first thin film transistor T (i, 3, a), and the first display pixel P (i, 3, a) corresponding to the third pixel row is written. In a), display corresponding to the gradation signal-(i, 3, a) is performed.

  Next, at the timing T41c, the scanning signal of the scanning signal line G (3) at the third stage is changed from High to Low. As a result, the gradation signal − (i, 3, a) is held in the first pixel electrode E (i, 3, a) corresponding to the third pixel row. Further, between the second pixel electrode E (i, 3, b) corresponding to the third pixel row and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Is disconnected by the second thin film transistor T (i, 3, b) connected to the scanning signal line G (3) at the third stage.

  In this way, in the horizontal period, the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row are displayed. Is written for.

  In the next horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. A gradation signal is written. In the horizontal period, the scanning signal of the fourth scanning signal line G (4) and the scanning signal of the fifth scanning signal line G (5) are High in synchronization with the start timing T42a of the horizontal period. To. Here, in the horizontal period, during the period when the scanning signal of the fourth scanning signal line G (4) is High, for example, the gradation signal + (i, 4, b) is applied to the data signal line S (i). A period from when supply is started to immediately before the supply of the gradation signal − (i, 4, a) to be supplied next to the gradation signal + (i, 4, b) is completed. In the horizontal period, for example, the gradation signal + (i, 4, b) is supplied to the data signal line S (i) during the period in which the scanning signal of the fifth scanning signal line G (5) is High. Is a period from the start to the end of the supply of the gradation signal + (i, 4, b).

  By setting the scanning signal of the fourth scanning signal line G (4) to High at timing T42a, as described above, the first thin film transistor T ( i, 4, a) and the second thin film transistor T (i, 4, b) are turned on. Further, by setting the scanning signal of the fifth scanning signal line G (5) to High, the first thin film transistor T (i, 5, a) connected to the fifth scanning signal line G (5). Then, the second thin film transistor T (i, 5, b) is turned on. As a result, the gradation signal + (i, 4, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row and Data is written to the second pixel electrode E (i, 4, b) and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, and corresponds to the fourth pixel row. The first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) and the first display pixel P (i, 5,5) corresponding to the fifth pixel row. In a), display corresponding to the gradation signal + (i, 4, b) is performed.

  Next, at the timing T42b, the scanning signal of the fifth scanning signal line G (5) is changed from High to Low while the scanning signal of the fourth scanning signal line G (4) is kept High. At this timing T42b, the second thin film transistor T (i, 4, b) connected to the second-stage scanning signal line G (4) remains in the on state, but the fifth-stage scanning signal line G The first thin film transistor T (i, 5, a) connected to (5) is turned off. For this reason, the gradation signal + (i, 4, b) corresponding to the coordinates is held in the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row. In the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, a gradation signal + (i, 4, b) different from the coordinates is held. However, this state is also resolved in approximately one horizontal period to two horizontal periods.

  At timing T42b, the gradation signal applied to the data signal line S (i) immediately after that is switched from + (i, 4, b) to-(i, 4, a). For this reason, the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row is connected to the fourth scanning signal line G (4) which is continuously turned on. A gradation signal-(i, 4, a) is written through the first thin film transistor T (i, 4, a), and the first display pixel P (i, 4,4) corresponding to the fourth pixel row is written. In a), display corresponding to the gradation signal-(i, 4, a) is performed. That is, the display based on the gradation signal different from the coordinates is canceled, and the display based on the gradation signals corresponding to the coordinates is performed.

  Next, at a timing T42c, the scanning signal of the fourth scanning signal line G (4) is changed from High to Low. As a result, the gradation signal − (i, 4, a) is held in the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Further, between the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row. Is cut off by the second thin film transistor T (i, 4, b) connected to the fourth scanning signal line G (4).

  In this way, in the horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. Is written for.

  In the subsequent horizontal period, the above-described gradation signal is sequentially written to the display pixels corresponding to each stage, so that an appropriate video display to be displayed based on the video signal in the display device 1 is performed. Will be made.

  In the above-described fourth embodiment, the case where the scanning signal of the fourth scanning signal line G (4) is set to High at timing T41a has been described. As shown in FIG. 16, the timing at which the scanning signal is initially set to High in each frame may be between the timing T41a and the timing T41x which is a half horizontal period before the timing T41a. Similarly, the timing at which the scanning signal of the scanning signal line G (5) at the fifth stage is first set to High in each frame may be between the timing T42a and the timing T42x that is 1/2 horizontal period before the timing T42a. Good. That is, the timing at which the scanning signal of each scanning signal line G (j) is first set to High in each frame may be between the timing shown in FIG.

[Fifth Embodiment]
The display device in the fifth embodiment has the same general configuration as that of the display device 1 shown in FIG. In the fifth embodiment, a case will be described in which the scanning signal input to each scanning signal line G (j) is set to High (Vgh) three times in each frame and column inversion driving is performed.

  Hereinafter, the operation of the display device 1 in the fifth embodiment will be described based on the timing chart shown in FIG. Here, in FIG. 17, in order from the top, the gradation signal supplied to the data signal line S (i), the scanning signal supplied to the first scanning signal line G (1), and the second scanning. Scan signal supplied to signal line G (2), scan signal supplied to third stage scan signal line G (3), scan signal supplied to fourth stage scan signal line G (4), 5 A scanning signal supplied to the scanning signal line G (5) at the stage, a scanning signal supplied to the scanning signal line G (6) at the sixth stage, and a scanning signal line G (7) at the seventh stage. Scan signal, scan signal supplied to the eighth-stage scan signal line G (8), gradation signal application state at the first pixel electrode E (i, 3, a) corresponding to the third-stage pixel row Application state of gradation signal in second pixel electrode E (i, 3, b) corresponding to third pixel row, first pixel electrode corresponding to fourth pixel row Application state of gradation signal at (i, 4, a) Application state of gradation signal at second pixel electrode E (i, 4, b) corresponding to fourth pixel row, fifth pixel Application state of gradation signal at first pixel electrode E (i, 5, a) corresponding to row, gradation at second pixel electrode E (i, 5, b) corresponding to fifth pixel row Signal application state, gradation signal application state at the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row, second pixel electrode E corresponding to the sixth pixel row Application state of gradation signal at (i, 6, b), application state of gradation signal at first pixel electrode E (i, 7, a) corresponding to the seventh pixel row, pixel at seventh stage The application state of the gradation signal in the second pixel electrode E (i, 7, b) corresponding to the row, and the common signal Vcom supplied to the common electrode 18 are shown. There. Also in FIG. 17, each gradation signal supplied by the data signal line S (i) is indicated by a coordinate value on the display panel 10 corresponding to the pixel data. Note that old indicates an applied state based on the gradation signal written in the previous frame.

  Also in the fifth embodiment, the pixel data related to the first pixel electrode E (i, j, a) and the pixel data related to the second pixel electrode E (i, j, b) are halved. The signals are input to the source driver 20 alternately every horizontal period. That is, pixel data related to the second pixel electrode E (i, j, b) corresponding to a predetermined pixel row is input in the first half of each horizontal period, and the predetermined pixel row and Pixel data relating to the first pixel electrode E (i, j, a) corresponding to the same pixel row is input. Further, the inverted signal is controlled so that the bit value of the input pixel data (that is, the polarity of the gradation signal) is inverted every frame. Also in FIG. 17, the sign of “+” is given to the gradation signal when pixel data bit inversion is not performed, and “−” is applied to the gradation signal when pixel data bit inversion is performed. The symbol is attached. Further, the relationship between the voltage level of the common signal Vcom and the voltage level of the grayscale signal is shown, for example, as shown in FIG.

  Here, in the fifth embodiment, the polarity of the gradation signal written to the first pixel electrode E (i, j, a) for the display of the first display pixel P (i, j, a) The polarity of the gradation signal written to the second pixel electrode E (i, j, b) for displaying the second display pixel P (i, j, b) is different within the frame. The inversion signal is controlled.

  As described above, as shown in FIG. 17, the gradation signal and the second pixel electrode E (i, j, b) related to the first pixel electrode E (i, j, a) in each pixel row in the frame. The gradation signals according to are + (i, 1, b), − (i, 1, a), + (i, 2, b), − (i, 2, a), + (i, 3, b),-(i, 3, a),... are supplied to the data signal line S (i) in a time division manner. Then, such supply of the gradation signal to the data signal line S (i) is repeatedly executed in each frame. Note that the polarity of each gradation signal is inverted for each frame.

  On the other hand, the scanning signal input to each scanning signal line G (j) is set to High (Vgh) three times in each frame.

  First, in a predetermined horizontal period of each frame, for example, in the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row. A gradation signal for display is written. In the horizontal period, the scanning signal of the third scanning signal line G (3), the scanning signal of the fourth scanning signal line G (4), and the fifth stage are synchronized with the start timing T51a of the horizontal period. The scanning signal of the scanning signal line G (5) is set to High. In the horizontal period, during the period when the scanning signal of the third scanning signal line G (3) is High, for example, the gradation signal + (i, 3, b) is supplied to the data signal line S (i). Is a period from the start of the first to the end of the supply of the gradation signal − (i, 3, a) to be supplied next to the gradation signal + (i, 3, b). In the horizontal period, a period in which the scanning signal of the fourth scanning signal line G (4) and the scanning signal of the fifth scanning signal line G (5) are High is, for example, the data signal line S (i ) Is a period from when the supply of the gradation signal + (i, 3, b) is started to immediately before the supply of the gradation signal + (i, 3, b) is completed.

  By setting the scanning signal of the third scanning signal line G (3) to High at timing T51a, the first thin film transistor T (i, 3, a) connected to the third scanning signal line G (3). ) And the second thin film transistor T (i, 3, b) are turned on. Further, by setting the scanning signal of the fourth scanning signal line G (4) to High, the first thin film transistor T (i, 4, a) connected to the fourth scanning signal line G (4). Then, the second thin film transistor T (i, 4, b) is turned on. As a result, the gradation signal + (i, 3, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 3, a) corresponding to the third pixel row and Data is written to the second pixel electrode E (i, 3, b) and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row, and corresponds to the third pixel row. The first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) and the first display pixel P (i, 4,4) corresponding to the fourth pixel row. In a), display corresponding to the gradation signal + (i, 3, b) is performed.

  At the timing T51a, as described above, the first scanning signal line G (4) connected to the fourth scanning signal line G (4) is set by setting the scanning signal of the fourth scanning signal line G (4) to High. The thin film transistor T (i, 4, a) and the second thin film transistor T (i, 4, b) are turned on. Further, by setting the scanning signal of the fifth scanning signal line G (5) to High, the first thin film transistor T (i, 5, a) connected to the fifth scanning signal line G (5). Then, the second thin film transistor T (i, 5, b) is turned on. Thus, the gradation signal + (i, 3, b) supplied to the data signal line S (i) further causes the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row. b) and the second display pixel P (i, 4) written in the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row and corresponding to the fourth pixel row. , B) and the first display pixel P (i, 5, a) corresponding to the fifth pixel row, display corresponding to the gradation signal + (i, 3, b) is performed.

  That is, at the timing T51a, the display corresponding to the second display pixel P (i, 3, b) corresponding to the third pixel row is started, and the gradation that is “−” writing in the previous frame is started. Preliminary charging is started in which “+” writing is performed in advance on the second display pixel P (i, 4, b) corresponding to the fourth pixel row in which the signal is “+” writing in the frame. Is done. The gradation signal + (i, 3, b) also serves as a precharge signal for the second display pixel P (i, 4, b) corresponding to the fourth pixel row.

  Next, at the timing T51b, the scanning signal of the fourth scanning signal line G (4) and the scanning signal line G (5) of the fourth stage are kept while the scanning signal of the scanning signal line G (3) of the third stage is High. The scanning signal of 5) is changed from High to Low (Vgl).

  At the timing T51b, the second thin film transistor T (i, 3, b) connected to the third-stage scanning signal line G (3) remains in the on state, but the fourth-stage scanning signal line G The first thin film transistor T (i, 4, a) connected to (4) is turned off. For this reason, the gradation signal + (i, 3, b) corresponding to the coordinates is held in the second pixel electrode E (i, 3, b) corresponding to the third pixel row.

  At this timing T51b, the second thin film transistor T (i, 4, b) connected to the fourth stage scanning signal line G (4) and the fifth stage scanning signal line G (5) are connected. The first thin film transistors T (i, 5, a) thus made are simultaneously turned off. Therefore, the gradation signal + (i, 3, b) is held in the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row. That is, at the timing T51b, the above-described preliminary charging for the second display pixel P (i, 4, b) corresponding to the fourth pixel row is completed.

  Further, at the timing T51b, the grayscale signal applied to the data signal line S (i) is switched from + (i, 3, b) to-(i, 3, a) at the timing immediately thereafter. Therefore, the first pixel electrode E (i, 3, a) corresponding to the third pixel row is connected to the third scanning signal line G (3) that is continuously in the ON state. A gradation signal-(i, 3, a) is written through the first thin film transistor T (i, 3, a), and the first display pixel P (i, 3, a) corresponding to the third pixel row is written. In a), display corresponding to the gradation signal-(i, 3, a) is performed.

  Next, at timing T51c, the scanning signal of the scanning signal line G (3) at the third stage is changed from High to Low. As a result, the gradation signal − (i, 3, a) is held in the first pixel electrode E (i, 3, a) corresponding to the third pixel row. Further, between the second pixel electrode E (i, 3, b) corresponding to the third pixel row and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Is disconnected by the second thin film transistor T (i, 3, b) connected to the scanning signal line G (3) at the third stage.

  In this way, in the horizontal period, the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row are displayed. Is written for. In addition, the second display pixel P (i, 4, b) corresponding to the fourth pixel row is precharged.

  In the next horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. A gradation signal is written. In the horizontal period, the scanning signal of the fourth scanning signal line G (4) and the scanning signal of the fifth scanning signal line G (5) and the sixth scanning are synchronized with the start timing T52a of the horizontal period. The scanning signal line G (6) is set to High.

  In the horizontal period, during the period in which the scanning signal of the fourth scanning signal line G (4) is High, for example, supply of the gradation signal + (i, 4, b) to the data signal line S (i) is started. Then, a period from when the gradation signal + (i, 4, a) to be supplied next to the gradation signal + (i, 4, a) to just before the supply is finished. In the horizontal period, a period in which the scanning signal of the fifth scanning signal line G (5) and the scanning signal of the sixth scanning signal line G (6) are High is, for example, the data signal line S (i ) Is a period from when the supply of the gradation signal + (i, 4, b) is started to immediately before the supply of the gradation signal + (i, 4, b) is completed.

  By setting the scanning signal of the fourth scanning signal line G (4) to High at timing T52a, the first thin film transistor T (i, 4, a) connected to the fourth scanning signal line G (4). ) And the second thin film transistor T (i, 4, b) are turned on. Further, by setting the scanning signal of the fifth scanning signal line G (5) to High, the first thin film transistor T (i, 5, a) connected to the fifth scanning signal line G (5). Then, the second thin film transistor T (i, 5, b) is turned on. As a result, the gradation signal + (i, 4, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row and Data is written to the second pixel electrode E (i, 4, b) and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, and corresponds to the fourth pixel row. The first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) and the first display pixel P (i, 5,5) corresponding to the fifth pixel row. In a), display corresponding to the gradation signal + (i, 4, b) is performed.

  At this time, the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row has a gradation having the same polarity as the gradation signal + (i, 4, b) by the above-described preliminary charging. Since the signal + (i, 3, b) is written in advance, the gradation signal + (i, 4, b) is applied to the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row. ) Is written, the second display pixel P (i, 4, b) corresponding to the fourth pixel row promptly displays corresponding to the gradation signal + (i, 4, b). It can be carried out.

  At the timing T52a, as described above, the first scanning signal line G (5) connected to the fifth scanning signal line G (5) is set by setting the scanning signal of the fifth scanning signal line G (5) to High. The thin film transistor T (i, 5, a) and the second thin film transistor T (i, 5, b) are turned on. Further, by setting the scanning signal of the sixth scanning signal line G (6) to High, the first thin film transistor T (i, 6, a) connected to the sixth scanning signal line G (6). Then, the second thin film transistor T (i, 6, b) is turned on. Accordingly, the gradation signal + (i, 4, b) supplied to the data signal line S (i) further causes the second pixel electrode E (i, 5, b) corresponding to the fifth pixel row. b) and the second display pixel P (i, 5) written in the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row and corresponding to the fifth pixel row. , B) and the first display pixel P (i, 6, a) corresponding to the sixth pixel row, display corresponding to the gradation signal + (i, 4, b) is performed.

  That is, at the timing T52a, the display corresponding to the second display pixel P (i, 4, b) corresponding to the fourth pixel row is started, and the gradation that is “−” writing in the previous frame is started. Preliminary charging is started in which “+” writing is performed in advance on the second display pixel P (i, 5, b) corresponding to the fifth pixel row in which the signal is “+” writing in the frame. Is done. The gradation signal + (i, 4, b) also serves as a precharge signal for the second display pixel P (i, 5, b) corresponding to the fifth pixel row.

  Next, at the timing T52b, the scanning signal of the fifth scanning signal line G (5) and the scanning signal line G (6) of the sixth stage are kept while the scanning signal of the scanning signal line G (4) of the fourth stage is High. The scanning signal of 6) is changed from High to Low.

  At the timing T52b, the second thin film transistor T (i, 4, b) connected to the fourth-stage scanning signal line G (4) remains on, but the fifth-stage scanning signal line G The first thin film transistor T (i, 5, a) connected to (5) is turned off. For this reason, the gradation signal + (i, 4, b) corresponding to the coordinates is held in the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row.

  At the timing T52b, the second thin film transistor T (i, 5, b) connected to the fifth-stage scanning signal line G (5) and the sixth-stage scanning signal line G (6) are connected. The first thin film transistors T (i, 6, a) thus made are simultaneously turned off. For this reason, the gradation signal + (i, 4, b) is held in the second pixel electrode E (i, 5, b) corresponding to the fifth pixel row. That is, at the timing T52b, the above-described preliminary charging for the second display pixel P (i, 5, b) corresponding to the fifth pixel row is finished.

  Further, at the timing T52b, at the timing immediately after that, the gradation signal applied to the data signal line S (i) is switched from + (i, 4, b) to-(i, 4, a). For this reason, the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row is connected to the fourth scanning signal line G (4) which is continuously turned on. A gradation signal-(i, 4, a) is written through the first thin film transistor T (i, 4, a), and the first display pixel P (i, 4,4) corresponding to the fourth pixel row is written. In a), display corresponding to the gradation signal-(i, 4, a) is performed.

  Next, at timing T52c, the scanning signal of the fourth scanning signal line G (4) is changed from High to Low. As a result, the gradation signal − (i, 4, a) is held in the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Further, between the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row. Is cut off by the second thin film transistor T (i, 4, b) connected to the fourth scanning signal line G (4).

  In this way, in the horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. Is written for. In addition, the second display pixel P (i, 5, b) corresponding to the fifth pixel row is precharged.

  In the subsequent horizontal period, the above-described gradation signal is sequentially written to the display pixels corresponding to each stage, so that an appropriate video display to be displayed based on the video signal in the display device 1 is performed. Will be made.

  That is, in the fifth embodiment, in the horizontal period for displaying the display pixels P (i, j, a) and P (i, j, b) corresponding to a predetermined pixel row, By performing preliminary charging of the second display pixels P (i, j + 1, b) corresponding to the rows, the target display can be promptly performed on each of the second display pixels. In other words, in the horizontal period before the horizontal period for displaying the display pixels P (i, j, a) and P (i, j, b) corresponding to the predetermined pixel row, the pixel row By subjecting the second display pixels P (i, j, b) corresponding to to the preliminary charging, the target display can be promptly made possible for each second display pixel.

[Sixth Embodiment]
The display device in the sixth embodiment is the same as the schematic overall configuration of the display device 1 shown in FIG. In the sixth embodiment, as shown in FIG. 18, the polarity of the gradation signal held between the adjacent pixel rows is different, and the polarity of the gradation signal held between the adjacent pixel columns is also different. A case of so-called dot inversion driving will be described.

  The operation of the display device 1 in the sixth embodiment will be described below based on the timing chart shown in FIG. Here, in FIG. 19, in order from the top, the gradation signal supplied to the data signal line S (i), the scanning signal supplied to the first scanning signal line G (1), and the second scanning. Scan signal supplied to signal line G (2), scan signal supplied to third stage scan signal line G (3), scan signal supplied to fourth stage scan signal line G (4), 5 The scanning signal supplied to the scanning signal line G (5) at the stage, the scanning signal supplied to the scanning signal line G (6) at the sixth stage, and the first pixel electrode E corresponding to the pixel row at the third stage. Application state of gradation signal in (i, 3, a) Application state of gradation signal in second pixel electrode E (i, 3, b) corresponding to third pixel row, fourth pixel Application state of gradation signal at first pixel electrode E (i, 4, a) corresponding to the row Second pixel electrode E (i, 4, b) corresponding to the fourth pixel row The gradation signal application state at, and the gradation signal application state at the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, the second pixel line corresponding to the fifth pixel row. Application state of gradation signal in pixel electrode E (i, 5, b), application state of gradation signal in first pixel electrode E (i, 6, a) corresponding to the sixth pixel row, six stages The gradation signal application state in the second pixel electrode E (i, 6, b) corresponding to the pixel row of the eye and the common signal Vcom supplied to the common electrode 18 are shown. Also in FIG. 19, each gradation signal supplied by the data signal line S (i) is indicated by a coordinate value on the display panel 10 corresponding to the pixel data. Note that old indicates an applied state based on the gradation signal written in the previous frame.

  In the display device 1 according to the sixth embodiment, pixel data related to the first pixel electrode E (i, j, a) and pixel data related to the second pixel electrode E (i, j, b) are 1 / 2 alternately input to the source driver 20 every horizontal period. That is, pixel data related to the second pixel electrode E (i, j, b) corresponding to a predetermined pixel row is input in the first half of each horizontal period, and the predetermined pixel row and Pixel data relating to the first pixel electrode E (i, j, a) corresponding to the same pixel row is input. Further, the inversion signal is controlled so that the bit value (that is, the polarity of the gradation signal) of the input pixel data is inverted every frame and every horizontal period. Also in FIG. 19, the sign of “+” is added to the gradation signal when the bit inversion of the pixel data is not performed, and “−” is applied to the gradation signal when the bit inversion of the pixel data is performed. The code | symbol is attached | subjected. Further, the relationship between the voltage level of the common signal Vcom and the voltage level of the grayscale signal is shown, for example, as shown in FIG.

  Here, in the sixth embodiment, the polarity of the gradation signal written to the first pixel electrode E (i, j, a) for the display of the first display pixel P (i, j, a) The polarity of the gradation signal written to the second pixel electrode E (i, j, b) for displaying the second display pixel P (i, j, b) is different within the frame. The inversion signal is controlled.

  As described above, as shown in FIG. 19, the grayscale signal and the second pixel electrode E (i, j, b) relating to the first pixel electrode E (i, j, a) in each pixel row in the frame. The grayscale signals according to are-(i, 1, b), + (i, 1, a), + (i, 2, b),-(i, 2, a),-(i, 3, b), + (i, 3, a),... are supplied in time division to the data signal line S (i). Then, such supply of the gradation signal to the data signal line S (i) is repeatedly executed in each frame. Note that the polarity of each gradation signal is inverted for each frame.

  On the other hand, the scanning signal input to each scanning signal line G (j) is set to High (Vgh) twice in each frame.

  First, in a predetermined horizontal period of each frame, for example, in the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row. A gradation signal for display is written. In the horizontal period, the scanning signal of the third scanning signal line G (3) and the scanning signal of the fourth scanning signal line G (4) are respectively high in synchronization with the start timing T61a of the horizontal period. To. Here, in the horizontal period, during the period in which the scanning signal of the third scanning signal line G (3) is High, for example, the gradation signal − (i, 3, b) is applied to the data signal line S (i). A period from when the supply is started to immediately before the supply of the gradation signal + (i, 3, a) to be supplied next to the gradation signal − (i, 3, b) is completed. Further, in the horizontal period, during the period in which the scanning signal of the fourth scanning signal line G (4) is High, for example, the gradation signal − (i, 3, b) is supplied to the data signal line S (i). Is a period from the start to the end of the supply of the gradation signal-(i, 3, b).

  By setting the scanning signal of the third scanning signal line G (3) to High at timing T61a, the first thin film transistor T (i, 3, a connected to the third scanning signal line G (3). ) And the second thin film transistor T (i, 3, b) are turned on. Further, by setting the scanning signal of the fourth scanning signal line G (4) to High, the first thin film transistor T (i, 4, a) connected to the fourth scanning signal line G (4). Then, the second thin film transistor T (i, 4, b) is turned on. As a result, the gradation signal − (i, 3, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 3, a) corresponding to the third pixel row, and Data is written to the second pixel electrode E (i, 3, b) and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row, and corresponds to the third pixel row. The first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) and the first display pixel P (i, 4,4) corresponding to the fourth pixel row. In a), display corresponding to the gradation signal-(i, 3, b) is performed.

  Next, at the timing T61b, the scanning signal of the fourth scanning signal line G (4) is changed from High to Low (Vgl) while the scanning signal of the third scanning signal line G (3) is kept High. At the timing T61b, the second thin film transistor T (i, 3, b) connected to the third-stage scanning signal line G (3) remains in the on state, but the fourth-stage scanning signal line G The first thin film transistor T (i, 4, a) connected to (4) is turned off. For this reason, the second pixel electrode E (i, 3, b) corresponding to the third pixel row holds the gradation signal − (i, 3, b) corresponding to the coordinates. Note that, in the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row, a gradation signal − (i, 3, b) different from the coordinates is held. However, as will be described later, this state is resolved in approximately one horizontal period to two horizontal periods.

  Further, at the timing T61b, the gradation signal applied to the data signal line S (i) immediately after that is switched from − (i, 3, b) to + (i, 3, a). Therefore, the first pixel electrode E (i, 3, a) corresponding to the third pixel row is connected to the third scanning signal line G (3) that is continuously in the ON state. A gradation signal + (i, 3, a) is written through the first thin film transistor T (i, 3, a), and the first display pixel P (i, 3, a) corresponding to the third pixel row is written. In a), display corresponding to the gradation signal + (i, 3, a) is performed.

  Next, at the timing T61c, the scanning signal of the scanning signal line G (3) at the third stage is changed from High to Low. Thus, the gradation signal + (i, 3, a) is held in the first pixel electrode E (i, 3, a) corresponding to the third pixel row. Further, between the second pixel electrode E (i, 3, b) corresponding to the third pixel row and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Is disconnected by the second thin film transistor T (i, 3, b) connected to the scanning signal line G (3) at the third stage.

  In this way, in the horizontal period, the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row are displayed. Is written for.

  In the next horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. A gradation signal is written. In the horizontal period, the scanning signal of the fourth scanning signal line G (4) and the scanning signal of the fifth scanning signal line G (5) are respectively high in synchronization with the start timing T52a of the horizontal period. To. Here, in the horizontal period, during the period when the scanning signal of the fourth scanning signal line G (4) is High, for example, the gradation signal + (i, 4, b) is applied to the data signal line S (i). A period from when supply is started to immediately before the supply of the gradation signal − (i, 4, a) to be supplied next to the gradation signal + (i, 4, b) is completed. In the horizontal period, for example, the gradation signal + (i, 4, b) is supplied to the data signal line S (i) during the period in which the scanning signal of the fifth scanning signal line G (5) is High. Is a period from the start to the end of the supply of the gradation signal + (i, 4, b).

  By setting the scanning signal of the fourth scanning signal line G (4) to High at timing T62a, as described above, the first thin film transistor T ( i, 4, a) and the second thin film transistor T (i, 4, b) are turned on. Further, by setting the scanning signal of the fifth scanning signal line G (5) to High, the first thin film transistor T (i, 5, a) connected to the fifth scanning signal line G (5). Then, the second thin film transistor T (i, 5, b) is turned on. As a result, the gradation signal + (i, 4, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row and Data is written to the second pixel electrode E (i, 4, b) and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, and corresponds to the fourth pixel row. The first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) and the first display pixel P (i, 5,5) corresponding to the fifth pixel row. In a), display corresponding to the gradation signal + (i, 4, b) is performed.

  Next, at the timing T62b, the scanning signal of the fifth scanning signal line G (5) is changed from High to Low while the scanning signal of the fourth scanning signal line G (4) is kept High. At the timing T62b, the second thin film transistor T (i, 4, b) connected to the second-stage scanning signal line G (4) remains on, but the fifth-stage scanning signal line G The first thin film transistor T (i, 5, a) connected to (5) is turned off. For this reason, the gradation signal + (i, 4, b) corresponding to the coordinates is held in the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row. In the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, a gradation signal + (i, 4, b) different from the coordinates is held. However, this state is also resolved in approximately one horizontal period to two horizontal periods.

  At the timing T62b, the gradation signal applied to the data signal line S (i) immediately after that is switched from + (i, 4, b) to − (i, 4, a). For this reason, the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row is connected to the fourth scanning signal line G (4) which is continuously turned on. A gradation signal-(i, 4, a) is written through the first thin film transistor T (i, 4, a), and the first display pixel P (i, 4,4) corresponding to the fourth pixel row is written. In a), display corresponding to the gradation signal-(i, 4, a) is performed. That is, the display based on the gradation signal different from the coordinates is canceled, and the display based on the gradation signals corresponding to the coordinates is performed.

  Next, at timing T62c, the scanning signal of the fourth scanning signal line G (4) is changed from High to Low. As a result, the gradation signal − (i, 4, a) is held in the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Further, between the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row. Is cut off by the second thin film transistor T (i, 4, b) connected to the fourth scanning signal line G (4).

  In this way, in the horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. Is written for.

  In the subsequent horizontal period, the above-described gradation signal is sequentially written to the display pixels corresponding to each stage, so that an appropriate video display to be displayed based on the video signal in the display device 1 is performed. Will be made.

  In the sixth embodiment described above, the case where the scanning signal of the fourth scanning signal line G (4) is set to High at timing T61a has been described. As shown in FIG. 20, the timing at which the scanning signal is initially set to High in each frame may be between the timing T61a and the timing T61x that is a half horizontal period before the timing T61a. Similarly, the timing at which the scanning signal of the scanning signal line G (5) at the fifth stage is first set to High in each frame may be between the timing T62a and the timing T62x that is a half horizontal period before the timing T62a. Good. That is, the timing at which the scanning signal of each scanning signal line G (j) is first set to High in each frame may be between the timing shown in FIG.

[Seventh Embodiment]
The display device in the seventh embodiment has the same general configuration as that of the display device 1 shown in FIG. In the seventh embodiment, a case where the scanning signal input to each scanning signal line G (j) is set to High (Vgh) three times in each frame and dot inversion driving is described.

  The operation of the display device 1 in the seventh embodiment will be described below based on the timing chart shown in FIG. Here, in FIG. 21, in order from the top, the gradation signal supplied to the data signal line S (i), the scanning signal supplied to the first scanning signal line G (1), and the second scanning. Scan signal supplied to signal line G (2), scan signal supplied to third stage scan signal line G (3), scan signal supplied to fourth stage scan signal line G (4), 5 A scanning signal supplied to the scanning signal line G (5) at the stage, a scanning signal supplied to the scanning signal line G (6) at the sixth stage, and a scanning signal line G (7) at the seventh stage. The scanning signal, the scanning signal supplied to the eighth scanning signal line G (8), the scanning signal supplied to the ninth scanning signal line G (9), and the first corresponding to the third pixel row. The application state of the gradation signal at the pixel electrode E (i, 3, a) of the second pixel electrode E (i, 3, b) corresponding to the third pixel row Application state of gradation signal at the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row, and the second pixel electrode E (i corresponding to the fourth pixel row , 4, b) gradation signal application state, the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, the gradation signal application state, the fifth pixel row The application state of the gradation signal at the corresponding second pixel electrode E (i, 5, b) and the gradation signal at the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row. Application state, application state of gradation signal in second pixel electrode E (i, 6, b) corresponding to the sixth pixel row, first pixel electrode E (i) corresponding to the seventh pixel row , 7, a) gradation signal application state, gradation signal application state at the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row, The application state of the gradation signal at the first pixel electrode E (i, 8, a) corresponding to the pixel row of the second stage, and the second pixel electrode E (i, 8, b) corresponding to the eighth pixel row. ) Shows the application state of the gradation signal and the common signal Vcom supplied to the common electrode 18. Also in FIG. 21, each gradation signal supplied by the data signal line S (i) is indicated by a coordinate value on the display panel 10 corresponding to the pixel data. Note that old indicates an applied state based on the gradation signal written in the previous frame.

  Also in the seventh embodiment, the pixel data related to the first pixel electrode E (i, j, a) and the pixel data related to the second pixel electrode E (i, j, b) are halved. The signals are input to the source driver 20 alternately every horizontal period. That is, pixel data related to the second pixel electrode E (i, j, b) corresponding to a predetermined pixel row is input in the first half of each horizontal period, and the predetermined pixel row and Pixel data relating to the first pixel electrode E (i, j, a) corresponding to the same pixel row is input. Further, the inversion signal is controlled so that the bit value (that is, the polarity of the gradation signal) of the input pixel data is inverted every frame and every horizontal period. Also in FIG. 21, the sign of “+” is given to the gradation signal when pixel data bit inversion is not performed, and “−” is applied to the gradation signal when pixel data bit inversion is performed. The code | symbol is attached | subjected. Further, the relationship between the voltage level of the common signal Vcom and the voltage level of the grayscale signal is shown, for example, as shown in FIG.

  Here, in the seventh embodiment, the polarity of the gradation signal written to the first pixel electrode E (i, j, a) for display of the first display pixel P (i, j, a) The polarity of the gradation signal written to the second pixel electrode E (i, j, b) for displaying the second display pixel P (i, j, b) is different within the frame. The inversion signal is controlled.

  As described above, as shown in FIG. 21, the gradation signal and the second pixel electrode E (i, j, b) related to the first pixel electrode E (i, j, a) in each pixel row in the frame. The grayscale signals according to are-(i, 1, b), + (i, 1, a), + (i, 2, b),-(i, 2, a),-(i, 3, b), + (i, 3, a),... are supplied in time division to the data signal line S (i). Then, such supply of the gradation signal to the data signal line S (i) is repeatedly executed in each frame. Note that the polarity of each gradation signal is inverted for each frame.

  On the other hand, the scanning signal input to each scanning signal line G (j) is set to High (Vgh) three times in each frame.

  First, in a predetermined horizontal period of each frame, for example, in the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row. A gradation signal for display is written. In the horizontal period, in synchronization with the start timing T71a of the horizontal period, the scanning signal of the third scanning signal line G (3) and the scanning signal of the fourth scanning signal line G (4) are respectively high. To. Here, in the horizontal period, during the period in which the scanning signal of the third scanning signal line G (3) is High, for example, the gradation signal − (i, 3, b) is applied to the data signal line S (i). A period from when the supply is started to immediately before the supply of the gradation signal + (i, 3, a) to be supplied next to the gradation signal − (i, 3, b) is completed. Further, in the horizontal period, during the period in which the scanning signal of the fourth scanning signal line G (4) is High, for example, the gradation signal − (i, 3, b) is supplied to the data signal line S (i). Is a period from the start to the end of the supply of the gradation signal-(i, 3, b).

  By setting the scanning signal of the third scanning signal line G (3) to High at timing T71a, the first thin film transistor T (i, 3, a) connected to the third scanning signal line G (3). ) And the second thin film transistor T (i, 3, b) are turned on. Further, by setting the scanning signal of the fourth scanning signal line G (4) to High, the first thin film transistor T (i, 4, a) connected to the fourth scanning signal line G (4). Then, the second thin film transistor T (i, 4, b) is turned on. As a result, the gradation signal − (i, 3, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 3, a) corresponding to the third pixel row, and Data is written to the second pixel electrode E (i, 3, b) and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row, and corresponds to the third pixel row. The first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) and the first display pixel P (i, 4,4) corresponding to the fourth pixel row. In a), display corresponding to the gradation signal-(i, 3, b) is performed.

  Further, at timing T71a, the scanning signal of the sixth-stage scanning signal line G (6) is set to High. At this time, during the period when the scanning signal of the sixth scanning signal line G (6) is High, for example, the supply of the gradation signal-(i, 3, b) is started to the data signal line S (i). To the period immediately before the supply of the gradation signal-(i, 3, b) ends. Then, at timing T71a, the scanning signal line G (6) at the sixth stage is set to High so that the first thin film transistor T (i,) connected to the scanning signal line G (6) at the sixth stage. 6, a) is turned on. Thus, the gradation signal − (i, 3, b) supplied to the data signal line S (i) is applied to the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row. Is also written, and the display corresponding to the gradation signal-(i, 3, b) is performed also in the first display pixel P (i, 6, a) corresponding to the sixth pixel row.

  Further, at the timing T71a, the first-stage thin film transistor T (i, 7, a) connected to the seventh-stage scanning signal line G (7) is maintained in the OFF state, and the sixth-stage scanning signal line G ( The second thin film transistor T (i, 6, b) connected to 6) is turned on. Thus, the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row and the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row are formed. Then, the data signal line S (i) is cut off and becomes conductive, and the grayscale signals held in the previous frame are neutralized between the pixel electrodes. That is, when switching the polarity of the gradation signal held in each pixel electrode for each frame, the gradation signal held so that the polarity is different between both pixel electrodes in the previous frame is written before writing in the frame. By neutralizing between the two pixel electrodes, a gradation signal having a polarity to be held in the frame can be quickly written. This primary neutralized state is shown as “± old” in FIG. Timing T71a is a timing at which the transition period to the first neutralization state is started.

  Next, at timing T71b, the scanning signal of the fourth scanning signal line G (4) is changed from High to Low (Vgl) while the scanning signal of the third scanning signal line G (3) is kept High. At the timing T71b, the second thin film transistor T (i, 3, b) connected to the third-stage scanning signal line G (3) remains in the on state, but the fourth-stage scanning signal line G The first thin film transistor T (i, 4, a) connected to (4) is turned off. For this reason, the second pixel electrode E (i, 3, b) corresponding to the third pixel row holds the gradation signal − (i, 3, b) corresponding to the coordinates.

  At the timing T71b, the scanning signal of the sixth scanning signal line G (6) is also changed from High to Low in the same manner as the scanning signal of the fourth scanning signal line G (4). As a result, the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row and the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row. The electrical connection between them is interrupted by the second thin film transistor T (i, 6, b) connected to the sixth-stage scanning signal line G (6), and the transition period to the first neutralization state described above Ends.

  Note that the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row holds a gradation signal − (i, 3, b) different from the coordinates. However, the held gradation signals are obtained from the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row and the first pixel electrode E (corresponding to the seventh pixel row. This is utilized by the second neutralization state described later with i, 7, a).

  Further, immediately after the timing T71b, the gradation signal applied to the data signal line S (i) is switched from − (i, 3, b) to + (i, 3, a). Therefore, the first pixel electrode E (i, 3, a) corresponding to the third pixel row is connected to the third scanning signal line G (3) that is continuously in the ON state. A gradation signal + (i, 3, a) is written through the first thin film transistor T (i, 3, a), and the first display pixel P (i, 3, a) corresponding to the third pixel row is written. In a), display corresponding to the gradation signal + (i, 3, a) is performed.

  Next, at timing T71c, the scanning signal of the scanning signal line G (3) at the third stage is changed from High to Low. Thus, the gradation signal + (i, 3, a) is held in the first pixel electrode E (i, 3, a) corresponding to the third pixel row. Further, between the second pixel electrode E (i, 3, b) corresponding to the third pixel row and the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Is disconnected by the second thin film transistor T (i, 3, b) connected to the scanning signal line G (3) at the third stage.

  In this way, in the horizontal period, the first display pixel P (i, 3, a) and the second display pixel P (i, 3, b) corresponding to the third pixel row are displayed. Is written for.

  In the next horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. A gradation signal is written. In the horizontal period, the scanning signal of the fourth scanning signal line G (4) and the scanning signal of the fifth scanning signal line G (5) are High in synchronization with the start timing T72a of the horizontal period. To. Here, in the horizontal period, during the period when the scanning signal of the fourth scanning signal line G (4) is High, for example, the gradation signal + (i, 4, b) is applied to the data signal line S (i). A period from when supply is started to immediately before the supply of the gradation signal − (i, 4, a) to be supplied next to the gradation signal + (i, 4, b) is completed. In the horizontal period, for example, the gradation signal + (i, 4, b) is supplied to the data signal line S (i) during the period in which the scanning signal of the fifth scanning signal line G (5) is High. Is a period from the start to the end of the supply of the gradation signal + (i, 4, b).

  By setting the scanning signal of the fourth scanning signal line G (4) to High at timing T72a, the first thin film transistor T (i, 4, a) connected to the fourth scanning signal line G (4). ) And the second thin film transistor T (i, 4, b) are turned on. Further, by setting the scanning signal of the fifth scanning signal line G (5) to High, the first thin film transistor T (i, 5, a) connected to the fifth scanning signal line G (5). Then, the second thin film transistor T (i, 5, b) is turned on. As a result, the gradation signal + (i, 4, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row and Data is written to the second pixel electrode E (i, 4, b) and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row, and corresponds to the fourth pixel row. The first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) and the first display pixel P (i, 5,5) corresponding to the fifth pixel row. In a), display corresponding to the gradation signal + (i, 4, b) is performed.

  At timing T72a, the scanning signal of the seventh scanning signal line G (7) is set to High. At this time, during the period when the scanning signal of the seventh scanning signal line G (7) is High, for example, the supply of the gradation signal + (i, 4, b) to the data signal line S (i) is started. Until the end of the supply of the gradation signal + (i, 4, b). At timing T72a, the scanning signal of the seventh scanning signal line G (7) is set to High, so that the first thin film transistor T (i, i, connected to the seventh scanning signal line G (7). 7, a) is turned on. Thereby, the gradation signal + (i, 4, b) supplied to the data signal line S (i) is applied to the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row. Is also written, and the display corresponding to the gradation signal + (i, 4, b) is also performed in the first display pixel P (i, 7, a) corresponding to the seventh pixel row.

  Further, at the timing T72a, the seventh scanning signal line G (( The second thin film transistor T (i, 7, b) connected to 7) is turned on. As a result, the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row and the first pixel electrode E (i, 8, a) corresponding to the eighth pixel row. In the meantime, the transition period to the first neutralized state described above is started.

  Next, at timing T72b, the scanning signal of the fifth stage scanning signal line G (5) is changed from High to Low while the scanning signal of the fourth stage scanning signal line G (4) is kept High. At the timing T72b, the second thin film transistor T (i, 4, b) connected to the fourth-stage scanning signal line G (4) remains on, but the fifth-stage scanning signal line G The first thin film transistor T (i, 5, a) connected to (5) is turned off. For this reason, the gradation signal + (i, 4, b) corresponding to the coordinates is held in the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row.

  At timing T72b, the scanning signal of the seventh scanning signal line G (7) is also changed from High to Low in the same manner as the scanning signal of the fifth scanning signal line G (5). As a result, the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row and the first pixel electrode E (i, 8, a) corresponding to the eighth pixel row. The electrical connection between them is interrupted by the second thin film transistor T (i, 7, b) connected to the seventh-stage scanning signal line G (7), and the transition period to the first neutralization state described above Ends.

  Note that the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row holds the gradation signal + (i, 4, b) different from the coordinates. However, the held gradation signals are obtained from the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row and the first pixel electrode E (corresponding to the eighth pixel row. It is utilized by the secondary neutralization state described later with i, 8, a).

  Further, immediately after the timing T72b, the gradation signal applied to the data signal line S (i) is switched from + (i, 4, b) to − (i, 4, a). For this reason, the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row is connected to the fourth scanning signal line G (4) which is continuously turned on. A gradation signal-(i, 4, a) is written through the first thin film transistor T (i, 4, a), and the first display pixel P (i, 4,4) corresponding to the fourth pixel row is written. In a), display corresponding to the gradation signal-(i, 4, a) is performed.

  Next, at timing T72c, the scanning signal of the fourth scanning signal line G (4) is changed from High to Low. As a result, the gradation signal − (i, 4, a) is held in the first pixel electrode E (i, 4, a) corresponding to the fourth pixel row. Further, between the second pixel electrode E (i, 4, b) corresponding to the fourth pixel row and the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row. Is cut off by the second thin film transistor T (i, 4, b) connected to the fourth scanning signal line G (4).

  In this way, in the horizontal period, the first display pixel P (i, 4, a) and the second display pixel P (i, 4, b) corresponding to the fourth pixel row are displayed. Is written for.

  In the next horizontal period, the first display pixel P (i, 5, a) and the second display pixel P (i, 5, b) corresponding to the fifth pixel row are displayed. A gradation signal is written. In the horizontal period, the scanning signal of the fifth scanning signal line G (5) and the scanning signal of the sixth scanning signal line G (6) are High in synchronization with the start timing T73a of the horizontal period. To. Here, in the horizontal period, during the period in which the scanning signal of the fifth scanning signal line G (5) is High, for example, the gradation signal − (i, 5, b) is applied to the data signal line S (i). A period from when the supply is started to immediately before the supply of the gradation signal + (i, 5, a) to be supplied next to the gradation signal − (i, 5, b) is completed. In the horizontal period, for example, the gradation signal − (i, 5, b) is supplied to the data signal line S (i) during the period in which the scanning signal of the sixth scanning signal line G (6) is High. Is a period from the start of the operation until the end of the supply of the gradation signal-(i, 5, b).

  By setting the scanning signal of the fifth scanning signal line G (5) to High at timing T73a, the first thin film transistor T (i, 5, a) connected to the fifth scanning signal line G (5). ) And the second thin film transistor T (i, 5, b) are turned on. Further, by setting the scanning signal of the sixth scanning signal line G (6) to High, the first thin film transistor T (i, 6, a) connected to the sixth scanning signal line G (6). Then, the second thin film transistor T (i, 6, b) is turned on. As a result, the gradation signal − (i, 5, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row and Data is written in the second pixel electrode E (i, 5, b) and the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row, and corresponds to the fifth pixel row. The first display pixel P (i, 5, a), the second display pixel P (i, 5, b), and the first display pixel P (i, 6,6) corresponding to the sixth pixel row. In a), display corresponding to the gradation signal-(i, 5, b) is performed.

  At the timing T73a, the sixth scanning signal line G ((), while the first thin film transistor T (i, 7, a) connected to the seventh scanning signal line G (7) is maintained in the OFF state. Since the second thin film transistor T (i, 6, b) connected to 6) is turned on, the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row and the seventh stage The first pixel electrode E (i, 7, a) corresponding to the pixel row of the eye is in a conductive state while being cut off from the data signal line S (i), and is held between the two pixel electrodes so far. The tone signals that have been neutralized are neutralized. In order to distinguish the neutralization state here from the primary neutralization state described above, the secondary neutralization state is used.

  Here, the gradation signal held so far is “± old” as described above for the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row. The first pixel electrode E (i, 7, a) corresponding to the seventh pixel row is the gradation signal + (i, 4, b) described above, and the gradation signal having the polarity “+”. Is held. Therefore, in the secondary neutralization state, neutralization is performed so as to approach the gradation signal on the “+” side. The secondary neutralization state neutralized so as to approach the gradation signal on the “+” side is shown as “+ ±” in FIG.

  That is, at the timing T73a, the second display pixel P (i, 6, b) corresponding to the sixth pixel row in which the gradation signal that was written “−” in the previous frame becomes “+” written in the frame. ), A secondary neutralization state for preliminary charging, in which “+” is written in advance, is started. The gradation signal + (i, 4, b) also serves as a precharge signal for the second display pixel P (i, 6, b) corresponding to the sixth pixel row.

  At timing T73a, the scanning signal of the eighth scanning signal line G (8) is set to High. At this time, during the period when the scanning signal of the eighth scanning signal line G (8) is High, for example, the supply of the gradation signal-(i, 5, b) to the data signal line S (i) is started. To the period immediately before the supply of the gradation signal-(i, 5, b) ends. At a timing T73a, the scanning signal line G (8) at the eighth stage is set to High so that the first thin film transistor T (i,) connected to the scanning signal line G (8) at the eighth stage. 8, a) is turned on. Thereby, the gradation signal − (i, 5, b) supplied to the data signal line S (i) is applied to the first pixel electrode E (i, 8, a) corresponding to the eighth pixel row. Is also written, and the display corresponding to the gradation signal-(i, 5, b) is performed also in the first display pixel P (i, 8, a) corresponding to the eighth pixel row.

  Further, at the timing T73a, the first thin film transistor T (i, 9, a) connected to the ninth scanning signal line G (9) is maintained in the OFF state, and the eighth scanning signal line G ( The second thin film transistor T (i, 8, b) connected to 8) is turned on. As a result, the second pixel electrode E (i, 8, b) corresponding to the eighth pixel row and the first pixel electrode E (i, 9, a) corresponding to the ninth pixel row. In the meantime, the transition period to the first neutralized state described above is started.

  Next, at the timing T73b, the scanning signal of the sixth-stage scanning signal line G (6) is changed from High to Low while the scanning signal of the fifth-stage scanning signal line G (5) remains High. At the timing T73b, the second thin film transistor T (i, 5, b) connected to the fifth-stage scanning signal line G (5) remains on, but the sixth-stage scanning signal line G The first thin film transistor T (i, 6, a) connected to (6) is turned off. For this reason, the gradation signal − (i, 5, b) corresponding to the coordinates is held in the second pixel electrode E (i, 5, b) corresponding to the fifth pixel row. Further, between the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row and the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row. Is disconnected by the second thin film transistor T (i, 6, b) connected to the sixth-stage scanning signal line G (6), and the transition period to the second neutralization state described above is reduced. finish.

  At timing T73b, the scanning signal of the eighth scanning signal line G (8) is also changed from High to Low, similarly to the scanning signal of the sixth scanning signal line G (6). As a result, the second pixel electrode E (i, 8, b) corresponding to the eighth pixel row and the first pixel electrode E (i, 9, a) corresponding to the ninth pixel row. The electrical connection between them is interrupted by the second thin film transistor T (i, 8, b) connected to the eighth-stage scanning signal line G (8), and the transition period to the first neutralization state described above. Ends.

  Note that the first pixel electrode E (i, 8, a) corresponding to the eighth pixel row holds a gradation signal − (i, 5, b) different from the coordinates. However, the held gradation signals are obtained from the second pixel electrode E (i, 8, b) corresponding to the eighth pixel row and the first pixel electrode E (corresponding to the ninth pixel row. It is utilized by the secondary neutralization state with i, 9, a).

  Further, immediately after the timing T73b, the gradation signal applied to the data signal line S (i) is switched from − (i, 5, b) to + (i, 5, a). For this reason, the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row is connected to the fifth scanning signal line G (5) that is continuously turned on. The gradation signal + (i, 5, a) is written through the first thin film transistor T (i, 5, a), and the first display pixel P (i, 5,5) corresponding to the fifth pixel row is written. In a), display corresponding to the gradation signal + (i, 5, a) is performed.

  Next, at timing T73c, the scanning signal of the fifth scanning signal line G (5) is changed from High to Low. As a result, the gradation signal + (i, 5, a) is held in the first pixel electrode E (i, 5, a) corresponding to the fifth pixel row. Also, between the second pixel electrode E (i, 5, b) corresponding to the fifth pixel row and the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row. Is disconnected by the second thin film transistor T (i, 5, b) connected to the fifth-stage scanning signal line G (5).

  In this manner, the first display pixel P (i, 5, a) and the second display pixel P (i, 5, b) corresponding to the fifth pixel row are displayed in the horizontal period. Is written for.

  In the next horizontal period, the first display pixel P (i, 6, a) and the second display pixel P (i, 6, b) corresponding to the sixth pixel row are displayed. A gradation signal is written. In the horizontal period, in synchronization with the start timing T74a of the horizontal period, the scanning signal of the sixth scanning signal line G (6) and the scanning signal of the seventh scanning signal line G (7) are High. To. Here, in the horizontal period, during the period in which the scanning signal of the sixth-stage scanning signal line G (6) is High, for example, the gradation signal + (i, 6, b) is applied to the data signal line S (i). A period from when the supply is started to immediately before the supply of the gradation signal − (i, 6, a) to be supplied next to the gradation signal + (i, 6, b) is completed. In the horizontal period, for example, the gradation signal + (i, 6, b) is supplied to the data signal line S (i) during the period in which the scanning signal of the seventh scanning signal line G (7) is High. Is a period from the start to the end of the supply of the gradation signal + (i, 6, b).

  By setting the scanning signal of the sixth scanning signal line G (6) to High at timing T74a, the first thin film transistor T (i, 6, a) connected to the sixth scanning signal line G (6). ) And the second thin film transistor T (i, 6, b) are turned on. Further, by setting the scanning signal of the seventh scanning signal line G (7) to High, the first thin film transistor T (i, 7, a) connected to the seventh scanning signal line G (7). In addition, the second thin film transistor T (i, 7, b) is turned on. As a result, the gradation signal + (i, 6, b) supplied to the data signal line S (i) corresponds to the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row and Data is written to the second pixel electrode E (i, 6, b) and the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row, and corresponds to the sixth pixel row. The first display pixel P (i, 6, a), the second display pixel P (i, 6, b), and the first display pixel P (i, 7, In a), display corresponding to the gradation signal + (i, 6, b) is performed.

  At this time, the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row is precharged through the first neutralization state and the second neutralization state described above. Since the gradation signal “+ ±” having a potential relatively close to the gradation signal + (i, 6, b) is written in advance, the second pixel electrode E (i, 6, when the gradation signal + (i, 6, b) is written in the second display pixel P (i, 6, b) corresponding to the sixth pixel row, Display corresponding to the adjustment signal + (i, 6, b) can be performed.

  At the timing T74a, the seventh scanning signal line G ((), while the first thin film transistor T (i, 7, a) connected to the eighth scanning signal line G (8) is kept off. Since the second thin film transistor T (i, 7, b) connected to 7) is turned on, the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row and the eighth stage The first pixel electrode E (i, 8, a) corresponding to the pixel row of the eye is in a conductive state while being cut off from the data signal line S (i), and is held between the two pixel electrodes so far. The tone signals that have been neutralized are neutralized. That is, between the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row and the first pixel electrode E (i, 8, a) corresponding to the eighth pixel row. Thus, the secondary neutralization state described above is achieved.

  By the way, the gradation signal held so far is the above-mentioned “± old” in the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row. The first pixel electrode E (i, 8, a) corresponding to the eighth pixel row is the above-described gradation signal − (i, 5, b) and the gradation signal having a polarity of “−”. Is held. Therefore, in the secondary neutralization state here, neutralization is performed so as to approach the gradation signal on the “−” side. The secondary neutralization state neutralized so as to approach the gradation signal on the “−” side is shown as “− ±” in FIG.

  Further, at timing T74a, the scanning signal of the ninth scanning signal line G (9) is set to High. At this time, during the period when the scanning signal of the ninth scanning signal line G (9) is High, for example, the supply of the gradation signal + (i, 6, b) to the data signal line S (i) is started. To the period immediately before the supply of the gradation signal + (i, 6, b) ends. At the timing T74a, the scanning signal line G (9) at the 9th stage is set to High so that the first thin film transistor T (i, i, connected to the 9th scanning signal line G (9) is obtained. 9, a) is turned on. Accordingly, the gradation signal + (i, 9, b) supplied to the data signal line S (i) is applied to the first pixel electrode E (i, 9, a) corresponding to the ninth pixel row. Is also written, and the display corresponding to the gradation signal + (i, 6, b) is also performed in the first display pixel P (i, 9, a) corresponding to the ninth pixel row.

  Further, at the timing T74a, the 9th scanning signal line G ((), while the first thin film transistor T (i, 10, a) connected to the 10th scanning signal line G (10) is maintained in the OFF state. The second thin film transistor T (i, 9, b) connected to 9) is turned on. As a result, the second pixel electrode E (i, 9, b) corresponding to the ninth pixel row and the first pixel electrode E (i, 10, a) corresponding to the tenth pixel row. In the meantime, the transition period to the first neutralized state described above is started.

  Next, at timing T74b, the scanning signal of the seventh scanning signal line G (7) is changed from High to Low while the scanning signal of the sixth scanning signal line G (6) is kept High. At this timing T74b, the second thin film transistor T (i, 6, b) connected to the sixth-stage scanning signal line G (6) remains in the on state, but the seventh-stage scanning signal line G The first thin film transistor T (i, 7, a) connected to (7) is turned off. For this reason, the gradation signal + (i, 6, b) corresponding to the coordinates is held in the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row. Further, between the second pixel electrode E (i, 7, b) corresponding to the seventh pixel row and the first pixel electrode E (i, 8, a) corresponding to the eighth pixel row. Are disconnected by the second thin film transistor T (i, 7, b) connected to the seventh-stage scanning signal line G (7), and the transition period to the second neutralization state described above is achieved. finish.

  At timing T74b, the scanning signal of the ninth scanning signal line G (9) is also changed from High to Low, similarly to the scanning signal of the seventh scanning signal line G (7). As a result, the second pixel electrode E (i, 9, b) corresponding to the ninth pixel row and the first pixel electrode E (i, 10, a) corresponding to the tenth pixel row. The electrical connection between them is interrupted by the second thin film transistor T (i, 9, b) connected to the 9th stage scanning signal line G (9), and the transition period to the first neutralization state described above Ends.

  Note that the first pixel electrode E (i, 9, a) corresponding to the ninth pixel row holds a gradation signal + (i, 6, b) different from the coordinates. However, the held gradation signal is obtained by using the second pixel electrode E (i, 9, b) corresponding to the ninth pixel row and the first pixel electrode E (corresponding to the tenth pixel row. It is utilized by the secondary neutralization state with i, 10, a).

  Further, immediately after the timing T74b, the gradation signal applied to the data signal line S (i) is switched from + (i, 6, b) to − (i, 6, a). For this reason, the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row is connected to the sixth scanning signal line G (6) that is continuously in the on state. A gradation signal − (i, 6, a) is written through the first thin film transistor T (i, 6, a), and the first display pixel P (i, 6, a) corresponding to the sixth pixel row. In a), display corresponding to the gradation signal-(i, 6, a) is performed.

  Next, at the timing T74c, the scanning signal of the sixth scanning signal line G (6) is changed from High to Low. As a result, the gradation signal-(i, 6, a) is held in the first pixel electrode E (i, 6, a) corresponding to the sixth pixel row. Further, between the second pixel electrode E (i, 6, b) corresponding to the sixth pixel row and the first pixel electrode E (i, 7, a) corresponding to the seventh pixel row. Is disconnected by the second thin film transistor T (i, 6, b) connected to the sixth-stage scanning signal line G (6).

  In this way, the display of the first display pixel P (i, 6, a) and the second display pixel P (i, 6, b) corresponding to the sixth pixel row is performed in the horizontal period. Is written for.

  That is, in the seventh embodiment, pixels are successively arranged in the horizontal period for displaying the display pixels P (i, j, a) and P (i, j, b) corresponding to a predetermined pixel row. The first preliminary charge is performed on the second display pixels P (i, j + 3, b) corresponding to the rows, and the display pixels P (i, j + 2, a) and P (i, j + 2, b) By performing the second preliminary charging for the same display pixel during the horizontal period for performing the display, the target display can be promptly performed for each second display pixel. In other words, in the horizontal period before the horizontal period for displaying the display pixels P (i, j, a) and P (i, j, b) corresponding to the predetermined pixel row, the pixel row The second display pixel P (i, j, b) corresponding to the second display pixel P (i, j, b) is precharged twice, so that the target display can be quickly made to each second display pixel. .

  In the seventh embodiment, the case where the scanning signal of the fourth scanning signal line G (4) is set to High at timing T71a has been described. As shown in FIG. 22, the timing at which the scanning signal is set to High for the second time in each frame may be between the timing T71a and the timing T71x that is 1/2 horizontal period earlier. Similarly, the timing at which the scanning signal of the fifth scanning signal line G (5) is set to High for the second time in each frame is between the timing T72a and the timing T72x that is ½ horizontal period before the timing T72a. Also good. Similarly, the timing at which the scanning signal of the scanning signal line G (6) at the sixth stage is set to High for the second time in each frame is between the timing T73a and the timing T73x that is ½ horizontal period before the timing T73a. Also good. Similarly, the timing at which the scanning signal of the seventh scanning signal line G (7) is set to High for the second time in each frame is between the timing T74a and the timing T74x which is ½ horizontal period before the timing T74a. Also good. That is, the timing at which the scanning signal of each scanning signal line G (j) is set to High for the second time in each frame may be between the timing shown in FIG. 21 and the timing preceding by 1/2 horizontal period. .

  In each of the above-described embodiments, in the display panel 10, the first pixel electrode E (i, j, a) corresponding to a predetermined pixel row and the second pixel electrode E corresponding to the preceding pixel row. The second thin film transistor T (i, j-1, b) for controlling the electrical connection with (i, j-1, b) includes a first pixel electrode E (corresponding to a predetermined pixel row). The scanning signal line formed on the side different from the arrangement position of the second pixel electrode E (i, j-1, b) corresponding to the previous pixel row with respect to the arrangement position of i, j, a). As shown in FIGS. 23, 24, 25, and 26, the first pixel electrode E (i, j, a) corresponding to a predetermined pixel row and its preceding stage are described. Second thin film transistor for controlling the electrical connection with the second pixel electrode E (i, j-1, b) corresponding to the pixel row on the side. The transistor T (i, j-1, b) is a second pixel corresponding to the arrangement position of the first pixel electrode E (i, j, a) corresponding to a predetermined pixel row and the pixel row on the preceding stage. It may be configured to be connected to a scanning signal line formed between the electrodes E (i, j-1, b). With such a configuration, the wiring length of the connection wiring L can be shortened as compared with the above-described embodiment, so that the aperture ratio of the display pixel can be increased. Further, two pixels are provided via the second thin film transistor T (i, j-1, b) without providing the intersection Ri between the scanning signal line G (j) and the connection wiring L as shown in FIG. Since the electrodes E (i, j, a) and E (i, j-1, b) can be connected, the parasitic capacitance generated between the scanning signal line G (j) and the connection wiring L is relatively low. This is preferable because it can be kept small. Also in the display device having such a pixel configuration, it is possible to perform appropriate video display to be displayed based on the video signal by the driving operation similar to each of the above-described embodiments.

It is a figure which shows the schematic whole structure of a display apparatus. It is a figure which shows the cross-sectional structure of a display panel. It is a figure which shows a pixel arrangement | sequence. It is a top view which shows a pixel structure. FIG. 5 is a cross-sectional view illustrating a pixel structure, which is a cross section taken along line X1-X1 ′ in FIG. 4. FIG. 5 is a cross-sectional view illustrating a pixel structure, which is a Y1-Y1 ′ cross section in FIG. 4. FIG. 5 is a cross-sectional view illustrating a pixel structure, which is a Z1-Z1 ′ cross section in FIG. 4. 6 is a timing chart illustrating the operation of the display device according to the first embodiment. It is a relationship diagram between the voltage level of the gradation signal and the voltage level of the common signal. It is a timing chart shown about operation of a display in another embodiment. 10 is a timing chart illustrating the operation of the display device according to the second embodiment. It is a timing chart shown about operation of a display in a 3rd embodiment. Illustration of line inversion drive Explanation of column inversion drive It is a timing chart shown about operation of a display in a 4th embodiment. It is a timing chart shown about operation of a display in another embodiment. It is a timing chart shown about operation of a display in a 5th embodiment. Illustration of dot inversion drive It is a timing chart shown about operation of a display in a 6th embodiment. It is a timing chart shown about operation of a display in another embodiment. It is a timing chart shown about operation of a display in a 7th embodiment. It is a timing chart shown about operation of a display in another embodiment. It is a figure which shows the pixel arrangement | sequence in another embodiment. It is a top view which shows the pixel structure in another embodiment. It is sectional drawing which shows the pixel structure in another embodiment, and is X2-X2 'cross section in FIG. It is sectional drawing which shows the pixel structure in another embodiment, and is Z2-Z2 'cross section in FIG.

Explanation of symbols

10: Display panel 18: Common electrode 20: Source driver 30: Gate driver 40: Pixel data generation circuit 50: Common signal generation circuit 60: Timing control circuit 70: Power generation time E, E (i, j, a), E (I, j, b): Pixel electrodes P, P (i, j, a), P (i, j, b): Display pixels T (i, j, a), T (i, j, b): Thin film transistor G (j): Scanning signal line S (i): Data signal line L: Connection wiring

Claims (12)

A first scanning signal line, a second scanning signal line, and a third scanning signal line that are extended in a predetermined direction;
A data signal line disposed so as to intersect the first scanning signal line, the second scanning signal line, and the third scanning signal line;
A first thin film transistor having a gate electrode connected to the first scanning signal line and one of a source electrode and a drain electrode connected to the data signal line;
A first pixel electrode connected to the other one of the source electrode and the drain electrode in the first thin film transistor and supplied with a grayscale signal supplied to the data signal line through the first thin film transistor; ,
A second thin film transistor in which a gate electrode is connected to the second scanning signal line and one of a source electrode and a drain electrode is connected to the first pixel electrode;
A second pixel electrode connected to the other one of the source electrode and the drain electrode in the second thin film transistor and applied with a grayscale signal supplied to the data signal line via the first pixel electrode When,
A third thin film transistor having a gate electrode connected to the second scanning signal line and one of a source electrode and a drain electrode connected to the data signal line;
A third pixel electrode connected to the other one of the source electrode and the drain electrode in the third thin film transistor and to which a grayscale signal supplied to the data signal line is applied via the third thin film transistor; ,
A fourth thin film transistor having a gate electrode connected to the third scanning signal line and one of a source electrode and a drain electrode connected to the third pixel electrode;
A fourth pixel electrode connected to the other one of the source electrode and the drain electrode in the fourth thin film transistor and to which a grayscale signal supplied to the data signal line is applied via the third pixel electrode When,
A gradation signal to be held in the fourth pixel electrode, a gradation signal to be held in the second pixel electrode, a gradation signal to be held in the third pixel electrode, and a gradation to be held in the first pixel electrode A signal side driving circuit for supplying each gradation signal to the data signal line in a time division manner in the order of signals;
The second thin film transistor and the third thin film transistor are supplied to the second scanning signal line during a first period in which the signal signal driving circuit supplies a gradation signal to be held in the fourth pixel electrode to the data signal line. the first provides a signal level scanning signal, the signal for the fourth TFT in the oN state to the third scanning signal line to supply a first signal level to the thin film transistors in the oN state scanning signal The second thin film transistor and the second thin film transistor are connected to the second scanning signal line in a second period subsequent to the first period after the supply of the gradation signal to be held in the fourth pixel electrode from the side driver circuit is completed. A third thin film transistor is turned off, a scanning signal having a second signal level different from the first signal level is supplied, and the first signal level is supplied to the third scanning signal line. Supplying the scanning signals, gradation signal to be held in the third pixel electrode to the data signal line by the signal side driving circuit is supplied to the third period consecutive to the second period, the second The scanning signal line is supplied with the scanning signal of the first signal level for turning on the second thin film transistor and the third thin film transistor, and the fourth thin film transistor is turned off to the third scanning signal line. A scanning side driving circuit for supplying a scanning signal of the second signal level ,
Equipped with a,
The second pixel electrode and the third pixel electrode are disposed adjacent to each other along the predetermined direction,
The first pixel electrode and the third pixel electrode are disposed adjacent to each other in a direction orthogonal to the predetermined direction,
The second pixel electrode and the fourth pixel electrode are disposed adjacent to each other along a direction orthogonal to the predetermined direction,
The gradation signal held in the first pixel electrode, the gradation signal held in the second pixel electrode, the gradation signal held in the third pixel electrode, and the gradation held in the fourth pixel electrode The signal is such that the polarity of the voltage applied to the liquid crystal in a predetermined frame is equal between the gradation signal held in the first pixel electrode and the gradation signal held in the third pixel electrode. In addition, the second pixel electrode is held so that the gradation signal held in the second pixel electrode and the gradation signal held in the fourth pixel electrode are equal to each other. The gradation signal and the gradation signal held in the third pixel electrode are set to be different from each other,
The scan driving circuit starts supplying the scan signal of the second signal level to the third scan signal line in the second period at a timing before the end of the second period, and The display device , wherein the supply of the scanning signal of the first signal level to the second scanning signal line is performed until the timing when the second period ends . The scanning side driving circuit is supplied with a gradation signal to be held in the fourth pixel electrode to the data signal line by the signal side driving circuit, and the scanning side driving circuit is supplied to the second scanning signal line. The second thin film transistor and the third thin film transistor are turned on. When the first signal level scanning signal is supplied, the fourth thin film transistor is turned on the third scanning signal line . The display device according to claim 1 , wherein a scanning signal of one signal level is supplied. The scanning side drive circuit includes:
When the gradation signal to be held in the second pixel electrode to the data signal line by the signal side driving circuit are supplied, wherein the said first thin film transistor to the ON state to the first scanning signal line supplying a scan signal of the first signal level to the second thin film transistor and the third thin film transistor to the oN state to the second scanning signal line supplies a scan signal of the first signal level,
When the gradation signal to be held in the first pixel electrode to the data signal line by the signal side driving circuit are supplied, wherein the said first thin film transistor to the ON state to the first scanning signal line A scan signal of a first signal level is supplied, and a scan signal of the second signal level for turning off the second thin film transistor and the third thin film transistor is supplied to the second scan signal line. The display device according to claim 2 . One of claims 1 to 3, characterized in that the pre-charge the gradation signal to be held in the fourth pixel electrode to be supplied to the data signal line by the signal side driving circuit to the second pixel electrode The display device described in 1. A fourth scanning signal line arranged to intersect the data signal line;
A fifth thin film transistor having a gate electrode connected to the fourth scanning signal line and one of a source electrode and a drain electrode connected to the data signal line;
A fifth pixel electrode connected to the other one of the source electrode and the drain electrode in the fifth thin film transistor and to which a grayscale signal supplied to the data signal line is applied via the fifth thin film transistor; ,
A sixth thin film transistor in which a gate electrode is connected to the first scanning signal line and one of a source electrode and a drain electrode is connected to the fifth pixel electrode;
A sixth pixel electrode connected to the other one of the source electrode and the drain electrode in the sixth thin film transistor and applied with a gradation signal supplied to the data signal line via the fifth pixel electrode When,
A seventh thin film transistor having a gate electrode connected to the third scanning signal line and one of a source electrode and a drain electrode connected to the data signal line;
A seventh pixel electrode connected to the other one of the source electrode and the drain electrode in the seventh thin film transistor and applied with a grayscale signal supplied to the data signal line through the seventh thin film transistor; ,
Further comprising
The signal side driver circuit includes a gradation signal to be held in the fourth pixel electrode, a gradation signal to be held in the seventh pixel electrode, a gradation signal to be held in the second pixel electrode, the third signal In order of the gradation signal held in the pixel electrode, the gradation signal held in the sixth pixel electrode, the gradation signal held in the first pixel electrode, and the gradation signal held in the fifth pixel electrode. 2. The display device according to claim 1 , wherein each of the gradation signals is supplied to the data signal line in a time division manner. The scanning side driving circuit is supplied with a gradation signal held by the seventh pixel electrode to the data signal line by the signal side driving circuit, and the scanning side driving circuit is supplied to the third scanning signal line. The fifth thin film transistor is turned on in the fourth scanning signal line when the scanning signal of the first signal level for turning on the seventh thin film transistor and the fourth thin film transistor is supplied . and supplying a scan signal of the first signal level to the first thin film transistor and the sixth thin film transistor in the oN state to the first scanning signal line and supplies a scanning signal 1 signal level The display device according to claim 5 . According to claim 5 or 6, characterized in that pre-charge the gradation signal to be held in the seventh pixel electrode of which is supplied to the data signal line by the signal side driving circuit to the pixel electrode of the sixth Display device. In the signal side driver circuit, the polarity of the voltage applied to the liquid crystal is set to the second pixel electrode in a period before the period in which the gradation signal held in the second pixel electrode is supplied to the data signal line. A pre-charge signal set to be equal to the gradation signal to be held in the data signal line,
The scanning side driving circuit turns on the first thin film transistor in the first scanning signal line when the preliminary charging signal is supplied to the data signal line by the signal side driving circuit . display device according to any one of claims 1 to 7, characterized by supplying a scanning signal 1 signal level. The scanning side driving circuit turns on the second thin film transistor in the second scanning signal line when the precharge signal is supplied to the data signal line by the signal side driving circuit . 9. The display device according to claim 8 , wherein a scanning signal of one signal level is supplied. The scanning side driving circuit turns on the second thin film transistor in the second scanning signal line after the signal side driving circuit finishes supplying the precharge signal to the data signal line . 9. The display device according to claim 8 , wherein a scanning signal of one signal level is supplied. A first scanning signal line and a second scanning signal line extending in a predetermined direction;
A data signal line arranged to intersect the first scanning signal line and the second scanning signal line;
A first thin film transistor having a gate electrode connected to the first scanning signal line and one of a source electrode and a drain electrode connected to the data signal line;
A first pixel electrode connected to the other one of the source electrode and the drain electrode in the first thin film transistor and supplied with a grayscale signal supplied to the data signal line through the first thin film transistor; ,
A second thin film transistor in which a gate electrode is connected to the second scanning signal line and one of a source electrode and a drain electrode is connected to the first pixel electrode;
A second pixel electrode connected to the other one of the source electrode and the drain electrode in the second thin film transistor and applied with a grayscale signal supplied to the data signal line via the first pixel electrode When,
A signal side drive circuit for supplying each of the grayscale signals to the data signal line in a time-sharing manner in the order of the grayscale signal held in the second pixel electrode and the grayscale signal held in the first pixel electrode;
The second thin film transistor is turned on in the second scanning signal line during a first period in which the signal signal driving circuit supplies a gradation signal to be held in the second pixel electrode to the data signal line. The first signal level scan signal is supplied to the first scan signal line, and the first signal level scan signal for turning on the first thin film transistor is supplied to the first scan signal line . The first thin film transistor is turned off in the first scanning signal line in a second period subsequent to the first period after the supply of the gradation signal held in the second pixel electrode is completed. different from the first signal level, and supplies the scan signal of the first signal level to the second scan signal line and supplies a scan signal of the second signal level, the data signal line by the signal side driving circuit Gradation signal to be held in the first pixel electrode is supplied, the third period consecutive to the second period, to turn off the second thin film transistor to the second scanning signal line, the A scanning side driving circuit for supplying a scanning signal of the first signal level for supplying a scanning signal of the second signal level and for turning on the first thin film transistor to the first scanning signal line;
With
In the signal side driver circuit, the polarity of the voltage applied to the liquid crystal is set to the second pixel electrode in a period before the period in which the gradation signal held in the second pixel electrode is supplied to the data signal line. A pre-charge signal set to be equal to the gradation signal to be held in the data signal line,
The scanning side driving circuit turns on the first thin film transistor in the first scanning signal line when the preliminary charging signal is supplied to the data signal line by the signal side driving circuit . A scan signal of one signal level is supplied , and supply of the scan signal of the second signal level to the second scan signal line in the second period is started at a timing before the end of the second period. In the second period, the supply of the scanning signal of the first signal level to the first scanning signal line is performed until the end of the second period . A first scanning signal line, a second scanning signal line, and a third scanning signal line that are extended in a predetermined direction;
A data signal line disposed so as to intersect the first scanning signal line, the second scanning signal line, and the third scanning signal line;
A first thin film transistor having a gate electrode connected to the first scanning signal line and one of a source electrode and a drain electrode connected to the data signal line;
A first pixel electrode connected to the other one of the source electrode and the drain electrode in the first thin film transistor and supplied with a grayscale signal supplied to the data signal line through the first thin film transistor; ,
A second thin film transistor in which a gate electrode is connected to the second scanning signal line and one of a source electrode and a drain electrode is connected to the first pixel electrode;
A second pixel electrode connected to the other one of the source electrode and the drain electrode in the second thin film transistor and applied with a grayscale signal supplied to the data signal line via the first pixel electrode When,
A third thin film transistor having a gate electrode connected to the second scanning signal line and one of a source electrode and a drain electrode connected to the data signal line;
A third pixel electrode connected to the other one of the source electrode and the drain electrode in the third thin film transistor and to which a grayscale signal supplied to the data signal line is applied via the third thin film transistor; ,
A fourth thin film transistor having a gate electrode connected to the third scanning signal line and one of a source electrode and a drain electrode connected to the third pixel electrode;
A fourth pixel electrode connected to the other one of the source electrode and the drain electrode in the fourth thin film transistor and to which a grayscale signal supplied to the data signal line is applied via the third pixel electrode When,
A driving method of a display device comprising:
A gradation signal to be held in the fourth pixel electrode, a gradation signal to be held in the second pixel electrode, a gradation signal to be held in the third pixel electrode, and a gradation to be held in the first pixel electrode A data signal side driving step of supplying each gradation signal to the data signal line in a time division manner in the order of signals;
Wherein the data signal side driving step, the the first period in which the gradation signal to be held in the fourth pixel electrode to the data signal lines is supplied, the second thin film transistor and the said second scanning signal line supplying a scan signal of the first signal level to the fourth TFT in the oN state to the third scan signal lines supplies a scan signal of the first signal level to the third thin film transistor in the oN state, In the second period following the first period after the supply of the gradation signal to be held in the fourth pixel electrode from the signal side driving circuit is completed by the data signal side driving step, the second scanning is performed. A scanning signal having a second signal level different from the first signal level is supplied to the signal line to turn off the second thin film transistor and the third thin film transistor. Both supplies a scan signal of the first signal level to the third scanning signal line, the data by the signal side driving step, the data signal tone signal to be held in the third pixel electrode wire is fed And supplying a scan signal of the first signal level for turning on the second thin film transistor and the third thin film transistor to the second scan signal line in a third period continuous to the second period. A scanning side driving step of supplying a scanning signal of the second signal level to turn off the fourth thin film transistor to the third scanning signal line;
I have a,
The scanning side driving step starts supplying the scanning signal of the second signal level to the third scanning signal line in the second period at a timing before the end of the second period, A method for driving a display device, comprising: supplying a scanning signal of the first signal level to the second scanning signal line in two periods until a timing at which the second period ends .

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