JP5208875B2 - Solid-state imaging device and imaging method - Google Patents

Description

  The present invention relates to a solid-state imaging device and an imaging method for correcting fixed pattern noise.

  In today's area image sensor field, the demand for higher pixel count and high-speed imaging has further expanded, and high-speed signal processing has been demanded. For this reason, it is a problem to increase the speed of a circuit for processing an analog signal output from a pixel. Therefore, usually, the signals from the pixels are read simultaneously for each column, and the subsequent horizontal transfer is not consolidated into one, and a plurality of amplifiers are provided in the output stage. Supports high-speed imaging.

  However, even if parallel processing circuits to which these parallel read processing techniques are applied are designed in the same way in layout design, their characteristics vary due to variations in the manufacturing process. This variation in characteristics appears as streaky fixed pattern noise in the output image.

  The fixed pattern noise can be corrected if the noise pattern can be stored. Therefore, a method is used in which a noise pattern is stored in a subsequent stage using a line memory or the like, and the correction is performed by digital signal processing.

  Since each pixel signal is read in parallel for each column as described above, the output signal varies due to variations in the characteristics of the column readout circuit. If the variation in the input / output characteristics for each column is separated for each factor, it can be roughly divided into three categories: offset, gain, and non-linearity. Of these variations, the first requirement is to suppress variations in offset characteristics that are most likely to occur first in an output image and that can be easily digitally corrected.

  In order to recognize the offset variation as a digital value, a period for supplying a constant input signal at the same level to all the parallel circuits is provided separately from the period for processing the effective pixels, and the output variation is stored. do it. If the stored variation amount is subtracted from the captured image signal of the effective pixel, the offset vertical streak fixed pattern noise can be corrected.

  However, since the output signal usually contains random noise peculiar to an analog circuit such as thermal noise and 1 / f noise, filtering processing for suppressing it is indispensable. Therefore, in Patent Document 1, random noise is suppressed using the addition averaging method, and in order to improve the accuracy of the correction value, an addition average over a plurality of frames is used as the correction value.

Japanese Patent Laying-Open No. 2005-167918

  However, the method of obtaining correction values over a plurality of frames is not suitable for still image shooting such as a digital still camera. For this reason, it is necessary to acquire vertical streak-like fixed pattern noise from a single image instead of a plurality of frames, but it is possible to acquire a large amount of correction data for vertical streak-like fixed pattern noise using light-shielded pixels. It becomes difficult.

  Therefore, a method of acquiring correction data of fixed pattern noise in the form of vertical stripes using pixels that are not shielded from light is conceivable. However, if correction data for vertical streak-shaped fixed pattern noise is obtained from the exposed pixel without changing the state of the charge accumulated in the photodiode after the subject image is exposed, the influence of the change in the state of the pixel, etc. May affect the exposure image. Specifically, there may be a step in the image at the boundary between the line from which the correction signal used for calculating the correction value is read and the line from which the correction signal is not read.

  The present invention has been made in view of the above-described problems, and an object thereof is to provide a solid-state imaging device and an imaging method capable of correcting fixed pattern noise with high accuracy.

  The present invention has been made to solve the above-described problem, and has a function of internally transferring charges accumulated in a photoelectric conversion element. When the internal transfer is permitted, the charge transfer is performed according to the charges. Pixel units that output accumulated signals and output correction signals when the internal transfer is prohibited are arranged in a plurality of rows and a plurality of columns classified into a first row group and a second row group An output unit that outputs the accumulation signal and the correction signal read from the pixel unit, and the internal row is allowed to belong to the first row group and the second row group when the internal transfer is permitted. The storage signal is read out in parallel in units of rows from the pixels and the storage signal is sequentially output from the output unit in units of pixels. When the internal transfer is prohibited, the first row group and the Before the pixel belonging to the second row group A control unit that reads out correction signals in parallel in units of rows and executes control for sequentially outputting only the correction signals read from the pixels belonging to the first row group in units of pixels from the output unit. It is a solid-state imaging device.

  In the solid-state imaging device according to the aspect of the invention, when the internal transfer is prohibited, the control unit reads out and reads the correction signal in parallel in units of rows from the pixels belonging to the first row group. The correction signal is sequentially output from the output unit in units of pixels, and then the accumulated signals are paralleled in units of rows from the pixels belonging to the first row group when the internal transfer is permitted. And the output of the stored signal sequentially read out in units of pixels from the output unit, and then the correction from the pixels belonging to the second row group when the internal transfer is prohibited Control is performed to read out signals in parallel in units of rows, and then the stored signals are read in parallel in units of rows from the pixels belonging to the second row group when the internal transfer is permitted. It said storage signals read out with to perform control to sequentially output in units of pixels from the output unit.

  In the solid-state imaging device of the present invention, the control unit reads out and reads out the correction signal in parallel in units of rows from the pixels belonging to the first row group when the internal transfer is prohibited. The correction signal is sequentially output from the output unit in units of pixels, and then the correction signals are read out in parallel in units of rows from the pixels belonging to the second row group when the internal transfer is prohibited. And then, when the internal transfer is permitted, the accumulated signal is read in parallel from the pixels belonging to the first row group in units of rows and the read accumulated signal is read from the output unit to the pixel. Then, the storage signal is read out in parallel in units of rows and read from the pixels belonging to the second row group when the internal transfer is permitted. It said accumulation signal performs control to sequentially output in units of pixels from the output unit.

  The solid-state imaging device according to the present invention includes an A / D converter that converts the accumulated signal and the correction signal output from the output unit into a digital signal, and fixed pattern noise based on the digital signal of the correction signal. It further has a detection unit for detecting, and a correction unit for correcting the digital signal of the accumulated signal based on the detected fixed pattern noise.

  In addition, the present invention has a function of internally transferring charges accumulated in the photoelectric conversion element, and when the internal transfer is permitted, outputs an accumulation signal corresponding to the charge and prohibits the internal transfer. When the pixel that outputs the correction signal is read out the accumulated signal and the correction signal from the pixel portion arranged in a plurality of rows and a plurality of columns classified into the first row group and the second row group, An imaging method for outputting the read accumulated signal and correction signal from an output unit, wherein the correction signal is output from the pixels belonging to the first row group when the internal transfer is prohibited. When the internal transfer is permitted after the first step, and the first step of performing the control of sequentially outputting the read correction signals in units of pixels from the output unit Said first row group A second step of performing control to read out the accumulated signal from the pixel to which the pixel belongs in parallel in units of rows and sequentially output the readout accumulated signal from the output unit in units of pixels; and after the second step, A third step of performing control to read out the correction signal in parallel from the pixels belonging to the second row group when the internal transfer is prohibited; and after the third step, When the transfer is permitted, the storage signal is read out in parallel in units of rows from the pixels belonging to the second row group, and the readout storage signal is sequentially output from the output unit in units of pixels. A fourth step of performing imaging.

  In addition, the present invention has a function of internally transferring charges accumulated in the photoelectric conversion element, and when the internal transfer is permitted, outputs an accumulation signal corresponding to the charge and prohibits the internal transfer. When the pixel that outputs the correction signal is read out the accumulated signal and the correction signal from the pixel portion arranged in a plurality of rows and a plurality of columns classified into the first row group and the second row group, An imaging method for outputting the read accumulation signal and correction signal from an output unit, wherein the correction signal is output from pixels belonging to the first row group in units of rows when the internal transfer is prohibited. A first step of performing a control for sequentially reading out the correction signals read out in parallel and in units of pixels from the output unit; and after the first step, when the internal transfer is prohibited Belonging to the second row group A second step of performing control to read out the correction signals in parallel in units of rows from the pixels to be read from the pixels belonging to the first row group when the internal transfer is permitted after the second step. A third step of performing control to read out the stored signal in parallel in units of rows and sequentially output the read out stored signal in units of pixels from the output unit; and after the third step, the internal transfer is performed A fourth control for reading out the accumulated signal in parallel in units of rows from the pixels belonging to the second row group and sequentially outputting the read out accumulated signals in units of pixels from the output unit when permitted. An imaging method comprising:

  According to the present invention, when internal transfer is prohibited, correction signals are read out in parallel from the pixels belonging to the first row group and the second row group, and from the pixels belonging to the first row group. Control for sequentially outputting only the read correction signals from the output unit in units of pixels is executed. As a result, there is no difference between the pixels belonging to the first row group and the pixels belonging to the second row group depending on whether or not the correction signal is read out, so that the fixed pattern noise can be corrected accurately. it can.

1 is a block diagram illustrating a configuration of a solid-state imaging device according to a first embodiment of the present invention. It is a block diagram which shows the structure of the fixed pattern noise detection part with which the solid-state imaging device by the 1st Embodiment of this invention is provided. It is a circuit diagram which shows the structure of the pixel with which the solid-state imaging device by the 1st Embodiment of this invention is provided. It is a block diagram which shows the structure of the pixel array with which the solid-state imaging device by the 1st Embodiment of this invention is provided, and its peripheral circuit. 3 is a timing chart illustrating an operation of the solid-state imaging device according to the first embodiment of the present invention. 3 is a timing chart illustrating an operation of the solid-state imaging device according to the first embodiment of the present invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
First, a first embodiment of the present invention will be described. FIG. 1 shows the configuration of the solid-state imaging device according to the present embodiment. The solid-state imaging device illustrated in FIG. 1 includes a pixel array 1, an A / D conversion unit 11, a fixed pattern noise detection unit 12, a fixed pattern noise correction unit 13, and a controller 14. In FIG. 1, the peripheral circuit (FIG. 4) of the pixel array 1 is omitted.

  The pixel array 1 has a photoelectric conversion element that outputs a signal corresponding to incident light, and has a structure in which pixels having an internal transfer function of the signal are arranged in a plurality of rows and a plurality of columns. Each pixel constituting the pixel array 1 receives light for a predetermined time, accumulates photocharges, performs photoelectric conversion, and outputs a signal (accumulation signal) corresponding to the photocharges. Each pixel constituting the pixel array 1 outputs a signal (correction signal and reset signal) when the pixel is reset. Each pixel constituting the pixel array 1 outputs a signal corresponding to the charge accumulated in the photoelectric conversion element when internal transfer is permitted, and generates fixed pattern noise when internal transfer is not permitted. A correction signal used to calculate a correction value for correction is output.

  The A / D conversion unit 11 performs A / D conversion on the signal output from the pixel array 1. The fixed pattern noise detection unit 12 detects vertical streaky fixed pattern noise based on the correction signal output from the A / D conversion unit 11, and holds FPN data indicating the fixed pattern noise. The fixed pattern noise correction unit 13 corrects fixed pattern noise included in the signal output from the A / D conversion unit 11. The controller 14 controls the entire solid-state imaging device.

  The general operation of the solid-state imaging device shown in FIG. 1 is as follows. Light from the subject is incident on the pixel array 1 by a lens system (not shown). The pixel array 1 is driven by a drive pulse controlled by the controller 14 and converts subject light into an electrical signal by photoelectric conversion. The electrical signals converted by the pixel array 1 are sequentially read out and converted into digital image signals by the A / D converter 11. On the other hand, the fixed pattern noise detection unit 12 detects fixed pattern noise and holds FPN data under the control of the controller 14. Details of the FPN data acquisition method will be described later. The fixed pattern noise correction unit 13 corrects vertical streaky fixed pattern noise by subtracting a correction value based on the FPN data from the exposure signal output from the A / D conversion unit 11.

  FIG. 2 shows the configuration of the fixed pattern noise detection unit 12. The fixed pattern noise detector 12 shown in FIG. 2 includes multipliers 15A, 15B, and 15C, an adder 16, and a line memory 17. The multiplier 15A multiplies the input signal (FPN data) by the coefficient α set by the controller 14 and outputs the result. The multiplier 15B multiplies the correction value stored in the line memory 17 by the coefficient 1-α set by the controller 14 and outputs the result.

  The adder 16 adds the output of the multiplier 15A and the output of the multiplier 15B, and calculates a new fixed pattern noise correction value. The line memory 17 stores the output of the adder 16 as a correction value in accordance with a memory control signal from the controller 14. The multiplier 15C multiplies the correction value stored in the line memory 17 by the coefficient β set by the controller 14 and outputs the result. Here, the coefficient β is used to match the level of the output of the line memory 17 and the level of the bit accuracy of the fixed pattern noise correction unit 13.

The multipliers 15A and 15B, the adder 16, and the line memory 17 constitute a so-called cyclic low-pass filter by the calculation shown in the following equation (A).
New correction value = Input signal x α + Old correction value x (1-α) (A)
Here, since 0 <α ≦ 1, and as the value of α increases, the ratio of the input signal increases. Therefore, the fixed pattern noise value of the current frame is greatly reflected in the newly generated correction value. As the value of α decreases, the ratio of correction values up to now increases, so that correction values in which random noise is suppressed are greatly reflected in newly generated correction values.

  In the initial operation, the controller 14 sets 1 to α, and the input signal is directly stored in the line memory 17. Thereafter, a value satisfying 0 <α ≦ 1 is set to α, and the cyclic low-pass filter is operated.

  FIG. 3 shows a configuration of the unit pixel 1-ij constituting the pixel array 1. The unit pixel 1-ij includes a photoelectric conversion unit 2, a transfer switch 3, a reset switch 4, a reading unit 5 (floating diffusion), an amplification MOS amplifier 6, and a selection switch 7.

  The photoelectric conversion unit 2 is connected to the transfer switch 3. The photoelectric conversion unit 2 receives light for a predetermined time, accumulates photoelectric charges, and performs photoelectric conversion. Each terminal of the transfer switch 3 is connected to the photoelectric conversion unit 2, the reading unit 5, and the transfer pulse signal line TXi. The transfer switch 3 transfers the electric signal output from the photoelectric conversion unit 2 to the reading unit 5 in the ON state.

  Each terminal of the reset switch 4 is connected to the power supply VDD, the reading unit 5, and the reset pulse signal line RSi. The reset switch 4 turns ON between terminals by an input reset pulse signal φRSi, and resets the electric charge accumulated in the reading unit 5.

  Each terminal of the amplification MOS amplifier 6 is connected to the power supply VDD, the selection switch 7, and the reading unit 5. Each terminal of the selection switch 7 is connected to the amplification MOS amplifier 6, the signal output line 9, and the row selection pulse signal line SELi. The selection switch 7 outputs the signal amplified by the amplification MOS amplifier 6 to the signal output line 9 in response to the row selection pulse φSELi.

  FIG. 4 shows the configuration of the pixel array 1 and its peripheral circuits. The pixel array 1 includes a plurality of unit pixels arranged in a two-dimensional matrix. In the example illustrated in FIG. 4, the pixel array 1 includes 36 unit pixels of 6 rows and 6 columns. The vertical scanning circuit 8 includes reset control signals (φRS1, φRS2,..., ΦRS6) and transfer control signals (φTX1, φTX2,...) That are control signals for operating the unit pixels of the pixel array 1 for each row. , ΦTX6) and selection switch control signals (φSEL1, φSEL2,..., ΦSEL6). The operation of the vertical scanning circuit 8 is controlled by the controller 14.

  The signal output line 9 is provided for each column and is connected to the load current source 20. The column amplifier unit 21 amplifies the signal output from the unit pixel to the vertical signal line 9. The horizontal selection switch 22 selectively outputs a signal from the unit pixel to the output unit 23. The output unit 23 outputs the signals sequentially output from the vertical signal lines 9 of each column by the horizontal selection switch 22 to the outside in units of pixels. The horizontal scanning circuit 24 outputs a control signal for operating the horizontal selection switch 22 for each column. The operation of the horizontal scanning circuit 24 is controlled by the controller 14.

  Next, the operation of the solid-state imaging device according to the present embodiment will be described with reference to FIG. In the present embodiment, a method for acquiring FPN data for three rows using pixels with six vertical rows is shown as an example. The subscript n in φRS (n), φTX (n), and φSEL (n) used in the following description represents a row position. In the following description, the first to third rows belong to the first row group in the present invention, and the fourth to sixth rows belong to the second row group in the present invention.

  As will be described below, when internal transfer is permitted by various control signals output from the vertical scanning circuit 8, the accumulated signals are read in parallel from the pixels in the first to sixth rows in units of rows, Control is performed to sequentially output an exposure signal based on the accumulation signal and the reset signal from the output unit 23 in units of pixels. When internal transfer is prohibited, the correction signals are read out in parallel from the pixels in the first to sixth rows, and only the correction signals read out from the pixels in the first to third rows are read. Control for sequentially outputting the output unit 23 in units of pixels is executed.

  As shown in FIG. 5, first, in the period (1) (first row dummy readout), the selection switch control signal φSEL (1) and the reset control signal φRS (1) are applied to the unit pixels in the first row, and the readout section The correction signal when 5 is reset is read and output to the output unit 23.

  Subsequently, in the period (2) (first row FPN data reading), the correction signal output from the output unit 23 is A / D converted by the A / D conversion unit 11 and fixed pattern noise is detected by the fixed pattern noise detection unit 12. Is detected.

  Thereafter, period (3) (second row dummy read), period (4) (second row FPN data read), period (5) (third row dummy read), and period (6) (third row FPN) In the data read), the same operation as the first row is performed for the second and third rows, and the detection of the fixed pattern noise by the fixed pattern noise detection unit 12 is completed. The above periods (1) to (6) are periods in which internal transfer is prohibited.

  As described above, in the first to third lines, the reading unit 5 is reset and a correction signal is output to the A / D conversion unit 11. On the other hand, in the fourth to sixth lines, the reading unit 5 is reset, but no correction signal is output to the A / D conversion unit 11. Details will be described below.

  Correction signal when the selection switch control signal φSEL (4) and the reset control signal φRS (4) are applied to the unit pixel in the fourth row and the readout unit 5 is reset in the period (7) (fourth row dummy readout). Is read out. Subsequently, in the period (8) (dummy read on the fifth line) and the period (9) (dummy read on the sixth line), the same operation as the fourth line is performed for the fifth and sixth lines. The correction signals read in the periods (7) to (9) are not output to the A / D conversion unit 11 because they are erased, for example, in the column amplifier unit 21. The above periods (7) to (9) are periods in which internal transfer is prohibited.

  Next, an operation for reading the accumulated signal from the exposed pixel will be described. In the period (10) (first-row exposure pixel reading), the reset is performed when the selection switch control signal φSEL (1) and the reset control signal φRS (1) are applied to the unit pixels in the first row and the reading unit 5 is reset. The signal is read and output to the output unit 23. Further, a selection switch control signal φSEL (1) and a transfer control signal φTX (1) are applied, and an accumulation signal based on the charge accumulated by the photoelectric conversion unit 2 receiving light for a predetermined time is read and output to the output unit 23 Is done.

  Subsequently, in the period (11) (first row signal data reading), the output unit 23 outputs an exposure signal that is a difference between the accumulation signal read in the period (10) and the reset signal. The exposure signal output from the output amplifier is A / D converted by the A / D converter 11 and the fixed pattern noise corrector 13 corrects the fixed pattern noise. Thereafter, in the periods (12), (13),..., (21), the reset signals and accumulated signals for the remaining five rows are read, and the exposure signal is corrected by the fixed pattern noise correction unit 13. . The above periods (10) to (21) are periods in which internal transfer is permitted.

  When FPN data for correcting fixed pattern noise is acquired by the operation as described above, a dummy read operation is performed in all rows, and a correction signal is read from the pixel array 1. For this reason, it is possible to accurately correct the fixed pattern noise without causing a problem of affecting the exposure image due to the influence of the state change of the pixel.

(Second Embodiment)
Next, a second embodiment of the present invention will be described. The configuration of the solid-state imaging device according to the present embodiment is the same as that of the first embodiment.

  Hereinafter, the operation of the solid-state imaging device according to the present embodiment will be described with reference to FIG. In the present embodiment, a method for acquiring FPN data for three rows using pixels with six vertical rows is shown as an example. The subscript n in φRS (n), φTX (n), and φSEL (n) used in the following description represents a row position. In the following description, the first to third rows belong to the first row group in the present invention, and the fourth to sixth rows belong to the second row group in the present invention.

  As shown in FIG. 6, first, in the period (1) (first row dummy readout), the selection switch control signal φSEL (1) and the reset control signal φRS (1) are applied to the unit pixels in the first row, and the readout section The correction signal when 5 is reset is read and output to the output unit 23.

  Subsequently, in the period (2) (first row FPN data reading), the correction signal output from the output unit 23 is A / D converted by the A / D conversion unit 11 and fixed pattern noise is detected by the fixed pattern noise detection unit 12. Is detected.

  Thereafter, period (3) (second row dummy read), period (4) (second row FPN data read), period (5) (third row dummy read), and period (6) (third row FPN) In the data read), the same operation as the first row is performed for the second and third rows, and the detection of the fixed pattern noise by the fixed pattern noise detection unit 12 is completed. The above periods (1) to (6) are periods in which internal transfer is prohibited.

  As described above, in the first to third lines, the reading unit 5 is reset and a correction signal is output to the A / D conversion unit 11. On the other hand, in the fourth to sixth lines, the reading unit 5 is reset, but no correction signal is output to the A / D conversion unit 11. In the fourth to sixth rows, a correction signal dummy readout operation is performed immediately before the operation of reading out the reset signal and the accumulation signal from the exposed pixels. Details will be described below.

  In period (7) (first row exposure pixel readout), a reset is performed when the selection switch control signal φSEL (1) and the reset control signal φRS (1) are applied to the unit pixel in the first row and the readout unit 5 is reset. The signal is read and output to the output unit 23. Further, a selection switch control signal φSEL (1) and a transfer control signal φTX (1) are applied, and an accumulation signal based on the charge accumulated by the photoelectric conversion unit 2 receiving light for a predetermined time is read and output to the output unit 23 Is done.

  Subsequently, in the period (8) (first row signal data reading), the output unit 23 outputs an exposure signal that is a difference between the accumulation signal read in the period (7) and the reset signal. The exposure signal output from the output amplifier is A / D converted by the A / D converter 11 and the fixed pattern noise corrector 13 corrects the fixed pattern noise. Thereafter, in the periods (9), (10), (11), and (12), the reset signals and accumulated signals in the second and third rows are read, and the exposure signal is corrected by the fixed pattern noise correction unit 13. Is done. The above periods (7) to (12) are periods in which internal transfer is permitted.

  Subsequently, when the selection switch control signal φSEL (4) and the reset control signal φRS (4) are applied to the unit pixels in the fourth row in the period (13) (fourth row dummy readout), and the readout unit 5 is reset. The correction signal is read out. The correction signal read out in the period (13) is not output to the A / D conversion unit 11 because it is erased in the column amplifier unit 21, for example. This period (13) is a period during which internal transfer is prohibited.

  Subsequently, in the period (14) (fourth row exposure pixel reading), the selection switch control signal φSEL (4) and the reset control signal φRS (4) are applied to the unit pixels in the fourth row, and the reading unit 5 is reset. Reset signal is read out and output to the output unit 23. Further, a selection switch control signal φSEL (4) and a transfer control signal φTX (4) are applied, and an accumulation signal based on the charge accumulated by the photoelectric conversion unit 2 receiving light for a predetermined time is read and output to the output unit 23 Is done.

  Subsequently, in the period (15) (fourth row signal data reading), the output unit 23 outputs an exposure signal which is a difference between the accumulation signal read in the period (14) and the reset signal. The exposure signal output from the output amplifier is A / D converted by the A / D converter 11 and the fixed pattern noise corrector 13 corrects the fixed pattern noise. The above periods (14) to (15) are periods in which internal transfer is permitted.

  Thereafter, in the periods (16) to (21), the same operation as the fourth row is performed, and the dummy read operation, the exposure pixel read operation, and the signal data read operation are performed for the fifth row and the sixth row. . The correction signals read in the periods (16) and (19) are not output to the A / D conversion unit 11 because they are erased in the column amplifier unit 21, for example. Periods (16) and (19) are periods in which internal transfer is prohibited. Periods (17), (18), (20), and (21) are periods during which internal transfer is permitted.

  When FPN data for correcting fixed pattern noise is acquired by the operation as described above, a dummy read operation is performed in all rows, and a correction signal is read from the pixel array 1. For this reason, it is possible to accurately correct the fixed pattern noise without causing a problem of affecting the exposure image due to the influence of the state change of the pixel.

  In addition, since the exposure signal for the first row can be output to the A / D converter 11 before the dummy read operation for all the rows is completed, subsequent image processing and the like can be started quickly. Specifically, in the first embodiment, the exposure signal of the first row is output to the A / D converter 11 in the period (11), but in the second embodiment, the exposure signal of the first row is output in the period ( Since the image data is output to the A / D converter 11 in step 8), the second embodiment can start image processing at the later stage earlier than the first embodiment.

  As described above, the embodiments of the present invention have been described in detail with reference to the drawings. However, the specific configuration is not limited to the above-described embodiments, and includes design changes and the like without departing from the gist of the present invention. . For example, it goes without saying that the same effect can be obtained even if the A / D converter 11 is configured to perform A / D conversion in correspondence with each column of the pixel array 1. Needless to say, the same effect can be obtained regardless of whether the fixed pattern noise detection unit 12, the fixed pattern noise correction unit 13, the controller 14, etc. are on the same substrate as the pixel array 1 or on a different substrate.

  DESCRIPTION OF SYMBOLS 1 ... Pixel array (pixel part), 2 ... Photoelectric conversion part, 3 ... Transfer switch, 4 ... Reset switch, 5 ... Reading part, 6 ... Amplification MOS amplifier, 7 ... Selection switch, 8... Vertical scanning circuit (control unit), 11... A / D conversion unit, 12... Fixed pattern noise detection unit, 13. Controller (control unit), 15A, 15B, 15C ... multiplier, 16 ... adder, 17 ... line memory, 20 ... load current source, 21 ... column amplifier unit, 22 ..Horizontal selection switch, 23 ... output unit, 24 ... horizontal scanning circuit

Claims (6)

It has a function of internally transferring charges accumulated in the photoelectric conversion element, and when the internal transfer is permitted, it outputs an accumulation signal corresponding to the charge, and corrects when the internal transfer is prohibited. Pixel units that output signals are arranged in a plurality of rows and a plurality of columns classified into a first row group and a second row group;
An output unit for outputting the accumulated signal and the correction signal read from the pixel unit;
When the internal transfer is permitted, the accumulated signal is read out in parallel in units of rows from the pixels belonging to the first row group and the second row group, and the accumulated signals are output in units of pixels from the output unit. When the control to sequentially output is executed and the internal transfer is prohibited, the correction signals are read out in parallel in units of rows from the pixels belonging to the first row group and the second row group, and the first A control unit that executes control to sequentially output only the correction signals read from the pixels belonging to the row group in units of pixels from the output unit;
A solid-state imaging device. The controller is
When the internal transfer is prohibited, the correction signals are read out in parallel in units of rows from the pixels belonging to the first row group, and the read out correction signals are sequentially output in units of pixels from the output unit. Control
Thereafter, when the internal transfer is permitted, the accumulated signals are read out in parallel in units of rows from the pixels belonging to the first row group, and the read out accumulated signals are sequentially output in units of pixels from the output unit. Control to output,
After that, when the internal transfer is prohibited, control to read out the correction signal in parallel from the pixels belonging to the second row group in units of rows,
Thereafter, when the internal transfer is permitted, the accumulated signal is read out in parallel in units of rows from the pixels belonging to the second row group, and the accumulated signals read out are sequentially read in units of pixels from the output unit. The solid-state imaging device according to claim 1, wherein control for outputting is performed. The controller is
Control for reading out the correction signals in parallel in units of rows from the pixels belonging to the first row group when the internal transfer is prohibited, and sequentially outputting the read out correction signals in units of pixels from the output unit. And
After that, when the internal transfer is prohibited, control to read out the correction signal in parallel in units of rows from the pixels belonging to the second row group,
Thereafter, when the internal transfer is permitted, the accumulated signal is read out in parallel in units of rows from the pixels belonging to the first row group, and the read out accumulated signals are sequentially output from the output unit in units of pixels. Control
Thereafter, when the internal transfer is permitted, the accumulated signal is read out in parallel in units of rows from the pixels belonging to the second row group, and the read out accumulated signals are sequentially output in units of pixels from the output unit. The solid-state imaging device according to claim 1, wherein control is performed. An A / D converter that converts the accumulated signal and the correction signal output from the output unit into a digital signal;
A detection unit for detecting fixed pattern noise based on the digital signal of the correction signal;
A correction unit that corrects the digital signal of the accumulated signal based on the detected fixed pattern noise;
The solid-state imaging device according to claim 1, further comprising: It has a function of internally transferring charges accumulated in the photoelectric conversion element, and when the internal transfer is permitted, it outputs an accumulation signal corresponding to the charge, and corrects when the internal transfer is prohibited. The accumulation signal and the correction signal are read out from the pixel units arranged in a plurality of rows and a plurality of columns in which pixels that output signals are classified into a first row group and a second row group, and the read accumulation An imaging method for outputting a signal and the correction signal from an output unit,
When the internal transfer is prohibited, the correction signals are read out in parallel in units of rows from the pixels belonging to the first row group, and the read out correction signals are sequentially output in units of pixels from the output unit. A first step of controlling;
After the first step, when the internal transfer is permitted, the accumulated signal is read out in parallel in units of rows from the pixels belonging to the first row group and the read accumulated signal is output as the output A second step of performing control to sequentially output in units of pixels from the unit;
After the second step, a third step of performing control to read out the correction signals in parallel in units of rows from the pixels belonging to the second row group when the internal transfer is prohibited;
After the third step, when the internal transfer is permitted, the accumulated signal is read out in parallel in units of rows from the pixels belonging to the second row group and the read accumulated signal is output as the output A fourth step of performing control to sequentially output in units of pixels from the unit;
An imaging method comprising: It has a function of internally transferring charges accumulated in the photoelectric conversion element, and when the internal transfer is permitted, it outputs an accumulation signal corresponding to the charge, and corrects when the internal transfer is prohibited. The accumulation signal and the correction signal are read out from the pixel units arranged in a plurality of rows and a plurality of columns in which pixels that output signals are classified into a first row group and a second row group, and the read accumulation An imaging method for outputting a signal and the correction signal from an output unit,
Control for reading out the correction signals in parallel in units of rows from the pixels belonging to the first row group when the internal transfer is prohibited, and sequentially outputting the read out correction signals in units of pixels from the output unit. A first step of performing
After the first step, a second step of performing control to read out the correction signal in parallel from the pixels belonging to the second row group when the internal transfer is prohibited;
After the second step, when the internal transfer is permitted, the accumulated signal is read out in parallel in units of rows from the pixels belonging to the first row group, and the read accumulated signal is output to the output unit. A third step of performing control to sequentially output in units of pixels from
After the third step, when the internal transfer is permitted, the storage signal is read out in parallel in units of rows from the pixels belonging to the second row group and the readout storage signal is output to the output unit. A fourth step of performing control to sequentially output in units of pixels,
An imaging method comprising:

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