JP5191820B2 - Information processing device - Google Patents

Description

  The present invention relates to an information processing apparatus having a plurality of power supply units and a plurality of independent arithmetic processing units, and more particularly to a technique effective when applied to the improvement of power supply efficiency and the resulting power saving.

  Conventionally, due to reduction of management cost, prevention of confidential information leakage, diversification of working style (working from home, office free address), etc. so far, office work with one portable information processing terminal From the data input work, an arithmetic processing device is installed in the data center itself, and is changing to a center processing type constituted by two input terminals including a screen display and an input device.

  These changes are creating an environment where people can work regardless of time and place.

  However, on the contrary, since the center side is always in an operating state, there is a problem that power consumption is larger than before.

  In response to this problem, the operation voltage of various ICs in the information processing terminal is lowered to reduce power consumption, or several different operation modes are set according to the load amount of the operation to reduce the load. In some cases, it has been considered to shift to a mode for suppressing power consumption.

  In addition, a series of operations are shared and averaged by a plurality of arithmetic processing units, so that only a specific arithmetic processing unit operates at high speed and suppresses a large amount of power consumption.

Further, as described in Japanese Patent Laid-Open No. 2005-202506 (Patent Document 1), when the power consumption of the entire blade server exceeds the supply power, the operation clock of each blade is controlled to reduce the power consumption of the entire blade server. There was something to lower.
JP 2005-202506 A

  However, although the thing of patent document 1 controls the power consumption of the whole blade server by reducing the power consumption of the whole blade server etc., the efficiency of the power supply by power consumption is not considered, In particular, when the overall power consumption is low, such as outside of working hours, there is a problem that the efficiency of the power source is deteriorated.

  Accordingly, an object of the present invention is to provide an information processing apparatus that is supplied with power from a plurality of power supply units and includes a plurality of independent processing units. It is an object of the present invention to provide an information processing apparatus that operates with good efficiency per power supply unit by increasing / decreasing the power supply unit.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  That is, the outline of a typical one is that the number of operations of the arithmetic processing unit is periodically monitored by a control unit that monitors the operation state of the plurality of arithmetic processing units and the plurality of power supply units, and the power supply unit Control to change the number of operations.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  That is, the effect obtained by a typical one is that the efficiency per power supply unit is improved by changing the number of operations of the power supply unit according to the number of operations of the arithmetic processing unit. Power consumption can be reduced.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

  With reference to FIG. 1, a configuration of an entire system using an information processing apparatus according to an embodiment of the present invention will be described. FIG. 1 is a configuration diagram showing the overall configuration of a system that uses an information processing apparatus according to an embodiment of the present invention.

  In FIG. 1, a plurality of information processing apparatuses 100 are mounted on a rack-type case 101 and connected to a server 102 that manages the entire system. The server 102 is connected to a terminal 104 assigned to each user via a network hub 103.

  Input operations performed by each user on the terminal 104 are transmitted to the information processing apparatus 100 via the network hub 103 and the server 102, and actual processing is performed in the information processing apparatus 100.

  Since the processing result is transmitted and displayed on the terminal 104, the user looks like an independent terminal, but all actual data is managed in the data center where the information processing apparatus 100 is installed. The

  If the business is executed on the terminal 104 that the user can carry, the business can be executed without being confined to a specific place. In addition, by providing the terminal 104 and the server 102 with encryption / decryption functions, it is possible to connect not only through a secure internal network but also via the Internet, so that users can perform the same work internally and externally. Can improve convenience.

  Next, the configuration of the information processing apparatus according to the embodiment of the present invention will be described with reference to FIGS. FIG. 2 is a configuration diagram showing the configuration of the information processing apparatus according to the embodiment of the present invention. FIG. 3 is a diagram for explaining various signals used by the power supply unit of the information processing apparatus according to the embodiment of the present invention. FIG. 4 is an explanatory diagram and FIG. 4 is a configuration diagram showing a configuration of an arithmetic processing unit of the information processing apparatus according to the embodiment of the present invention.

  2, the information processing apparatus 100 includes a plurality of power supply units 110, a connection board 111, a control unit 112, a signal transmission bus 113, and a plurality of arithmetic processing units 114.

  The information processing apparatus 100 is operating by supplying the power generated by the plurality of power supply units 110 to the control unit 112 and the arithmetic processing unit 114, and the control unit 112 monitors the operation state through the bus 113. ing.

  In FIG. 3, various signals used by the power supply unit 110 include a power supply abnormality notification signal 120 for raising an alarm to the control unit 112 when an abnormality occurs in the power supply, and notifies the control unit 112 of activation / stop of the power supply. They are a power status signal 121, a power control signal 122 for controlling start / stop of the power output from the control unit 112, and a voltage output 123 for supplying various voltages.

  These signals are connected to the control unit 112 and are used for controlling the number of power supply operations in the present embodiment.

  In FIG. 4, the arithmetic processing unit 114 includes an arithmetic processing IC (usually called a CPU) 130, a communication interface 131 for exchanging information with an external network, and the control unit 112 in the same manner as a normal independent information processing apparatus. Other signal unit 132 that exchanges, voltage input unit 133 that is supplied with voltage from power supply unit 110, main storage unit (usually called RAM) 134 that accumulates data for processing, and auxiliary storage unit that can hold a large amount of data 135 (usually called HDD), input / output unit (usually called I / O) 136 for inputting to terminal 104 and outputting the result, and initial control program (usually BIOS for executing self-diagnosis function and initial setting of arithmetic processing unit) 137). Due to such a configuration, the arithmetic processing unit 114 consumes power equivalent to that of one normal information processing apparatus.

  Next, the outline of the operation of the information processing apparatus according to the embodiment of the present invention will be described with reference to FIGS. FIG. 5 is a diagram showing an example of the relationship between the output power of the power supply unit and the efficiency of the information processing apparatus according to the embodiment of the present invention, and FIG. 6 shows the time-dependent processing of the information processing apparatus according to the embodiment of the present invention. It is a figure which shows an example of power consumption, and shows the power consumption at the time of operating 40 independent arithmetic processing parts 114 by four power supply parts 110 as an assumption, and shows information processing apparatus 100 Power consumption is assumed.

  FIG. 7 is a diagram illustrating an example of the number of operations of the time-dependent arithmetic processing unit of the information processing apparatus according to the embodiment of the present invention. Assuming that 40 independent arithmetic processing units 114 are four power supply units The number of operations of the arithmetic processing unit 114 in the information processing apparatus 100 when operated at 110 is represented by time. FIG. 8 is a diagram showing an example of the relationship between the number of operations of the arithmetic processing unit and the number of operations of the power supply of the information processing apparatus according to the embodiment of the present invention. In this example, all the four power supplies are operated.

  In FIG. 5, the power supply unit 110 outputs with a substantially constant efficiency when the output is 300 W or more, but the efficiency is extremely deteriorated when the output is less than 300 W. From this, it is understood that in order to use the power supply unit 110 efficiently, it is necessary to use the power supply unit 110 with an efficient power supply output.

  In FIG. 6, the transition of power consumption by time of the information processing apparatus 100 can be seen from this figure, and the difference between the maximum consumption and the minimum consumption can be seen. Since it is a break time at 12:00, it is assumed that a specific processing program (batch data transmission / reception with a server or a virus removal program) or the like operates, so that power consumption increases.

  In FIG. 7, the relationship between the number of operations of the arithmetic processing unit 114 and the power consumption can be seen by looking side by side with FIG. 6. From the comparison between FIG. 6 and FIG. 7, it can be considered that the power consumption is substantially proportional to the number of operations of the arithmetic processing unit 114, and the change in power consumption depends on the number of operations of the arithmetic processing unit 114.

  Therefore, in the present embodiment, the power consumption is estimated by grasping the number of operations of the arithmetic processing unit 114 by the control unit 112, and the optimum number of operations of the power source unit 110 is determined from the power efficiency shown in FIG. Optimum control is performed for each indexing time to reduce power consumption.

  In FIG. 8, when the power consumption is minimum, the number of operating power supplies is one, and all the four power supplies are operated otherwise.

  When the number of power supplies is not controlled when the power consumption is the lowest, as shown in FIG. 6, the power demand of about 200 W or more is shared by the four power supply units 110, and 25% as shown in FIG. The power supply operates with the efficiency of the above, and the power consumption of the entire apparatus is as follows.

50 / 0.25 × 4 (one power source) = 800 (W)
On the other hand, by controlling the number of power supplies as shown in FIG. 8 and taking charge of a power demand of about 200 W or more with one power supply, the power consumption of the entire apparatus is as follows.

200 / 0.7 × 1 (one power source) = 285 (W)
Thereby, in this Embodiment, when power consumption is the lowest, it is possible to aim at reduction of power consumption of about 500W.

  Next, the operation of the information processing apparatus according to the embodiment of the present invention will be described with reference to FIGS. FIG. 9 is a flowchart showing the operation of the information processing apparatus according to the embodiment of the present invention, and FIG. 10 is the state of the number of operation power supply units and the number of operation calculation processing units during operation of the information processing apparatus according to the embodiment of the present invention. FIG. 6 is an explanatory diagram for explaining the increase / decrease in the number of operations of the power supply unit 110 in a short time so that the determination criteria for the increase / decrease in the number of operations of the power supply unit 110 are different. It is shown that control is performed based on the number of operations.

  First, the control unit 112 checks the power supply state signal 121 of the power supply unit 110 through the bus 113, checks the operation state (On / Off) of each power supply unit 110, and determines the current number of operations of the power supply unit 110. Confirm (S100).

  Then, it is determined whether the number of power supply operations of the power supply unit 110 confirmed in S100 is four (S101).

  If it is determined in S101 that the number of power supply operations is four, the control unit 112 connects each of the installed arithmetic processing units 114 to the other signal unit 132 of the arithmetic processing unit 114 through the bus 113, and The operation state (On / Off) of the arithmetic processing unit 114 is confirmed, and the current number of operations of the arithmetic processing unit 114 is confirmed (S102).

  Then, it is determined whether or not the number of operations of the arithmetic processing unit 114 is equal to or less than a specified value N (calculated from the operation efficiency of the power supply unit 110) (S103).

  If it is determined in S103 that the number of operations of the arithmetic processing unit 114 is not less than the prescribed value N, the process returns to S100, and if it is determined in S103 that the number of operations of the arithmetic processing unit 114 is less than the prescribed value N, the power supply Since it can be determined that the power saving can be achieved by changing the number of operations of the unit 110 to one, the power control signal 122 of the power unit 110 is left through the bus 113 and the other three units are shifted to the Off state. (S104).

  Then, the current number of operations of the arithmetic processing unit 114 is confirmed (S105), whether or not the number of operations of the arithmetic processing unit 114 is smaller than a specified value M (calculated from the operating efficiency of the power supply unit 110), or a specified value It is determined whether or not it is larger than N (S106).

  If it is determined in S106 that the number of operations of the arithmetic processing unit 114 is not smaller than the predetermined value M or not larger than the predetermined value N, the process returns to S105, and the number of operations of the arithmetic processing unit 114 is smaller than the predetermined value M in S106. Alternatively, if it is determined that the value is larger than the specified value N, the process returns to S100.

  If it is determined in S101 that the number of power supply operations is not four, the control unit 112 connects each of the installed arithmetic processing units 114 to the other signal unit 132 of the arithmetic processing unit 114 through the bus 113. The operational state (On / Off) of the arithmetic processing unit 114 is confirmed, and the current number of operations of the arithmetic processing unit 114 is confirmed (S107).

  Then, it is determined whether or not the number of operations of the arithmetic processing unit 114 is equal to or greater than a specified value M (calculated from the operation efficiency of the power supply unit 110) (S108).

  If it is determined in S106 that the operation number of the arithmetic processing unit 114 is not equal to or greater than the specified value M, the process returns to S100, and if it is determined that the operation number of the arithmetic processing unit 114 is equal to or greater than the predetermined value M, the power supply unit 110 If the number of operations is not changed to four, power consumption may not be supplied, and it can be determined that changing the number of operations of the power supply unit 110 to four can save power. All four units are shifted to the ON state by the power control signal of the unit 110 (S109), and the process proceeds to S105.

  As a result of the above operation, when the number of operations of the arithmetic processing unit 114 becomes a specified value N or less, the number of operations of the power supply unit 110 becomes one, and at that time, the number of operations of the arithmetic processing unit 114 becomes the specified value. Even if the number is greater than or equal to M, the number of operations of the power supply unit 110 remains one, and after the number of operations of the arithmetic processing unit 114 becomes smaller than the predetermined value M, the number of operations of the arithmetic processing unit 114 becomes the predetermined value M. In such a case, the number of operations of the power supply unit 110 is four.

  In addition, when the number of operations of the arithmetic processing unit 114 is equal to or greater than the specified value M, the number of operations of the power supply unit 110 is four, and at that time, the number of operations of the arithmetic processing unit 114 is equal to or less than the predetermined value N. Even in such a case, the number of operations of the power supply unit 110 remains four, and after the number of operations of the arithmetic processing unit 114 becomes greater than the specified value N, the number of operations of the arithmetic processing unit 114 becomes equal to or less than the specified value N. In this case, the number of operations of the power supply unit 110 is one.

  In addition, after the number of operations of the power supply unit 110 becomes 1, before the number of operations of the arithmetic processing unit 114 becomes smaller than the specified value M, the number of operations of the arithmetic processing unit 114 becomes larger than the specified value N. The number of operations of the power supply unit 110 is four.

  In addition, after the number of operations of the power supply unit 110 becomes four, the number of operations of the arithmetic processing unit 114 becomes smaller than the predetermined value M before the number of operations of the arithmetic processing unit 114 becomes larger than the predetermined value N. The number of operations of the power supply unit 110 is one.

  Here, the prescribed values N and M will be described. The prescribed values N and M used in determining the number of operations of the arithmetic processing unit 114 are the efficiency of the power supply unit 110 as shown in FIG. 5, the transition of power consumption as shown in FIG. 6, and the calculation as shown in FIG. It is defined from the number of operations of the processing unit 114.

  The predetermined values M and N are determined as follows, for example.

  When the power consumption during the stable operation of the arithmetic processing unit 114 is defined as 30 W and 200 W is defined as a switching point, the specified value N for switching the number of operations of the power supply unit 110 from four to one is as follows: It is calculated as an expression.

N = 200W / 30W = Approx. 7 units (6.6 units)
The specified value M for returning the number of power supplies from 1 to 4 is set to a large amount of power consumption during stable operation in order to prevent frequent switching and unstable operation. When the number of operations of the arithmetic processing unit 114 increases, the increasing power consumption of the arithmetic processing unit 114 is defined as 60 W, and is obtained as the following equation.

M = 200W / 60W = about 4 units (3.3 units)
In the present embodiment, the number of power supply units 110 is switched between four and one, but the number of power supply units 110 to be switched is not limited to this combination, and the operation state of the arithmetic processing unit 114 is changed. Accordingly, it is possible to change the setting of the number of units.

  In this embodiment, the efficiency of the power supply unit 110 to be used is assumed to be the same efficiency characteristic, but the number of power supply units 110 to be operated is adjusted according to the efficiency of the power supply unit 110 to be used. Alternatively, the information processing apparatus 100 may be configured by combining power supply units 110 with different efficiencies (for example, power supplies that operate with high efficiency even when power consumption is low), and the efficiency of each power supply unit 110 is optimal. They may be combined or switched for use.

  In addition, the power consumption and the number of operations of the arithmetic processing unit 114 vary depending on the environment to be applied. For example, in the case of time difference work, work in two shifts, or work in three shifts, a specific as shown in this embodiment. Although it is not concentrated on time but distributed, it can be dealt with by optimizing power consumption reduction by finely setting the number of operating power supplies.

  In addition, by providing the control unit 112 with a function for finely monitoring and recording the operation state for each hour, the actual operation state and the past operation state are combined to predict the change in the number of operations in advance to make finer settings. It is also possible to reduce power consumption.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  The present invention relates to an information processing apparatus having a plurality of power supply units and a plurality of independent calculation units, and can be applied to an apparatus for improving the power supply efficiency.

It is a block diagram which shows the structure of the whole system which uses the information processing apparatus which concerns on one embodiment of this invention. It is a block diagram which shows the structure of the information processing apparatus which concerns on one embodiment of this invention. It is explanatory drawing for demonstrating the various signals which the power supply part of the information processing apparatus which concerns on one embodiment of this invention uses. It is a block diagram which shows the structure of the arithmetic processing part of the information processing apparatus which concerns on one embodiment of this invention. It is a figure which shows an example of the relationship between the output power and efficiency of the power supply part of the information processing apparatus which concerns on one embodiment of this invention. It is a figure which shows an example of the power consumption according to time of the information processing apparatus which concerns on one embodiment of this invention. It is a figure which shows an example of the operation number of the arithmetic processing part according to time of the information processing apparatus which concerns on one embodiment of this invention. It is a figure which shows an example of the relationship between the operation number of the arithmetic processing part of the information processing apparatus which concerns on one embodiment of this invention, and the operation number of a power supply. It is a flowchart which shows operation | movement of the information processing apparatus which concerns on one embodiment of this invention. It is explanatory drawing for demonstrating the state of the operation | movement power supply part number in operation | movement of the information processing apparatus which concerns on one embodiment of this invention, and the number of operation | movement arithmetic processing parts.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Information processing apparatus, 101 ... Rack type case, 102 ... Server, 103 ... Network hub, 104 ... Terminal, 110 ... Power supply part, 111 ... Connection board, 112 ... Control part, 113 ... Bus, 114 ... Arithmetic processing part, DESCRIPTION OF SYMBOLS 120 ... Power supply abnormality notification signal, 121 ... Power supply state signal, 122 ... Power supply control signal, 123 ... Voltage output, 130 ... Arithmetic processing IC, 131 ... Communication interface, 132 ... Other signal part, 133 ... Voltage input part, 134 ... Main Storage unit 135 ... auxiliary storage unit 136 ... input / output unit 137 ... initial control program.

Claims (1)

An information processing apparatus having a plurality of power supply units and a plurality of independent arithmetic processing units,
Based on information on the number of operations of the arithmetic processing unit, when the number of operations of the arithmetic processing unit is equal to or less than a preset first reference value, the plurality of power supply units are operated by the preset number of operations. A control unit for performing control ,
The control unit, based on the number of operations of the arithmetic processing unit, when the number of operations of the arithmetic processing unit is equal to or greater than a second reference value smaller than the first reference value set in advance, An information processing apparatus that performs control to operate all power supply units.

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