JP5181443B2 - Display device and display method - Google Patents

Description

  The present invention relates to a display device and a display method using an electrophoretic element.

  In recent years, various types of paper-type display devices have been developed. In such a display device, for example, a page of a document is displayed on the display unit, and the pages (frames) to be displayed are sequentially switched, so that pages can be displayed at an arbitrary speed of the user in the same manner as an actual book. Used for electronic books that can be turned. As such a paper-type display device, for example, a display device using an electrophoretic element has been proposed. FIG. 1 is a diagram illustrating a configuration example of a display device using a conventional electrophoretic element.

  1A is a first diagram illustrating the configuration of a conventional display device 100, FIG. 1B is a second diagram illustrating the configuration of the conventional display device 100, and FIG. FIG.

  As shown in FIG. 1A, the display device 100 includes a display portion 120 and a drive circuit 130 that drives the display portion.

  Hereinafter, the display unit 120 will be described with reference to FIGS.

  As shown in FIG. 1B, the display portion 120 includes an electrode substrate 101A and a circuit substrate 102A which are opposed substrates, and a transparent common electrode 101 is provided on the electrode substrate 101A. A thin film transistor (hereinafter referred to as TFT (Thin Film Transistor)) 105, a scanning line 106, and a signal line 107 are provided on the circuit board 102A, and further, pixel electrodes 102 arranged in a matrix are provided thereon. It has been.

  Between the common electrode 101 and the pixel electrode 102, a liquid in which white electrophoretic particles 103 and black electrophoretic particles 104 that are charged with a positive charge or a negative charge are dispersed is sealed. At this time, the white electrophoretic element 103 and the black electrophoretic element 104 are charged with different charges.

  A constant voltage is applied to the common electrode 101 provided on the electrode substrate 101A. Each of the pixel electrodes 102 provided on the circuit board 102A is electrically connected to the source electrode of the TFT 105 mounted on the circuit board 102A (see FIG. 1C).

  Of the TFTs 105 provided on the circuit board 102A, the gate electrodes 112 of the TFTs 105 arranged in the row direction are connected to the scanning line 106 (see FIG. 1C). Further, the TFTs 105 arranged in the column direction have their gate electrodes 112 connected to the signal line 107 on the circuit board 102A (not shown).

  The TFT 105 controls the amount of current flowing between the source electrode 113 and the drain electrode 114 by the voltage applied to the gate electrode 112. Here, when the source-drain current of the TFT 105 is large, the switching of the TFT 105 is turned on, and when the source-drain current is small, the switching of the TFT 105 is turned off.

  The drive circuit 130 includes a controller 108, a memory 109, a scanning line driver 110, and a signal line driver 111. The controller 108 is a control unit that controls display on the display device 100. The memory 109 stores a plurality of frames displayed on the display device 100 and display data for each pixel forming a pattern included in each frame.

  Hereinafter, the operation of the display device 100 will be described with reference to FIG.

  When a new frame is displayed on the display device 100, a scanning command signal 10B is sent from the controller 108 to the scanning line driver 110. In response to the scanning command signal 10B, a voltage is applied from the scanning line driver 110 to the gate electrode 112 of the TFT 105 through the scanning line 106, and switching of the TFT 105 is controlled. Here, the scanning command signal 10B from the controller 108 includes a control signal for determining the TFT 105 to be turned on and a control signal for determining the timing for outputting the voltage from the scanning line driver 110.

  Further, the controller 108 sends an addressing signal 10 A to the memory 109 and sends a display command signal 10 C to the signal line driver 111. In the memory 109, display data 10D for each pixel forming the pattern of the frame is extracted based on the addressing signal 10A. The extracted display data 10D is sent to the signal line driver 111.

  The signal line driver 111 applies a voltage to the gate electrode 112 of each TFT 105 through the signal line 107 based on the display command signal 10C and the display data 10D. Here, the display command signal 10 </ b> C from the controller 108 includes a control signal for determining the timing at which the voltage is output from the signal line driver 111.

  A voltage applied to the gate electrode 112 of the TFT 105 is applied to the pixel electrode 102 through the TFT 105 in the on state. Then, a positive voltage or a negative voltage is applied to the pixel electrode 102. Then, an electric field due to a potential difference is generated between the pixel electrode 102 and the common electrode 101, and the white electrophoretic element 103 or the black electrophoretic element 104 moves to the common electrode 101 side. Thereby, a pattern is displayed on the common electrode 101 side.

  Thus, in the display device 100, the TFTs 105 connected to the scanning lines 106 are sequentially turned on based on the scanning command signal 10B, and when a desired pattern is displayed on the pixel electrodes 102 connected to all the TFTs 105, The frame display is complete. In the following description, “scanning” refers to sequentially turning the TFTs 105 on.

  Hereinafter, a frame switching operation in the display device 100 will be described with reference to FIGS. 2 and 3. FIG. 2 is a diagram illustrating an example of a display unit in the display device 100, and FIG. 3 is a timing chart for explaining a frame switching operation in the display device 100.

  The display unit A01 illustrated in FIG. 2 includes scanning lines X1 to X6 and signal lines Y1 to Y8. Further, the scanning lines X1 to Xm in the timing chart shown in FIG. 3 correspond to the scanning lines X1 to X6 of the display portion A01, and the signal lines Y1 to Yn correspond to the signal lines Y1 to Y8 of the display portion A01. The display state in the initial state of the display unit A01 is the display state A shown in FIG. 3, and the display state in the display unit A01 is switched from the display state A to the display state B and from the display state B to the display state C. And

  The display device 100 sequentially scans from the scanning line X1 to the scanning line X6 in the display unit A01. That is, switching control is performed so that the TFT 105 connected to the scanning line X1 to the TFT 105 connected to the scanning line X6 are sequentially turned on. In FIG. 3, when the signal applied to the scanning line Xn is at a high level (hereinafter, H level), the TFT 105 is turned off, and the signal applied to the scanning line Xn is at a low level (hereinafter, L level). At that time, the TFT 105 was turned on. This logic changes depending on the characteristics of the TFT.

  In the display unit A01, when a scanning time B02, which is a time related to one scanning, elapses, each pixel electrode 102 is in a state where a voltage for displaying a pattern indicating the display state B is applied.

  Then, in the display device 100, the white electrophoretic element 103 and the black electrophoretic element 104 are moved by the electric field generated between the pixel electrode 102 and the common electrode 101, and each pixel electrode 102 is changed from a certain color pattern to another color pattern. Switch to. When the pixel pattern switching time B01 required for each pixel electrode 102 to switch to a different color pattern has elapsed, the display state of the display unit A01 switches from the display state A to the display state B.

  That is, in the display device 100, in switching the frame displayed on the display unit A01, the display switching time required for switching the display of one frame is the sum of the scanning time and the pixel pattern switching time.

  The scanning time in the display device 100 is a period in which each scanning line 106 is scanned and a voltage is applied to each pixel electrode 102. Here, since the time for applying a voltage to each pixel electrode 102 is extremely short, the scanning time is sufficiently shorter than the pixel pattern switching time. Therefore, the time required to display one frame depends on the length of the pixel pattern switching time.

  However, the pixel pattern switching time is several tens to several hundreds of milliseconds, which is longer than other types of displays such as a liquid crystal display. This pixel pattern switching time depends on the characteristics of the electrophoretic element and is constant regardless of the display method. Therefore, it is difficult to shorten the display switching time for switching the display by shortening the pixel pattern switching time when switching the frame to be displayed.

  Further, the display device may display a frame desired by the user by sequentially switching and displaying a plurality of frames. For example, in an electronic document having a plurality of pages (frames), the user turns the pages one page at a time, and searches for a desired page while checking the contents of the turned pages. In such a case, since it takes time to switch frames in the conventional display device, the waiting time until the user-desired frame is displayed is painful for the user.

  The present invention has been made in view of the above-mentioned problems, and has been made to solve this problem. When a plurality of frames are sequentially switched and displayed, the display switching time for switching the display of frames can be shortened. An object of the present invention is to provide a display device and a display method that can be used.

  The display device of the present invention employs the following configuration in order to solve the above problems.

  The display device of the present invention is a display device in which a pixel electrode is divided into a plurality of pixel groups, and a frame is displayed for each of the pixel groups, and includes a control unit that controls display of the frames in the pixel group. The control means may be configured to start display of another frame in the second pixel group before display of the frame is completed in the first pixel group among the plurality of pixel groups.

  According to such a configuration, when a plurality of frames are sequentially switched and displayed, it is possible to reduce the display switching time for switching the display of the frames.

  The display device of the present invention includes two substrates provided opposite to each other with an electrophoretic element interposed therebetween, pixel electrodes arranged in a matrix on one of the substrates, and divided into a plurality of pixel groups, and the other A display device including a common electrode disposed on a substrate, the control unit configured to control display of a frame in the pixel group, wherein the control unit includes a frame in a first pixel group out of the plurality of pixel groups. The display of another frame can be started in the second pixel group before the display of is completed.

  According to such a configuration, even in a display device using an electrophoretic element, when a plurality of frames are sequentially switched and displayed, it is possible to shorten the display switching time for switching the display of the frames.

  In addition, the display device of the present invention may include a setting unit, and the control unit may output display data corresponding to a predetermined frame to the pixel electrode based on the setting of the setting unit.

  According to such a configuration, the pixel electrode can be divided into an arbitrary number of groups according to the setting of the setting means, so the switching time of the pixel pattern displayed in the frame is set in accordance with the use conditions of the display device can do.

  In the display device of the present invention, a ratio of the number of frames displayed in each pixel group to the maximum number of frames displayed on the display device is determined based on the setting of the setting unit. It can be.

  According to such a configuration, since the ratio can be set, the display switching time for switching the display of the frame and the visibility of the frame to be displayed can be set according to the use conditions of the display device. it can.

  The display method of the present invention is a display method in which display pixels are divided into a plurality of pixel groups, and a frame is displayed for each of the pixel groups, and a frame in a first pixel group out of the plurality of pixel groups. It is possible to adopt a method of starting display of another frame in the second pixel group before the display of is completed.

  According to such a method, when a plurality of frames are sequentially switched and displayed, it is possible to shorten the display switching time for switching the display of the frames.

  The display method of the present invention includes two substrates provided opposite to each other with an electrophoretic element interposed therebetween, pixel electrodes arranged in a matrix on one of the substrates and divided into a plurality of pixel groups, and the other substrate. In a display method in a display device having a common electrode arranged on a substrate, a frame is displayed for each of the pixel groups, and before the display of the frame is completed in the first pixel group among the plurality of pixel groups. In the second pixel group, the display of another frame can be started.

  According to such a method, even in a display method using an electrophoretic element, when a plurality of frames are sequentially switched and displayed, the display switching time for switching the display of the frames can be shortened.

  According to the display device and the display method of the present invention, when a plurality of frames are sequentially switched and displayed, it is possible to shorten the display switching time for switching the display of the frames.

  In the present invention, the pixel electrode included in the display device is divided into a plurality of pixel groups, and before the frame display is completed in the first pixel group among the plurality of pixel groups, the second pixel group has another frame. By starting the display, the display switching time for switching the display of frames is shortened when a plurality of frames are sequentially switched and displayed.

  Embodiment 1 of the present invention will be described below with reference to FIG. FIG. 4 is a block diagram illustrating a configuration of the display device 400 according to the first embodiment.

  The display device 400 includes a display unit 410 that uses an electrophoretic element and a drive unit 420 that drives the display unit 410. The display device 400 according to the present embodiment is used to display an electronic book having a plurality of pages, for example. In the display device 400, the pages displayed on the display unit 410 can be sequentially switched to display a plurality of pages. In the description of this embodiment, for example, a still image displayed on the display unit 410 like a page in such an electronic book is referred to as a frame.

  In the display unit 410, parts having the same configuration as the display unit 120 in FIG. The display on the display unit 410 will be described later.

  The driving unit 420 includes a controller 421, a memory 422, a scanning line driver 423, a signal line driver 424, and a setting unit 425.

  The controller 421 controls display on the display unit 410. The memory 422 includes a plurality of frames displayed on the display unit 410, display data for each pixel electrode forming a pattern included in each frame, and a frame currently displayed on the display unit 410 among the plurality of frames. The identification information for recognizing which frame is stored.

  The scan line driver 423 scans the scan line 106 based on the scan command signal output from the controller 421. The signal line driver 424 outputs display data to the pixel electrode 102 connected to the on-state TFT 105 based on a display command signal from the controller 421. In the setting unit 425, various settings in the display device 400 are performed.

  Hereinafter, the operation of the display device 400 of this embodiment will be described.

  When a display instruction is given by the user in the display device 400, the controller 421 outputs a scanning command signal 421A to the scanning line driver 423. The scanning line driver 423 receives this scanning command signal 421A, sequentially applies voltages to the scanning lines 106, and applies voltages to the TFTs 105 on each scanning line.

  In response to the display instruction, the controller 421 outputs a display command signal 421B to the signal line driver 423, and outputs an addressing signal 421C to the memory 422. When the memory 422 receives the addressing signal 421C, the memory 422 extracts display data 422D for each pixel forming a pattern of each frame based on the addressing signal 421C, and uses the extracted display data 422D for each pixel electrode as a signal line driver. To 423.

  The signal line driver 424 receives the display command signal 421B from the controller 421, applies a voltage to the signal line 107, and applies the display data received from the memory 422 to the pixel electrode 102 connected to the TFT 105 in the on state. Display.

  Here, the display on the display unit 410 will be described with reference to FIG. FIG. 5 is a diagram illustrating the display unit 410 of the display device 400 according to the first embodiment.

  In the display unit 410, the pixel electrode 102 is divided into two pixel groups A and B in units of scanning lines. In this embodiment, when the scanning lines 106 in the display unit 410 are X1 to Xn (n is an integer), the pixel electrodes 102 on the scanning lines where n is an odd number are pixel electrodes belonging to the pixel group A. Then, the pixel electrode 102 on the scanning line where n is an even number is a pixel electrode belonging to the pixel group B.

  In this manner, the pixel electrode 102 is divided into pixel electrodes belonging to the pixel group A and pixel electrodes belonging to the pixel group B, and display data for forming different frame patterns is displayed on the pixel electrodes belonging to the pixel groups. By doing so, the display unit 410 can display two different frames at the same time.

  Display control in each pixel group is performed by the controller 421 based on the setting of the setting unit 425.

  In the setting unit 425, for example, it may be possible to set in which pixel group each of the plurality of frames stored in the memory 422 is displayed. Based on this setting, the controller 421 controls the output of display data to be displayed on the pixel electrodes 102 of each pixel group.

  For example, it is assumed that the setting unit 425 is set to display even-numbered frames in the plurality of frames in the pixel group A and display odd-numbered frames in the plurality of frames in the pixel group B. In this case, the controller 421 outputs display data for forming even-numbered frames to the pixel electrodes 102 belonging to the pixel group A connected to the TFT 105 that is turned on by scanning, and displays the display data. Then, the controller 421 outputs and displays display data for forming odd-numbered frames on the pixel electrodes 102 belonging to the pixel group B connected to the TFT 105 that is turned on.

  In this embodiment, the pixel electrodes 102 are divided into groups in units of scanning lines 106. However, the division method is not limited to this. For example, the pixel electrodes 102 may be divided into groups in units of signal lines 107. The pixel electrodes belonging to each group may be scattered without using the unit 106 or the signal line 107 as a unit. The method of dividing the pixel electrode 102 may also be set by the setting unit 425.

  In the display device 400, by controlling the timing of outputting display data to be displayed on the pixel electrodes 102 belonging to each pixel group, the timing for starting the display of the two frames displayed in each pixel group can be independently set. Can be controlled.

  Therefore, in the display device 400 of this embodiment, before the display of the frame is completed in the pixel group A that is the first pixel group, the display of another frame is started in the pixel group B that is the second pixel group. . According to such a configuration, when a plurality of frames are sequentially switched and displayed on the display unit 410, the display switching time from the display of the first frame to the completion of the display of the last frame can be shortened. . In the following description, the process of sequentially switching and displaying from the first frame to the last frame on the display unit 410 is referred to as a sequential display switching process.

  The sequential display switching process of a plurality of frames in the display unit 410 will be described below with reference to FIGS.

  FIG. 6 is a diagram illustrating an example of a plurality of frames displayed on the display unit 410. FIG. 7 is a timing chart for explaining frame patterns displayed in two pixel groups, respectively. FIG. 8 is a diagram illustrating scanning lines, input signals to the signal lines, and display states of the display unit corresponding to the timing chart of FIG.

  Here, Fx shown in FIG. 7 indicates the xth frame displayed in the xth among a plurality of frames (see FIG. 6) sequentially displayed on the display unit 410.

  F0 is an initial frame (first frame) displayed in the initial state before starting the sequential display switching process on the display unit 410, and F7 is a target to be displayed when the frame display switching is finished. Target frame (last frame). Here, a frame that completes display switching in the frame, such as F7, is referred to as a target frame.

  When the display device 400 receives a display switching instruction at the time point P0 shown in FIG. 7, the display device 400 starts display switching processing from the frame F0 displayed on the display unit 410 to the next frame F1.

  In this embodiment, in addition to the initial frame F0 and the target frame F7, a frame in which x is an even number is displayed in the pixel group A, and in addition to the initial frame F0 and the target frame F7, A frame in which x is an odd number is displayed. In the display unit 410, a time difference is provided in the timing of applying a voltage to the pixel electrodes belonging to each pixel group based on the scanning timing. If the timing at which the voltage is applied to the pixel electrode is shifted, the timing at which the white electrophoretic element and the black electrophoretic element included in each pixel electrode start to move is shifted for each pixel electrode. Therefore, in each pixel electrode, the movement of the white electrophoretic element and the black electrophoretic element is completed, and the timing for completing the display of the display data is also shifted. In the display device 400 according to the present embodiment, by using this timing difference, the timing at which the frame pattern is displayed on the pixel group A and the timing at which the frame pattern is displayed on the pixel group B are alternated, thereby changing the F0. The display switching time from when the message is displayed until the display of F7 is completed is shortened.

  When the display device 400 accepts the display switching instruction at the time point P0 shown in FIG. 7, the display device 400 starts the display switching operation by scanning at the scanning time 402 shown in FIG.

  The display state at the time point P0 will be described below.

  The display state of the display unit 410 at the time point P0 is a state in which the initial frame F0 is displayed. The display state at this time is shown as S0 in FIG. The display unit 410 starts an operation of switching the initial frame F0 to F1. Here, since the frame F1 next to F0 is displayed in the pixel group B, only the frame displayed in the pixel group B is switched at the time point P0.

  In the pixel group B, when display switching is started, display data for forming a pattern of F1 is input to each pixel electrode belonging to the pixel group B in the scanning in the scanning period 302 as shown in FIG. Then, the display of the F1 pattern in the pixel frame B is started. In the scanning in the scanning period 302, switching of the frame displayed in the pixel group A has not yet started. Therefore, in the scanning in the scanning period 302, display data for forming the pattern of the initial frame F0 is continuously input to the pixel group A.

  Next, the display state of the display unit 410 at the time point P1 will be described.

  The display state of the display unit 410 at time P1 is shown in FIG. 8 as S1. In the pixel group A at the time point P1, display switching is started to display the pattern of F2, which is the frame displayed next to the pattern of frame F0. In addition, display switching from the F0 pattern to the F1 pattern is also being performed in the pixel group B at the time point P1. Therefore, the display unit 410 continues to display the F0 pattern in a visible state.

  Next, the display state at the time point P2 will be described.

  The display state of the display unit 410 at time P2 is S2, and is shown in FIG. In the pixel group A at the time point P2, the display is being switched from the F0 pattern to the F2 pattern, and no frame is displayed so as to be visible. In the pixel group B at the time point P2, the display switching from the F0 pattern to the F1 pattern is completed, and the F1 pattern is displayed so as to be visible.

  Therefore, the display unit 410 is in a state where F1 is displayed in a visible state. That is, at time P2, display switching from the pattern of the initial frame F0 to the pattern of the next frame F1 on the display unit 410 is completed. Here, Ta is a display switching time for display switching from the F0 pattern to the F1 pattern. At this time, the display unit 410 is expected to display some afterimage generated by the display switching in the pixel group A on the background of F1 displayed in the pixel group B. This afterimage improves the visibility of F1. It is a thing which does not inhibit.

  Next, the display state of the display unit 410 at the time point P3 will be described.

  The display state of the display unit 410 at time P3 is S3 and is shown in FIG. In the pixel group A at the time point P3, the display switching from the F0 pattern to the F2 pattern started from the time point P1 is completed, and the F2 pattern is displayed in a visible manner. In the pixel group B at the time point P3, since the display switching from the F1 pattern started at the time point P2 to the F3 pattern is being performed, no frame is displayed so as to be visible.

  Therefore, the display unit 410 is in a state where F2 is displayed in a visible state. That is, at time P3, the display switching from the pattern of the initial frame F1 to the pattern of the next frame F2 on the display unit 410 is completed. Here, the display switching time for switching the display from the F1 pattern to the F2 pattern is Tb.

  Next, the display state of the display unit 410 at the time point P4 will be described.

  The pixel group A at the time point P4 is being switched to the F4 pattern from the F2 pattern started from the time point P3, and no frame is displayed so as to be visible. In the pixel group B at the time point P4, the display switching from the F1 pattern to the F3 pattern started from the time point P2 is completed, and the F3 pattern is displayed so as to be visible.

  Therefore, the display unit 410 is in a state where F3 is displayed in a visible state. That is, at time P4, the display switching from the frame F2 to the next frame F3 on the display unit 410 is completed.

  Here, when the display switching time Ta and the display switching time Tb are compared, the display switching time Tb is approximately half the length of the display switching time Ta. The display switching time Ta corresponds to the pixel pattern switching time and is the display switching time in the conventional display device 100.

  In the display device 400 of the present embodiment, the display switching time for each subsequent frame is shortened to approximately half the length of the conventional display device 100 except for the display switching from the initial frame to the next frame. Therefore, the entire display switching time until the target frame is displayed by sequentially switching a plurality of pages in the display device 400 can be greatly shortened.

  Next, in the display device 400, processing from the initial frame until reaching the target frame will be described. FIG. 9 is a flowchart for explaining the sequential display switching process in the display device 400.

  In the display device 400, the controller 421 receives a frame display switching instruction (S901). Then, the controller 421 sets the initial frame before the display switching process is executed as the Nth frame (S902). Here, the controller 421 reads out from the memory 422 identification information indicating the frame number of a plurality of frames displayed before the sequential display switching process is executed.

  Next, the controller 421 applies a signal to the scanning line 106 and the signal line 107 in order to display the pattern of the Nth frame in the pixel group A and display the pattern of the (N + 1) th frame in the pixel group B (S903). ). That is, when the pixel electrode 102 located on the scanning line where the TFT 105 is on is a pixel electrode belonging to the pixel group A, the display data signal of the Nth frame is applied to the signal line 107. If the pixel electrode 102 located on the scanning line where the TFT 105 is on is a pixel electrode belonging to the pixel group B, the display data signal of the (N + 1) th frame is applied to the signal line 107.

  Next, the controller 421 determines whether or not the (N + 1) th frame is a target frame (S904). It should be noted that the setting unit 425 may previously set which frame is the target frame among the plurality of frames. Further, the frame displayed when an instruction to interrupt the display switching process is received during the sequential display switching process may be used as the target frame.

  In S904, when the (N + 1) th frame is the target frame, the controller 421 sends a signal to the scanning line 106 and the signal line 107 in order to display the pattern of the (N + 1) th frame in both the pixel groups A and B. Is applied (S905), and the display switching process is terminated (S910). The controller 421 may store in the memory 422 information indicating which of the plurality of frames is the target frame when the display unit 410 reaches the target frame and ends the display switching process.

  In S904, when the (N + 1) th frame is not the target frame, the controller 421 displays the (N + 2) th frame pattern in the pixel group A and the (N + 1) th frame pattern in the pixel group B. Accordingly, a signal is applied to the scanning line 106 and the signal line 107 (S906).

  Next, the controller 421 determines whether or not the (N + 2) th frame is a target frame (S907). In S907, when the (N + 2) th frame is the target frame, the controller 421 sends a signal to the scanning line 106 and the signal line 107 in order to display the pattern of the (N + 2) frame on both the pixel groups A and B. Is applied (S908), and the display switching process is terminated (S910).

  In S904, when the (N + 2) th frame is not the target frame, the controller 421 displays the (N + 2) th frame pattern in the pixel group A and the (N + 3) th frame pattern in the pixel group B. Accordingly, a signal is applied to the scanning line 106 and the signal line 107 (S909).

  Thereafter, the display device 400 repeats the processing from S903 to S909 until the target frame appears on the display unit 410.

  Embodiment 2 of the present invention will be described below with reference to the drawings. The display device according to the second embodiment of the present invention has the same configuration as the display device 400 according to the first embodiment, and differs from the first embodiment only in that the pixel electrodes are divided into three groups. Therefore, the display in the case where the pixel electrode in the display device 400 is divided into three groups will be described below, and the same reference numerals as those in the first embodiment are given to the respective parts constituting the display device 400, and the description thereof is omitted. Note that the number of pixel groups in the present embodiment may be set in advance. The setting of the number of pixel groups in this embodiment will be described later.

  FIG. 10 is a diagram illustrating the display unit 410A according to the second embodiment.

  In the display portion 410A, the pixel electrode 102 is divided into three pixel groups A, B, and C in units of scanning lines. In this embodiment, when the scanning lines 106 in the display unit 410A are X1 to Xn (n is an integer), n is n = 1 + 3 (k−1) (k = 1, 2, 3,...). The pixel electrode 102 on the scanning line is a pixel electrode belonging to the pixel group A. Then, the pixel electrode 102 on the scanning line where n is n = 2 + 3 (k−1) is a pixel electrode belonging to the pixel group B. Further, the pixel electrode 102 on the scanning line where n is n = 3 + 3 (k−1) is set as a pixel electrode belonging to the pixel group C.

  In this way, the pixel electrode 102 is divided into a pixel electrode belonging to the pixel group A, a pixel electrode belonging to the pixel group B, and a pixel electrode belonging to the pixel group C, and each pixel electrode belonging to each pixel group is different. If the display data forming the frame pattern is controlled to be displayed, three different frames can be displayed simultaneously on the display unit 410A.

  Next, display on the display unit 410A according to the second embodiment will be described with reference to FIGS. FIG. 11 is a timing chart illustrating frame patterns that are sequentially displayed in the three pixel groups according to the second embodiment. FIG. 12 is a diagram illustrating scanning lines, input signals to the signal lines, and display states of the display unit corresponding to the timing chart of FIG.

  The display state at the time point Q0 will be described below.

  The display state of the display unit 410A at the time point Q0 is a state in which the initial frame F0 is displayed. The display unit 410A starts an operation of switching the initial frame F0 to F1. Here, since the frame F1 subsequent to F0 is displayed in the pixel group B, only the pattern of the frame displayed in the pixel group B is switched at the time point Q0.

  In the pixel group B, when display switching is started, display data for forming an F1 pattern is input to each pixel electrode belonging to the pixel group B in the scanning in the scanning period 602 as shown in FIG. Then, the display of F1 is started in the pixel frame B. In the scanning in the scanning period 602, switching of frames displayed in the pixel group A and the pixel group C has not yet started. Therefore, in the scanning in the scanning period 602, display data for forming the pattern of the initial frame F0 is continuously input to the pixel group A and the pixel group C.

  Next, the display state of the display unit 410A at the time point Q1 will be described.

  In the pixel group A at the time point Q1, the display is being switched to display the pattern of F3, which is the frame displayed next to the pattern of the frame F0. Therefore, no frame is displayed in the pixel group A so as to be visible. Also in the pixel group C at the time point Q1, the display is being switched to indicate the pattern of F2, which is the frame displayed next to the pattern of the initial frame F0. Therefore, no frame is displayed in the pixel group C so as to be visible.

  On the other hand, in the pixel group B at the time point Q1, the display switching from the F0 pattern to the next F1 pattern displayed in the pixel group B is completed, and the F1 pattern is displayed in a visible manner.

  Therefore, the display unit 410A is in a state where F1 is displayed in a visible state. That is, at the time point Q1, display switching from the pattern of the initial frame F0 to the pattern of the next frame F1 on the display unit 410A is completed. Here, the display switching time for switching the display from the F0 pattern to the F1 pattern is T2a. At this time, in the display unit 410A, it is predicted that some afterimage generated by the display switching in the pixel group A and the pixel group C is displayed on the background of F1 displayed in the pixel group B. It is a thing of the grade which does not inhibit visibility.

  Next, the display state at the time point Q2 will be described.

  In the pixel group A at the time point Q2, the display is switched to display the pattern of F3 which is the frame displayed next to the pattern of the frame F0. Therefore, no frame is displayed in the pixel group A so as to be visible. Further, in the pixel group B at the time point Q2, the display is being switched to display the F4 pattern which is the frame shown next to the F1 pattern. Therefore, no frame is displayed in the pixel group B so as to be visible.

  On the other hand, in the pixel group C at the time point Q2, the display switching from the F0 pattern to the next F2 pattern displayed in the pixel group C is completed, and the F2 pattern is displayed in a visible manner.

  Therefore, the display unit 410A is in a state where F2 is displayed in a visible state. That is, at time Q2, display switching from the F1 pattern to the next frame F2 pattern on the display unit 410A is completed. Here, the display switching time for the display switching from the F1 pattern to the F2 pattern is T2b.

  Next, the display state at the time point Q3 will be described.

  In the pixel group B at the time point Q3, the display is switched to display the pattern of F4 that is the frame displayed in the pixel group B after the pattern of the frame F1. Therefore, no frame is displayed in the pixel group B so as to be visible. Further, in the pixel group C at the time point Q3, the display is being switched to display the F5 pattern which is the frame displayed in the pixel group C after the F2 pattern. Therefore, no frame is displayed in the pixel group C so as to be visible.

  On the other hand, in the pixel group A at the time point Q3, the display switching from the F0 pattern to the next F3 pattern displayed in the pixel group A is completed, and the F3 pattern is displayed in a visible manner.

  Therefore, the display unit 410A is in a state where F3 is displayed in a state where it can be visually recognized. That is, at time Q3, display switching from the pattern F2 to the pattern of the next frame F3 is completed on the display unit 410A.

  Here, when the display switching time T2a is compared with the display switching time T2b, the display switching time T2b is approximately 1/3 of the display switching time T2a. The display switching time T2a corresponds to the pixel pattern switching time and is the display switching time in the conventional display device 100.

  That is, in the display device 400 of this embodiment, the display switching time for each subsequent frame is shortened to about 1/3 of that of the conventional display device 100 except for the display switching from the initial frame to the next frame. . Therefore, the entire display switching time until the target frame is displayed by sequentially switching a plurality of pages in the display device 400 can be greatly shortened.

  Next, with reference to FIG. 13 and FIG. 14, processing from the initial frame to reaching the target frame in the second embodiment will be described. FIG. 13 is a flowchart for explaining the operation of determining the number of pixel groups to be divided.

  When the display device 400 receives an instruction to start sequential display switching processing (S1301), the number of pixel groups divided in the display unit 410A is selected (S1302).

  Here, for the selection of the number of pixel groups, for example, when the display apparatus 400 receives an instruction to start a sequential display switching process in S1301, the controller 421 displays a display screen that allows the display unit 410A to select the number of pixel groups. The user may select an arbitrary number. Alternatively, the number of pixel groups, for example, is set in advance by the setting unit 425 in a plurality of ways and stored in the memory 422, and the controller 421 starts from this setting before the display device 400 is instructed to start sequential display switching processing. The number of pixel groups may be selected appropriately. The display switching time can be shortened as the number of pixel groups is increased.

  When the number of pixel groups to be divided is selected in S1302, the display device 400 starts display switching processing corresponding to the number of pixel groups (S1303). Then, the display device 400 ends the display switching process that reaches the target frame in the display switching process (S1304).

  Hereinafter, the sequential display switching process in S1303 will be described with reference to FIG. FIG. 14 is a flowchart illustrating the sequential display switching process according to the second embodiment.

  In the display device 400, when the controller 421 receives an instruction to switch sequential display of frames, sequential display switching processing is started (S1401). Here, the controller 421 sets the initial frame before the sequential display switching process is performed as the Nth frame (S1402).

  Next, the controller 421 displays the pattern of the Nth frame in the pixel group A, displays the pattern of the (N + 1) th frame in the pixel group B, and displays the pattern of the (N−1) th frame in the pixel group C. In order to display, a signal is applied to the scanning line 106 and the signal line 107 (S1403). That is, when the pixel electrode 102 located on the scanning line where the TFT 105 is on is a pixel electrode belonging to the pixel group A, the display data signal of the Nth frame is applied to the signal line 107. If the pixel electrode 102 located on the scanning line where the TFT 105 is on is a pixel electrode belonging to the pixel group B, the display data signal of the (N + 1) th frame is applied to the signal line 107. Further, when the pixel electrode 102 located on the scanning line where the TFT 105 is turned on is a pixel electrode belonging to the pixel group C, the display data signal of the (N−1) th frame is applied to the signal line 107.

  Next, the controller 421 determines whether or not the (N + 1) th frame is a target frame (S1404). It should be noted that the setting unit 425 may previously set which frame is the target frame among the plurality of frames. Further, the frame displayed when an instruction to interrupt the display switching process is received during the sequential display switching process may be used as the target frame.

  In S1404, if the (N + 1) th frame is the target frame, the controller 421 moves to the scanning line 106 and the signal line 107 to display the (N + 1) th frame pattern on all of the pixel groups A, B, and C. A signal is applied (S1405). Then, the (N + 1) th frame is displayed on the display unit 410A, and the display switching process is terminated (S1304). The controller 421 may store in the memory 422 information indicating which of the plurality of frames is the target frame when the display unit 410 reaches the target frame and ends the display switching process.

  When the (N + 1) th frame is not the target frame in S1404, the controller 421 displays the pattern of the Nth frame on the pixel group A, displays the pattern of the (N + 1) th frame on the pixel group B, and In order to display the pattern of the (N + 2) th frame on C, a signal is applied to the scanning line 106 and the signal line 107 (S1406).

  Next, the controller 421 determines whether or not the (N + 2) th frame is a target frame (S1407). In step S1407, if the (N + 2) th frame is the target frame, the controller 421 moves to the scanning line 106 and the signal line 107 to display the pattern of the (N + 2) th frame on all of the pixel groups A, B, and C. A signal is applied (S1408). Then, the (N + 2) th frame is displayed on the display unit 410A, and the display switching process is terminated (S1304).

  In S1407, if the (N + 2) th frame is not the target frame, the controller 421 causes the pixel group A to display the (N + 3) th frame pattern, causes the pixel group B to display the (N + 1) th frame pattern, In order to display the pattern of the (N + 2) th frame on the pixel group C, a signal is applied to the scanning line 106 and the signal line 107 (S1409).

  Next, the controller 421 determines whether or not the (N + 3) th frame is a target frame (S1410). In S1410, when the (N + 3) th frame is the target frame, the controller 421 sends the pattern of the (N + 3) th frame to all the pixel groups A, B, and C to the scanning line 106 and the signal line 107. A signal is applied (S1411). Then, the (N + 3) th frame is displayed on the display unit 410A, and the display switching process is terminated (S1304).

  Thereafter, the display device 400 repeats the processing from S1403 to S1412 until the target frame appears on the display unit 410A.

  Embodiment 3 of the present invention will be described below with reference to the drawings. The display device according to the third embodiment of the present invention has the same configuration as the display device 400 according to the second embodiment, and the pixel electrodes are divided into three groups. In this embodiment, the frame pattern to be simultaneously displayed on these three pixel groups is different from that in the second embodiment. In this embodiment, the ratio of the number of frames displayed in each pixel group to the maximum number of frames displayed on the display unit 410A is changed. The change of this ratio will be described later.

  Hereinafter, the frame pattern of the present embodiment displayed on the display unit 410A described in the second embodiment will be described.

  FIG. 15 is a timing chart illustrating frame patterns that are sequentially displayed in the three pixel groups according to the third embodiment.

  Hereinafter, the display state at the time point R0 will be described.

  The display state of the display unit 410A at the time point R0 is a state in which the initial frame F0 is displayed. The display unit 410A starts an operation of switching the initial frame F0 to F1. Here, since the frame F1 subsequent to F0 is displayed in the pixel group B, only the pattern of the frame displayed in the pixel group B is switched at the time point R0.

  Next, the display state of the display unit 410A at the time point R1 will be described.

  In the pixel group A at the time point R1, the display is switched to display the pattern of F2, which is the frame displayed next to the pattern of the frame F0. Therefore, no frame is displayed in the pixel group A so as to be visible. Further, in the pixel group C at the time point R1, the display is switched to display the pattern of F1, which is the frame displayed next to the pattern of the initial frame F0.

  On the other hand, in the pixel group B at the time point R1, the display switching from the F0 pattern to the next F1 pattern displayed in the pixel group B is completed, and the F1 pattern is displayed in a visible manner. Therefore, the display unit 410A is in a state where F1 is displayed in a visible state. That is, at the time point R1, display switching from the pattern of the initial frame F0 to the pattern of the next frame F1 on the display unit 410A is completed.

  In the present embodiment, the F1 pattern is displayed in the pixel group B at the time point R1, and the F1 pattern is about to be displayed in the pixel group C. Therefore, compared to the second embodiment in which each of the three pixel groups displays a different frame pattern, the number of pixel electrodes on which the frame F1 pattern is displayed in the display unit 410A is larger.

  Therefore, in the present embodiment, the F1 pattern displayed on the display unit 410A so as to be visible at the time point R1 can have higher visibility than the F1 pattern displayed at the time point Q1 in the second embodiment.

  Here, the display switching time for the display switching from the F0 pattern to the F1 pattern is T3a. At this time, the display unit 410A is expected to display some afterimage generated by the display switching in the pixel group A on the background of F1 displayed in the pixel group B. It does not inhibit sex.

  Next, the display state at the time point R2 will be described.

  In the pixel group B at the time point R2, the display is being switched to display the pattern of F2, which is the frame displayed next to the pattern of the frame F1. Therefore, no frame is displayed in the pixel group B so as to be visible. Further, in the pixel group C at the time point R2, display switching is being performed so as to display a pattern of F3 which is a frame shown next to the pattern of F1. Therefore, no frame is displayed in the pixel group C so as to be visible.

  In contrast, in the pixel group A at the time point R2, the display switching from the F0 pattern to the F2 pattern to be displayed next in the pixel group A is completed, and the F2 pattern is displayed in a visible manner.

  Therefore, at the time point R2, the pattern F2 is displayed on the pixel group A, and the pattern F2 is about to be displayed on the pixel group B. Therefore, at the time point R2, similarly to the time point R1, the number of pixel electrodes on which the pattern of the frame F2 is displayed in the display unit 410A is larger than that in the second example in which the three pixel groups display different frame patterns. .

  For this reason, the F2 pattern displayed on the display unit 410A so as to be visible at the time point R2 can have higher visibility than the F2 pattern displayed at the time point Q2 of the second embodiment. Here, the display switching time for the display switching from the F1 pattern to the F2 pattern is T3b.

  Next, the display state at the time point R3 will be described.

  In the pixel group A at the time point R3, the display is being switched to display the pattern of F3 that is the frame displayed next to the pattern of the frame F2. Therefore, no frame is displayed in the pixel group A so as to be visible. In the pixel group B at the time point R3, the display is being switched to display the F4 pattern, which is the frame shown next to the F2 pattern. Therefore, no frame is displayed in the pixel group B so as to be visible.

  On the other hand, in the pixel group C at the time point R3, the display switching from the pattern F1 to the pattern F3 displayed next in the pixel group C is completed, and the pattern F3 is displayed in a visible manner.

  Therefore, at the time point R3, the F3 pattern is displayed in the pixel group C, and the F3 pattern is about to be displayed in the pixel group A. That is, at the time point R3, similarly to the time point R1, the number of pixel electrodes on which the pattern of the frame F3 is displayed on the display unit 410A is larger than that in the second embodiment in which each of the three pixel groups displays different frame patterns. .

  For this reason, the F3 pattern displayed on the display unit 410A so as to be visible at the time point R3 can have higher visibility than the F3 pattern displayed at the time point Q3 of the second embodiment. Here, the display switching time for the display switching from the F2 pattern to the F3 pattern is also T3b.

  Here, when the display switching time T3a is compared with the display switching time T3b, the display switching time T3b is approximately 2/3 of the display switching time T3a. The display switching time T3a corresponds to the pixel pattern switching time and is the display switching time in the conventional display device 100.

  In other words, in this embodiment, display switching from the initial frame to the next frame is excluded, and the display switching time for each subsequent frame is shortened to about 2/3 of that of the conventional display device 100. The display switching time of this embodiment is longer than the display switching time of Embodiment 2, but in this embodiment, the visibility of the displayed frame pattern can be improved.

  Next, the ratio of the number of frames displayed in each pixel group to the maximum number of frames displayed on the display unit 410A will be described.

  For example, in Embodiment 1 of the present invention, the pixel electrode is divided into two pixel groups, and different frames are displayed in each pixel group. Therefore, the ratio of the number of frames displayed in each pixel group to the maximum number of frames displayed on the display unit in Example 1 is ½. In the second embodiment, the pixel electrode is divided into three pixel groups, and different frames are displayed in each pixel group. Therefore, the frames displayed in each pixel group with respect to the maximum number of frames displayed on the display unit. The ratio of the number is 1/3.

  In this embodiment, the pixel electrode is divided into three pixel groups, and two pixel groups out of the three pixel groups are displayed at the same time, so each pixel group for the maximum number of frames displayed on the display unit is displayed. The ratio of the number of frames displayed in is 2/3. As this ratio increases, the visibility when the frame pattern is displayed in the pixel group is improved.

  Next, with reference to FIGS. 16 and 17, processing from the initial frame to reaching the target frame in the third embodiment will be described. FIG. 16 is a flowchart for explaining the operation of determining the ratio of the number of frames displayed in each pixel group to the maximum number of frames displayed on the display unit.

  When a display switching start instruction is accepted in the display device 400 (S1601), the ratio of the number of frames displayed in each pixel group to the maximum number of frames displayed on the display unit is selected (S1602).

  For example, a plurality of ratios are stored in advance in the memory 422. When the display device 400 receives a display switching start instruction in S1601, the controller 421 causes the display unit 410A to select a ratio. A display screen may be displayed, and the setting unit 425 may allow the user to select an arbitrary number. Further, for example, the controller 421 may appropriately select a plurality of ratios from the memory 422 in advance.

  When the ratio is selected in S1602, the display apparatus 400 starts frame display switching processing in each pixel group so as to satisfy this ratio (S1603). Then, the display device 40 ends the display switching process that reaches the target frame in the display switching process (S1604).

  Hereinafter, the display switching process in S1603 will be described with reference to FIG. FIG. 17 is a flowchart illustrating display switching processing in the display device according to the third embodiment.

  In the display device 400, when the controller 421 receives a frame display switching instruction, the display switching process is started (S1701). Then, the controller 421 sets the initial frame before the display switching process is performed as the Nth frame (S1702).

  Next, the controller 421 displays a signal to the scanning line 106 and the signal line 107 in order to display the pattern of the Nth frame on the pixel group A and display the pattern of the (N + 1) th frame on the pixel group B and pixel group C. Apply (S1703). That is, when the pixel electrode 102 located on the scanning line where the TFT 105 is on is a pixel electrode belonging to the pixel group A, the display data signal of the Nth frame is applied to the signal line 107. When the pixel electrode 102 located on the scanning line where the TFT 105 is on is a pixel electrode belonging to the pixel group B or the pixel group C, the display data signal of the (N + 1) th frame is applied to the signal line 107. .

  Next, the controller 421 determines whether or not the (N + 1) th frame is a target frame (S1704). It should be noted that the setting unit 425 may previously set which frame is the target frame among the plurality of frames. Further, the frame displayed when an instruction to interrupt the display switching process is received during the sequential display switching process may be used as the target frame.

  In step S1704, if the (N + 1) th frame is the target frame, the controller 421 sends the pattern of the (N + 1) th frame to all of the pixel groups A, B, and C to the scanning line 106 and the signal line 107. A signal is applied (S1705). Then, the (N + 1) th frame is displayed on the display unit 410A, and the display switching process is terminated (S1604). The controller 421 may store in the memory 422 information indicating which of the plurality of frames is the target frame when the display unit 410 reaches the target frame and ends the display switching process.

  In S1704, when the (N + 1) th frame is not the target frame, the controller 421 displays the (N + 2) th frame pattern on the pixel group A and the pixel group B, and the (N + 1) th frame pattern on the pixel group C. Is displayed on the scanning line 106 and the signal line 107 (S1706).

  Next, the controller 421 determines whether or not the (N + 2) th frame is a target frame (S1707). In S1707, if the (N + 2) th frame is the target frame, the controller 421 sends the pattern of the (N + 2) th frame to all of the pixel groups A, B, and C to the scanning line 106 and the signal line 107. A signal is applied (S1708). Then, the display unit 410A displays the (N + 2) th frame, and the display switching process ends (S1604).

  In S1707, when the (N + 2) th frame is not the target frame, the controller 421 displays the (N + 3) th frame pattern on the pixel group A and the pixel group C, and the (N + 2) th frame pattern on the pixel group B. Is displayed on the scanning line 106 and the signal line 107 (S1709).

  Next, the controller 421 determines whether or not the (N + 3) th frame is a target frame (S1710). In S1710, when the (N + 3) th frame is the target frame, the controller 421 sends the pattern of the (N + 3) th frame to all the pixel groups A, B, and C to the scanning line 106 and the signal line 107. A signal is applied (S1711). Then, the (N + 3) th frame is displayed on the display unit 410A, and the display switching process is ended (S1604).

  Thereafter, the display device 400 repeats the processing from S1703 to S1712 until the target frame appears on the display unit 410A.

  Thus, according to the present invention, when a plurality of frames are displayed and the frames are sequentially switched, the display switching time can be shortened.

  The effects of the present invention will be described below with reference to FIG. FIG. 18 is a diagram illustrating the display switching time with respect to the ratio of the number of frames displayed in each pixel group to the number of pixel groups and the maximum number of frames displayed on the display unit.

  As shown in FIG. 18, according to the present invention, the display switching time can be shortened in any of the embodiments as compared with the conventional display device. FIG. 18 shows the results when the time for switching the display from the initial frame to the next frame is set to 0.4 seconds, for example. In this case, since the scanning time is sufficiently shorter than the display switching time, it is not considered in the calculation when calculating the result shown in FIG.

  Although the present invention has been described based on each embodiment, the present invention is not limited to the requirements shown in the above embodiment. With respect to these points, the gist of the present invention can be changed without departing from the scope of the present invention, and can be appropriately determined according to the application form.

  The present invention is applicable to display devices and display methods using electrophoretic elements.

It is a 1st figure explaining the structure of the conventional display apparatus. It is a 2nd figure explaining the structure of the conventional display apparatus 100. FIG. It is the figure which expanded TFT105 of the conventional display apparatus 100. FIG. It is a figure which shows an example of the display part in the conventional display apparatus. 6 is a first timing chart illustrating a frame switching operation in the conventional display device 100. 1 is a block diagram illustrating a configuration of a display device 400 according to a first embodiment. 6 is a diagram illustrating a display unit 410 of the display device 400 of Example 1. FIG. 6 is a diagram illustrating an example of a plurality of frames displayed on a display unit 410. FIG. It is a timing chart explaining the pattern of the frame displayed in each of two pixel groups. It is a figure explaining the display state of the scanning line corresponding to the timing chart of FIG. 7, the input signal to a signal line, and the display part. 5 is a flowchart for explaining sequential display switching processing in the display device 400. It is a figure explaining the display part 410A of Example 2. FIG. 10 is a timing chart illustrating frame patterns to be sequentially displayed in the three pixel groups of Example 2. FIG. It is a figure which shows the scanning line corresponding to the timing chart of FIG. 11, the input signal to a signal line, and the display state of a display part. It is a flowchart explaining the operation | movement which determines the number of the pixel groups divided | segmented. 10 is a flowchart for explaining sequential display switching processing according to the second embodiment. 10 is a timing chart illustrating frame patterns to be sequentially displayed in the three pixel groups of Example 3. FIG. An operation for determining the ratio of the number of frames displayed in each pixel group to the maximum number of frames displayed on the display unit will be described. 10 is a flowchart for explaining sequential display switching processing according to the third embodiment. It is a figure explaining the display switching time with respect to the ratio of the number of the frames displayed in each pixel group with respect to the number of pixel groups and the maximum number of frames displayed on a display part.

Explanation of symbols

100, 400 Display device 102 Pixel electrode 105 TFT
106 Scanning line 107 Signal line 108, 421 Controller 109, 422, Memory 410, 410A Display unit

Claims (3)

Has two substrates provided to face each other across an electrophoretic element, a plurality of thin film transistors disposed separated in a matrix on one of the substrate, and the scanning lines, a signal line, and the thin film transistor corresponding In a display device in which a common electrode corresponding to the pixel electrode is provided on the other substrate,
Control means for dividing the pixel electrode into a plurality of pixel groups in units of the scanning lines and controlling display of frames in the pixel groups;
Setting means for setting a pixel group for displaying each of a plurality of frames , and
The control means includes
When displaying the plurality of frames on the pixel group set by the setting unit,
Before the display of the frame in the first pixel group to which the pixel electrode connected to the thin film transistor turned on by scanning among the plurality of pixel groups belongs is completed,
A display device , wherein the thin film transistor connected to a pixel electrode belonging to a second pixel group is turned on by scanning, and the second pixel group starts displaying another frame. The number of the pixel groups as the maximum number of frames displayed on the display device,
When the number of the pixel groups that cause the display device to display the same frame in the pixel group is the number of frames,
The display device according to claim 1 , wherein a ratio of the number of frames to the maximum number of frames is determined based on a setting by the setting unit. Has two substrates provided to face each other across an electrophoretic element, a plurality of thin film transistors disposed separated in a matrix on one of the substrate, and the scanning lines, a signal line, and the thin film transistor corresponding And a display method in a display device in which a common electrode corresponding to the pixel electrode is provided on the other substrate,
A control procedure for dividing the pixel electrode into a plurality of pixel groups in units of the scanning lines and controlling display of frames in the pixel groups ;
A setting procedure for setting a pixel group for displaying each of a plurality of frames , and
The control procedure is:
When displaying the plurality of frames on the pixel group set by the setting procedure,
Before the display of the frame in the first pixel group to which the pixel electrode connected to the thin film transistor turned on by scanning among the plurality of pixel groups belongs is completed,
A display method comprising: turning on the thin film transistor connected to a pixel electrode belonging to a second pixel group by scanning, and starting display of another frame in the second pixel group.

Images