JP5169468B2 - Reference voltage generation circuit - Google Patents

Description

  The present invention relates to a reference voltage generation circuit mounted on a semiconductor integrated circuit, and more particularly to a reference voltage generation circuit using a band gap circuit.

  A bandgap circuit used as a reference voltage generation circuit having little temperature dependency and power supply voltage dependency is widely used for obtaining a highly accurate reference voltage in a semiconductor integrated circuit.

  The bandgap circuit can be realized by various circuit configurations. As an example, a circuit diagram of the bandgap circuit disclosed in Non-Patent Document 1 is shown in FIG.

  In this band gap circuit, the reference voltage (VREF) output to the output terminal can be expressed by the following equation. In the following equation, the thermal voltage is VT, the base terminal-emitter terminal voltage of the third transistor 103 is VBE, the resistance value of the resistor 106 is R106, the resistance value of the resistor 107 is R107, the transistor 101 and the transistor 102 Let N be the collector current ratio, and ln be the natural logarithm.

VREF = VBE + (R106 / R107) × VT × lnN (1)
Here, the polarities of the temperature characteristics of VT and VBE are opposite, and by setting the value of R106 / R107 so that the right side of equation (1) is equal to the band gap voltage VBG (about 1.25 V), It is known that the reference voltage VREF that is less dependent on the power supply voltage VDD and has no temperature dependency can be output.

  In recent years, the necessity of setting the output voltage of the reference voltage generation circuit to be equal to or higher than the band gap voltage VBG is increasing. An example of such a reference voltage generation circuit is a circuit configuration shown in FIG.

  In this circuit configuration, the reference voltage (VREF) output to the output terminal can be expressed by the following equation. In the following expression, the band gap voltage is VBG, the resistance value of the resistor 210 is R210, and the resistance value of the resistor 211 is R211.

VREF = ((R210 + R211) / R210) × 2 × VBG (2)
Here, when the resistance value of the resistor 209 is R209, the resistance value of the resistor R206 is R206, and the resistance value of the resistor R207 is R207, R209 = 1 / ((1 / R206) + (1 / R207)) is established. R209 is set as follows. Since the current flowing through the resistor 209 is the sum of the currents flowing through the resistors 206 and 207, the voltage applied between the node n2 and the node n4 can be regarded as VBG by setting R209 as described above. . Therefore, the voltage applied to the resistor 210, which is a potential difference from the ground voltage GND at the node n4, is 2 × VBG. Therefore, since the currents flowing through the resistor 210 and the resistor 211 are equal, the reference voltage output to the VREF terminal, which is the potential difference from the ground voltage GND at the node n3, can be expressed by the above equation (2). Then, by adjusting (R210 + R211) / R210 which is a resistance value ratio between the resistor 210 and the resistor 211, a desired reference voltage equal to or higher than the band gap voltage can be generated.
P. R. Gray et al., “Analog Integrated Circuit Design Technology for System LSI (Part 1)”, first edition, Bafukan Co., Ltd., November 1990, p. 275

  However, in the reference voltage generation circuit of FIG. 8, when the VREF voltage is set to 5 V, the collector voltage value of the third transistor 203 is a voltage obtained by adding the gate-source voltage of the fifth transistor 205 to the VREF voltage. It becomes. When the fifth transistor 205 is a high breakdown voltage element, the gate-source voltage is 2 V or more, and a voltage of 7 V or more is applied to the collector terminal of the third transistor 203. Therefore, the third transistor 203 needs to have a high breakdown voltage specification. Then, in order to increase the accuracy of the output voltage, it is necessary to reduce the variation of elements, so the same applies to the first transistor 201 and the second transistor 202 that constitute a circuit in combination with the third transistor 203. Therefore, it becomes necessary to set the high breakdown voltage specification, and the fourth transistor 204 constituting the circuit in combination with the second transistor 202 also needs to have the high breakdown voltage specification.

  When the rising speed of the power supply voltage VDD is steep, the collector terminal voltage of the third transistor 203 overshoots until it converges to the DC voltage (VREF voltage + gate-source voltage of the fifth transistor 205). Happens. For this reason, a voltage higher than the DC voltage is applied to the collector terminal of the third transistor 203. This phenomenon is also the reason why the fifth transistor 205 has to have a high breakdown voltage specification.

  In general, the high breakdown voltage process tends to increase the element area, and as a result of using the high breakdown voltage element as described above, the reference voltage generation circuit is enlarged. This is a very big problem in a semiconductor integrated circuit that always requires high integration and high density.

  In the reference voltage generation circuit of FIG. 8, when a supply voltage to the collector terminal of the third transistor 203 is changed at the start of supply of the power supply voltage VDD, the third transistor 205 is turned on before the fifth transistor 205 is turned on. In some cases, the transistor 203 may be turned ON by mistake. In this case, the threshold voltage necessary for turning on the fifth transistor 205 is not supplied to the gate terminal of the fifth transistor 205 when the third transistor 203 is turned on. As a result, the supply of the power supply voltage VDD is started. Regardless, the fifth transistor 205 remains off. That is, in the reference voltage generation circuit of FIG. 8, there is a possibility that a phenomenon in which the reference voltage does not rise occurs.

  In view of the above problems, an object of the present invention is to generate a reference voltage that can stably generate a reference voltage without increasing the circuit area even when a high-potential power supply voltage is supplied. It is to realize a circuit.

  In order to achieve the above object, a reference voltage generating circuit according to the present invention is arranged between a first node and a ground voltage supply line, and is connected to the first node via a first resistor. A first transistor composed of a bipolar transistor having a collector terminal connected to the ground voltage supply line, a base terminal short-circuited to the collector terminal, the first node, A collector terminal connected in parallel with the first transistor between the first node and a ground voltage supply line, and connected to the first node via a second resistor; and a third terminal connected to the ground voltage supply line. A bipolar transistor having an emitter terminal connected through a resistor and a base terminal connected to a base terminal and a collector terminal of the first transistor. A third transistor composed of a bipolar transistor having a second transistor, a base terminal connected to the collector terminal of the second transistor, and an emitter terminal connected to the ground voltage supply line; A second node connected to a reference voltage terminal from which a voltage is output and the first node; a collector terminal connected to the second node; and a second node connected to the first node; 4 connected to an emitter terminal connected through a resistor 4 and a third node which is a connection point of fifth and sixth resistors connected in series between the second node and the ground voltage supply line. A fourth transistor formed of a bipolar transistor having a base terminal formed between the power supply voltage supply line and the second node; A fifth transistor having a control terminal connected to the line via a load circuit and switching between a conduction state and a non-conduction state between the power supply voltage supply line and the second node; and the power supply voltage supply line And a control terminal connected to the second node, the power supply voltage supply line and the third transistor being connected between the load circuit connected to the third transistor and the collector terminal of the third transistor. And a sixth transistor that switches between a conducting state and a non-conducting state with the collector terminal.

  In the above reference voltage generation circuit, the power supply voltage is supplied to the first to fourth transistors via the sixth transistor, so that the power supply voltage is directly supplied to the first to fourth transistors. There is no. For this reason, even when the power supply voltage is high enough that the first to fourth transistors must have a high withstand voltage structure, the presence of the sixth transistor makes the first to fourth transistors elemental. A transistor having a low withstand voltage structure with a small area can be used. Therefore, even when the power supply voltage rises to the high potential as described above, an increase in the size of the reference voltage generation circuit can be avoided.

  Further, in the above reference voltage generation circuit, even when the supply voltage fluctuates at the start of supply of the power supply voltage, the third transistor is erroneously changed to the ON state before the fifth transistor. Can be prevented. By doing so, the reference voltage VREF can be stably generated even when the supply of the power supply voltage is started.

  The load circuit is preferably a resistor.

  In this case, the reference voltage generating circuit can be realized with a simple circuit configuration.

  The load circuit is preferably a constant current source.

  In this case, it becomes difficult to be affected by fluctuations in power supply voltage and temperature changes, and a predetermined current can be stably supplied to the drain terminal side of the sixth transistor. Furthermore, when the current value supplied to the drain terminal side of the sixth transistor is small, the circuit area can be reduced as compared with the case where the load circuit is realized using a resistor.

  The fifth transistor is a MOS transistor having a gate terminal which is a control terminal of the fifth transistor, a drain terminal connected to the power supply voltage supply line, and a source terminal connected to the second node. The sixth transistor is connected to a gate terminal which is a control terminal of the sixth transistor, a drain terminal connected to the load circuit, and a collector terminal of the third transistor. A MOS transistor having a source terminal is preferably used.

  In this case, since the fifth and sixth transistors are composed of MOS transistors, the switching operation between the conductive state and the non-conductive state can be speeded up by the fifth and sixth transistors.

  The fifth transistor includes a base terminal which is a control terminal of the fifth transistor, a collector terminal connected to the power supply voltage supply line, and an emitter terminal connected to the second node. The sixth transistor is connected to a base terminal which is a control terminal of the sixth transistor, a collector terminal connected to the load circuit, and a collector terminal of the third transistor It is preferably constituted by a bipolar transistor having an emitter terminal.

  In this case, since the fifth and sixth transistors can be manufactured by the same manufacturing process as the first to fourth transistors, the manufacturing cost can be reduced.

  Since the reference voltage generating circuit according to the present invention is configured as described above, even when the power supply voltage is high enough that the first to fourth transistors must have a high breakdown voltage structure. The first to fourth transistors can be formed using transistors having a low breakdown voltage structure with a small element area. Therefore, an increase in the size of the reference voltage generating circuit can be avoided. Furthermore, it is possible to reliably prevent the third transistor from erroneously transitioning to the ON state before the fifth transistor. Therefore, the phenomenon that the reference voltage does not rise can be avoided.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, the same code | symbol is attached | subjected to the same part, and what attached the same code | symbol in drawing may abbreviate | omit description.

(Embodiment 1)
FIG. 1 is a block diagram showing a schematic configuration of a motor drive mechanism using the reference voltage generation circuit according to the first embodiment of the present invention. As shown in FIG. 1, the motor drive mechanism 10 of the present embodiment includes a motor drive IC 11, a control IC 12, and a motor 13. The reference voltage generation circuit of the present embodiment is mounted on the control IC 12 and generates a reference voltage used in the control IC 12.

  In the motor drive mechanism 10 of the present embodiment, the motor drive IC 11 is connected to the motor 13 through three lead wires, and applies a voltage to the motor 13 in order to rotate the motor 13. The motor drive IC 11 adjusts the rotation speed of the motor 13 by adjusting the voltage applied to the motor 13 using these three leads.

  The control IC 12 is an IC for controlling the drive current applied to the motor 13 by the motor drive IC 11. A control signal from a microcomputer (not shown) arranged outside the motor drive mechanism 10 and prepared for managing the motor drive mechanism 10 is input to the control IC 12, and the control IC 12 receives the motor based on the control signal. The drive IC 11 generates a motor drive signal used when adjusting the drive current of the motor 13 and outputs the motor drive signal to the motor drive IC 11.

  Two power supply voltages, that is, a first power supply voltage VCC1 and a second power supply voltage VBB are supplied to the motor drive IC 11. The first power supply voltage VCC1 is a signal processing power supply for the motor drive IC to control the motor drive current, and is, for example, 15V. On the other hand, the second power supply voltage VBB is a power supply for generating a motor driving current, and is, for example, 100 to 200V.

  Further, the motor drive IC 11 reduces the first power supply voltage VCC1 by an internal step-down circuit to generate a third power supply voltage VCC2 that is a power supply for the control IC12. The third power supply voltage VCC2 is, for example, 7.5V.

  Next, the control IC 12 on which the reference voltage generation circuit according to this embodiment is mounted will be described. As shown in FIG. 2, the control IC 12 of the present embodiment includes a reference voltage generation circuit 121 and a signal processing circuit 122, and the reference voltage VREF is supplied from the reference voltage generation circuit 121 to the signal processing circuit 122. It is output.

  In the control IC 12 of the present embodiment, as described above, the third power supply voltage VCC2 supplied from the motor drive IC 11 is output to the reference voltage generation circuit 121, and the reference voltage generation circuit 121 A reference voltage VREF of, for example, 5V is generated from the power supply voltage VCC2 and output to the signal processing circuit 122.

  The signal processing circuit 122 uses the reference voltage VREF as a power supply voltage, and generates a motor drive signal to be supplied to the motor drive IC 11 in accordance with a control signal from a microcomputer or the like.

  Next, the reference voltage generation circuit 121 of this embodiment will be described. As shown in FIG. 3, the reference voltage generation circuit 121 of this embodiment includes a first transistor 301, a second transistor 302, a third transistor 303, a fourth transistor 304, a fifth transistor 305, A sixth transistor 313, a resistor 306, a resistor 307, a resistor 308, a resistor 309, a resistor 310, a resistor 311, and a resistor 312, which are features of the invention, are provided. Note that in this embodiment, the first transistor 301, the second transistor 302, the third transistor 303, and the fourth transistor 304 are npn bipolar transistors, and the fifth transistor 305 and the sixth transistor 304 The transistor 313 is an nMOS transistor.

  In the reference voltage generation circuit 121 according to this embodiment, the first transistor 301 and the second transistor 302 form a current mirror. That is, the base terminal and the collector terminal of the first transistor 301 are short-circuited, and current is applied to the collector terminal side of the first transistor 301. The shorted base terminal and collector terminal of the first transistor 301 are connected to the base terminal of the second transistor 302 proximate to the first transistor 301. Further, the transistor area ratio between the first transistor 301 and the second transistor 302 is defined to be 1: N. When the thermal voltage is VT, the resistance value of the resistor 308 is R308, the collector current ratio of the first transistor 301 and the second transistor 302 is N, and ln is a natural logarithm, the collector current of the second transistor 302 is VT × lnN / R308.

  The collector terminal of the first transistor 301 is connected to the node n11 via the resistor 306, while the emitter terminal thereof is connected to the ground voltage GND. The collector terminal of the second transistor 302 is connected to the node n11 through the resistor 307, and the emitter terminal thereof is connected to the ground voltage GND through the resistor 308.

  The collector terminal of the third transistor 303 is connected to the source terminal of the sixth transistor 313, its emitter terminal is connected to the ground voltage GND, and its base terminal is connected to the collector terminal of the second transistor 302. The collector terminal of the fourth transistor 304 is connected to the node n12, the emitter terminal thereof is connected to the node n11 via the resistor 309, and the base terminal thereof is connected to the node n13 which is a connection point between the resistor 310 and the resistor 311. ing. Further, the drain terminal of the fifth transistor 305 is connected to the power supply voltage VCC2, its source terminal is connected to the node n12, and its gate terminal is connected to the drain terminal of the sixth transistor 313. Further, the drain terminal of the sixth transistor 313 is connected to the power supply voltage VCC2 via the resistor 312, its source terminal is connected to the collector terminal of the third transistor 303, and its gate terminal is connected to the node n12.

  A reference voltage terminal (VREF terminal) which is an output terminal of the reference voltage generation circuit 121 according to the present embodiment is connected to the node n12. The potential difference from the ground voltage GND at the node n12 is output as a reference voltage.

  In the reference voltage generation circuit 121 of the present embodiment, the reference voltage (VREF) output to the VREF terminal can be expressed by the following equation, as in the circuit configuration of FIG. In the following equation, VBG is a bandgap voltage (about 1.25 V), the resistance value of the resistor 310 is R310, and the resistance value of the resistor 311 is R311.

VREF = ((R310 + R311) / R310) × 2 × VBG (3)
Here, when the resistance value of the resistor 309 is R309, the resistance value of the resistor 306 is R306, and the resistance value of the resistor 307 is R307, R309 = 1 / ((1 / R306) + (1 / R307)) is established. R309 is set as follows. Since the current flowing through the resistor 309 is the sum of the currents flowing through the resistors 306 and 307, the voltage applied between the node n11 and the node n13 can be regarded as VBG by setting R309 as described above. . Therefore, the voltage applied to the resistor 310, which is a potential difference from the ground voltage GND at the node n13, is 2 × VBG. Therefore, since the currents flowing through the resistor 310 and the resistor 311 are equal, the reference voltage output to the VREF terminal, which is the potential difference from the ground voltage GND at the node n12, can be expressed by the above equation (3). A desired reference voltage can be generated by adjusting (R310 + R311) / R310, which is a resistance value ratio between the resistor 310 and the resistor 311.

  Here, the reference voltage generation circuit 121 of this embodiment is different from the circuit configuration of FIG. 8 in that the sixth transistor 313 is connected to the collector terminal of the third transistor 303 and the power supply voltage VCC2 as shown in FIG. This is a point inserted between the connected resistor 312. By inserting the sixth transistor 313, the following effects specific to the present invention can be realized. Hereinafter, the specific effects of the present invention will be described.

  First, the reference voltage generation circuit 121 according to this embodiment includes a first transistor 301, a second transistor 302, a third transistor 303, and a fourth transistor 304 by inserting the sixth transistor 313. Each is realized by using an npn bipolar transistor having a low breakdown voltage structure, and by doing so, it is possible to achieve an effect that the reference voltage generating circuit 121 can be reduced in size.

  That is, since the power supply voltage VCC2 supplied to the reference voltage generation circuit 121 according to the present embodiment is 7.5 V or more and the voltage output to VREF is 5 V, the sixth transistor 313 is not inserted. A voltage obtained by adding the gate-source voltage of the fifth transistor 305 to the VREF voltage is applied to the collector terminal of the third transistor 303. Further, when the power supply voltage VCC2 is sharply raised, the collector terminal voltage of the third transistor 303 causes an overshoot until it converges. Therefore, the gate-source voltage of the fifth transistor 305 is set to the VREF voltage. More voltage than applied. For this reason, it is natural that use of an npn bipolar transistor having a high breakdown voltage structure having a breakdown voltage of 7.5 V or more is normally required. Therefore, in the case of the conventional reference voltage generating circuit having the circuit configuration of FIG. 8, it is necessary to reduce the variation of elements in order to increase the accuracy of the output voltage. Therefore, the first transistor 201 and the second transistor Each of 202, the third transistor 203, and the fourth transistor 204 must be composed of an npn bipolar transistor having a high breakdown voltage structure. In general, the manufacturing process of the high withstand voltage structure increases the element area as compared with the manufacturing process of the low withstand voltage structure. As a result of adopting the npn bipolar transistor having the high withstand voltage structure, the element area of each transistor is low withstand voltage. The reference voltage generation circuit is inevitably increased in size as compared with the case where the structure is used.

  On the other hand, in the reference voltage generation circuit 121 according to the present embodiment, a voltage obtained by subtracting the gate-source voltage of the sixth transistor 313 from the VREF voltage is applied due to the insertion of the sixth transistor 313. For example, when the gate-source voltage of the sixth transistor 313 is 1V and the VREF voltage is 5V, the collector voltage of the third 303 is 4V. Even when the power supply voltage VCC2 rises sharply, the voltage is clamped by a voltage obtained by subtracting the gate-source voltage of the sixth transistor 313 from the VREF voltage, and does not increase beyond this voltage. For the above reason, the third transistor 303 can be realized using an npn bipolar transistor having a low breakdown voltage structure. Accordingly, each of the first transistor 301, the second transistor 302, and the fourth transistor 304, which constitutes a circuit in combination with the third transistor 303, can be similarly set to a low breakdown voltage specification. The voltage generation circuit 121 is not increased in size. In this embodiment, the fifth transistor 305 and the sixth transistor 313 to which the power supply voltage VCC2 is directly supplied are required to be configured using nMOS transistors having a high breakdown voltage structure.

  Secondly, the reference voltage generation circuit 121 according to the present exemplary embodiment has a third configuration even when the supply voltage fluctuation at the start of the supply of the power supply voltage VCC2 occurs due to the insertion of the sixth transistor 313. There is an effect that can reliably prevent the transistor 303 from being turned ON by mistake.

  That is, when the supply of the power supply voltage VCC2 is started, the sixth transistor 313 does not transition to the ON state unless the VREF voltage supplied to its gate terminal exceeds the threshold value. For this reason, when the supply of the power supply voltage VCC2 is started, the VREF voltage does not rise at a stretch, so the sixth transistor 313 does not turn on first, and as a result, the drain terminal of the sixth transistor 313 The potential is maintained at the power supply voltage VCC2.

  On the other hand, since the gate terminal of the fifth transistor 305 is connected to the drain terminal of the sixth transistor 313, when the supply of the power supply voltage VCC2 is started, the fifth transistor 305 is reliably switched to the ON state. Can be made. As a result, it is possible to prevent the VREF terminal from converging to 0 V when the supply of the power supply voltage VCC2 is started.

  Here, in the reference voltage generation circuit 121 according to the present embodiment, the collector voltage value level of the third transistor 303 with respect to the fluctuation of the power supply voltage VCC2 and the first with respect to the fluctuation of the power supply voltage VDD in the conventional form shown in FIG. The collector voltage value level of the third transistor 203 will be described based on simulation.

  FIG. 4 is a graph showing changes in the reference voltage and the collector voltage in the reference voltage generation circuit shown in FIGS. 3 and 8 with respect to fluctuations in the power supply voltage VCC2 or VDD. The vertical axis indicates the reference voltage in FIG. 3 and the reference voltage in FIG. 8, and the collector voltage of the third transistor 303 in FIG. 3 and the collector voltage of the third transistor 203 in FIG. 3 and the power supply voltage supplied to each circuit of FIG.

  4 that the collector voltage of the transistor 303 in this embodiment is lower than the collector voltage of the conventional transistor 203 having the circuit configuration of FIG. In this embodiment, the collector voltage of the transistor 303 is a voltage obtained by subtracting the gate-source voltage of the transistor 313 from the VREF voltage. In the conventional example, the collector voltage of the transistor 203 is the VREF voltage and the gate-source of the transistor 205. It becomes the voltage which added the voltage between. Here, in this simulation result, the respective collector voltages are 7.5 to 8.0 V in the conventional form, and 3.8 to 4.0 V in the present embodiment. In a general low withstand voltage element, the absolute maximum rated voltage is 7 V. Therefore, in the conventional example, the transistor 203 has to be configured with a high withstand voltage element, whereas in this embodiment, the transistor 303 has a low withstand voltage. It can be seen that it can be configured with specifications.

(Embodiment 2)
Next, a second embodiment of the present invention will be described. FIG. 5 shows a circuit diagram of the reference voltage generating circuit according to the present embodiment. The reference voltage generation circuit according to the present embodiment has a configuration in which the resistor 312 of the first embodiment is replaced with a constant current source 314. Other configurations are similar to those of the first embodiment, and description thereof will not be repeated here.

  In the reference voltage generation circuit according to the present embodiment, as shown in FIG. 5, the current applied to the drain terminal side of the sixth transistor 313 is supplied by the constant current source 314. Therefore, compared to the first embodiment using the resistor 312, it is less affected by fluctuations in the power supply voltage VCC 2 and ambient temperature, and a predetermined current is stably supplied to the drain terminal side of the sixth transistor 313. Can be supplied.

  Further, when the current value supplied to the drain terminal side of the sixth transistor 313 is small, the element area required for the constant current source 314 is smaller than that for the resistor 312 than the resistor 312 is used. Therefore, the manufacturing cost can be further reduced as compared with the first embodiment using the resistor 312.

(Embodiment 3)
Next, a third embodiment of the present invention will be described. FIG. 6 shows a circuit diagram of the reference voltage generating circuit according to the present embodiment. In the first embodiment, the fifth and sixth transistors 305 and 313 are configured by nMOS transistors. However, in the present embodiment, the fifth and sixth transistors that are the nMOS transistors of the first embodiment are used. Instead of the transistors 305 and 313, fifth and sixth transistors 315 and 316 which are npn bipolar transistors are arranged. Other configurations are similar to those of the first embodiment, and description thereof will not be repeated here.

  In the reference voltage generating circuit according to the present embodiment, as shown in FIG. 6, the collector terminal of the fifth transistor 315 is at the power supply voltage VCC2, the emitter terminal is at the node n12, and the base terminal is at the sixth transistor. 316 are connected to collector terminals, respectively. On the other hand, the collector terminal of the sixth transistor 316 is connected to the power supply voltage VCC2 via the resistor 312, its emitter terminal is connected to the collector terminal of the third transistor 303, and its base terminal is connected to the node n12.

  The present invention is not limited to the above-described first to third embodiments, and various modifications are possible within the scope shown in the claims, and various technical means disclosed in different embodiments are appropriately combined. The obtained embodiment is also included in the technical scope of the present invention.

  The present invention is particularly effective in realizing a reference voltage generation circuit that outputs a more stable reference voltage against temperature fluctuations and power supply voltage fluctuations. It can be suitably used.

It is a block diagram which shows schematic structure of the motor drive mechanism concerning Embodiment 1 of this invention. It is a block diagram which shows schematic structure of the control IC of FIG. 1 is a circuit diagram showing a configuration of a reference voltage generation circuit according to a first exemplary embodiment of the present invention; It is a graph which shows the relationship between a power supply voltage and a collector voltage, and the relationship between a power supply voltage and a reference voltage. FIG. 5 is a circuit diagram showing a configuration of a reference voltage generation circuit according to a second exemplary embodiment of the present invention. It is a circuit diagram which shows the structure of the reference voltage generation circuit concerning Embodiment 3 of this invention. It is a circuit diagram which shows the structure of the conventional reference voltage generation circuit. It is a circuit diagram which shows the structure of the conventional reference voltage generation circuit.

Explanation of symbols

10 Motor drive mechanism 11 Motor drive IC
12 Control IC
13 Motor 101, 102, 103, 104, 201, 202, 203, 204, 205, 301, 302, 303, 304, 315, 316 npn bipolar transistor 105, 106, 107, 206, 207, 208, 209, 210, 211, 212 Resistance 108, 314 Constant current source 121 Reference voltage generation circuit 122 Signal processing circuit 305, 313 nMOS transistor

Claims (5)

A collector terminal disposed between the first node and the ground voltage supply line, connected to the first node via a first resistor; and an emitter terminal connected to the ground voltage supply line; A first transistor composed of a bipolar transistor having the collector terminal and a shorted base terminal;
A collector terminal disposed in parallel with the first transistor between the first node and the ground voltage supply line, and connected to the first node via a second resistor; and the ground A second transistor composed of a bipolar transistor having an emitter terminal connected to a voltage supply line via a third resistor, and a base terminal connected to a base terminal and a collector terminal of the first transistor;
A third transistor composed of a bipolar transistor having a base terminal connected to the collector terminal of the second transistor and an emitter terminal connected to the ground voltage supply line;
A second terminal connected to a reference voltage terminal from which a reference voltage is output is disposed between the first node, a collector terminal connected to the second node, and a first node connected to the first node. An emitter terminal connected via a fourth resistor, and a third node which is a connection point of fifth and sixth resistors connected in series between the second node and the ground voltage supply line. A fourth transistor composed of a bipolar transistor having a connected base terminal;
The power supply voltage supply line is disposed between the power supply voltage supply line and the second node, and has a control terminal connected to the power supply voltage supply line via a load circuit, and the power supply voltage supply line and the second node. A fifth transistor for switching between conducting state and non-conducting state between
The power supply voltage supply line and the collector terminal of the third transistor are arranged between the load circuit and the collector terminal of the third transistor, and have a control terminal connected to the second node. And a sixth transistor that switches between a conduction state and a non-conduction state between the reference voltage generation circuit and the reference voltage generation circuit.   The reference voltage generation circuit according to claim 1, wherein the load circuit is a resistor.   The reference voltage generation circuit according to claim 1, wherein the load circuit is a constant current source. The fifth transistor is a MOS transistor having a gate terminal which is a control terminal of the fifth transistor, a drain terminal connected to the power supply voltage supply line, and a source terminal connected to the second node. It consists of
The sixth transistor includes a gate terminal that is a control terminal of the sixth transistor, a drain terminal connected to the load circuit, and a source terminal connected to a collector terminal of the third transistor. The reference voltage generating circuit according to claim 1, wherein the reference voltage generating circuit is configured by a transistor. The fifth transistor includes a base terminal which is a control terminal of the fifth transistor, a collector terminal connected to the power supply voltage supply line, and an emitter terminal connected to the second node. It consists of
The sixth transistor includes a base terminal that is a control terminal of the sixth transistor, a collector terminal connected to the load circuit, and an emitter terminal connected to the collector terminal of the third transistor. The reference voltage generating circuit according to claim 1, wherein the reference voltage generating circuit is configured by a transistor.

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