JP5169412B2 - Electric power steering device - Google Patents

Description

  The present invention relates to an electric power steering apparatus, a memory failure detection method thereof, and a computer-executable program, and more specifically, an electric motor capable of continuing steering assist processing even when a failure (abnormality) occurs in a memory. The present invention relates to a power steering device, a memory failure detection method thereof, and a computer-executable program.

  In order to reduce the steering force of vehicles such as passenger cars and trucks, there is a so-called electric power steering (EPS) device that assists steering by a steering assist motor. In the electric power steering apparatus, the driving force of the steering assist motor is applied to the steering shaft or the rack shaft by a transmission mechanism such as a gear or a belt via a speed reducer. Such an electric power steering apparatus performs feedback control of motor current in order to accurately generate steering assist torque. In feedback control, the motor applied voltage is adjusted so that the difference between the current command value and the detected motor current value is small. Generally, the adjustment of the motor applied voltage is a duty ratio of PWM (pulse width modulation) control. It is done by adjusting.

  Due to the increase in size of vehicles equipped with such an electric power steering device, the output of the electric power steering device has been increased, and the increase in motor torque and the increase in current of the steering assist motor have been accelerated. Conventionally, the steering assist is stopped when any abnormality occurs in the electric power steering apparatus. Light cars can be steered to some extent even when the electric power steering device is not operating. However, since a large force is required for steering with a liter car or higher, steering assistance by the electric power steering device is possible even after an abnormality has occurred. It is desirable to continue.

  In the control of such an electric power steering apparatus, a memory such as a RAM is used for data storage and calculation processing, and the memory capacity is increased in order to improve steering performance and reliability. In order to enhance the safety of the electric power steering apparatus, a memory diagnosis function is provided for the purpose of improving the reliability of the system and improving the safety at the initial time and during the steering assist. It has become.

For example, Patent Documents 1 to 3 disclose a technique for stopping steering assist for safety when an abnormality in a memory is detected in an electric power steering apparatus having a memory diagnosis function. However, in Patent Documents 1 to 3, when a memory abnormality is detected,
Since the configuration is such that the steering assist is stopped regardless of the weight of the abnormality, there is a problem that the steering assist cannot be continued when there is an abnormality in the memory.

JP 2006-331086 A JP 2004-133635 A JP 2003-323353 A

  The present invention has been made in view of the above, and an electric power steering apparatus capable of executing or continuing steering assist processing as much as possible even when there is an abnormality in a memory, a memory failure detection method thereof, and a computer The purpose is to provide an executable program.

In order to solve the above-described problems and achieve the object, the present invention provides a steering assist command value calculated based on the steering torque generated in the steering system of the vehicle and the speed of the vehicle, and the steering assist force in the steering system. In the electric power steering apparatus that controls the steering assist motor based on the detected current value of the steering assist motor, the control means for executing the steering assist process for controlling the steering assist motor, and the operation of the control means A memory serving as a region, and memory failure detection means for detecting a failure of the memory before or during execution of the steering assist process, wherein the memory is capable of executing the steering assist process even if a failure occurs. and regions, by limiting the steering assist torque even when there is a failure, and a second region that can perform the steering assist processing, and the second Region, in response to said function of steering assist process is divided into a plurality, when detecting a failure in the region of the memory in the memory failure detecting means, by limiting the steering assist torque, the steering Auxiliary processing is executed or continued, and the memory failure detection means does not perform failure detection in the first region when performing failure detection of the memory during execution of the steering assist processing. .

  According to a preferred aspect of the present invention, the area of the memory includes a first area used for torque control, and the memory failure detecting means detects a failure of the first area of the memory. In this case, it is desirable that the torque control is limited and the steering assist process is executed or continued.

  According to a preferred aspect of the present invention, the area of the memory includes a second area used for torque compensation control, and the memory failure detecting means detects a failure of the second area of the memory. In this case, it is desirable that the torque compensation control is limited and the steering assist process is executed or continued.

  According to a preferred aspect of the present invention, the area of the memory includes a third area used for motor current control, and the memory failure detection means detects a failure of the third area of the memory. In this case, it is desirable that the motor current control is limited and the steering assist process is executed or continued.

  According to a preferred aspect of the present invention, it is desirable that the memory is a random access memory.

In order to solve the above-described problems and achieve the object, the present invention provides a steering assist command value calculated based on the steering torque generated in the steering system of the vehicle and the speed of the vehicle, and the steering assist force in the steering system. In the memory failure detection method of the electric power steering apparatus for controlling the steering assist motor based on the detected current value of the steering assist motor for providing the steering assist motor, the operation of the control means for executing the steering assist process for controlling the steering assist motor And a step of detecting the failure before or during the execution of the steering assist process for the memory serving as the area, wherein the memory is capable of executing the steering assist process even if a failure occurs. when, by limiting the steering assist torque even when there is a failure, and a second region that can continue the steering assist processing, and the second region, The steering assist process is divided into a plurality of parts according to the function of the steering assist process, and when a failure in the area of the memory is detected in the failure detection step, the steering assist torque is limited to limit the steering assist process. The step of performing or continuing the step of performing the failure detection does not perform failure detection of the first region when performing failure detection of the memory during execution of the steering assist process .

In order to solve the above-described problems and achieve the object, the present invention provides a steering assist command value calculated based on the steering torque generated in the steering system of the vehicle and the speed of the vehicle, and the steering assist force in the steering system. The operation of the control means for executing the steering assist process for controlling the steering assist motor in the program installed in the electric power steering apparatus for controlling the steering assist motor based on the detected current value of the steering assist motor. And a step of detecting a failure of the area memory before or during execution of the steering assist process. The computer executes the steering assist process even if a failure occurs . has a first region, by limiting the steering assist torque even when there is a failure, a second region can continue the steering assist process, the The second region is divided into a plurality depending on the function of the steering assist process, when detecting a failure of the region of the memory in the step of performing the fault detection, limits the steering assist torque Then, the step of executing or continuing the steering assist process and detecting the failure performs the failure detection of the first area when the failure detection of the memory is performed during the execution of the steering assist process. It is characterized by not .

  According to the present invention, the steering assist command value calculated based on the steering torque generated in the steering system of the vehicle and the speed of the vehicle, and the current detection value of the steering assist motor that applies the steering assist force to the steering system. Based on this, in the electric power steering apparatus for controlling the steering assist motor, control means for executing a steering assist process for controlling the steering assist motor, a memory serving as a work area of the control means, and execution of the steering assist process Memory failure detecting means for detecting a failure of the memory before or during execution, and the memory has a region where the steering assist processing can be continued by limiting the steering assist torque even when there is a failure. The area is divided into a plurality of areas according to the function of the steering assist process, and the memory failure detection means determines the reason for the area of the memory. Is detected, the steering assist torque is limited and the steering assist process is executed or continued. Therefore, even if there is an abnormality in the memory, the steering assist process is executed or continued as much as possible. There is an effect that it is possible to provide an electric power steering apparatus capable of performing the above.

  Hereinafter, the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to the embodiments. In addition, constituent elements in the following embodiments include those that can be easily assumed by those skilled in the art or those that are substantially the same.

  FIG. 1 is a diagram illustrating a general configuration of an electric power steering apparatus. In FIG. 1, a column shaft 2 of a steering handle 1 is connected to a tie rod 6 of a steering wheel via a reduction gear 3, universal joints 4a and 4b, and a pinion rack mechanism 5. The column shaft 2 is provided with a torque sensor 10 that detects the steering torque T of the steering handle 1, and a steering assist motor 20 that assists the steering force of the steering handle 1 is connected to the column shaft via the reduction gear 3. 2 is connected. Here, the steering assist motor 20 is, for example, a brushless motor or a brush motor. The control unit 30 that controls the electric power steering device is supplied with electric power from the battery 14 via the built-in power supply relay 13 and is supplied with an ignition signal from the ignition key 11. Further, the control unit 30 calculates a current command value for the steering assist motor 20 based on the steering torque T detected by the torque sensor 10 and the vehicle speed V detected by the vehicle speed sensor 12, and the current of the steering assist motor 20 is calculated. Based on the detected value and the current command value, the steering assist motor 20 is drive-controlled so that the current detected value of the steering assist motor 20 follows the current command value.

  FIG. 2 is a diagram showing a hardware configuration of the control unit 30 of FIG. As shown in FIG. 2, the control unit 30 includes an MCU (micro control unit) 100, an FET pre-driver circuit 110, a motor drive circuit (inverter) 120, a current detection circuit 130, a position detection circuit 140, and the like. ing.

  The MCU 100 includes a CPU (control means) 101, a ROM 102, a RAM 103, an EEPROM (nonvolatile memory) 104, an A / D converter 105, an interface 106, a bus 107, and the like. The CPU 101 executes a program stored in the ROM 102 and controls the electric power steering apparatus.

  The ROM 102 stores various programs executed by the CPU 101. Specifically, the ROM 102 includes an assist process (steering assist process) for controlling the steering assist motor 20 that performs steering assist (assist), and a memory diagnosis process (memory initial diagnosis process and memory constant diagnosis) for detecting a failure of the RAM 103. A control program for executing (processing) is stored.

  The RAM 103 is used as a work area when the CPU 101 executes a program, and stores data, processing results, and the like necessary in the processing process.

  The EEPROM 104 is a non-volatile memory that can retain stored contents even after the power is shut off, and stores control data and the like that the CPU 101 uses in controlling the electric power steering apparatus. Here, the EEPROM is used as the non-volatile memory. However, the present invention is not limited to this, and other non-volatile memories such as a FLASH-ROM may be used.

  The A / D converter 105 inputs the steering torque T from the torque sensor 10, the current detection value Im of the steering assist motor 20 from the current detection circuit 130, the motor rotation angle signal θ from the position detection circuit 140, and the like. Convert to digital signal. The interface 106 is for receiving the vehicle speed V (pulse) from the vehicle speed sensor 12 by CAN communication.

  In the above configuration, the CPU 101 functions as a memory failure detection unit, an assistability determination unit, and a failsafe processing unit by executing a program stored in the ROM 102.

  The FET pre-driver circuit 110 converts the PWM control signal for each phase of UVW input from the main MCU 100 into positive and negative energization signals (Up, Un, Vp, Vn, Wp, Wn) for each phase, and the motor drive circuit 120. Output to.

  The motor drive circuit 120 includes a bridge circuit composed of a pair of FET switching elements for three phases for the U phase, the V phase, and the W phase, and a reflux diode is connected in parallel to each FET switching element. A DC voltage is applied to the bridge circuit from the battery 14 via the power relay 13. An energization signal is input from the FET pre-driver circuit 110 to the control terminal (gate terminal) of each FET switching element. The DC voltage applied to the motor drive circuit 120 is converted into a three-phase AC voltage by the switching operation of the FET switching element in the motor drive circuit 120, thereby driving the steering assist motor 20. Shunt resistors R1 and R2 are connected to this bridge circuit. A current detection circuit 130 is connected to the shunt resistors R1 and R2, and the current detection value Im of the steering assist motor 20 is thereby detected.

  The position detection circuit 140 outputs the output signal from the position sensor 21 to the A / D converter 105 as a motor rotation angle signal θ.

  In the electric power steering apparatus configured as described above, even when the failure of the RAM 103 is detected before or during the execution of the assist process, the failure of the RAM 103 is detected in order to execute the assist process as much as possible. In this case, based on the failure area, it is determined whether or not the failure is such that the assist process can be performed. If it is determined that the assist process can be performed, the assist process is started or continued and the assist process cannot be performed. Is determined, the assist process is configured to stop.

  FIG. 3 is a diagram illustrating a memory configuration example of the RAM 103. As shown in the figure, the RAM 103 is divided into three areas according to the process after the failure detection. A region B where the assist process can be continued (executed) by limiting the assist torque (steering assist torque) in this case (hereinafter also referred to as “assist limit”), and a region where the assist process cannot be continued (executed) when a failure occurs. C.

  The data to be stored in the RAM 103 is also classified into three types according to the degree of influence on the assist process when the data becomes abnormal. In the area A, low-impact data that hardly affects the assist process even if an abnormality occurs is stored. In the region B, data having an intermediate degree of influence that allows the assist process to be continued by limiting the assist torque even if an abnormality occurs is stored. In the area C, data having a high influence level in which the assist process cannot be continued when an abnormality occurs is stored. Here, the data having a high degree of influence is data that is basic when the assist process is executed, for example, data for calculating the steering assist command value of the assist map.

  Further, the region B is divided into three according to the function when the assist process is performed, and is used for executing the torque control, for example, the region B− used for calculating the current command value. 1 (first region), used to execute torque compensation control, for example, region B-2 (second region) used to calculate the compensation value, and motor current control Area B-3 (third area) used for this purpose.

  FIG. 4 is a diagram illustrating a functional configuration diagram of the MCU 100 (a functional configuration realized by the CPU 101 executing a control program). As shown in FIG. 4, the MCU 100 includes a memory failure detection / assist availability determination unit 211, a fail safe processing unit 212, a current command value limiting unit 213, a compensation value limiting unit 214, and a duty limiting unit 215. Yes.

  The memory failure detection / assist availability determination unit 211 performs failure diagnosis of the RAM 103, and when a failure of the RAM 103 is detected, the assist process can be executed based on the failure area, and can be executed by limiting the assist. It is determined which is impossible, and the limiting gains of the current command value limiting unit 213, the compensation value limiting unit 214, and the duty limiting unit 215 are set based on the determination result.

  Specifically, the memory failure detection / assist availability determination unit 211 determines that the current command value limiter 213, the compensation value limiter 214, and the duty limiter 215 when the failure address is the region A (see FIG. 3). Maintain the current limit gain.

  When the failure address is the region B, it is determined that the assist is limited, and further, it is determined whether the failure address is the region B-1, the region B-2, or the region B-3. In the case of the region B-1, the current command value limiting gain of the current command value limiting unit 213 is set to “predetermined value (where 0 ≦ predetermined value <1)”. In the region B-2, the compensation value limiting gain of the compensation value limiting unit 214 is set to “predetermined value (where 0 ≦ predetermined value <1)”. In the case of the region B-3, the duty limit gain of the duty limiter 215 is set to “predetermined value (where 0 ≦ predetermined value <1)”.

  If the failure address is in region C, it is determined that the assist process cannot be executed, the current command value limit gain of the current command value limiter 213 is set to “0”, and the compensation value limit gain of the compensation value limiter 214 is set. “0”, the duty limit gain of the duty limiter 215 is set to “0”, and an assist failure notification is output to the failsafe processor 212.

  The current command value limiter 213 multiplies the current command value Iref1 determined by the current command value calculator 504 of the torque control system module 500 by the current command value limit gain set by the memory failure detection / assist availability determination unit 211. Thus, torque control is limited.

  The compensation value limiting unit 214 multiplies the compensation value for performing the torque compensation calculated by the compensation control system module 510 by the compensation value limiting gain set by the memory failure detection / assist availability determination unit 211 to thereby compensate the torque. Limit control.

  The duty limiting unit 215 multiplies the PWM control signal calculated by the PWM control unit 550 of the motor current control system module 520 by the duty limiting gain set by the memory failure detection / assist availability determination unit 211, and performs motor current control. Limit.

  When the fail-safe processing unit 212 receives the assist failure notification from the memory failure detection / assistability determination unit 211, the fail-safe processing (stops assist processing, cuts off power to the steering assist motor 20, or resets the MCU 100, etc.) ).

  Further, as shown in FIG. 4, the MCU 100 includes a torque control system module 500 that calculates a current command value Iref1 based on the steering torque T and the vehicle speed V, a compensation control system module 510 that performs various types of torque compensation, a motor A motor current control system module 520 or the like that performs current feedback (FB) control is provided. Next, an outline of the operation will be described.

  First, the steering torque T detected by the torque sensor 10 and the vehicle speed V detected by the vehicle speed sensor 12 are input to the assist map 501, and a steering assist command value is calculated. Further, the compensation control system module 510 calculates compensation values such as convergence, inertia, and SAT, for example. The compensation value is multiplied by the compensation value limiting gain in the compensation value limiting unit 214 and then added to the steering assist command value in the adding unit 502 to determine the torque command value Tref.

  The torque command value Tref is phase-compensated by the phase compensator 503 and then input to the current command value calculator 504. The current command value calculation unit 504 determines the current command value Iref1 based on the torque command value Tref. In the brushless motor, in addition to the torque command value Tref, the rotor angle of the rotor is also input to the current command value calculation unit 504 to determine the current command value Iref1. The current command value Iref1 is multiplied by a current command value limit gain by the current command value limiter 213 to become a current command value Iref2.

  On the other hand, the motor current of the steering assist motor 20 is detected by the current detection circuit 130 as the current detection value Im, and is input to the subtraction unit 521 together with the current command value Iref2. The subtraction unit 521 calculates the deviation ΔI = Iref2−Im and inputs it to the PI (proportional integration) control unit 522. A PI (proportional integration) control unit 522 outputs a voltage control value Vref as a proportional integration output of the deviation ΔI. The current command value Iref2 is input to the auxiliary value calculation unit 531. The auxiliary value calculated by the auxiliary value calculating unit 531, for example, Dead Time, EMF (back electromotive force), and auxiliary value for field weakening control are added to the voltage control value Vref by the adding unit 535. The output of the adding unit 535 is input to the PWM control unit 550, subjected to PWM processing, and a PWM control signal for each phase of UVW is output. The PWM control signal is multiplied by the duty control gain in the duty limiting unit 215 and then output to the FET pre-driver circuit 110, and the steering assist motor 20 is driven via the FET pre-driver circuit 110 and the motor drive circuit 120. .

  FIG. 5 is a flowchart for explaining an outline of the overall operation of the MCU 100. With reference to FIG. 5, an outline of the overall operation of the MCU 100 will be described. In the figure, first, when the IG is turned on ("Yes" in step S1), the CPU 101 is initialized (step S2), and then the memory failure detection / assistability determination unit 211 executes a memory initial diagnosis process ( Step S3). In the memory initial diagnosis process, failure diagnosis of the RAM 103 described later is performed (see FIG. 6). When a failure of the RAM 103 is detected in the memory initial diagnosis process, it is determined whether the assist process can be executed, cannot be executed, or can be executed with limited assistance based on the failure area. If it is determined that the assist process cannot be performed, the assist process is not started. If it is determined that the assist process can be performed, the normal assist process is started, and the assist process can be performed with limited assist. If it is determined, assist limitation is started and assist processing is started.

  Subsequently, after the RAM 103 is initialized (step S4), an assist process is started (step S5), and a memory continuous diagnosis process is executed at a predetermined cycle during the execution of the assist process (step S6). In the memory continuous diagnosis process, the failure diagnosis of the RAM 103 is performed in the same manner as the initial memory diagnosis process (see FIG. 6). When the failure of the RAM 103 is detected and the assist process is determined to be impossible, the assist is performed. Stop processing.

  Thereafter, if the IG is not turned off (“No” in step S7), the process returns to step S5. If the IG is turned off (“Yes” in step S7), the steering assist motor 20 is stopped. Predetermined stop processing is performed (step S8), and the flow ends.

  FIG. 6 is a flowchart for explaining specific contents of the RAM diagnosis process in the memory initial diagnosis process S3 and the memory constant diagnosis process S6 of FIG. In the figure, the memory failure detection / assist availability determination unit 211 first determines whether or not an initial diagnosis is made (step S21). If it is an initial diagnosis (“Yes” in step S21), the head address of the area A of the RAM 103 is set as a diagnosis address (step S22), whereas if it is not an initial diagnosis (“No” in step S21), If the diagnosis is always performed, the head address of the area B of the RAM 103 is set as the diagnosis address (step S27).

  After setting the diagnostic address, the memory failure detection / assistability determination unit 211 performs diagnosis of the bit of the diagnostic address in the RAM 103 (step S23) and determines whether there is a failure (step S24). The determination as to whether or not there is a failure in the diagnostic address can be made by, for example, writing / reading the reference data to the diagnostic address and determining whether or not there is a failure to determine whether or not there is a failure.

  If there is no failure in the diagnostic address (“Yes” in step S24), the memory failure detection / assist availability determination unit 211 proceeds to step S25, whereas if there is a failure in the diagnostic address (“ No ”), the diagnosis address is set to the failure address of the RAM 103, and the assist propriety determination process (see FIG. 7) is executed (step S29). In this assist propriety determination process, as will be described later, it is possible to continue the assist process based on the failure area of the RAM 103, to continue the assist process by limiting the assist, or to continue the assist process. It is determined whether the assist is stopped. The memory failure detection / assist availability determination unit 211 determines whether or not the determination result of the assist availability determination process is assist continuation or assist limitation (step S30). If the assist is not continued or the assist is not limited (“No” in step S30), an assist disabling notification is output to the fail safe processing unit 212. When the fail-safe processing unit 212 receives the assistance disabling notification, the fail-safe processing unit 212 executes the fail-safe processing (step S31), and then ends the flow. On the other hand, when the determination result of the assist propriety determination process is assist continuation or assist limitation (“Yes” in step S30), the process proceeds to step S25.

  In step S25, the memory failure detection / assist availability determination unit 211 sets the next address of the RAM 103 as a diagnostic address, and determines whether or not the diagnostic address> the final address of the RAM 103 (step S26). If the diagnosis address is not the final address of the RAM 103 ("No" in step S26), the process returns to step S23 to determine whether or not there is a failure bit by diagnosing the diagnosis address (step S24). > The same processing (steps S23 to S25) is repeatedly executed until the final address of the RAM 103 is reached (“Yes” in step S26).

  FIG. 7 is a flowchart for explaining the detailed contents of the assist propriety determination process in step S29 of FIG. In the figure, first, the memory failure detection / assistability determination unit 211 determines whether or not the failure address is the area A of the RAM 103 (see FIG. 3) (step S41). When the failure address is the area A (“Yes” in step S41), the determination result = assist continuation (step S43), the current command value limiting unit 213, the compensation value limiting unit 214, and the current of the duty limiting unit 215 Current command value limiting gain, compensation value limiting gain, and duty limiting gain are maintained.

  In step S41, when the failure address is not the area A of the RAM 103 (“No” in step S41), it is determined whether or not the failure address is the area B of the RAM 103 (step S42). When the failure address is the region B of the RAM 103 (“Yes” in step S42), the limit gain setting process (see FIG. 8) is performed with the determination result = assist restriction (step S45). As a result, assist processing with limited assist is performed.

  On the other hand, when the failure address is not the region B of the RAM 103 in Step S42 (“No” in Step S42), that is, when the failure address is the region C of the RAM 103, the determination result = assist stop (Step S47). The current command value limiting unit 213 sets the current command value limiting gain to “0”, the compensation value limiting unit 214 sets the compensation value limiting gain to “0”, the duty limiting unit 215 sets the duty limiting gain to “0”, and assists. The impossibility notification is output to the fail safe processing unit 212 (step S48). As a result, the drive signal is not output to the steering assist motor 20, and the assist process is stopped.

  FIG. 8 is a flowchart for explaining the detailed contents of the limit gain setting process in step S46 of FIG. In the figure, first, the memory failure detection / assistability determination unit 211 determines whether or not the failure address is the area B-1 (see FIG. 3) of the RAM 103 (step S51). When the failure address is the area B-1 (“Yes” in step S51), the current command value limiting gain of the current command value limiting unit 213 is set to “predetermined value (where 0 ≦ predetermined value <1)”. (Step S53).

  In step S51, when the failure address is not the region B-1 (“No” in step S51), it is determined whether or not the failure address is the region B-2 (step S52). When the failure address is the area B-2 (“Yes” in step S52), the compensation value limiting gain of the compensation value limiting unit 214 is set to “predetermined value (0 ≦ predetermined value <1)” (step S54). ).

  In step S52, when the failure address is not the region B-2 (“No” in step S52), that is, when the failure address is the region B-3, the duty limit gain of the duty limiter 215 is set to “predetermined value ( 0 ≦ predetermined value <1) ”(step S55).

  As described above, according to the above embodiment, the CPU 101 that executes the assist process for controlling the steering assist motor 20, the RAM 103 that is the work area of the CPU 101, and the failure detection of the RAM 103 before or during the execution of the assist process. The RAM 103 has a region B in which the assist process can be continued by limiting the assist torque even when there is a failure, and the region B is a function of the assist process. When the memory failure detection / assistability determination unit 211 detects a failure in the area B of the RAM 103, the assist torque is limited and the assist process is executed or continued. Therefore, even if there is a failure in the area B of the RAM 103, by limiting the assist torque, Processing can be performed or continued, it is possible to perform or continue an assist process as much as possible even if there is a fault in the RAM.

  The area B of the RAM 103 includes the area B-1 used for torque control. When the memory failure detection / assist availability determination unit 211 detects a failure in the area B-1, the torque control is limited. Since the assist process is executed or continued (for example, the gain correction of the current command value), the assist process is executed or continued by restricting the torque control even when the B-1 region of the RAM 103 fails. It becomes possible.

  The area B of the RAM 103 includes the area B-2 used for torque compensation control. When the memory failure detection / assist availability determination unit 211 detects a failure in the area B-2, the torque compensation control is limited. (For example, compensation value gain correction), the assist process is executed or continued. Even when the B-2 area of the RAM 103 fails, the assist process is executed by limiting the torque compensation control. It is possible to continue.

  The area B of the RAM 103 includes the area B-3 used for motor current control. When the memory failure detection / assist availability determination unit 211 detects a failure in the area B-3, the motor current control is limited. Since the assist process is executed or continued (for example, the gain correction of the duty of the PWM control signal), the assist process is performed by limiting the motor current control even when the B-3 region of the RAM 103 fails. Can be executed or continued.

  In this way, the output value of the function that uses the failed area is limited, and the output value of the function that does not use the failed area is not limited. It is possible to execute or continue the assist process while suppressing.

  Further, the memory failure detection / assistability determination unit 211 determines that the failure detection of the area A is not performed when failure detection of the RAM 103 is performed during the execution of the assist processing (memory constant diagnosis processing). CPU load can be reduced by shortening the time required for the process.

  In the above embodiment, the RAM 103 is divided into three areas A to C. However, the number of divisions is not limited to this, and the area may be divided into two or four or more areas. Good.

  Moreover, in the said Example, area | region B is divided | segmented into three area | regions of B-1-B-3 area | region according to the function (torque control, torque compensation control, and motor current control) used by an assist process. However, the number of functions to be divided is not limited to this. For example, the function for performing auxiliary value control of the motor current may be divided. Further, the method for limiting the torque control, the torque compensation control, and the motor current control is not limited to the above embodiment.

  In the above-described embodiment, the failure detection of the RAM 103 has been described as an example. However, the present invention is not limited to this, and whether or not a register used as a work area of the CPU can be assisted by a similar method is determined. Can be determined.

  In the above embodiment, the CPU 101 executes the memory failure detection / assistability determination and the fail safe process, but may be executed by a separate device.

  The electric power steering apparatus according to the present invention, its memory failure detection method, and a computer-executable program execute or continue steering assist processing as much as possible even when a memory used by the CPU as a work area fails. Useful when you want.

It is a figure which shows the general structure of an electric power steering apparatus. It is a figure which shows the hardware constitutions of the control unit of FIG. It is a figure which shows the memory structural example of RAM. It is a figure which shows the functional block diagram (functional structure implement | achieved when CPU executes a control program) of MCU. It is a flowchart for demonstrating the outline of operation | movement of MCU. 5 is a flowchart for explaining a RAM diagnosis process in a memory initial diagnosis process and a memory constant diagnosis process. It is a flowchart for demonstrating the detail of an assist availability determination process. It is a flowchart for demonstrating the detailed content of a limiting gain setting process.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Steering handle 2 Column shaft 3 Reduction gear 4a, 4b Universal joint 5 Pinion rack mechanism 6 Tie rod 10 Torque sensor 12 Vehicle speed sensor 14 Battery 20 Steering auxiliary motor 30 Control unit 100 MCU (micro control unit)
101 CPU (control means)
102 ROM
103 RAM
104 EEPROM
105 A / D converter 106 Interface 107 Bus 110 FET pre-driver circuit 120 Motor drive circuit (inverter)
DESCRIPTION OF SYMBOLS 130 Current detection circuit 140 Position detection circuit 211 Memory failure detection / assistability determination unit 212 Fail safe processing unit 213 Current command value limiting unit 214 Compensation value limiting unit 215 Duty limiting unit 500 Torque control system module 510 Compensation control system module 520 Motor current Control system module

Claims (7)

Based on the steering assist command value calculated based on the steering torque generated in the steering system of the vehicle and the speed of the vehicle, and the current detection value of the steering assist motor that applies the steering assist force to the steering system, the steering assist In the electric power steering device for controlling the motor,
Control means for executing steering assist processing for controlling the steering assist motor;
A memory serving as a work area for the control means;
Memory failure detection means for detecting a failure of the memory before or during execution of the steering assist process;
With
The memory includes a first region that can perform the steering assist processing also failed, by limiting the steering assist torque even when there is a failure, a second region that can perform the steering assist process, the And the second region is divided into a plurality according to the function of the steering assist process,
If the memory failure detection means detects a failure in the area of the memory, the steering assist torque is limited and the steering assist process is executed or continued .
The electric power steering apparatus, wherein the memory failure detection means does not detect a failure in the first area when the failure detection of the memory is performed during the steering assist process. . The area of the memory includes a first area used in torque control;
2. The steering assist process is executed or continued by limiting the torque control when the memory failure detection unit detects a failure in the first area of the memory. Electric power steering device. The area of the memory includes a second area used for torque compensation control;
The steering assist process is executed or continued by limiting the torque compensation control when the memory failure detection means detects a failure in the second area of the memory. The electric power steering apparatus according to claim 2. The area of the memory includes a third area used for motor current control;
2. The steering assist process is executed or continued by limiting the motor current control when the memory failure detection unit detects a failure in the third area of the memory . the electric power steering apparatus according to any one of the three.   The electric power steering apparatus according to claim 1, wherein the memory is a random access memory. Based on the steering assist command value calculated based on the steering torque generated in the steering system of the vehicle and the speed of the vehicle, and the current detection value of the steering assist motor that applies the steering assist force to the steering system, the steering assist In the memory failure detection method of the electric power steering device for controlling the motor,
A step of detecting a failure of a memory serving as a work area of a control means for performing steering assist processing for controlling the steering assist motor before or during execution of the steering assist processing;
Including
The memory includes a first region that can perform the steering assist processing also failed, by limiting the steering assist torque even when there is a failure, a second region can continue the steering assist process, the And the second region is divided into a plurality according to the function of the steering assist process,
When a failure in the area of the memory is detected in the step of performing the failure detection, the steering assist torque is limited, and the steering assist process is executed or continued ,
The electric power steering characterized in that the step of performing the failure detection does not perform the failure detection of the first region when the failure of the memory is detected during the execution of the steering assist process. Device memory failure detection method. Based on the steering assist command value calculated based on the steering torque generated in the steering system of the vehicle and the speed of the vehicle, and the current detection value of the steering assist motor that applies the steering assist force to the steering system, the steering assist In the program installed in the electric power steering device that controls the motor,
A step of detecting a failure of a memory serving as a work area of a control means for performing steering assist processing for controlling the steering assist motor before or during execution of the steering assist processing;
To the computer,
The memory includes a first region that can perform the steering assist processing also failed, by limiting the steering assist torque even when there is a failure, a second region can continue the steering assist process, the And the second region is divided into a plurality according to the function of the steering assist process,
When a failure in the area of the memory is detected in the step of performing the failure detection, the steering assist torque is limited, and the steering assist process is executed or continued ,
The step of performing the failure detection is performed by a computer characterized by not performing failure detection of the first area when performing failure detection of the memory during execution of the steering assist process. Possible program.

Images