JP5154391B2 - Replacement information storage element array and replacement information reading device using the same - Google Patents

Description

  The present invention relates to a replacement information storage element array used in a replacement information reading device for a redundant circuit of a nonvolatile semiconductor memory device, and a replacement information reading device using the same.

  In the nonvolatile semiconductor memory device, as disclosed in Patent Document 1, for example, a redundant circuit for replacing a defective cell with a redundant cell is provided. In this redundant circuit, replacement information indicating which cell is to be replaced is stored in the replacement information storage element array, the replacement information read from the replacement information storage element array is compared with the selected address, The replacement operation is performed for the address including the cell.

  Therefore, the redundant circuit requires a replacement information reading device that has a replacement information storage element array and reads replacement information. FIG. 5 shows a conventional replacement information reading device in detail. This device includes a replacement information storage element array 11 including a word line WL, a bit line BL, and a replacement information storage element MC, a word line driver 12, a gate circuit 13, a sense amplifier 14, a latch circuit 15, and a control circuit. 16.

In this device, as shown in the operation waveform diagram of FIG. 6, when the power supply VCC is turned on, the word line WL is driven and the gate circuit 13 is controlled to store the replacement information stored in the replacement information storage element array 11. Is taken into the latch circuit 15 via the sense amplifier 14.
JP 11-238393 A

  However, in the conventional replacement information reading apparatus as described above, since it is necessary to latch all replacement information when the power is turned on, it may not be possible to hold sufficient replacement information due to the circuit / layout relationship. There was a problem of lowering the substitution efficiency.

  The present invention has been made in view of the above points. Since more replacement information can be held as compared with the prior art, the defect relief rate of the nonvolatile semiconductor memory device is improved and the yield is improved. It is an object of the present invention to provide a replacement information storage element array and a replacement information reading device using the same.

  The replacement information storage element array of the present invention is a replacement information storage element array used in a replacement information reading device of a redundant circuit of a nonvolatile semiconductor memory device, and includes N words corresponding to each bank of the nonvolatile semiconductor memory device A plurality of bit lines that intersect with the word lines and output replacement information; and a plurality of bit lines that are connected to the bit lines and the word lines and that are provided on the word lines and store replacement information. The memory element is arranged on a diagonal line at the intersection of the bit line and the word line by changing the bit line for each word line.

  As a more specific example, the configuration in which a plurality of memory elements are provided on each word line, and the memory elements are arranged on diagonal lines at the intersections of the bit lines and the word lines by changing the bit line for each word line, Repeated for each bit of the bit.

  A replacement information reading device according to the present invention is a replacement information reading device used in a redundancy circuit of a nonvolatile semiconductor memory device, and is disposed on one end side of the replacement information storage element array and a word line of the replacement information storage element array. A first word line driver for driving a word line; a first gate circuit and a first sense amplifier which are arranged on one end side of the bit line of the replacement information storage element array and read replacement information output to the bit line; A first control circuit that controls the first word line driver, the first gate circuit, and the first sense amplifier; and a second word line that is disposed on the other end side of the word line of the replacement information storage element array and drives the word line A driver, a second gate circuit arranged on the other end side of the bit line of the replacement information storage element array and for reading replacement information output to the bit line, and a second sense amplifier And a second control circuit for controlling the second word line driver, the second gate circuit and the second sense amplifier, the first word line driver, the first gate circuit, the first sense amplifier and the first control. The circuit is a circuit for reading replacement information during a read operation of the nonvolatile semiconductor memory device, and the second word line driver, the second gate circuit, the second sense amplifier, and the second control circuit are written in the nonvolatile semiconductor memory device. A circuit for reading replacement information at the time of erasing operation.

  The first control circuit reads replacement information by controlling the first word line driver, the first gate circuit and the first sense amplifier during a read operation of the nonvolatile semiconductor memory device, and the second control circuit is nonvolatile The replacement information is read by controlling the second word line driver, the second gate circuit, and the second sense amplifier during the write / erase operation of the semiconductor memory device. The two replacement information can be read simultaneously.

  According to the present invention as described above, it is possible to simultaneously read replacement information at the time of read operation and write / erase operation of the nonvolatile semiconductor memory device by using one replacement information storage element array. More replacement information can be held in the replacement information storage element array as compared with the above, so that the defect relief rate of the nonvolatile semiconductor memory device is improved and the yield is improved. In addition, since the replacement information is read in accordance with the read operation and the write / erase operation of the nonvolatile semiconductor memory device, a latch circuit is unnecessary and there is no restriction by the latch circuit, so that more replacement information is stored in the replacement information storage element array. Can be maintained to improve the defect relief rate and to improve the yield.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. 1 is a circuit configuration diagram showing an embodiment of a replacement information reading device of the present invention, FIG. 2 is a circuit configuration diagram showing a replacement information storage element array 21 extracted from the device, and FIG. It is a circuit block diagram which shows a 1 bit part in detail.

  In these figures, reference numeral 21 denotes a replacement information storage element array. This replacement information storage element array 21 requires N banks as the internal bank configuration of the nonvolatile semiconductor memory device, M systems as the number of systems that can be replaced in each bank, and K-bit information as replacement information for each system. As shown in FIG. 2, N word lines WL corresponding to each bank of the nonvolatile semiconductor memory device and a plurality (K × M × N) that are provided so as to cross the word lines WL and output replacement information ) Bit line BL, and a plurality of (K × M × N) storage elements MC that are connected to the bit line BL and the word line WL and are provided on each word line WL and store replacement information.

  The memory element MC is provided with a plurality of (K × M) bits on each word line WL. A storage element MC of K × M bits on each word line WL stores replacement information for all systems in one bank. The memory element MC is arranged diagonally at the intersection of the bit line BL and the word line WL by changing the bit line BL for each word line WL so that the replacement information can be distinguished and output for each word line WL (bank). The That is, as shown in FIG. 3, the storage element MC on the word line WL0 is on the intersection with the bit line BL0_0, and the storage element MC on the word line WL1 is on the intersection with the bit line BL1_0 on the word line WL2. The memory element MC is provided at each intersection with the bit line BL2_0, and so on until the memory element MC on the word line WLn. Further, since the memory element MC is provided with a plurality of bits on each word line WL as described above, the configuration in which the bit line BL is changed and arranged on the diagonal line is as shown in FIG. 1 and FIG. Is repeatedly provided. In FIG. 2, MC0 is a configuration arranged on the diagonal of the first bit, MC1 is a configuration arranged on the diagonal of the second bit, and MCm × k is a configuration arranged on the diagonal of the last bit.

  As the storage element MC, a nonvolatile semiconductor memory cell is used as shown in FIG. 3 and is arranged at all intersections of the word line WL and the bit line BL. However, the nonvolatile semiconductor used as the replacement information storage element MC is used. Except for the memory cells, the drains are disconnected from the bit lines and become non-operating cells. The nonvolatile semiconductor memory cell used as the replacement information storage element MC has a gate connected to the word line WL, a source connected to the common source line CSL, and a drain connected to the bit line BL.

  In a nonvolatile semiconductor memory device, information in a memory cell in another bank can be read while a write / erase operation is performed on a specific bank. Therefore, in order to enable the replacement information to be read simultaneously in both the write / erase operation and the read operation of the nonvolatile semiconductor memory device, the device of FIG. 1 includes a word line driver, a gate circuit, a sense amplifier, Two sets of control circuits are provided.

  The first word line driver 221, the first gate circuit 231, the first sense amplifier 241, and the first control circuit 251 are used for reading replacement information during a nonvolatile semiconductor memory device read operation, and a first driver 221 that drives a word line. Are arranged on one end side (left side in the figure) of the replacement information storage element array 21 in connection with the word line WL. Further, the first gate circuit 231 and the first sense amplifier 241 that read the replacement information output to the bit line are connected to the bit line BL on one end side (upper side in the drawing) of the replacement information storage element array 21. Arranged. The first control circuit 251 is disposed on the side of the first driver 221, the first gate circuit 231, and the first sense amplifier 241 in order to control the first driver 221, the first gate circuit 231, and the first sense amplifier 241.

  The second word line driver 222, the second gate circuit 232, the second sense amplifier 242, and the second control circuit 252 are used for reading replacement information at the time of write / erase operation of the nonvolatile semiconductor memory device, and drive the word line. The driver 222 is disposed on the other end side (right side in the drawing) of the replacement information storage element array 21 in connection with the word line WL. In addition, the second gate circuit 232 and the second sense amplifier 242 for reading the replacement information output to the bit line are connected to the bit line BL on the other end side (lower side in the drawing) of the replacement information storage element array 21. Connected and arranged. The second control circuit 252 is disposed on the side of the second driver 222, the second gate circuit 232, and the second sense amplifier 242 in order to control them.

  In the device of FIG. 1 configured as described above, when a write / erase operation is performed on a specific bank of the nonvolatile semiconductor memory device, it corresponds to the specific bank of the replacement information storage element array 21. The word line WL is driven by the second word line driver 222 under the control of the second control circuit 252, and the second gate circuit 232 and the second sense amplifier 242 are controlled by the second control circuit 252. Accordingly, the replacement information of the specific bank is output to the bit line BL by the memory element MC connected on the word line WL, and further read out via the second gate circuit 232 and the second sense amplifier 242.

  When a read operation is performed on a memory cell in another bank of the nonvolatile semiconductor memory device, the word line WL corresponding to the other bank in the replacement information storage element array 21 is controlled by the first control circuit 251. The first gate circuit 231 and the first sense amplifier 241 are further controlled by the first control circuit 251. Therefore, the replacement information of the other bank is output to the bit line BL by the memory element MC connected on the word line WL, and further read out via the first gate circuit 231 and the first sense amplifier 241.

  Here, in the replacement information storage element array 21, the replacement information can be distinguished and output for each word line WL (bank) by changing the bit line BL to which the storage element MC is connected for each word line WL (bank). Therefore, two word lines WL can be driven simultaneously, and replacement information at the time of read operation and write / erase operation of the nonvolatile semiconductor memory device can be read simultaneously. At this time, since it is prohibited by the specification to simultaneously execute the read operation from the bank during the write / erase operation, the word lines WL in the same bank are not driven simultaneously for the write / erase and the read.

  FIG. 4 is a waveform diagram relating to the above operation. When the bank 0 of the nonvolatile semiconductor memory device is selected by the read address, the word line WL0 of the replacement information storage element array 21 corresponding to the bank 0 is driven. When the replacement information on the word line WL0 is read out and the bank 1 is selected by the read address, the word line WL1 corresponding to the bank 1 is driven and the replacement information on the word line WL1 is driven. Is read out. Further, simultaneously with such an operation, when the bank n of the nonvolatile semiconductor memory device is selected by the write / erase address, the word line WLn of the replacement information storage element array 21 corresponding to the bank n is driven, and the word It is shown that replacement information on line WLn is read.

  As described above, according to the apparatus of FIG. 1, it is possible to simultaneously read replacement information at the time of read operation and write / erase operation of the nonvolatile semiconductor memory device by using one replacement information storage element array 21. As a result, more replacement information can be held in the replacement information storage element array 21 than in the prior art, so that the defect relief rate of the nonvolatile semiconductor memory device is improved and the yield is improved. In addition, since the replacement information is read in accordance with the read operation and the write / erase operation of the nonvolatile semiconductor memory device, a latch circuit is unnecessary and there is no restriction by the latch circuit, so that the replacement information storage element array 21 is further replaced. Information can be retained to improve the defect relief rate, and the yield can be improved.

  In the apparatus of FIG. 1, the read replacement information may be held in a latch circuit. However, in the apparatus of FIG. 1, since reading is performed in units of banks, it is sufficient to prepare a latch circuit having the number of replacement information for two banks. The device of FIG. 1 requires two sets of word line drivers and the like, but the increase in circuit / layout due to this is much less than that of a conventional latch circuit.

  Furthermore, in the apparatus of FIG. 1, as in the conventional case, a part of replacement information stored in the replacement information storage element array 21 is read when power is turned on and latched in the internal circuit, so that it is easy for the block redundancy system. The structure which can respond to can be taken.

The circuit block diagram which shows embodiment of the replacement information read-out apparatus of this invention. The circuit block diagram which takes out and shows the replacement | exchange information storage element array of the apparatus of FIG. The circuit block diagram which shows the 1 bit part of a replacement information storage element array in detail. The operation | movement waveform diagram of embodiment of this invention. The circuit block diagram which shows the conventional replacement information reading device concretely. The operation | movement waveform diagram of the conventional apparatus.

Explanation of symbols

21 replacement information storage element array WL word line BL bit line MC storage element 221 first word line driver 231 first gate circuit 241 first sense amplifier 251 first control circuit 222 second word line driver 232 second gate circuit 242 second Sense amplifier 252 Second control circuit

Claims (5)

A replacement information storage element array used in a replacement information reading device of a redundant circuit of a nonvolatile semiconductor storage device,
N word lines corresponding to each bank of the nonvolatile semiconductor memory device;
A plurality of bit lines provided crossing the word lines and outputting replacement information;
A plurality of storage elements connected to the bit lines and the word lines and provided on each of the word lines for storing replacement information;
The replacement information storage element array, wherein the storage element is arranged diagonally at the intersection of the bit line and the word line by changing the bit line for each word line. A plurality of memory elements are provided on each word line,
2. The replacement according to claim 1, wherein the configuration in which the bit line is changed for each word line and the storage element is arranged diagonally at the intersection of the bit line and the word line is repeated for each bit of the plurality of bits. Information storage element array. A replacement information reading device used in a redundant circuit of a nonvolatile semiconductor memory device,
The replacement information storage element array according to claim 1 or 2,
A first word line driver disposed on one end side of the word line of the replacement information storage element array and driving the word line;
A first gate circuit and a first sense amplifier which are arranged on one end side of the bit line of the replacement information storage element array and read replacement information output to the bit line;
A first control circuit for controlling the first word line driver, the first gate circuit and the first sense amplifier;
A second word line driver disposed on the other end side of the word line of the replacement information storage element array and driving the word line;
A second gate circuit and a second sense amplifier which are arranged on the other end side of the bit line of the replacement information storage element array and read replacement information output to the bit line;
A second control circuit for controlling the second word line driver, a second gate circuit, and a second sense amplifier;
The first word line driver, the first gate circuit, the first sense amplifier, and the first control circuit are circuits for reading replacement information during a nonvolatile semiconductor memory device read operation, and the second word line driver, A replacement information reading device, wherein the gate circuit, the second sense amplifier, and the second control circuit are circuits for reading replacement information during a write / erase operation of the nonvolatile semiconductor memory device. The first control circuit reads the replacement information by controlling the first word line driver, the first gate circuit, and the first sense amplifier during a read operation of the nonvolatile semiconductor memory device,
The second control circuit reads the replacement information by controlling the second word line driver, the second gate circuit, and the second sense amplifier during a write / erase operation of the nonvolatile semiconductor memory device. 4. The replacement information reading device according to 3.   5. The replacement information reading device according to claim 4, wherein the two replacement information are read simultaneously.

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