JP5139187B2 - Image compression device - Google Patents

Description

  The present invention relates to a moving image compression apparatus, and more particularly to a code insertion circuit that performs a predetermined coding insertion process in a compressed coded stream.

  A general encoding process will be described with reference to FIG. FIG. 1 is a block diagram illustrating a schematic configuration of an H.264 encoding image compression apparatus. In the block diagram of FIG. 3, only basic functions are shown for easy explanation.

In FIG. 3, the prediction processing unit 5 outputs the input video signal BS to the subtracted signal input terminal of the adder 6, predicts the amount of code generated for the input video signal, and generates the prediction code amount Is output to the encoding control unit 7 as follows.
The video signal input to the adder 6 adds the difference from the predicted image generated by passing through the discrete cosine transform (DCT) unit 8, the quantization unit 9, the inverse quantization unit 10, and the inverse DCT unit 11. An operator is operated by 6 and converted into a frequency component by the DCT converter 8. At this time, the encoding control unit 7 predicts the generated code amount based on the prediction code amount calculated by the prediction processing unit 5 and outputs the prediction code amount to the quantization unit 9 as a quantization coefficient. The quantization unit 9 controls the amount of code to be quantized based on the input quantization coefficient, quantizes the video signal input from the DCT unit 8, and controls the amount of code to quantize the data Is output to the entropy encoding unit 12.

The entropy encoding unit 12 performs variable length encoding on the input data and outputs the encoded data to the bit stream conversion unit 13. The bit stream conversion unit 13 adds control information such as a header to the input data and outputs it to the fluctuation absorbing buffer 14. Finally, the fluctuation absorbing buffer 14 accumulates and averages several frames of images and outputs them as a bit stream SQ.
The entropy encoding unit also outputs the generated code amount at the time of encoding to the encoding control unit 7, and the bit stream conversion unit 13 also outputs the generated code amount after the code insertion process to the encoding control unit 7. To do.
The encoding control unit 7 can keep the bitstream data rate constant by adaptively controlling the quantization.

Here, the operation of code insertion in the bit stream conversion unit 13 will be described with reference to FIG. FIG. 4 shows an outline of processing when the same specific code as the control code exists in the encoded stream after the control code or the like is added in the bit stream conversion unit.
H. In the H.264 encoding method, a 3-byte code from “000000h” to “000003h” corresponds to this, and when the four types of codes exist in the encoded stream other than the control code added to the stream header or the like, By inserting “03h” into the second and third bytes, it is possible to prevent the decoder from erroneously recognizing the control code.
On the decoder side, when “000003h” is detected, it is possible to return to the original encoded stream simply by performing a process of removing “03h”.
The image compression device is described in, for example, Patent Documents 1 to 3.

JP 2006-121531 A JP 2004-180238 A JP 09-247466 A

In an encoded stream in which “00h” continues as shown in FIG. 4, “03h” is inserted at a rate of 1 byte per 2 bytes, and a code of 1.5 times is generated instantaneously.
In the entropy encoding unit 12, the processing amount varies depending on the quantized code, so the processing delay amount is likely to vary, and the generated code amount also varies greatly. In the case of a general encoder (encoding unit), the encoding processing delay amount from the input of the video signal to the output of the bit stream is about several frames, and the fluctuation of the processing delay amount and the fluctuation of the generated code amount are absorbed during this period. It can be absorbed by the buffer 14.
However, in applications where remote control of the camera is performed using the video signal after being compressed and transmitted, the delay time from the input of the video signal to the output video after being compressed and expanded is required to be less than one frame. Is done.

In order to perform rate control without breaking the processing, if the allocation of the encoder and the decoder is the same, the encoding delay from the video input to the bit stream output must be performed in less than half of one field (15 ms). Become.
Thus, in order to perform encoding processing with low delay, it is also important to reduce processing delay fluctuations in the entropy encoding unit 12 and the bit stream conversion unit 13 as much as possible.
However, if the generated code amount is flattened in a unit time that is a fraction of one screen, for example, if the generated code amount is flattened over a period of several frames, it is normal. To do. For this purpose, after predicting the generated code amount with high accuracy, the encoded control unit can generate the generated code amount from the entropy encoding unit 12 and the bit stream conversion unit 13 in a short time of about several μ to several tens μ μs. It is necessary to perform correction by feeding back to 7.
If the input video has HDTV image quality, the amount of data that must be corrected is approximately 1.5 Gbps at the input. The amount of data is finally compressed to a fraction to a hundred. However, in the compression process, the output of the entropy encoder 12 is several Gbps, and the bitstream converter 13 further A band of 1.5 times that is instantaneously required for calculation, which is a heavy burden on the device configuration.

  It is an object of the present invention to provide a code insertion circuit for a moving picture compression apparatus that can improve the above-described problems and can perform compression coding with low delay.

  In order to achieve the above object, an image compression apparatus according to the present invention is an image compression apparatus that performs moving image compression, and includes a coding control unit, a bit stream conversion unit, and a compression input from the bit stream conversion unit. The same data sequence as the control code is detected from the encoded stream, the code amount to be inserted is calculated, the calculated code amount is output to the encoding control unit, and the compressed encoded stream is started. A start code detection unit that detects a code and outputs a start code detection flag together with the encoded stream; and the encoded stream and start code detection flag input from the start code detection unit are delayed by a predetermined time or a predetermined code amount. And the variable absorption buffer that is output in the encoded stream that is input from the variable absorption buffer. A code insertion unit is provided that performs a predetermined code insertion process when the same data series as the control code is generated based on the start code detection flag input from the motion absorption buffer.

  According to the present invention, in the processing of the code insertion unit, it is possible to perform rate control at high speed by first performing only the computation after the code insertion processing from the presence or absence of the same code as the control code. Therefore, it is possible to perform code insertion processing on the encoded stream flattened by the fluctuation absorbing buffer. For this reason, image data processing can be performed without having a band of 1.5 times generated in the code insertion processing, and compression encoding can be performed with low delay.

  Details of the invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of a first embodiment of the code insertion circuit of the present invention. FIG. 1 shows a bit stream conversion unit 13 and a fluctuation absorption buffer unit 14 of the moving picture compression apparatus having the configuration shown in FIG. 3, in which the bit stream conversion unit 13 is replaced with the bit stream conversion unit 1 and In place of the unit 3a, a start code detection unit 2a is added between the output side of the bit stream conversion unit 1 and the input side of the fluctuation absorption buffer unit 3a, and the output side of the fluctuation absorption buffer unit 3a A code insertion unit 4a is added. In FIG. 1, constituent elements in the previous stage from the bit stream conversion unit 13 in FIG. 3 are omitted.

  The first embodiment of FIG. 1 is an image compression apparatus that performs a predetermined code insertion process when the same data sequence as a control code is generated in a compressed encoded stream in an image compression apparatus that performs moving image compression. A start code detection unit that detects the same data sequence as the control code from the encoded stream input from the bit stream conversion unit, calculates the amount of code to be inserted, and outputs the code amount to the encoding control unit; A code for generating a code amount generated within a predetermined time or a variable absorption buffer for accumulating a generated code of a predetermined code amount, and the output data of the variable absorption buffer are input, and a specific code is inserted into data other than the control code The image compression apparatus includes a code insertion unit that performs processing, and can perform code insertion processing without increasing the instantaneous band regardless of whether or not the code is inserted.

That is, in FIG. 1, the bit stream conversion unit 1 outputs the generated encoded stream S1 and the mask signal M1 synchronized with the encoded stream S1 indicating the position of the control code to the start code detection unit 2a. The start code detection unit 2a detects the same code as the control code other than the control code from the input encoded stream S1, calculates the generated code amount, and outputs it to the encoding control unit 7. Further, the start code detection unit 2a outputs the encoded stream S2 and the start code (start code) detection flag F1 synchronized with the encoded stream S2 to the fluctuation absorbing buffer unit 3a.
The fluctuation absorbing buffer unit 3a to which the encoded stream S2 and the start code detection flag F1 are input is delayed by a predetermined delay time or a predetermined code amount, and the delayed encoded stream S3 and the start code detection flag F2 are inserted. To the unit 4a.
The code insertion unit 4a to which the encoded stream S3 and the start code detection flag F2 are input inserts a code into the encoded stream S3 in accordance with the start code detection flag F2, and outputs it as a bit stream S0.

In the code insertion process in the code insertion circuit according to the first embodiment described above, the start code detection unit 2a calculates only the generated code amount in advance, and the generated code amount obtained as a result of the calculation is sent to the encoding control unit 7. give feedback. Thus, the encoding control unit 7 performs rate control, and outputs an encoded stream flattened in the fluctuation absorbing buffer unit.
As described above, according to the first embodiment of FIG. 1, since the code insertion process is performed after the fluctuation is absorbed, it is necessary to secure a large band in the conventional process, but it is possible to prevent an increase in the band. It becomes possible.

The second embodiment is another embodiment according to FIG. The second embodiment is a code insertion circuit that performs a predetermined code insertion process when the same data sequence as a control code is generated in a compressed encoded stream in an image compression apparatus that performs moving image compression. The bit stream conversion unit receives the encoded stream and a mask signal synchronized with the encoded stream indicating the position of the control code in the encoded stream. Based on the input mask signal, the control code of the encoded stream is input. The encoded stream to be extracted is extracted, the same code as the control code is detected from the encoded stream excluding the control code of the extracted encoded stream , the code amount to be inserted is calculated, and the encoding control unit A start code detection unit that outputs an encoded stream and a start code detection flag to a fluctuation absorbing buffer in synchronization with the output The encoded stream and the start code detection flag detected in synchronization with the encoded stream are respectively input, the code amount for a predetermined time or the predetermined code amount is stored, and the stored encoded stream and encoded stream are stored. A fluctuation absorbing buffer that outputs a start code detection flag synchronized with the code insertion unit to the code insertion unit, and a code insertion unit that performs a specific code insertion process on the input encoded stream and outputs it as an encoded stream. It is an image compression apparatus capable of performing code insertion processing without increasing the instantaneous band regardless of presence or absence.

  In other words, in the second embodiment, in FIG. 1, the start code detection unit 2b, to which the encoded stream S1 and the mask signal M1 are input, determines whether or not a code is inserted in synchronization with the encoded stream S1. Is output to the fluctuation absorbing buffer 3b. The fluctuation absorbing buffer 3b delays the input encoded stream S2 and the start code detection flag F1 simultaneously, and outputs the encoded stream S3 and the start code detection flag F2 synchronized with the encoded stream S3 to the code insertion unit 4b. . The subsequent code insertion unit 4b inserts a code into the encoded stream S3 according to the start code detection flag F2, and outputs the encoded stream S0. As a result, the timing adjustment is small and the amount of memory increase can be reduced to 1 bit per byte of the encoded stream. At the time of code insertion, it is only necessary to temporarily stop reading from the fluctuation absorbing buffer, and there is no need to perform special processing at the code insertion unit.

  FIG. 2 is a block diagram showing the configuration of the third embodiment of the code insertion circuit of the present invention. 2, the start code detector 2a is replaced with a start code detector 2b, and the fluctuation absorbing buffer 3a is replaced with a fluctuation absorbing buffer 3b with respect to the code insertion circuit of FIG. In place of the code insertion unit 4b, the code insertion unit 4a is replaced with the code insertion unit 4b, and the encoded stream S1 is not transmitted from the bit stream conversion unit 1 to the start code detection unit 2b but from the bit stream conversion unit 1 to the fluctuation absorption buffer unit 3b. And a mask signal M1 are output.

  The third embodiment of FIG. 2 is a code insertion circuit that performs a predetermined code insertion process when the same data sequence as a control code is generated in a compressed encoded stream in an image compression apparatus that performs moving image compression. The bit stream conversion unit indicates the encoded stream and the position of the control code in the encoded stream, the mask signal synchronized with the encoded stream is input, and the control code from the encoded stream excluding the control code is input. The start code detection unit that detects the same code and calculates only the amount of code to be inserted and outputs the calculated code amount to the encoding control unit, and the encoded stream and the encoded stream in the encoded stream from the bit stream conversion unit Indicates the position of the control code, receives a mask signal synchronized with the encoded stream, accumulates a predetermined time or a predetermined amount of code, and stores it The detection buffer and the detection of the control code are specified again. The fluctuation absorbing buffer that outputs the encoded stream and the mask signal synchronized with the encoded stream to the code insertion unit and the mask signal synchronized with the encoded stream are input. And a code insertion circuit that can perform the code insertion process without increasing the instantaneous band regardless of whether or not the code is inserted.

That is, in the third embodiment, in FIG. 2, the bit stream conversion unit 1 uses the generated encoded stream S1 and the mask signal M1 indicating the position of the control code to the start code detection unit 2b and the fluctuation absorption buffer unit 3b. Output to. The start code detector 2 b detects the same code as the control code other than the control code from the input encoded stream S 1, calculates the generated code amount, and outputs it to the encoding controller 7.
The fluctuation absorbing buffer unit 3b to which the encoded stream S1 and the mask signal M1 are input is delayed by a predetermined delay time or a predetermined code amount, and the delayed encoded stream S4 and the mask signal M2 are output to the code insertion unit 4b. To do.
The code insertion unit 4b to which the encoded stream S4 and the mask signal M2 are input inserts a code into the encoded stream S4 based on the mask signal M2, and outputs it as a bit stream S0 ′.

In the third embodiment shown in FIG. 2, the same processing can be performed by delaying the mask signal for masking the control code by the fluctuation absorbing buffer and detecting and inserting the control code again by the code insertion unit.
The mask signal does not need to be delayed at the same time by the fluctuation absorbing buffer, and only the start address of the fluctuation absorbing buffer storing the encoded stream that needs to be masked and the data length that requires the mask are output to the code insertion unit, If the code insertion process is stopped based on the head address and the data length to be masked when reading from the fluctuation absorbing buffer, only the processing of the code inserting section is possible without increasing the fluctuation absorbing buffer.

  In the above embodiment, the format for compressing moving images is H.264. H.264 encoding method. However, an MPEG4 encoding method or the like may be used.

The block diagram which shows the structure of one Example of the code | symbol insertion circuit of this invention. The block diagram which shows the structure of one Example of the code | symbol insertion circuit of this invention. H. 1 is a block diagram showing a schematic configuration of an H.264 encoding image compression apparatus. The figure for demonstrating operation | movement of a code | symbol insertion circuit.

Explanation of symbols

  1: bit stream conversion unit, 2a, 2b: start code detection unit, 3a, 3b: fluctuation absorption buffer unit, 4a, 4b: code insertion unit, 5: prediction processing unit, 6: adder, 7: coding control unit 8: DCT conversion unit, 9: quantization unit, 10: inverse quantization unit, 11: inverse DCT conversion unit, 12: entropy encoding unit, 13: bit stream conversion unit, 14: fluctuation absorption buffer unit.

Claims (2)

In an image compression apparatus that performs moving image compression,
A stream conversion unit that outputs an encoded stream obtained by adding a header including a control code to entropy-encoded data, and a mask signal indicating the position of the added control code;
Before SL based on the mask signal, from the input encoded stream from the stream conversion unit, to detect the same data sequence as the control code other than the control code the additional, in the middle of of identity Ji data series A start code detector that calculates and outputs a code amount of a predetermined code to be inserted;
A fluctuation absorbing buffer before accumulating Kifu Goka stream, and outputs the flat amount of generated code,
The coded stream inputted from said fluctuation absorbing buffer, based on the result of detection of said mask signal or the start code detection unit which is synchronized with the coded stream, the plant constant in the middle of a the same data series There line insertion process of sign-a sign insertion unit that outputs as a bit stream,
An encoding control unit that receives an input of a code generation amount at the time of encoding the entropy-encoded data and a code amount calculated by the start code detection unit, and performs control to make the data rate of the bitstream constant When,
An image compression apparatus comprising: The image compression apparatus according to claim 1, wherein the image compression apparatus is an H.264 standard. 264 encoding scheme delay time of less than half of one frame time by at are those encoded outputs the bit stream, the control code is a 3-byte code to "000000h" from "000003h", In the image compression apparatus, the code insertion process inserts “03h” as the predetermined code between the second and third bytes of the control code.

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