JP5132443B2 - Photoelectric conversion device, and photo IC and electronic device including the photoelectric conversion device - Google Patents

Description

  The present invention relates to a photoelectric conversion device. Further, the present invention relates to a photo IC including the photoelectric conversion device and an electronic device.

  Many photoelectric conversion devices used for detecting electromagnetic waves are known. For example, devices that have sensitivity from ultraviolet rays to infrared rays are collectively called optical sensors. Among them, those having sensitivity in the visible light region with a wavelength of 400 nm to 700 nm are particularly called visible light sensors, and are used in many devices that require illuminance adjustment and on / off control according to the human living environment. ing.

  Some display devices detect brightness around the display device and adjust the display brightness. This is because by detecting the brightness of the surroundings with an optical sensor and obtaining appropriate display luminance, visibility can be improved and wasteful power of the display device can be reduced. For example, a display device including a light sensor for adjusting luminance includes a mobile phone and a computer with a display unit. Further, not only the brightness around the display unit but also the brightness of a backlight of a display device, particularly a liquid crystal display device, is detected by an optical sensor to adjust the brightness of the display screen.

An optical sensor, which is a photoelectric conversion device, uses a photoelectric conversion element such as a photodiode as a light sensing portion, and can detect illuminance based on the amount of current flowing through the photoelectric conversion element. Patent Document 1 discloses a charge accumulation type photosensor that changes by discharging a charge accumulated in a capacitor (capacitance element) by a constant current circuit (constant current source) by a current flowing from a photodiode according to an incident light amount. A configuration is described in which a potential is detected by a comparator, and a time required to change the potential detected by the comparator is output as a digital signal by a counter circuit and a latch circuit.
JP-A-6-313840

In the photoelectric conversion device of Patent Document 1, when the current flowing from the photodiode is small according to the amount of incident light, the charge cannot be accumulated in the capacitive element so that the amount of incident light can be detected. There is a problem that detection becomes difficult.

Further, with the progress of display device technology, the luminance of a backlight is improved in a liquid crystal display device, and the luminance of an EL element is improved in a display device including an electroluminescence element (EL element). Although improvement in luminance is important for achieving high image quality, an increase in power consumption becomes a problem. For the problem of increased power consumption, it is effective to reduce the luminance of the display device in a dark place such as a room to such an extent that visibility is not reduced. For this reason, a photoelectric conversion device that detects the brightness around the display device is required to detect with increased resolution, particularly in a low illuminance region.

The resolution means the measurement resolution in the unit illuminance section.

An object of the present invention is to provide a photoelectric conversion device that can accumulate charge in a capacitor element and detect illuminance even when the amount of incident light is small. Another object of the present invention is to provide a photoelectric conversion device with improved illuminance resolution in a low illuminance region.

According to one aspect of the present invention, a photoelectric conversion element, an amplifier circuit that amplifies the photoelectric current of the photoelectric conversion element, a reset potential is supplied through a first switch, and the amplifier circuit is amplified through a second switch. A first capacitor that is charged or discharged according to current, a comparator that compares the potential of one electrode of the first capacitor with a reference potential, and a pulse that outputs a pulse according to the output of the comparator An output circuit, a second capacitive element, a constant current circuit electrically connected to one electrode of the second capacitive element and supplying a constant current to the second capacitive element, and one of the second capacitive elements A third switch that is electrically connected to the first electrode and that controls conduction or non-conduction between one terminal and the other in accordance with a pulse, and discharges the charge accumulated in the second capacitor element A fourth switch; It is a conversion apparatus.

Note that in the photoelectric conversion device of the present invention, the pulse output circuit may be a monostable multivibrator circuit.

Note that in the photoelectric conversion device of the present invention, the amplifier circuit may be formed of a current mirror circuit.

Note that in the photoelectric conversion device of the present invention, the transistor included in the current mirror circuit may be a thin film transistor.

Note that in the photoelectric conversion device of the present invention, the photoelectric conversion device may be provided over a light-transmitting substrate.

With the photoelectric conversion device of the present invention, it is possible to provide a photoelectric conversion device that can accumulate charges in a capacitor element and detect illuminance even when the amount of incident light is small. In addition, the photoelectric conversion device of the present invention can provide a photoelectric conversion device with improved illuminance resolution in a low illuminance region.

Embodiments of the present invention will be described below with reference to the drawings. However, the present invention can be implemented in many different modes, and those skilled in the art can easily understand that the modes and details can be variously changed without departing from the spirit and scope of the present invention. Is done. Therefore, the present invention is not construed as being limited to the description of this embodiment mode. Note that in all the drawings for describing the embodiments, the same portions or portions having similar functions are denoted by the same reference numerals, and repetitive description thereof is omitted.

(Embodiment 1)
In this embodiment, a structure and operation of a photoelectric conversion device of the present invention will be described.

First, a circuit diagram of the photoelectric conversion device of the present invention will be described. A photoelectric conversion device 100 illustrated in FIG. 1 includes a photoelectric conversion element 101, an amplifier circuit 102, a first switch 103, a second switch 104, a first capacitor 105, a comparator 106 (also referred to as a comparison circuit), and a pulse output circuit. 107, a second capacitor element 108, a third switch 109, a constant current circuit 110, and a fourth switch 111. In the photoelectric conversion element 101, a high power supply potential (Vdd) is supplied to one terminal (cathode side), and the other terminal (anode side) is electrically connected to the input side of the amplifier circuit 102. The amplifier circuit 102 is a circuit for amplifying the output current of the photoelectric conversion element 101. The amplifier circuit 102 is supplied with a low power supply potential (Vss). One terminal of the first switch 103 is supplied with a reset potential (also referred to as a first potential, a charging potential, or Vset), and the second terminal is one electrode of the first capacitor 105, the second potential The switch 104 is electrically connected to one terminal of the switch 104 and the inverting input terminal of the comparator 106. A low power supply potential is supplied to the other electrode of the first capacitor 105. A second terminal of the second switch 104 is electrically connected to the amplifier circuit 102. A reference potential (also referred to as a second potential, a reference potential, or Vref) is supplied to the non-inverting input terminal of the comparator 106. The output terminal of the comparator 106 is electrically connected to the input terminal of the pulse output circuit 107. The output terminal of the pulse output circuit 107 is electrically connected to the control terminal of the third switch 109. One electrode of the second capacitor 108 has an output terminal of a constant current circuit electrically connected to a high power supply potential, one terminal of the third switch 109, and one terminal of the fourth switch 111. Electrically connected. The other electrode of the second capacitor 108 is electrically connected to the low power supply potential and the other terminal of the fourth switch 111. From the other terminal of the third switch, the potential of one electrode of the second capacitor is output as an external output signal (hereinafter also referred to as an output signal, Vout).

Note that the terms “first”, “second”, “third” to “N” (N is a natural number) used in this specification are given to avoid confusion of components and are not limited numerically. I will add that.

  Note that in this specification, A and B are connected to each other, including A and B being directly connected, as well as those being electrically connected. Here, A and B are electrically connected when A and B have an object having some electrical action, and A and B are substantially identical through the object. It shall represent the case of becoming a node.

Specifically, A and B are connected via a switching element such as a transistor, and when A and B are approximately at the same potential due to conduction of the switching element, or A and B are connected via a resistance element. When B is connected and the circuit operation is considered, such as when the potential difference generated at both ends of the resistance element is such that it does not affect the operation of the circuit including A and B, A and B are the same. This represents a case where it can be regarded as a node.

  Note that in this specification, the switch is not limited to a specific one as long as it can control conduction or non-conduction between one terminal and the other terminal. Examples of the switch include an electrical switch and a mechanical switch. As an example, an analog switch or the like may be configured using a thin film transistor.

Note that a PIN photodiode may be used as the photoelectric conversion element 101. Further, as the photoelectric conversion element 101, a PN photodiode may be used instead of the PIN photodiode.

Note that the amplifier circuit described in this embodiment refers to a circuit in which an output current from a photoelectric conversion element is amplified N times (N is a positive number). Depending on the path through which the current amplified by the amplifier circuit flows, the capacitor is charged or discharged. As an example, the amplifier circuit 102 includes a current mirror circuit as illustrated in FIG. 2A, and includes a first n-channel transistor 201 and a second n-channel transistor 202. A first terminal of the first n-channel transistor 201 is electrically connected to the anode of the photoelectric conversion element 101. The gate terminals of the first n-channel transistor 201 and the second n-channel transistor 202 are electrically connected to each other, and the first terminal of the first n-channel transistor 201 is the first n-channel transistor. 201 and the gate terminal of the second n-channel transistor 202 are electrically connected. A low power supply potential (Vss) is supplied to the second terminals of the first n-channel transistor 201 and the second n-channel transistor 202.

Note that a plurality of second n-channel transistors 202 in the amplifier circuit 102 may be electrically arranged in parallel as illustrated in FIG. As shown in FIG. 2B, by providing a plurality of second n-channel transistors 202-1 to 202-n (n is a natural number of 2 or more), the photoelectric conversion element 101 is irradiated with light. The current flowing between the source and drain of one n-channel transistor 201 can be multiplied by n and passed on the second n-channel transistors 202-1 to 202-n side. Therefore, even when the amount of incident light applied to the photoelectric conversion element 101 is small, a sufficient current can flow through the second n-channel transistors 202-1 to 202-n. A sufficient current can also be passed by increasing the channel width of the second n-channel transistor 201 or decreasing the channel length.

  Note that a transistor such as an n-channel transistor or a p-channel transistor is an element having at least three terminals including a gate, a drain, and a source, and has a channel region between the drain region and the source region. Current can flow through the drain region, the channel region, and the source region. Here, since the source and the drain vary depending on the structure and operating conditions of the transistor, it may be difficult to limit which is the source or the drain. Therefore, in this embodiment, the regions functioning as the source and the drain are referred to as a first terminal and a second terminal, respectively. A terminal functioning as a gate is expressed as a gate terminal.

Note that various types of transistors can be used as a transistor such as an n-channel transistor or a p-channel transistor. For example, a thin film transistor (TFT) including a non-single-crystal semiconductor film typified by amorphous silicon, polycrystalline silicon, microcrystalline (also referred to as semi-amorphous) silicon, or the like can be used. In the case of using a TFT, since it can be manufactured by a relatively low temperature process, the manufacturing apparatus can be enlarged and manufactured on a large substrate. Therefore, a large number can be obtained in one manufacturing process, and manufacturing can be performed at low cost. Further, a substrate with low heat resistance can be used because it is manufactured by a relatively low temperature process. Therefore, a transistor can be manufactured over a light-transmitting substrate (e.g., a glass substrate having an insulating surface), and the transistor over a light-transmitting substrate can be used for a device using light transmission.

Note that some signals may be input in common for controlling the conduction or non-conduction of the first switch 103, the second switch 104, the third switch 109, and the fourth switch 111. You may control by inputting a signal for every switch.

Note that the first capacitor 105 is charged by the reset potential Vset when the first switch 103 is turned on, and then the second switch 104 is turned on and is discharged according to the current flowing through the amplifier circuit 102. Is. Therefore, in consideration of the time when the charge of the second n-channel transistor of the amplifier circuit 102 is discharged, it is desirable that the capacitance of the first capacitor 105 has a capacity capable of charging the charge. . The reset potential Vset is preferably set to a value lower than the high power supply potential Vdd and higher than the low power supply potential Vss. Note that when the reset potential Vset is set to the high power supply potential Vdd, the high power supply potential Vdd is preferably a fixed potential.

The reference potential Vref supplied to the non-inverting input terminal of the comparator 106 is charged with the reset potential Vset when the first switch 103 is turned on, and then the first potential when the amplifier circuit 102 is discharged. This is a potential for outputting the output signal Vout from the output terminal by being compared with the potential of one electrode of the capacitor 105. The reference potential Vref is preferably set to a value smaller than the reset potential Vset and larger than the low potential power supply Vss. The signal output from the comparator 106 is an H level signal or an L level signal.

Note that the pulse output circuit 107 is a circuit for outputting a rectangular wave pulse having a certain width according to the timing at which the signal output from the comparator 106 changes from the H signal to the L signal or from the L signal to the H signal. is there. The pulse output from the pulse output circuit 107 controls conduction or non-conduction between the first terminal and the second terminal of the third switch 109. The pulse output circuit 107 may be configured using a monostable multivibrator circuit (also referred to as a one-shot multivibrator circuit).

Note that the second capacitor element 108 resets the rise in potential due to the charged electric charge when the fourth switch 111 is turned on, and then charges the electric charge by the constant current circuit 110. Therefore, in consideration of the time required for charging by the constant current circuit 110, it is desirable that the capacitance of the second capacitor element 108 has a capacity capable of charging electric charge.

Next, a configuration of a block diagram in which a circuit for converting an analog signal into a digital signal in addition to the photoelectric conversion device described in FIG. 2 is described with reference to FIG. A digital output type photo IC 300 shown in FIG. 3 includes an analog / digital conversion circuit 301 (hereinafter referred to as an AD conversion circuit), an address memory 302, and an I2C (Inter Integrated circuit) interface circuit in addition to the photoelectric conversion device 100 shown in FIG. 303. The I2C interface circuit 303 includes a serial data line (SDA) for data communication with other devices and a serial clock line (SCL) for controlling and synchronizing data communication with other devices. Are electrically connected to an external device through an I2C bus. The I2C bus composed of SDA and SCL is a bus standard for performing control from the microcomputer 311 by a unique address assigned to an address memory provided in each device. When the other device is a liquid crystal display device, for example, an address memory 321, an I2C interface circuit 322, a display driver 312 having a logic unit 323, an address memory 331, an I2C interface circuit 332, and an LED having a logic unit 333 The driver 313 is electrically connected to the I2C bus. In the case where the other device is a display device including an EL element, an LED driver for controlling the LED as a backlight is not necessarily required.

Note that the A / D conversion circuit 301 is a circuit that quantizes the potential value Vout, which is a continuous amount, and converts it into a digital signal. As an example of the A / D conversion circuit 301, a parallel comparison type A / D conversion circuit, a pipeline type A / D conversion circuit, a successive approximation type A / D conversion circuit, a delta-sigma type A / D conversion circuit, a double There is an integration type A / D conversion circuit, which may be arbitrarily selected. The digital signal converted by the A / D conversion circuit 301 is sent to another external device such as the LED driver 313 via the I2C interface circuit 303. The LED driver 313 generates and outputs a signal for controlling the LED, which is a backlight of the display device, according to the digital signal relating to the illuminance obtained by the photo IC 300.

Although not shown, the photo IC 300 includes a clock generation circuit, a regulator circuit, a frequency divider circuit, and the like. The clock generation circuit is a circuit for generating a clock signal for operating each circuit of the photo IC. The regulator circuit is a circuit for generating a potential such as a power supply voltage for operating each circuit of the photo IC. The frequency dividing circuit is a circuit for frequency-dividing the clock signal in order to output a signal for supplying a signal of a predetermined timing to each circuit of the photo IC.

FIG. 4 shows another structure of the digital output photo IC 300 shown in FIG. A photo IC 400 illustrated in FIG. 4 includes an AD conversion circuit 301, an address memory 302, an I2C interface circuit 303, and an LED driver 401 in addition to the photoelectric conversion device 100. The I2C interface circuit 303 is electrically connected to the display driver 312 via an I2C bus composed of SDA and SCL. The configuration shown in FIG. 4 is different from FIG. 3 in that an LED driver 401 having a logic unit 333 inside the photo IC 400 is used. Since the LED driver 401 is provided in the photo IC 400, the digital signal generated by the A / D conversion circuit 301 can be directly received by the LED driver 313 and output from the I2C interface circuit 303. Since commonality can be achieved, miniaturization and high added value can be achieved.

3 and 4, the interface of each circuit is shown as an example of a configuration using an I2C interface that is one of digital serial interfaces. In addition to the I2C bus, bus standards such as a universal serial bus (Universal Serial Bus) and a serial peripheral interface (Serial Peripheral Interface) can be used.

Next, specific operation of the digital output photoelectric conversion device 100 illustrated in FIG. 1 is described with reference to FIGS. 5, 6, 7 </ b> A, and 7 </ b> B. 5 includes a first switch 103 (denoted as SW1 in FIG. 5), a second switch 104 (denoted as SW2 in FIG. 5), a third switch 109 (denoted as SW3 in FIG. 5), and a fourth switch. When the switch 111 (denoted as SW4 in FIG. 5) is turned on or off, the potential Vcap1 of one electrode of the first capacitor 105, the potential CPout of the output signal of the comparator 106, and the output signal of the pulse output circuit 107 9 is a timing chart of the potential Pout of the second capacitor element 108 and the potential Vcap2 of the second capacitor element 108. Incidentally, Vcap1, CPout, Pout, for a third switch, the magnitude of the photocurrent _{I L} when the light is irradiated to the photoelectric conversion element 101 large (hereinafter, Large: L abbreviated), medium (hereinafter , Middle: abbreviated as M) and small (hereinafter abbreviated as “Small: S”). In FIG. 6, the first capacitor 103 and the second capacitor 108 are accumulated when the first switch 103 is turned on, the second switch 104 is turned off, and the fourth switch 111 is turned on. FIG. 6 is a diagram for explaining electric charges (denoted as period A in FIG. 5). FIG. 7A illustrates the first capacitor 105 and the second capacitor 108 when the first switch 103 is off, the second switch 104 is on, and the fourth switch 111 is off. FIG. 6 is a diagram for explaining accumulated charge and a path of a flowing current (denoted as period B in FIG. 5). FIG. 7B illustrates the first capacitor 105 when the first switch 103 is off, the second switch 104 is on, the third switch 109 is on, and the fourth switch 111 is off. FIG. 6 is a diagram for describing a path of electric charges and current accumulated in the second capacitor element 108 (denoted as a period C in FIG. 5).

In FIG. 5, for the sake of explanation, it is assumed that each switch is turned on by an H level signal and turned off by an L level signal. Further, it is assumed that the pulse output circuit 107 outputs a rectangular wave pulse having a certain width when the input signal is switched from the L level to the H level.

First, a description will be given in the period A shown in FIG. 6 in which the first switch 103 is on, the second switch 104 is off, and the fourth switch 111 is on. In period A, the potential of one electrode of the capacitor 105 Vcap1 (hereinafter, Vcap1 abbreviated) is to be a reset potential Vset regardless of the magnitude of the photocurrent _{I L.} In period A, the potential CPout the output signal of the comparator 106 (hereinafter, CPout hereinafter) regardless of the magnitude of the photocurrent _{I L,} since the reset potential Vset exceeds the reference potential Vref, L level signal is output Is. In period A, the potential Pout of the output signal of the pulse output circuit 107 (hereinafter, abbreviated Pout), regardless of the magnitude of the photocurrent _{I L,} since there is no change in CPout, L-level signal is output Is. In period A, the third switch 109 (hereinafter, SW3 hereinafter) on or off, regardless of the magnitude of the photocurrent _{I L,} because Pout is at the L level, is turned off. In the period A, the potential Vcap2 (hereinafter abbreviated as Vcap2) of one electrode of the second capacitor 108 becomes the low power supply potential Vss because the fourth switch 111 is on.

Next, description is made in the period B shown in FIG. 7A in which the first switch 103 is off, the second switch 104 is on, and the fourth switch 111 is off. In the period B, Vcap1, depending on the magnitude of the photocurrent _{I L,} decreases from the reset potential Vset. The degree of reduction of the Vcap1 is higher photocurrent _{I L} is large increases, decreases also becomes gentle smaller light current _{I L.} Note that in FIG. 7A, the magnitude of the current flowing from the first capacitor 105 is described as the magnitude obtained by multiplying the photocurrent _IL by n as described in FIG. ing. In period B, CPout because Vcap1 in accordance with the magnitude of the photocurrent _{I L} does not fall below reference potential Vref of which decreases, so that the L-level signal is output. In period B, Pout, since CPout in accordance with the magnitude of the photocurrent I _L is not switched from L level to H level, becomes an L-level signal is output. In period B, SW3 on or off, regardless of the magnitude of the photocurrent I _L, since Pout is at the L level, is turned off. In the period B, since the fourth switch 111 is turned off, the Vcap2 increases in proportion to the time according to the current i _cons from the constant current circuit, following the period B.

Next, description is made in a period C shown in FIG. 7B in which the first switch 103 is off, the second switch 104 is on, and the fourth switch 111 is off. In the period C, Vcap1, depending on the magnitude of the photocurrent _{I L,} gradually decreases from the reset potential Vset, the reference potential Vref. The degree of reduction of the Vcap1 is larger as the photocurrent _{I L} is large, even large speed reduction until Vcap1 becomes equal to or less than the reference voltage Vref. Also. The degree of reduction of the Vcap1 is decreased Vcap1 smaller light current _{I L} also becomes gentle. In the period C, CPout is, Vcap1 according to the size of the optical current _{I L} by less than a reference voltage Vref, so that the switch to H level signal. In the period C, Pout, depending on the magnitude of the photocurrent I _L, for switching from the L level to the H level to CPout, so that the output pulse of a rectangular wave having a constant width. In the period C, SW3 on or off, since in accordance with the magnitude of the photocurrent I _L, H level pulse of a rectangular wave having a predetermined width is outputted from Pout, turned on. In the period C, Vcap2 rises in proportion to time according to the current i _cons from the constant current circuit because the fourth switch 111 is turned off, and Vout is obtained by turning on SW3. Will be output. The voltage value of Vcap2 when the photocurrent _{I L} is approximately "L" decreases _(V S), a moderate voltage value Vcap2 when the photocurrent _{I L} is approximately "M" _{(V M} ), the voltage value of Vcap2 when the photocurrent _{I L} is approximately "S" is increased _(V S).

As described above, in the configuration of the present embodiment, even when the photocurrent _IL is small, the photocurrent can be amplified by the amplifier circuit 102, so that the illuminance in the low illuminance region can be detected.

Moreover, decline of Vcap1 which changes according to the light current I _L, since it has a relationship is relatively linear with the intensity and the photocurrent I _L, the smaller the light current I _L, it becomes gentle. Therefore, with respect to CPout, Pout, and Vcap2 that change according to Vcap1, the interval of values corresponding to the illuminance of light irradiated to the photoelectric conversion element can be increased, and the magnitude of light in the low illuminance region is detected. Can improve the resolution.

Note that the low illuminance region refers to a region of 0.1 lux to 6400 lux.

In period B, and not in the photoelectric conversion element 101 is light irradiated light current I _L can not be detected, Vcap1 because no current n × I _L, hardly reduced. Therefore, Vcap2 that rises with time is saturated. In this case, it is preferable that Vcap2 that saturates be the lower limit of detection of illuminance.

Next, the advantages of the configuration of the present invention will be described using mathematical formulas. As described above, the voltage at which Vcap1 inverts the comparator 106 is Vref. The electrostatic capacitance of the first capacitor 105 and _{C 1.} The multiplied amplification factor of the photocurrent _{I L} in the amplifier circuit 102 and n, the Vcap1 turns on the second switch is a time until the reference potential Vref from the reset potential Vset and t, Equation C ₁ × Vref = I _L × n × t (1)

Further, Vcap2 rises due to the constant current i _cons from the constant current circuit 110 after the fourth switch is turned off. As time t elapses, the third switch 109 is turned on and output as Vout, which has a relationship with the formula C ₂ × Vcap2 = i _cons × t (2).

Solving for Equations (1) and (2), there is a relationship of Equation Vcap2 = (C ₁ / C ₂ ) × (i _cons × Vref / n) × (1 / I _L ) (3). From Equation (3), Vcap2 as the Vout is inversely proportional to the photocurrent _{I L} is obtained. That is, when the illuminance is on the horizontal axis and Vcap2 is on the vertical axis, the voltage value of Vcap2 decreases as the illuminance increases.

Further, in FIG. 5, although the magnitude of the illuminance shown in the cited the magnitude of the photocurrent _{I L,} magnitude of the photocurrent _{I L} corresponds to the voltage value of _{Vcap2 V L, V M, V} S . FIG. 8 is a graph showing the relationship when the horizontal axis represents illuminance and the vertical axis represents the voltage value of Vcap2. As shown in FIG. 8, the voltage value of Vcap2 decreases to the right as the illuminance increases.

If the illuminance is too large, the output voltage will be saturated if the illuminance is too large in the graph with the output voltage also increasing as the illuminance increases. Further, when trying to increase the resolution of the low illuminance area in the graph rising to the right, it is necessary to provide a corresponding output voltage interval in the low illuminance area, so that the dynamic range of the illuminance cannot be widened. On the other hand, in the configuration shown in the present embodiment having a right-downward graph relationship, the output voltage is saturated at low illuminance, so that the dynamic range can be widened even if the resolution in the low illuminance region is increased. it can. Therefore, in the structure shown in this embodiment mode, it is possible to output an output voltage with high accuracy and high accuracy, particularly in a low illuminance region, and a wide dynamic range.

As described above, in the configuration of the photoelectric conversion device of this embodiment, even when the amount of incident light is small, charge can be accumulated in the capacitor element and illuminance can be detected. In addition, with the photoelectric conversion device of this embodiment, the resolution of illuminance in a low illuminance region can be improved.

Note that the contents described in each drawing in this embodiment can be freely combined with or replaced with the contents described in any of the other embodiments as appropriate.

(Embodiment 2)
In this embodiment mode, a method for manufacturing a photoelectric conversion device of the present invention will be described in detail with reference to FIGS. Note that in this embodiment, a thin film transistor (TFT) that is an element included in each circuit of the photoelectric conversion device, and a vertical junction type PIN photodiode (hereinafter also referred to as a photodiode) that is a photoelectric conversion element are provided. An example of a photoelectric conversion device is shown. Note that the photoelectric conversion device of the present invention may use a memory element, a resistor, a diode, a capacitor, an inductor, and the like in addition to the TFT and the PIN photodiode. The photoelectric conversion device of the present invention may use a vertical junction type PN photodiode instead of the vertical junction type PIN photodiode.

First, a photodiode and a thin film transistor are formed over a light-transmitting substrate 1401. Here, as the substrate 1401, for example, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a quartz substrate, or the like can be used. When a thin film transistor is used as a transistor formed over the substrate, a photodiode and a thin film transistor can be manufactured over the substrate in the same process, so that there is an advantage that mass production of the photoelectric conversion device is easy.

Next, a silicon oxynitride film (film thickness: 100 nm) to be a base insulating film 1402 is formed by plasma CVD, and a semiconductor film such as an amorphous silicon film (film thickness: 54 nm) containing hydrogen is stacked without exposure to the air. Form. The base insulating film 1402 may be stacked using a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a silicon nitride oxide film. For example, as the base insulating film 1402, a film in which a silicon nitride oxide film is stacked with a thickness of 50 nm and a silicon oxynitride film with a thickness of 100 nm may be formed. Note that the silicon nitride oxide film or the silicon nitride film functions as a blocking layer for preventing diffusion of impurities such as alkali metal from the glass substrate. Note that it is not always necessary to provide a substrate 1401 such as a quartz substrate which does not cause any problem of impurity diffusion.

Note that the silicon oxynitride film is a film having a higher oxygen content than nitrogen as a composition, and is Rutherford Backscattering Spectroscopy (RBS) and Hydrogen Forward Scattering (HFS). As a concentration range, oxygen is included in the range of 50 to 70 atomic%, nitrogen is 0.5 to 15 atomic%, silicon is 25 to 35 atomic%, and hydrogen is 0.1 to 10 atomic%. Refers to a membrane. A silicon nitride oxide film is a film having a nitrogen content higher than that of oxygen as a composition. When measured using RBS and HFS, the concentration range of oxygen is 5 to 30 atomic%, nitrogen. Is a film containing 20 to 55 atomic%, silicon is 25 to 35 atomic%, and hydrogen is 10 to 25 atomic%. However, when the total number of atoms constituting silicon oxynitride or silicon nitride oxide is 100 atomic%, the content ratio of nitrogen, oxygen, silicon, and hydrogen is included in the above range.

Next, the amorphous silicon film is crystallized by a known technique (solid phase growth method, laser crystallization method, crystallization method using a catalytic metal, etc.), and a semiconductor film having a crystal structure (crystalline semiconductor film) For example, a polycrystalline silicon film is formed. Here, a polycrystalline silicon film is obtained by a crystallization method using a catalytic element. A nickel acetate solution containing 10 ppm nickel by weight is added with a spinner. Instead of adding the solution, a method of spraying nickel element over the entire surface by sputtering may be used. Next, heat treatment is performed for crystallization to form a semiconductor film having a crystal structure (here, a polycrystalline silicon film). Here, after heat treatment (500 ° C., 1 hour), heat treatment for crystallization (550 ° C., 4 hours) is performed to obtain a polycrystalline silicon film.

Next, the oxide film on the surface of the polycrystalline silicon film is removed with dilute hydrofluoric acid or the like. After that, irradiation with laser light (XeCl: wavelength 308 nm) for increasing the crystallization rate and repairing defects left in the crystal grains is performed in the air or an oxygen atmosphere.

As the laser light, excimer laser light having a wavelength of 400 nm or less, or the second harmonic or the third harmonic of a YAG laser is used. Here, a pulsed laser beam having a repetition frequency of about 10 to 1000 Hz is used, the laser beam is condensed to 100 to 500 mJ / cm ² by an optical system, and irradiated with an overlap rate of 90 to 95%. May be scanned. In this embodiment, laser light irradiation is performed in the atmosphere at a repetition frequency of 30 Hz and an energy density of 470 mJ / cm ² .

Note that an oxide film is formed on the surface by irradiation with a laser beam because it is performed in the air or in an oxygen atmosphere. Although an example using a pulse laser is shown in this embodiment, a continuous wave laser may be used. In order to obtain a crystal with a large grain size when crystallizing a semiconductor film, continuous oscillation is possible. It is preferable to apply a second to fourth harmonic of the fundamental wave using a solid-state laser. Typically, a second harmonic (532 nm) or a third harmonic (355 nm) of an Nd: YVO ₄ laser (fundamental wave 1064 nm) may be applied.

In the case of using a continuous wave laser, laser light emitted from a continuous wave YVO ₄ laser having an output of 10 W is converted into a harmonic by a non-linear optical element. There is also a method of emitting harmonics by putting a YVO ₄ crystal and a nonlinear optical element in a resonator. Then, it is preferably formed into a rectangular or elliptical laser beam on the irradiation surface by an optical system, and irradiated to the object to be processed. At this time, the energy density of approximately 0.01 to 100 MW / cm ² (preferably 0.1 to 10 MW / cm ²⁾ is required. Then, irradiation may be performed by moving the semiconductor film relative to the laser light at a speed of about 10 to 2000 cm / s.

Next, in addition to the oxide film formed by the laser light irradiation, the surface is treated with ozone water for 120 seconds to form a barrier layer made of an oxide film having a total thickness of 1 to 5 nm. This barrier layer is formed to remove a catalyst element added for crystallization, for example, nickel (Ni) from the film. Here, the barrier layer is formed using ozone water, but the surface of the semiconductor film having a crystal structure is oxidized by a method of oxidizing the surface of the semiconductor film having a crystal structure by irradiation with ultraviolet light in an oxygen atmosphere or the oxygen plasma treatment. The barrier layer may be formed by depositing an oxide film of about 1 to 10 nm by a method, plasma CVD method, sputtering method or vapor deposition method. Further, the oxide film formed by laser light irradiation may be removed before forming the barrier layer.

Next, an amorphous silicon film containing an argon element serving as a gettering site is formed with a thickness of 10 to 400 nm, here 100 nm, over the barrier layer by a sputtering method. Here, the amorphous silicon film containing an argon element is formed using a silicon target in an atmosphere containing argon. In the case where an amorphous silicon film containing an argon element is formed using a plasma CVD method, the film formation conditions are as follows: the flow ratio of monosilane to argon (SiH ₄ : Ar) is 1:99, and the film formation pressure is 6.665 Pa. The RF power density is 0.087 W / cm ² and the film formation temperature is 350 ° C.

Thereafter, the catalyst element is removed (gettering) by performing a heat treatment for 3 minutes in a furnace heated to 650 ° C. As a result, the concentration of the catalytic element in the semiconductor film having a crystal structure is reduced. A lamp annealing apparatus may be used instead of the furnace.

Next, the amorphous silicon film containing an argon element which is a gettering site is selectively removed using the barrier layer as an etching stopper, and then the barrier layer is selectively removed with dilute hydrofluoric acid. Note that during gettering, nickel tends to move to a region with a high oxygen concentration, and thus it is desirable to remove the barrier layer made of an oxide film after gettering.

Note that in the case where the semiconductor film is not crystallized using a catalytic element, the above-described barrier layer formation, gettering site formation, heat treatment for gettering, gettering site removal, barrier layer removal, etc. This step is unnecessary.

Next, after forming a thin oxide film with ozone water on the surface of the obtained semiconductor film having a crystalline structure (for example, a crystalline silicon film), a mask made of resist is formed using a first photomask, and a desired film is formed. A semiconductor film (in this specification, referred to as “island semiconductor region 1403”) that is separated into island shapes is formed by etching treatment into a shape (see FIG. 9A). After the island-shaped semiconductor region is formed, the resist mask is removed.

Next, if necessary, a small amount of impurity element (boron or phosphorus) is doped in order to control the threshold value of the TFT. Here, an ion doping method in which diborane (B ₂ H ₆ ) is plasma-excited without mass separation is used.

Next, the oxide film is removed with an etchant containing hydrofluoric acid, and at the same time, the surface of the island-shaped semiconductor region 1403 is washed, and then an insulating film containing silicon as a main component to be the gate insulating film 1404 is formed. Here, a silicon oxide film containing nitrogen (composition ratio: Si = 32%, O = 59%, N = 7%, H = 2%) with a thickness of 115 nm is formed by a plasma CVD method.

Next, after a metal film is formed over the gate insulating film 1404, a gate electrode 1408, wirings 1405 and 1406, and a terminal electrode 1407 are formed using a second photomask (see FIG. 9B). As this metal film, for example, a film in which tantalum nitride and tungsten (W) are stacked by 30 nm and 370 nm, respectively, is used.

Further, as the gate electrode 1408, the wiring 1405, the wiring 1406, and the terminal electrode 1407, titanium (Ti), tungsten (W), tantalum (Ta), molybdenum (Mo), neodymium (Nd), cobalt (Co) ), Zirconium (Zr), zinc (Zn), ruthenium (Ru), rhodium (Rh), palladium (Pd), osmium (Os), iridium (Ir), platinum (Pt), aluminum (Al), gold (Au) ), Silver (Ag), copper (Cu), or a single layer film made of an alloy material or a compound material containing the element as a main component, or a nitride thereof, for example, titanium nitride, tungsten nitride A single layer film made of tantalum nitride or molybdenum nitride can be used.

Next, an impurity imparting one conductivity type is introduced into the island-shaped semiconductor region 1403 to form a source region or a drain region 1409 of the TFT 1500 (see FIG. 9C). In this embodiment mode, as an example, an n-channel TFT is formed; therefore, n-type impurities such as phosphorus (P) and arsenic (As) are introduced into the island-shaped semiconductor region 1403. When forming a p-channel TFT, a p-type impurity is introduced into the island-shaped semiconductor region 1403.

Next, after forming a first interlayer insulating film (not shown) including a silicon oxide film by CVD with a thickness of 50 nm, a step of activating the impurity element added to each island-like semiconductor region is performed. This activation process is performed by a rapid thermal annealing method (RTA method) using a lamp light source, a method of irradiating a YAG laser or an excimer laser from the back surface, a heat treatment using a furnace, or a combination thereof. By different methods.

Next, a second interlayer insulating film 1410 including a silicon nitride film containing hydrogen and oxygen is formed with a thickness of 10 nm, for example.

Next, a third interlayer insulating film 1411 made of an insulating material is formed over the second interlayer insulating film 1410 (see FIG. 9D). As the third interlayer insulating film 1411, an insulating film obtained by a CVD method can be used. In this embodiment mode, a silicon oxide film containing nitrogen formed with a thickness of 900 nm is formed as the third interlayer insulating film 1411 in order to improve adhesion.

Next, heat treatment (300 to 550 ° C. for 1 to 12 hours, for example, in a nitrogen atmosphere at 410 ° C. for 1 hour) is performed to hydrogenate the island-shaped semiconductor film. This step is performed in order to terminate dangling bonds of the island-shaped semiconductor film by hydrogen contained in the second interlayer insulating film 1410. The island-shaped semiconductor film can be hydrogenated regardless of the presence of the gate insulating film 1404.

In addition, as the third interlayer insulating film 1411, an insulating film using siloxane and a stacked structure thereof can be used. Siloxane has a skeleton structure with a bond of silicon (Si) and oxygen (O). As a substituent, a compound containing at least hydrogen (for example, an alkyl group or aromatic hydrocarbon) is used. Fluorine may be used as a substituent. Alternatively, as a substituent, a compound containing at least hydrogen and fluorine may be used.

In the case where an insulating film using siloxane and a stacked structure thereof are used as the third interlayer insulating film 1411, a heat treatment for hydrogenating the island-shaped semiconductor film is performed after the second interlayer insulating film 1410 is formed. Next, a third interlayer insulating film 1411 can be formed.

Next, a resist mask is formed using a third photomask, and the first interlayer insulating film, the second interlayer insulating film 1410 and the third interlayer insulating film 1411 or the gate insulating film 1404 are selectively etched. A contact hole is formed. Then, the resist mask is removed.

Note that the third interlayer insulating film 1411 may be formed as necessary. When the third interlayer insulating film 1411 is not formed, the first interlayer insulating film 1411 is formed after the second interlayer insulating film 1410 is formed. The second interlayer insulating film 1410 and the gate insulating film 1404 are selectively etched to form contact holes.

Next, after a metal laminated film is formed by a sputtering method, a resist mask is formed using a fourth photomask, and the metal film is selectively etched to form a wiring 1412, a connection electrode 1413, and a terminal electrode 1414. A source electrode or drain electrode 1415 of the TFT 1500 is formed. Then, the resist mask is removed. Note that the metal film in this embodiment is formed by stacking three layers of a Ti film with a thickness of 100 nm, an Al film containing a trace amount of Si with a thickness of 350 nm, and a Ti film with a thickness of 100 nm.

In the case where the wiring 1412, the connection electrode 1413, the terminal electrode 1414, and the source or drain electrode 1415 of the TFT 1500 are formed using a single-layer conductive film, a titanium film (Ti film) is preferable in terms of heat resistance and conductivity. . Further, in place of the titanium film, tungsten (W), tantalum (Ta), molybdenum (Mo), neodymium (Nd), cobalt (Co), zirconium (Zr), zinc (Zn), ruthenium (Ru), rhodium (Rh) ), Palladium (Pd), osmium (Os), iridium (Ir), platinum (Pt), or a single layer film made of an alloy material or a compound material containing the element as a main component, or these A single layer film made of a nitride such as titanium nitride, tungsten nitride, tantalum nitride, or molybdenum nitride can be used. By forming the wiring 1412, the connection electrode 1413, the terminal electrode 1414, and the source or drain electrode 1415 of the TFT 1500 as a single layer film, the number of film formations can be reduced in the manufacturing process.

Through the above steps, a top-gate TFT 1500 using a polycrystalline silicon film can be manufactured.

Next, after forming a conductive metal film (such as titanium (Ti) or molybdenum (Mo)) that hardly reacts with a photoelectric conversion element (typically amorphous silicon) to be formed later, A mask made of resist is formed using the photomask, and a conductive metal film is selectively etched to form a protective electrode 1416, a protective electrode 1417, a protective electrode 1418, and a protective electrode 1419 that cover the wiring 1412 ( FIG. 10 (A)). Here, a 200-nm-thick Ti film obtained by sputtering is used. Similarly, the connection electrode 1413, the terminal electrode 1414, and the source or drain electrode 1415 of the TFT 1500 are also covered with a conductive metal film. Therefore, the conductive metal film also covers the side surface of the electrode where the second Al film is exposed, and the conductive metal film can prevent diffusion of aluminum atoms into the photoelectric conversion element.

However, in the case where the wiring 1412, the connection electrode 1413, the terminal electrode 1414, and the source or drain electrode 1415 of the TFT 1500 are formed using a single-layer conductive film, the protective electrode 1416, the protective electrode 1417, the protective electrode 1418, and the protective electrode 1419 May not be formed.

Next, a photoelectric conversion element 1420 including a p-type semiconductor layer 1420p, an i-type semiconductor layer 1420i, and an n-type semiconductor layer 1420n is formed over the third interlayer insulating film 1411.

The p-type semiconductor layer 1420p may be formed by forming a semi-amorphous silicon film containing an impurity element belonging to Group 13 of the periodic table, for example, boron (B) by a plasma CVD method.

Further, the wiring 1412 and the protective electrode 1416 are in contact with the lowermost layer of the photoelectric conversion element 1420, in this embodiment, the p-type semiconductor layer 1420p.

After the p-type semiconductor layer 1420p is formed, an i-type semiconductor layer 1420i and an n-type semiconductor layer 1420n are further formed in order. Thus, the photoelectric conversion element 1420 including the p-type semiconductor layer 1420p, the i-type semiconductor layer 1420i, and the n-type semiconductor layer 1420n is formed.

As the i-type semiconductor layer 1420i, a semi-amorphous silicon film may be formed by a plasma CVD method, for example. Further, as the n-type semiconductor layer 1420n, a semi-amorphous silicon film containing an impurity element belonging to Group 15 of the periodic table, for example, phosphorus (P) may be formed. These impurity elements may be introduced.

Further, as the p-type semiconductor layer 1420p, the i-type semiconductor layer 1420i, and the n-type semiconductor layer 1420n, not only a semi-amorphous semiconductor film but also an amorphous semiconductor film may be used.

Next, a sealing layer 1421 made of an insulating material (for example, an inorganic insulating film containing silicon) is formed to a thickness of 1 μm to 30 μm over the entire surface to obtain the state shown in FIG. Here, a silicon oxide film containing nitrogen having a thickness of 1 μm is formed as the insulating material film by a CVD method. Adhesion is improved by using an insulating film formed by CVD.

Next, after the sealing layer 1421 is etched to provide an opening, a terminal electrode 1422 and a terminal electrode 1423 are formed by a sputtering method. The terminal electrodes 1422 and 1423 are stacked films of a titanium film (Ti film) (100 nm), a nickel film (Ni film) (300 nm), and a gold film (Au film) (50 nm). The fixing strength of the terminal electrode 1422 and the terminal electrode 1423 obtained in this way exceeds 5N, and has sufficient fixing strength as a terminal electrode.

Through the above steps, the terminal electrode 1422 and the terminal electrode 1423 that can be soldered are formed, and the structure shown in FIG. 10C is obtained.

Note that the photoelectric conversion device obtained in the above process can be mass-produced by cutting a plurality of photoelectric conversion devices individually from the substrate. A large amount of photoelectric conversion devices (for example, 2 mm × 1.5 mm) can be manufactured from one large-area substrate (for example, 600 cm × 720 cm).

Note that the method for manufacturing the island-shaped semiconductor region 1403 described in this embodiment is not limited to the above manufacturing method, and other manufacturing methods can also be used. As an example, the island-shaped semiconductor region 1403 may be formed using an SOI (silicon-on-insulator) substrate. A known SOI substrate may be used as the SOI substrate, and a manufacturing method and structure thereof are not particularly limited. Typical examples of the SOI substrate include a SIMOX substrate and a bonded substrate. Further, examples of the bonded substrate include ELTRAN (registered trademark), UNIBOND (registered trademark), smart cut (registered trademark), and the like.

A SIMOX substrate is formed by implanting oxygen ions into a single crystal silicon substrate and heat-treating at 1300 ° C. or higher to form a buried oxide film (BOX), thereby forming a thin film silicon layer on the surface and forming an SOI structure. Can be obtained. The thin film silicon layer is insulated from the single crystal silicon substrate by the buried oxide film layer. Further, a technique called ITOX (Internal Thermal Oxidation-SIMOX), which is further thermally oxidized after forming the buried oxide film layer, can be used.

The bonded substrate is not a surface in which two single crystal silicon substrates (a first single crystal silicon substrate and a second single crystal silicon substrate) are bonded via an oxide film layer and one single crystal silicon substrate is bonded. An SOI substrate in which a thin film silicon layer is formed on the surface by thinning from one side. The oxide film layer can be formed by thermally oxidizing one substrate (here, the first single crystal silicon substrate). In addition, the two single crystal silicon substrates can be directly bonded without an adhesive.

Note that the bonded substrate is not limited to bonding two single crystal substrates, and an SOI substrate may be manufactured by bonding a substrate having an insulating surface such as a glass substrate and a single crystal substrate.

Note that the contents described in each drawing in this embodiment can be freely combined with or replaced with the contents described in any of the other embodiments as appropriate.

(Embodiment 3)
The photoelectric conversion device of the present invention accumulates electric charges in a capacitive element even when the amount of incident light is small, enables detection of light intensity, and increases the number of elements such as a constant current source or a switch. It has the feature that it can be operated without causing it. Therefore, an electronic device including the photoelectric conversion device of the present invention suppresses an increase in production cost of the electronic device and adds light to the component, and detects light in a dark place. be able to. The photoelectric conversion device of the present invention includes a display device, a notebook personal computer, and an image playback device including a recording medium (typically a display capable of playing back a recording medium such as a DVD: Digital Versatile Disc and displaying the image. Device). In addition, as an electronic device that can use the photoelectric conversion device of the present invention, a mobile phone, a portable game machine or an electronic book, a video camera, a digital still camera, a goggle-type display (head-mounted display), a navigation system, and sound reproduction Devices (car audio, audio components, etc.). Specific examples of these electronic devices are shown in FIGS.

FIG. 11A illustrates a display device, which includes a housing 5001, a display portion 5002, a sensor portion 5003, and the like. The photoelectric conversion device of the present invention can be used for the sensor portion 5003. The sensor unit 5003 detects the intensity of external light. The display device can control the luminance of the display portion 5002 in accordance with the detected intensity of external light. By controlling the luminance of the display portion 5002 in accordance with the intensity of external light, power consumption of the display device can be suppressed. The display device includes all information display devices for personal computers, TV broadcast reception, advertisement display, and the like.

FIG. 11B illustrates a mobile phone, which includes a main body 5101, a display portion 5102, a sound input portion 5103, a sound output portion 5104, operation keys 5105, a sensor portion 5106, and the like. The sensor unit 5106 detects the intensity of external light. The mobile phone can control the luminance of the display portion 5102 or the operation key 5105 in accordance with the detected intensity of external light. By controlling the luminance of the display portion 5102 or the operation key 5105 in accordance with the intensity of external light, power consumption of the mobile phone can be suppressed.

Note that the contents described in each drawing in this embodiment can be freely combined with or replaced with the contents described in any of the other embodiments as appropriate.

FIG. 3 is a circuit diagram for illustrating Embodiment 1; FIG. 3 is a circuit diagram for illustrating Embodiment 1; FIG. 3 is a block diagram for illustrating Embodiment 1; FIG. 3 is a block diagram for illustrating Embodiment 1; FIG. 3 is a timing chart for illustrating Embodiment 1; FIG. 3 is a circuit diagram for illustrating Embodiment 1; FIG. 3 is a circuit diagram for illustrating Embodiment 1; FIG. 4 is a diagram for illustrating Embodiment 1; FIG. 6 is a diagram for illustrating Embodiment 2; FIG. 6 is a diagram for illustrating Embodiment 2; FIG. 5 is a diagram for illustrating Embodiment 3;

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Photoelectric conversion apparatus 101 Photoelectric conversion element 102 Amplifying circuit 103 1st switch 104 2nd switch 105 Capacitance element 106 Comparator 107 Pulse output circuit 108 2nd capacitance element 109 3rd switch 110 Constant current circuit 111 4th switch 201 n-channel transistor 202 n-channel transistor 300 Photo IC
301 A / D conversion circuit 302 Address memory 303 I2C interface circuit 311 Microcomputer 312 Display driver 313 LED driver 321 Address memory 322 I2C interface circuit 323 Logic unit 331 Address memory 332 I2C interface circuit 333 Logic unit 400 Photo IC
401 LED driver 1401 Substrate 1402 Underlying insulating film 1403 Insular semiconductor region 1404 Gate insulating film 1405 Wiring 1406 Wiring 1407 Terminal electrode 1408 Gate electrode 1409 Drain region 1410 Interlayer insulating film 1411 Interlayer insulating film 1412 Wiring 1413 Connection electrode 1414 Terminal electrode 1415 Drain electrode 1416 Protective electrode 1417 Protective electrode 1418 Protective electrode 1419 Protective electrode 1420 Photoelectric conversion element 1421 Sealing layer 1422 Terminal electrode 1423 Terminal electrode 1500 TFT
5001 Housing 5002 Display unit 5003 Sensor unit 5101 Main body 5102 Display unit 5103 Audio input unit 5104 Audio output unit 5105 Operation key 5106 Sensor unit 1420i i-type semiconductor layer 1420n n-type semiconductor layer 1420p p-type semiconductor layer

Claims (6)

A photoelectric conversion element;
An amplifier circuit for amplifying the photoelectric current of the photoelectric conversion element;
A first switch;
A second switch;
Said first reset potential via the switch is supplied, the second of the first capacitor charged or discharged in accordance with the current amplified by the amplifier circuit through the switch is made,
A comparator for comparing the potential of one electrode of the first capacitive element with a reference potential;
A pulse output circuit that outputs a pulse in accordance with the output of the comparator;
A second capacitive element;
A constant current circuit electrically connected to one electrode of the second capacitor element and supplying a constant current to the second capacitor element;
A third switch that is electrically connected to one electrode of the second capacitive element and that controls conduction or non-conduction between one terminal and the other terminal in accordance with the pulse;
And a fourth switch for discharging the charge accumulated in the second capacitor element. In claim 1,
The photoelectric conversion device, wherein the pulse output circuit is a monostable multivibrator circuit. In claim 1 or claim 2,
The amplifier circuit includes a current mirror circuit having an n-channel first thin film transistor and an n-channel second thin film transistor . In any one of Claims 1 thru | or 3 ,
The photoelectric conversion device is provided over a light-transmitting substrate. Has an AD conversion circuit that the output signal output from the photoelectric conversion device according to any one of claims 1 to 4 into a digital signal, and a I2C interface circuit for outputting the digital signal to an external device A photo IC characterized by that . An electronic apparatus characterized by comprising a photoelectric conversion device according to any one of claims 1 to 4.

Images