JP5080318B2 - Image processing apparatus and access control method - Google Patents

Description

  The present invention relates to an image processing apparatus such as a copying machine, a printer, a facsimile, or a multifunction machine in which these functions are combined, having means for controlling operations necessary for image processing by operating a computer according to a control program. More specifically, the present invention relates to an image processing apparatus that can download an update control program from a network and that can be downloaded without going through a main control unit, an update control program to be downloaded, and an access control method for controlling access to an execution control program. .

In recent years, an image processing apparatus such as a copying machine, a printer, a facsimile machine, or a multifunction machine in which these functions are combined has a large number of functions and the progress of multi-functionality has been remarkable.
As the number of functions increases, the number of CPUs to be controlled increases, the number of program files corresponding to the plurality of CPUs increases, and the capacity of the storage device for storing these files also increases. Yes.
For this reason, it is frequently necessary to upgrade the program version by correcting a problem (bug) of the program or adding a new function. As a method of performing a program upgrade for an image processing apparatus in an operating state, it is possible to cope with a method of replacing the device built-in ROM storing the program with a program storing the upgraded program. This method requires a lot of man-hours and time.

In order to avoid this problem, the following method is employed. It transfers a program file for addressing function additions and problems to the image processing device via a communication line such as a LAN (local area network) connected to the outside, and the receiving image processing device has a CPU. In this method, the program file transferred to the memory on each unit is written and the program is downloaded.
However, in the method of downloading the program file transferred via the network, there are cases where the program is rewritten or the rewritten program is validated while the image processing apparatus is operating, for example, printing operation, etc. In such cases, the image processing being executed must be interrupted. In such a case, there is a problem that the program cannot be rewritten easily. .
In addition, since a load required for software download processing is applied to the CPU, it is desired that the load applied to the CPU and the load required for inter-CPU communication are not increased as much as possible to minimize the influence on the normal service. .

The following Patent Documents 1 and 2 can be exemplified as prior arts proposed for solving such problems and problems.
The image processing apparatus described in Patent Document 1 has the system configuration shown in FIG. 11, and includes a flash ROM 511 and a RAM 512 storing programs to be executed under the control of the CPU 510, and the image processing apparatus is executing some operation. Also, it is shown that the upgrade program is downloaded from the host computer 519 to the predetermined area of the RAM 512 via the communication I / F 520, and then the downloaded program is written to the flash ROM 511.

The multi-CPU system described in Patent Document 2 has the system configuration shown in FIG. 12, and is a system including a master CPU 610 and a plurality of slave CPUs 611 and 612. This system has a memory composed of two surfaces: a working surface memory that the slave CPUs 611 and 612 directly access to execute services, and a spare surface memory that the master CPU 610 directly accesses to update firmware. The master CPU 610 indicates that the slave CPUs 611 and 612 do not interfere with accessing the active memory for service execution, and the program is downloaded by connecting the connecting memory directly to the spare memory. Has been.
An object of each of the above patent documents is to provide a system capable of performing firmware update processing for a CPU with high efficiency while minimizing the influence on normal service.
JP 2003-330655 A JP-A-10-260845

  However, in the system configuration of Patent Document 1, a RAM 512 that downloads an upgrade program is connected to the same bus to which the CPU 510 is connected. Therefore, when the SDRAM 513 is accessed in order for the CPU 510 to perform a predetermined operation during downloading, a bus contention occurs. In such a case, since bus arbitration (bus priority) is normally performed, the access time of the RAM 512 and the SDRAM 513 is delayed. As a result, when the copy operation is executed, the original processing speed cannot be achieved, and in the worst case, a malfunction may occur. In addition, the contents of the flash ROM 511 are reloaded into the SDRAM 513 (program memory) by the reboot process. However, there is a case where it is not desired to increase the capacity of the SDRAM 513, etc. In some cases, DATA or the like necessary for program processing is accessed. In such a case, the contents of the RAM 512 downloaded to the flash ROM cannot be written.

Further, although the system configuration of Patent Document 2 can solve the above-described problem of Patent Document 1, a multi-CPU configuration is adopted and the configuration is complicated, and the master CPU 610 is a master CPU 610. However, it does not clarify how to directly connect to the spare side memory and download the program without interfering with accessing the working side memory for service execution.
The present invention has been made in view of the above-described problems of the prior art in an image processing apparatus having means for controlling operations necessary for image processing by operating a computer in accordance with a control program. When downloading the control program, the update control program can be downloaded without affecting the image processing operation even during the execution of the control program, and the update control program can be executed in a short time. It is to be able to be realized by a simple configuration.

The present invention relates to an image processing apparatus having means for controlling operations necessary for image processing by operating a computer according to a control program, the main control means for controlling image processing operations according to the control program, and an external input Read control means for reading the update control program, first storage means connectable to the main control means and the read control means, respectively, connectable to the main control means and the read control means, respectively A connection between the second storage means and the main control means is switched from one of the first storage means and the second storage means to the other, and a connection between the read control means is the first memory. And a second switching connection means for switching from one of the second storage means to the other, and the read control means is configured to be connected to the first storage means and the second storage means. The first switching connection means is controlled to connect the one storing the control program to be executed to the main control means, and at the same time, the one not storing the control program is connected to the reading control means. 2 having a means for switching control of the switching connection means, and an update control program inputted from outside is connected to the one of the first storage means and the second storage means connected by the second switching connection means. It is characterized by performing direct reading control.
The present invention provides a main control means for controlling an image processing operation to be executed in accordance with a control program, each control means of a read control means for reading an update control program inputted from the outside, and a first accessible by each of the control means. An access control method for controlling the connection between the storage means and the second storage means from one storage means to the other storage means and accessing the connected storage means from each control means, wherein the reading means control means of said first storage means and the second storing means, the direction which the control program to be executed is stored and at the same time switching control to connect to the main control unit, who said control program is not stored was the switching control to connect to the read control means, and an update control program that is input from the external, the said first memory means a second storage means Of, characterized in that a direct read uncontrolled in the storage means towards said control program is not stored.

The read control means can download the update program input from the outside to the direct storage means regardless of the operation of the CPU of the main control means, and the processing by the control program being executed by the main control means Therefore, the process is not interrupted by downloading the update program, and there is no problem that may occur due to the interruption. Further, the main control means does not have to have a function conventionally required for downloading the update program from the network, so that the configuration can be simplified.
Further, since the update program can be used immediately after the download is completed, the performance is improved.

Embodiments according to the image processing apparatus and the access control method of the present invention will be described below.
The image processing apparatus according to the present embodiment includes means for controlling operations necessary for image processing by operating a computer according to a control program. Here, it applies to multi-function printers (digital copiers) and printers that perform print output based on images input by reading originals or images input by requesting print output from external devices via communication means An example is shown.

In the embodiment described below, the main control unit of the image processing apparatus controls the entire image processing apparatus including operations necessary for processing an image input according to the control program.
The control program used for the operation by the main control means is stored and stored in a storage means such as a non-volatile memory in which stored data is not lost even when the power is turned off, and is necessary for the operation when the image processing apparatus is turned on. The control program is read from the stored nonvolatile storage means, managed in a state where it can be used as an execution program, and driven in response to a processing request.
The control program stored in the non-volatile storage means is upgraded as necessary by correcting bugs in the program, adding new functions, and the like. In recent years, a method of downloading an update program via a network to upgrade the program has been adopted. If this method is used, the image processing device is normally in operation when a download request is made. If there is a job being executed, it is necessary to interrupt the processing of this job. Become.

Therefore, in this embodiment, even when the CPU is executing the control program, the update control program can be downloaded without interrupting the processing by the control program being executed, and updated immediately after the download is completed. The configuration shown below is adopted with the intention of enabling the use of the control program.
FIG. 1 is a block diagram showing a basic configuration of an image processing apparatus according to an embodiment (hereinafter referred to as “Embodiment 1”) of the present invention. Note that the configuration shown in FIG. 1 mainly shows portions related to the configuration that realizes the above intention, and other components that are normally provided in this type of image processing apparatus are not shown.

An image processing apparatus 100 shown in FIG. 1 includes a main control unit 2 having a function of controlling the entire image processing apparatus, and a read control unit 1 that reads various data transmitted from the network 20 into an internal storage unit. The main control means 2 and the read control means 1 make the first storage means 3 and the second storage means 4 for storing control programs accessible respectively.
As storage means for storing the control program, a first storage means 3 and a second storage means 4 are provided. This is because one is used to store the current control program and the other is used to store the update control program. Therefore, of the first storage means 3 and the second storage means 4, the one that stores the current control program is connected to the main control means 2, and the other is connected to the read control means 1 so that the update control program can be stored. When the storage means are separately used in this way, each time the control program is updated, the first storage means 3 and the second storage means 4 are alternately used as storage locations for the update control program.

In order to perform the above connection operation, switching control means for switching the main control means 2 and the read control means 1 from one of the first storage means 3 and the second storage means 4 to the other, and switching control of the switching connection means. Provide means to do.
As shown in FIG. 1, a switching connection means 5 is provided to switch the reading control means 1 from one of the first storage means 3 and the second storage means 4 to the other, and the main control means 2 is changed to the first storage means 3. The switching connection means 6 is provided for switching from one of the second storage means 4 to the other. These switching connection means 5 and 6 are respectively connected to a pair of connectors (for the switching connection means 5) for switching the connection from one of the first storage means 3 and the second storage means 4 to each other by the input of the switching control signals SEL2 and SEL1. The connectors 51 and 52 and the connectors 61 and 62) are provided for the switching connection means 6.

In the first embodiment, the update control program transmitted from the network 20 to the read control means 1 is accessed by downloading the storage means determined by the switching control signal SEL2 out of the first storage means 3 and the second storage means 4. To do.
Downloading of the update control program is performed by a method such as DMA transfer in which the read control unit 1 directly writes to a predetermined storage unit. For example, as shown in the circuit configuration of FIG. 1, the first memory is directly stored from the read control means 1 by the control of the read control means 1 without using the bus 9 operating under the control of the CPU of the main control means 2. The update control program is written in the means 3 or the second storage means 4 by DMA transfer.

The storage means for downloading the update control program is the one that does not store the control program to be executed. When the download of the update control program is completed, the control means for executing the updated one when the control program is started next time. Use as a program. For this purpose, the connection of the storage means is switched.
This switching is used for a control program in which the switching connection means 5 and the switching connection means 6 are simultaneously controlled by the switching control signals SEL2 and SEL1, and the storage means used for downloading the update control program is connected to the main control means 2 and executed. The storage means storing the control program to be executed is now used for downloading the update control program to the read control means 1.

Here, refer to FIG. 2 for the switching control of the switching connection means 5 and 6 and the access operation to the nonvolatile storage means for storing the control program to be executed and the update control program in the first embodiment based on FIG. Will be described in more detail.
FIG. 2 shows a more specific circuit configuration based on FIG. 1 as a basic configuration.
The correspondence between the components in FIG. 2 and FIG. 1 is as follows. The network processing unit 11 in FIG. 2 corresponds to the read control unit 1 in FIG. The main control unit 12 in FIG. 2 corresponds to the main control unit 2 in FIG. The nonvolatile memory (1) 13 in FIG. 2 corresponds to the first storage unit 3 in FIG. The nonvolatile memory (2) 14 in FIG. 2 corresponds to the second storage unit 4 in FIG. The bidirectional buffers 15 and 16 correspond to the switching connection means 5 and 6 in FIG.

The network processing unit 11 has a function as a network interface, and a part thereof has a download function of an update control program. Therefore, it is determined whether the data received from the network 20 is print data transmitted by requesting print output or update control program data transmitted by requesting download. This determination can be made, for example, by setting a specific TCP (Transmission Control Protocol) port number (see “Port 1234” in FIG. 6 described later) for software update and receiving a packet of the specific port number. The data is determined as program (update control program) data.
Further, the program data is written into the nonvolatile memory (1) 13 or the nonvolatile memory (2) 14 only when the data received from the network 20 is program data.
Each of the non-volatile memory (1) 13 and the non-volatile memory (2) 14 can be connected to a CPU 121 of the main control unit 12, which will be described later. However, as described with reference to FIG. Can only access non-volatile memory.
The non-volatile memory to which the main control unit 12 is connected stores a control program currently being executed by the CPU 121, and the other non-volatile memory has an update control program when a new version is downloaded from the network 20. Is stored, the network processing unit 11 is connected.

The main control unit 12 includes a CPU 121, a memory selection unit 123, and a startup information storage memory 125 as components for performing switching control of the bidirectional buffers 15 and 16 as switching connection means and an access operation to the nonvolatile memory.
The memory selection unit 123 includes information indicating which control program of the nonvolatile memory (1) 13 or the nonvolatile memory (2) 14 is used to operate the CPU 121 and the nonvolatile memory (1) 13 or A pair of setting information indicating which one of the nonvolatile memories (2) 14 is used for downloading the update control program is held.
The pair of setting information functions as switching control signals for the bidirectional buffers 15 and 16 as switching connection means, as will be described below. The bidirectional buffer 15 has a pair of bidirectional buffer elements 151 and 152 for selecting whether to connect to the nonvolatile memory (1) 13 or the nonvolatile memory (2) 14, and the bidirectional buffer 15 16 includes a pair of bidirectional buffer elements 161 and 162 for selecting whether to connect to the nonvolatile memory (1) 13 or the nonvolatile memory (2).

Here, the pair of setting information held in the memory selection unit 123 is the SEL1 signal and the SEL2 signal, and the SEL1 signal and the SEL2 signal are bidirectional depending on the state of the signals being “H” and “L”, respectively. It controls whether the bidirectional buffer elements 151 and 152 in the buffer 15 and the bidirectional buffer elements 161 and 162 in the buffer 16 are to be validated or invalidated, and the main control unit 12 and the network processing unit 11 are controlled. Switching between the nonvolatile memory (1) 13 and the nonvolatile memory (2) 14 is switched.
The operations of the bidirectional buffers 15 and 16 corresponding to the states of the SEL1 signal and the SEL2 signal, respectively, “H” and “L” are summarized as follows.
・ About SEL1 signal (main control unit 12 connection)
When SEL1 signal = “H”: Bidirectional buffer 161 is enabled.
The bidirectional buffer 162 is invalid,
And connected to the nonvolatile memory (1) 13.
When SEL1 signal = “L”: Bidirectional buffer 161 is invalid.
Bidirectional buffer 162 is enabled,
And connected to the nonvolatile memory (2) 14.
・ About SEL2 signal (connection of network processing unit 11)
When SEL2 signal = “H”: Bidirectional buffer 151 is invalid.
Bidirectional buffer 152 is enabled,
And connected to the nonvolatile memory (2) 14.
When SEL2 signal = “L”: Bidirectional buffer 151 is enabled.
Bidirectional buffer 152 is invalid,
And connected to the nonvolatile memory (1) 13.

The values of the SEL1 signal and SEL2 signal always take the same logical value,
When SEL1 signal = “H” and SEL2 signal = “H”
State of the non-volatile memory (1) 13 = executable control program;
The state of the nonvolatile memory (2) 14 can be used to store the update control program,
When SEL1 signal = “L” and SEL2 signal = “L”
The state of the non-volatile memory (1) 13 can be used to store an update control program.
The state of the nonvolatile memory (2) 14 = the control program can be executed.
When disabled, the bidirectional buffer is Hi-Z.
As described above, the switching control of the bidirectional buffers 15 and 16 is performed by the SEL1 signal and the SEL2 signal generated by the memory selection unit 123, and the main control unit 12 and the network processing unit 11 are respectively connected to the nonvolatile memory (1) 13 or the nonvolatile memory. Connect to memory (2) 14.

The activation information storage memory 125 of the main control unit 12 will be described.
As in this embodiment, there are two non-volatile memories that store the control program, and the memory that stores the latest version of the control program changes alternately each time the version is upgraded, so the non-volatile memory to be used is managed. There is a need to. That is, when the CPU 121 activates the control program, the activation information, which is information indicating which memory control program of the two nonvolatile memories is used, is stored in the activation information storage memory 125, so that the control is normally performed. Manage the program so that it can be used. Note that the timing at which the CPU 121 stores the activation information is when the download of the update control program is completed.

In the embodiment of FIG. 2, the activation information stored in the activation information storage memory 125 is information indicating either the nonvolatile memory (1) state or the nonvolatile memory (2) state.
The meanings of the nonvolatile memory (1) state and the nonvolatile memory (2) state are as follows:
Nonvolatile memory (1) state = “H”: When the control program can be executed
“L”: Can be used to store the update control program.
Nonvolatile memory (2) state = “H”: When the control program can be executed
“L”: Can be used to store update control programs.
In order to use the activation information stored in the activation information storage memory 125, the CPU 121 first refers to the activation information stored in this memory at the time of activation. After that, information on the non-volatile memory storing the control program to be executed according to the referenced startup information is obtained, and the control program read from the non-volatile memory is managed in a state where it can be used as an execution program. This control program is driven.

Next, an access operation to the nonvolatile memory of the image processing apparatus (FIG. 2) configured as described above will be described with reference to the sequence diagrams of FIGS.
Here, the access operation at startup that is normally performed in order to use the control program is referred to as “normal operation”, and the access operation at the time of an update request (download of the update control program) performed via the network is referred to as “update operation”. Separately described.
In the following description of the access operation, particularly “update operation”, FIG. 5 shows a time chart of signals related to the operation, FIG. 6 shows a processing process of data received from the network, and FIG. Reference is also made to FIG. 7 showing a transition of data stored in the memory in a memory map.

"Normal operation"
As an operation procedure at the time of start-up when the power is turned on, a procedure when the CPU 121 accesses the nonvolatile memory, reads a control program to be used, and loads it into an executable state will be described.
According to the sequence diagram shown in FIG. 3, when activation is instructed by turning on the power or the like, first, the memory selection unit 123 of the main control unit 12 allows the CPU 121 to access the nonvolatile memory (1) 13 as an initial condition. like,
SEL1 signal = “H” and SEL2 signal = “H”
Are stored as a pair of setting information (sequence Sq101).
Next, the memory selection unit 123 requests the CPU 121 to reset, and the CPU 121 resets the setting for accessing the nonvolatile memory according to the request (sequence Sq102).
Thereafter, the CPU 121 accesses the activation information in the activation information storage memory 125 (sequence Sq103), and reads information indicating which one of the two nonvolatile memories should be activated at present (sequence Sq104).
Here, nonvolatile memory (1) state = “H” (when control program can be executed)
Non-volatile memory (2) status = “L” (can be used to store update control programs)
Is read.

Next, the CPU 121 sends the SEL1 signal and the SEL2 signal to the memory selection unit 123 in accordance with the startup information indicating that the nonvolatile memory (1) 13 can execute the control program.
SEL1 signal = “H” and SEL2 signal = “H”
(Sequence Sq105).
Thereafter, the CPU 121 accesses the non-volatile memory (1) 13 (sequence Sq106), reads out a control program to be executed (here, program Ver1) to the working memory (sequence Sq107), and performs processing by the program Ver1. Execute.

"Update operation"
Operation procedure of control program update processing at the time of an update (downloading of update control program) request made via the network after the control program to be executed (here, program Ver1) is started by the above "normal operation" After the update, the procedure when the CPU 121 accesses the non-volatile memory storing the update control program (here, program Ver2), reads the control program to be used, and loads it into an executable state will be described.
According to the sequence diagram shown in FIG. 4, when an update start request is received from the network 20 after the control program Ver1 to be executed is started (sequence Sq201), the network processing unit 11 receiving this request sends an update start OK to the network. 20 (sequence Sq202).
Thereafter, the update program Ver2 data is sent from the network 20, so that the network processing unit 11 receives this data (sequence Sq203) and writes the received update program Ver2 data to the nonvolatile memory (sequence Sq204). . At this time, as described in the above “normal operation”, since the SEL2 signal = “H”, the received update program Ver2 data is written in the nonvolatile memory (2).

Here, a description will be given of control program update (update control program download) processing performed by the network processing unit 11.
The network processing unit 11 functions as a network interface, and an image processing apparatus such as a multifunction peripheral or a printer receives print data from the network 20 and responds to a print output request. For this reason, the network processing unit 11 needs to determine whether it is a control program update process request or a print output process request from the received data, and divide the process.
FIG. 6 is a time chart for explaining received data processing in the network processing unit 11 when communication with the network 20 is performed by TCP (Transmission Control Protocol).

  The received data shown in FIG. 6 shows an example in which the received packet is a mixture of program data and print data along the time axis. By setting the port number embedded in the TCP / IP header of the received packet as “port 1234”, it is specified that the data is for updating the control program. Data of the packet of “port 1234” is determined as program (update control program) data, and only in this case, the program data is written into the nonvolatile memory (1) 13 or the nonvolatile memory (2). The print data in which “port 9000” is set is stored in the memory managed by the CPU 121 of the main control unit 12 via the bus 9.

When the network processing unit 11 writes the received program data into the nonvolatile memory (1) 13 or the nonvolatile memory (2) 14, the DMA (Direct) is directly transferred to the nonvolatile memory selected by the bidirectional buffer 15. Memory Access) is transferred, and the bus 9 operating under the control of the CPU 121 of the main control unit 12 is not used.
In DMA transfer, only program data is extracted from a received packet and is written in a non-volatile memory at a transfer destination for each packet. Therefore, the network processing unit 11 manages the head address and data length of the packet program data on the buffer memory.
In this embodiment, since the nonvolatile memory is accessed by DMA transfer, the data flowing through the points 153 and 163 on the bus used for this transfer is only control program data.

Returning to the sequence of FIG. 4, the network processing unit 11 receives all the update program Ver2 data from the network 20, confirms that the download is completed (sequence Sq205), sets the download end signal to “H”, The data is output to the memory selection unit 123 (sequence Sq206).
Next, the memory selection unit 123 that has received the download end signal from the network processing unit 11 outputs the download end signal to the CPU 121 (sequence Sq207).
The CPU 121 that has received the download end signal stores the startup information storage memory 125 so as to access the nonvolatile memory (2) 14 storing the update program Ver2 when the control program is started next time.
Non-volatile memory (2) state = “H” (when control program can be executed)
Is set as an activation response (sequence Sq208).
Thereafter, when the task currently being executed ends, CPU 121 sets the task end bit to “H” and outputs it to memory selection unit 123 (sequence Sq209).

The memory selection unit 123 that has received the task end signal
When download end bit = “H” and task end bit = “H”
In order for the CPU 121 to access the nonvolatile memory (2) 14,
SEL1 signal = “L” and SEL2 signal = “L”
Are stored as a pair of setting information (sequence Sq210).
Next, the memory selection unit 123 requests the CPU 121 to reset, and the CPU 121 resets the setting for accessing the nonvolatile memory according to the request (sequence Sq211).
Thereafter, CPU 121 accesses activation information in activation information storage memory 125 (sequence Sq212), and reads information indicating which one of the two nonvolatile memories should be activated at present (sequence Sq213).
Here, nonvolatile memory (1) state = “L” (can be used to store update control program)
Non-volatile memory (2) state = “H” (when control program can be executed)
Is read.

Next, the CPU 121 sends the SEL1 signal and the SEL2 signal to the memory selection unit 123 in accordance with the startup information indicating that the control program can be executed in the nonvolatile memory (2) 14.
SEL1 signal = “L” and SEL2 signal = “L”
(Sequence Sq214).
Thereafter, the CPU 121 accesses the non-volatile memory (2) 14 (sequence Sq215), reads the control program to be executed (here, program Ver2) to the working memory (sequence Sq216), and executes the processing by the program Ver2. To do.

Here, the operation timing of the control program update (update control program download) process and the process of accessing the update program as an execution program after the update will be described.
In this embodiment, as described above, there are two nonvolatile memories storing the control program, and access to the nonvolatile memory used for downloading the update control program is not via the bus 9 controlled by the CPU 121. Since the network processing unit 11 directly performs, the update control program can be downloaded from the network without interrupting the operation of the CPU 121.
This operation state is shown in a time chart of signals related to the access operation to the nonvolatile memory in FIG. That is, the period in which the SEL1 signal and the SEL2 signal shown in FIG. 5 are such that the SEL1 signal = “H” and the SEL2 signal = “H” is a period in which the CPU 121 starts the control program of the nonvolatile memory (1) 13; Further, this period indicates that the network processing unit 11 can respond to a program download request from the network 20 and write the update control program into the nonvolatile memory (2) 14.

  In addition, the CPU 121 performs a reset (provided that the “download” in FIG. (Refer to the relationship of each signal of “end”, “CPU task end”, “reset”), and after reset, set the period for SEL1 signal = “L” and SEL2 signal = “L”. That is, in order to apply the update control program downloaded in the immediately preceding task execution period to the next task, the nonvolatile memory that can access the execution program is switched so that the CPU 121 can use the update control program. This switching of the non-volatile memory switches the non-volatile memory that can be accessed by the network processing unit 11 simultaneously with the CPU 121, and this time the network processing unit 11 accesses the non-volatile memory accessible by the CPU 121 before switching.

As described above, the CPU 121 and the network processing unit 11 alternately perform read and write accesses to the two nonvolatile memories including the nonvolatile memory (1) 13 and the nonvolatile memory (2) 14, respectively.
FIG. 7 is a diagram showing a transition of the storage state of the control program by the access operation to the nonvolatile memory in a memory map.
(A) in FIG. 7 shows an initial state, and shows a state in which the control program Ver1 is stored in the nonvolatile memory (1) 13. This control program Ver1 is accessed by the CPU 121 and used as an execution program (see the description of “normal operation” above).
(B) in FIG. 7 shows a state after downloading, and shows a state in which the downloaded update control program Ver2 is stored in the nonvolatile memory (2). The non-volatile memory (1) 13 stores the control program Ver1, and as described above, the control program Ver1 is accessed by the CPU 121 until the current task is completed and reset, and the execution program is executed. Used as.
The upper part of (C) in FIG. 7 is reset after downloading, and a nonvolatile memory (2) which can access the execution program in order to apply the downloaded update control program Ver2 to the next task. 14 shows a state when the CPU 121 enables the program Ver2 to be used. Note that the lower part of (C) in FIG. 7 shows a state after NG of the activation of the update control program Ver2, and this operation will be described later.

According to this embodiment, the network processing unit 11 downloads the update control program transmitted from the network 20 directly to the nonvolatile memory by DMA transfer regardless of the operation of the CPU 121 of the main control unit 12. Since the CPU 121 does not affect the processing by the control program being executed, the processing is not interrupted by downloading the update program, and a problem that may occur due to the interruption does not occur. Further, the main control unit 12 does not have to have a function conventionally required for downloading the update program from the network, so that the configuration can be simplified.
In addition, after the download is completed and the current task is completed, the nonvolatile memory can be switched and the update program can be used immediately, so the performance by performing the process using the latest control program for the next task Can be improved.

FIG. 8 is a block diagram showing a basic configuration of an image processing apparatus according to another embodiment of the present invention (hereinafter referred to as “embodiment 2”).
The image processing apparatus according to the second embodiment includes a first storage unit 3 and a second storage unit 4 as nonvolatile storage units for storing a control program, one of which is used for storing the current control program and is used for main control. The other is connected to the reading control means 1 for storing the update control program. In addition, the first storage unit 3 and the second storage unit 4 are alternately used as storage locations for the update control program every time the update control program is downloaded in response to a request from the network 20. Based on the design concept.
Accordingly, as shown in FIG. 8, the basic configuration is the same as that of the first embodiment shown in FIG. That is, both have switching connection means 5 and 6 for switching the main control means 2 (2 ′) and the read control means (1 ′) from one of the first storage means 3 and the second storage means 4, respectively, There is means for outputting switching control signals SEL2 and SEL1 for performing switching control of the switching connection means 5 and 6, respectively.

The difference between this embodiment and the first embodiment is that the means for outputting the switching control signals SEL2 and SEL1 described above is provided in the main control means 2 in the first embodiment, but in this embodiment, this means is read. The control means 1 ′ is provided.
Specifically, the read control unit 1 ′ of this embodiment is a memory selection corresponding to the memory selection unit 123 provided in the main control unit 12 of FIG. 2 (corresponding to the main control unit 2 of FIG. 1) in the first embodiment. A means (not shown) is provided, and a pair of setting information for outputting the switching control signals SEL2 and SEL1 is managed by this means. The switching control signals SEL2 and SEL1 have the same function as the signals in the first embodiment, the SEL1 signal selects a storage means for storing a control program to be executed, and the SEL2 signal stores a downloaded update control program. This is a signal for switching control of the switching connection means 5 and 6 in order to select the storage means to be performed.

The read control means 1 ′ of this embodiment is provided with a memory selection means (not shown), so that the switching control signals SEL2 and SEL1 can be set by internal processing of the read control means 1 ′. That is, since the read control unit 1 ′ has the function of the network processing unit 11 (FIG. 2) and detects the end of the download of the update control program performed from the network, the switching control signal indicates the end of the detected download. It can be recognized as the timing to change the setting of SEL2 and SEL1.
In the case of the first embodiment, when switching the first storage means 3 or the second storage means 4, the switching control signals SEL2 and SEL1 are set by the main control means 2 (corresponding to the main control unit 2 in FIG. 2). In this case, the main control means 2 needs to detect that the download of the update control program has been completed. The end of the download is notified from the read control means 1 via the communication line 7, and upon receipt of this notification, the main control means 2 2 takes the processing process of setting the switching control signals SEL2 and SEL1, so that there is a possibility that a difference in timing occurs.
In this embodiment, by providing memory selection means for setting the switching control signals SEL2 and SEL1 in the read control means 1 ′, immediately after the download of the update control program is completed without passing through the main control means 2 ′. It becomes possible to perform switching, and proper operation can be maintained.

FIG. 9 is a block diagram showing a basic configuration of an image processing apparatus according to another embodiment (hereinafter referred to as “Embodiment 3”) of the present invention.
The configuration of the image processing apparatus according to the third embodiment shown in FIG. 9 is characterized in that a watchdog unit 8 is added to the image processing apparatus according to the first embodiment (FIG. 1). The configuration shown in FIG. 9 is the same as the configuration shown in FIG. 1 except that the watch dog means 8 is added.
The watchdog unit 8 is a unit that detects an operation abnormality caused by a control program used in the main control unit 2.
As an embodiment of the image processing apparatus to which the watchdog means 8 is added, the present embodiment will be described below with reference to FIG. 2 (common to the first embodiment) showing the circuit configuration more specifically. In the image processing apparatus of FIG. 2, an example of a configuration in which a watchdog timer 18 is added as watchdog means is shown. Note that the same configuration can be achieved by adding the watchdog timer 18 shown in FIG. 2 to the image processing apparatus (FIG. 8) of the second embodiment.

A watchdog timer 18 added to the image processing apparatus 100 shown in FIG. 2 monitors the operating state of the CPU 121 of the main control unit 12.
The watchdog timer 18 has a counter (timer) inside and always performs a count-up operation. The CPU 121 outputs a reset signal to the counter in the watchdog timer 18 at regular intervals. The watchdog timer 18 receives a counter reset signal from the CPU 121 at regular intervals, and resets the counter. When the counter is counted up to the maximum value without receiving a reset signal from the CPU 121, the watchdog timer 18 determines that the operation of the CPU 121 is abnormal. In this embodiment, when an operation abnormality of the CPU 121 is detected by the watchdog timer 18 when the update control program immediately after downloading from the network 20 is activated, processing corresponding to the abnormality can be performed.

FIG. 10 is a sequence diagram showing an access operation to the nonvolatile memory in this embodiment to which a processing process corresponding to an abnormal start of the update control program is added.
The sequence diagram shown in FIG. 10 is the procedure of “update operation” after the control program Ver1 to be executed is started according to the sequence of FIG. 3, that is, the update request received from the network 20 and downloaded by the CPU 121. Until the update control program Ver2 is executed, the operation procedure of the former stage is used, and the operation procedure corresponding to the activation abnormality of the update control program (the part surrounded by the broken line in FIG. 10) is the operation procedure of the latter stage. However, the procedure of the “update operation” in the previous stage (sequences Sq301 to Sq316) is the same as that described based on the sequence of FIG. 4 in the “update operation”, and therefore the description is omitted here. Refer to

The CPU 121 reads the update control program Ver2 stored in the non-volatile memory (2) 14 into the working memory by performing the procedure of “update operation” in the sequences Sq301 to Sq316 in FIG. 10, and executes processing by this program Start as much as possible.
If the update control program Ver2 cannot be started normally, the CPU 121 stops the counter reset output to the watchdog timer 18.
Since the counter reset from the CPU 121 does not come, the watchdog timer 18 counts up and an abnormality is detected. When the watchdog timer 18 detects an activation abnormality, it outputs a CPU activation NG signal to the memory selection unit 123 of the main control unit 12 (sequence Sq321). Note that the generation timing of the CPU activation NG signal when the update control program Ver2 cannot be activated normally is shown at the bottom of the time chart of FIG.

The memory selection unit 123 that has received the CPU activation NG signal receives a pair of setting information at the time of input of the CPU activation NG signal.
If SEL1 signal = “L” and SEL2 signal = “L”,
SEL1 signal = “H” and SEL2 signal = “H”
Also,
If SEL1 signal = “H” and SEL2 signal = “H”,
SEL1 signal = “L” and SEL2 signal = “L”
The setting information is held, and the CPU 121 can access the nonvolatile memory (1) 13 (sequence Sq322).
In the example of FIG.
Since SEL1 signal = “L” and SEL2 signal = “L”,
In sequence Sq322,
SEL1 signal = “H” and SEL2 signal = “H”
Set to.

Next, the memory selection unit 123 requests the CPU 121 to reset, and the CPU 121 resets the setting for accessing the nonvolatile memory according to the request (sequence Sq323).
Thereafter, upon restart, the CPU 121
SEL1 signal = “H” and SEL2 signal = “H”
Is set, the nonvolatile memory (1) 13 is accessed (sequence Sq324), the control program to be executed (here, program Ver1) is read to the working memory (sequence Sq325), and the process is executed by the program Ver1. .

As described above, when an operation abnormality of the CPU 121 is detected by the watchdog timer 18 when the update control program immediately after downloading from the network 20 is activated, the control program used immediately before the abnormality occurs Perform processing to return and restart.
The lower part of (C) in FIG. 7 showing the transition of the storage state of the control program in the memory map is the control program when the process of returning to the control program used immediately before the abnormality occurs and restarting is performed. Indicates the storage status. This figure shows a state in which the CPU 121 can use the program Ver1 used immediately before the occurrence of an abnormality by restarting. In addition, the upper part of (C) in FIG. 7 shows a state when the downloaded update control program Ver2 can be normally started.

  According to the present embodiment, when an operation abnormality is detected when the update control program downloaded from the network 20 is activated, it is possible to restart with the version of the control program immediately before the update. The operation never stops.

1 is a block diagram showing a basic configuration of an image processing apparatus according to Embodiment 1 of the present invention. It is a figure which shows more concretely the circuit structure in the image processing apparatus of FIG. It is a sequence diagram which shows the access operation (at the time of power ON starting) with respect to the non-volatile memory of an image processing apparatus (FIG. 2). It is a sequence diagram which shows the access operation (at the time of an update operation | movement) with respect to the non-volatile memory of an image processing apparatus (FIG. 2). It is a figure which shows the time chart of the signal which concerns on access operation with respect to a non-volatile memory. It is a figure which shows the processing process of the data received from a network with a time chart. It is a figure which shows the transition by the access operation | movement of the data stored in a pair of non-volatile memory with a memory map. It is a block diagram which shows the basic composition of the image processing apparatus which concerns on Embodiment 2 of this invention. It is a block diagram which shows the basic composition of the image processing apparatus which concerns on Embodiment 3 of this invention. It is a sequence diagram which shows the access operation (at the time of starting abnormality of an update control program) with respect to the non-volatile memory of an image processing apparatus (FIG. 2). It is a figure which illustrates the conventional image processing apparatus which downloads a program via a communication means. It is a figure which shows the other example of the conventional image processing apparatus which downloads a program.

Explanation of symbols

1 .... Read control means 2 .... Main control means 3 .... First storage means 4 .... Second storage means 5, 6 .... Switch connection means 8, ... Watch dog means 11, ... Network Processing unit, 12 ..Main control unit, 121... CPU, 123 ..Memory selection unit, 125 ..Startup information storage memory, 13..Non-volatile memory (1), 14.. 15, 16 ... Bidirectional buffer, 18 ... Watchdog timer, 20 ... Network.

Claims (4)

An image processing apparatus having means for controlling operations necessary for image processing by operating a computer according to a control program,
Main control means for controlling the image processing operation according to the control program;
Read control means for reading an update control program input from outside,
First storage means connectable to the main control means and the read control means,
Second storage means connectable to the main control means and the read control means,
First switching connection means for switching the connection with the main control means from one of the first storage means and the second storage means;
A second switching connection means for switching the connection with the read control means from one of the first storage means and the second storage means to the other;
At the same time as the read control means switches the first switching connection means so as to connect the first storage means and the second storage means, which stores the control program to be executed, to the main control means. And means for controlling the switching of the second switching connection means so as to connect the reading control means to the one not storing the control program,
The update control program inputted from the outside is controlled to be directly read into the first storage means and the second storage means connected by the second switching connection means. Image processing device. The image processing apparatus according to claim 1,
The read control means detects completion of reading of the update control program, notifies the main control means of read completion, and the main control means accesses the update control program as an execution program upon detection of read completion. And a means for changing the setting of the switching control condition of the first switching connection means and the second switching connection means in order to enable reading of a new update control program,
The main control means receives an update completion notification of the update control program from the read control means, and sets an appropriate access control condition to access the update control program as an execution program when the control program is started next time An image processing apparatus comprising means for performing the processing. In the image processing apparatus according to claim 1 or 2,
An abnormality detecting means for detecting an operation abnormality of the control program;
An image processing apparatus comprising: means for changing a setting of a switching control condition of the first switching connection means and the second switching connection means on condition that the abnormality detection means detects an operation abnormality. Main control means for controlling an image processing operation executed in accordance with the control program, each control means for reading control means for reading an update control program inputted from the outside, and a first storage means and a first storage means accessible by each of the control means, respectively 2 is an access control method for controlling the connection with the storage means from one storage means to the other storage means, and accessing the connected storage means from each of the control means,
The reading control means performs switching control so as to connect the one storing the control program to be executed, of the first storage means and the second storage means, to the main control means, and at the same time storing the control program The update control program that is switched so as to be connected to the read control means and an externally input update control program is stored in the first storage means and the second storage means in which the control program is not stored. An access control method characterized by performing control to read directly into a means.

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