JP5055982B2 - Soft start circuit and integrated circuit device using the same - Google Patents

Description

  The present invention relates to a soft start circuit that performs soft start activation, and an integrated circuit device using the soft start circuit.

  Conventionally, drive circuits for DC / DC converters and switching regulators have used soft start circuits for the purpose of preventing destruction of switching transistors due to rush current at start-up and overshooting of rising of output voltage. Yes.

  FIG. 7 is a circuit diagram showing a conventional soft start circuit 50a. In FIG. 7, the reference voltage is generated from the reference voltage generation circuit 80. N (n is a natural number) capacitors C1 to Cn are provided in parallel, and one of them is grounded. Current sources I1 to In are provided corresponding to the capacitors C1 to Cn, respectively, so that current is supplied, and n charging circuits are configured. Further, the switching contacts CL1 to CLn are grounded and connected in parallel to the charging circuit, and when the ON control signal comes to any one of the contacts CL1 to CLn, the corresponding contacts CL1 to CLn are opened. Thus, charging of the corresponding capacitors C1 to Cn is started. The n charging circuits are connected to the non-inverting input terminals of the corresponding operational amplifiers 91 to 94, respectively, and as the capacitors C1 to Cn are charged by the time constants of the current sources I1 to In and the capacitors C1 to Cn, the output of the operational amplifier The FETs (field effect transistors) M1 to Mn to which the terminals are connected are gently turned on. When the FETs M1 to Mn are completely turned on, the reference voltages divided by the resistors R1 to Rn are output to the output terminals Vout1 to Voutn of each output system.

  FIG. 8 is a diagram showing the time change characteristics of the output voltages of the output terminals Vout1 to Voutn of the conventional technique shown in FIG. In the configuration of FIG. 8, since the current sources I1 to In and capacitors C1 to Cn are provided for each output system, the soft start time until the target voltage is reached is set by the current sources I1 to In and the capacitors C1 to Cn. It is possible. Therefore, as shown in FIG. 8, when the soft start is activated at the same time, the target voltage can be set to be output in the same time.

In addition, the prior art of the switching power supply which has several switching power supplies and provided the soft start circuit for every switching power supply is known (for example, refer patent document 1).
JP 2004-180385 A

  However, since the conventional technique shown in FIG. 7 requires the same number of current sources I1 to In and capacitors C1 to Cn as the output terminals Vout1 to Voutn, the longer the soft start time is set, the larger the capacity of the capacitor. Since C1 to Cn are required, the sizes of the capacitors C1 to Cn are increased, and there is a problem that a chip area on which the soft start circuit 50a is mounted increases.

  Further, as shown in FIG. 8, in the conventional technique, the soft start time until the target voltage is reached can be easily set by the current sources I1 to In and the capacitors C1 to Cn, but the voltage gradient until the target voltage is reached is set. When it is desired to start up each output system in the same manner, it is necessary to make fine adjustments in consideration of variations in the current sources I1 to In and capacitors C1 to Cn, and there is a problem that setting is difficult.

  Accordingly, the present invention provides a soft start activation circuit that can be accommodated in an integrated circuit, and an integrated circuit device using the same, in which rising slopes of a plurality of output voltages are made constant and the capacitor area of the charging circuit is reduced. For the purpose.

In order to achieve the above object, a soft start circuit (50) according to a first invention includes n (n is a natural number of 2 or more) output terminals (Vout1 to Voutn), and the n output terminals (Vout1) ~ Voutn) is a soft start circuit (50) that outputs at a constant time change rate until each output voltage reaches a predetermined comparison voltage ,
A charging circuit (10) for obtaining a charging voltage for supplying a common charging voltage to the n output terminals by supplying a current from one current source (I1) to one capacitive element (C1);
A reference voltage generation circuit (80) for generating a reference voltage;
The voltage generated by the reference voltage generating circuit (80), the voltage divider circuit that push min to n divided voltage so as to correspond to each of the n output terminals (20),
Together with the charging voltage is input, the n wherein one of the n divided voltage is inputted as the comparison voltage, for outputting selectively the output terminal of either one of the charging voltage and the comparison voltage Comparison switching means (31, 32, 33, 34),
Said n comparison switching means (31, 32, 33, 34) respectively, wherein when the charging voltage is lower than the comparison voltage to output the charging voltage from said output terminal (Vout1～Voutn), the charging voltage The soft start circuit (50), wherein the comparison voltage is output from the output terminals (Vout1 to Voutn) when higher than the comparison voltage. As a result, the rising gradients of the plurality of output voltages can be made constant, the capacitor and current source of the charging circuit can be reduced to one system, and the chip area can be reduced even when the soft start time is set long.

A second invention is the soft start circuit (50) according to the first invention, wherein
The capacitive element (C1) is provided in an integrated circuit. Accordingly, it is not necessary to provide an external capacitor outside the integrated circuit, and all the soft start circuits can be accommodated in the integrated circuit, so that the convenience of applying the soft start circuit to various integrated circuit devices is increased. .

  An integrated circuit device according to a third invention supplies the output voltage of the soft start circuit (50) according to the first or second invention to a multi-output power supply circuit, and controls the output voltage of the multi-output power supply circuit. It is characterized by doing. Thereby, it is possible to obtain an integrated circuit device in which the rising slope of the output voltage of the multi-output power supply integrated circuit device is constant and the area occupied by the capacitor in the integrated circuit is small.

A fourth invention is an integrated circuit device according to the third invention, wherein:
The multi-output power supply circuit is a multi-output DC / DC converter circuit (70). As a result, it is possible to obtain a multi-output DC / DC converter integrated circuit device in which the rising slope of the output voltage of the multi-output DC / DC converter integrated circuit device is constant and no external capacitor is required.

  Reference numerals in parentheses are given for ease of understanding, are merely examples, and are not limited to the illustrated modes.

  According to the present invention, in a soft start circuit having a plurality of output systems, it is possible to make the rising gradients of the time variations of the plurality of output voltages constant and reduce the area occupied by the capacitive element in the charging circuit.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

  FIG. 1 is a circuit diagram showing an example of a soft start circuit 50 to which the present invention is applied. In addition, the component which has the same function as FIG. 7 attaches | subjects the same referential mark as FIG.

  In FIG. 1, the main components of the soft start circuit 50 according to the present embodiment are a charging circuit 10, a reference voltage generating circuit 80, a voltage dividing circuit 20, a comparison switching unit 30, and an output terminal constituting an output system. Vout1 to Voutn. A plurality of output terminals Vout1 to Voutn are provided, and n are provided in FIG. 1 (n is a natural number). Corresponding to each of the output terminals, the comparison switching unit 30 includes comparison switching means 31, 32, 33, and 34. Therefore, the same number of comparison switching means 31, 32, 33, and 34 as the output terminals may be provided. Further, the comparison switching means 31, 32, 33, 34 may be composed of comparators CM1, CM2, CM3, .about.CMn and switching means SW1, SW2, SW3, .about.SWn.

  The charging circuit 10 is a circuit that determines the rising slope of the time change of the soft start voltage for performing the soft start, and includes a capacitor C1 that is a capacitive element and a current source I1. The current source I1 has an upstream side connected to the power supply voltage supply line VDD, and a downstream side connected to the capacitor C1. The capacitor C1, which is a capacitive element, is connected to the current source I1 on the upstream side and is supplied with current, and is grounded on the downstream side. The charging circuit 10 is connected so as to supply the charging voltage to the non-inverting input terminals of the comparators CM1, CM2, CM3, to CMn of the comparison switching units 31, 32, 33, and 34 of the comparison switching unit 30, respectively. Has been. In FIG. 1, the connection point of the charging circuit 10 with the non-inverting input terminal of the comparator 31 is represented by V1, but the potential at the connecting point V1 is different from the non-inverting input terminals of the other comparators 32, 33, and 34. Are the same potential as the connection points X, Y, Z. The charging circuit 10 has a switching contact CL1 connected in parallel to the charging circuit 10 with the Z point upstream of the capacitor C1 as a connection point. The other end of the switching contact CL1 is grounded.

  In this configuration, when the ON signal of the control signal is input to the switching contact CL1, the switching contact CL1 is opened, current is supplied from the current source I1 to the capacitor C1, the capacitor C1 is charged, and at the connection point V1. The potential is increased, and the charging voltage is supplied to each of the comparators CM1, CM2, CM3, to CMn of each of the comparison switching units 31, 32, 33, and 34. Accordingly, the charging voltages supplied to the plurality of comparison switching units 31, 32, 33, and 34 are all supplied based on the charging operation of one capacitor CL1 and one current source I1, so that the same rising slope is provided. The voltage is supplied to each comparison switching means 31, 32, 33, 34.

  The reference voltage generation circuit 80 is a voltage generation source that generates a voltage serving as a reference for voltages output from the output terminals Vout1 to Voutn constituting each output system. The reference voltage generation circuit 80 includes a voltage supply source 81, an operational amplifier 82, and resistors RA1 and RA2. In FIG. 1, the reference voltage generation circuit 80 inputs the voltage supplied from the voltage supply source 81 to the non-inverting input terminal of the operational amplifier 82, and outputs the voltage multiplied by {(RA 1 + RA 2) / RA 2}. Yes. As described above, the reference voltage generation circuit 80 can obtain the desired reference voltage by adjusting the resistors RA1 and RA2 using the operational amplifier 82. If the desired reference voltage can be obtained, the means is It does not matter, and other circuit configurations may be used. For example, if there is a voltage supply source 81 that can directly obtain a desired reference voltage, it may be used. The reference voltage generated and output by the reference voltage generation circuit 80 is supplied to the voltage dividing circuit 20.

  The voltage dividing circuit 20 divides the reference voltage supplied from the reference voltage generation circuit 80 into a plurality of voltages corresponding to the respective comparison switching units 31, 32, 33, and 34, and the plurality of voltages are divided into the respective comparators CM1, CM2, This is a circuit for supplying to the inverting input terminals of CM3, .about.CMn. Therefore, resistors R1, R2, R3,... Rn having a predetermined resistance ratio are connected in series so that the supplied reference voltage is divided into a desired ratio and supplied to the comparison switching means 31, 32, 33, 34. The circuit is configured.

  The plurality of divided voltages supplied to the inverting input terminals of the comparators CM1 to CMn are comparison voltages that serve as thresholds for switching the output signals of the comparators CM1 to CMn. In addition, the potential of the connection point of each of the voltage dividing circuit 20 with the comparison switching units 31, 32, 33, and 34 is the lowest potential of Rn, gradually increases to R3, R2, and R1, and the connection point upstream of R1. Is the highest potential. Accordingly, the inverting input terminals of the comparators CM1, CM2, CM3,..., CMn of each of the comparison switching units 31, 32, 33, 34 have resistance values of the resistors R1, R2, R3,. The set voltage is set and inputted so that the comparison voltage that becomes the set threshold voltage gradually increases in the order of Rn..., R3, R2, R1.

  Each of the comparators CM1 to CMn of the comparison switching unit 30 compares the comparison voltage serving as the threshold voltage input to the inverting input terminal and the output voltage of the charging circuit 10 input to the non-inverting input terminal. The comparators CM1 to CMn are connected to the switching means SW1, SW2, SW3,... SWn so that the non-inverting input terminal or the inverting input terminal and the output terminals Vout1 to Voutn can be switched and connected. Then, the comparison switching units 31, 32, 33, and 34 change the switching means SW1, SW2, SW3, and SWn based on the comparison result between the divided voltage and the charging voltage by the comparators CM1, CM2, CM3, and CMn. The switching means SW1, SW2, SW3,... Are controlled so that the output terminals Vout1 to Voutn are connected to the non-inverting input terminals of the comparators CM1, CM2, CM3,. Switch SWn.

  In FIG. 1, when the charging voltage of the charging circuit 10, that is, the voltage supplied to the non-inverting input terminals of the comparators CM <b> 1 to CMn is lower than the comparison voltage supplied from the voltage dividing circuit 20 to the inverting input terminal. The switching means SW1 to SWn are switch-controlled so that the inverting input terminal is connected to the output terminals Vout1 to Voutn, and the charging voltage is output.

  On the other hand, when the charging voltage supplied to the non-inverting input terminals of the comparators CM1 to CMn exceeds the comparison voltage supplied to the inverting input terminal, the switching is performed so that the inverting input terminal is connected to the output terminals Vout1 to Voutn. The means SW1 to SWn are switched and output a comparison voltage.

  As described above, as the charging voltage is increased by the soft start, the charging voltage is initially output from each of the output terminals Vout1 to Voutn. When the charging voltage first exceeds the comparison voltage in the comparator CMn, the switching unit SW4 Is switched to the lower side, and the reference voltage is output as a comparison voltage divided by the resistor Rn. Next, as the charging voltage rises again, the switching means SW3 is switched to the lower side, and the reference voltage is switched so as to output the comparison voltage divided by (R3 +... Rn). Finally, the reference voltage is output from Vout1.

  In FIG. 1, the switching means SW1, SW2, SW3,... SWn are displayed like switching means, but the connection is switched by control according to the comparison results of the comparators CM1, CM2, CM3, .about.CMn. Any means can be used as long as it is capable of being used, and any type or form may be used.

  FIG. 2 is a diagram showing the time change of the output voltage of each output system of the soft start circuit 50 according to the present embodiment. The horizontal axis represents time t (sec), and the vertical axis represents output voltage (V).

  In FIG. 2, the output voltage increases with a constant gradient as time t elapses. As described with reference to FIG. 1, the charging voltage of the charging circuit 10 is initially output. Eventually, when the comparison voltage, which is an output n-system threshold voltage, is reached, the switching means SWn is switched based on the comparison result of the comparator CMn, and the output voltage Vthn is output from the output terminal Voutn. become. Next, even if the charging voltage rises as it is, a constant comparison voltage Vthn is output from the output n-system output terminal Voutn. On the other hand, with respect to the other output systems, charging voltages having a constant rising slope are output from the respective output terminals Vout1 to Vout (n−1). When the charging voltage continues to rise and reaches the comparison voltage of the output (n-1) system (not shown), Vout (n-1) is switched to output the comparison voltage, similarly to the output terminal Voutn.

  Hereinafter, similarly, a charging voltage is output from an output system that has not reached a charging voltage and a comparison voltage that is a threshold at a constant gradient, and an output system that has reached a comparison voltage at which the charging voltage becomes a threshold is a constant comparison voltage. Is switched to output. In the example of FIG. 2, when the output voltage is output at a constant rate of time change and reaches the comparison voltage, which is the divided voltage of the output 3 system, the reference voltage corresponding to the divided resistance value (R3 +... + Rn). The divided voltage Vth3 is output from Vout3 as a comparison voltage. Similarly, the output 2 system outputs a predetermined divided voltage Vth2 from Vout2 when the charging voltage supplied to the comparison voltage serving as the threshold voltage has reached. Finally, when the target voltage is reached in the output 1 system, the output is switched from Vout1 to output the voltage Vth1 having the same potential as the reference voltage, and the output of the inclined output voltage for soft start is completed.

  Thus, as shown in FIG. 2, according to the present embodiment, the output voltage of each output system increases with the time change of the constant rising slope, and the output is performed in the descending order of the comparison voltage serving as the threshold voltage. The voltage is switched to output a constant comparison voltage. Finally, the reference voltage is output from the output 1 system, the soft start activation is finished, and all the output systems are in a normal constant voltage output state. Therefore, according to the present embodiment, although the arrival time to the target voltage is different for each output system, it is possible to output the output voltage with the same rising slope of the output voltage of the soft start.

  FIG. 3 is a diagram showing an output voltage waveform of the soft start circuit 50 according to this embodiment and an output voltage waveform of the conventional soft start circuit 50a. The horizontal axis represents time t, and the vertical axis represents the output voltage V.

  FIG. 3B shows the output voltage waveform of the conventional soft start circuit 50a. In the conventional soft start circuit 50a, as shown in the prior art circuit diagram of FIG. 7, the operational amplifiers 91, 92, 93, and 94 merely function as buffers. As Ms gradually rises, the FETs M1 to Mn are gradually switched. Therefore, the switching when the output voltage becomes constant does not immediately switch when the target voltage is reached, but gradually changes.

  On the other hand, FIG. 3A shows the output voltage waveform of the soft start circuit 50 according to the present embodiment. In the present embodiment, the output voltage change characteristics with the same rising slope are shown in all the output systems of the soft start circuit 50. In the comparison switching units 31, 32, 33, 34 of each output system, the comparators CM1, CM2, CM3, .about.CMn perform comparison, and as soon as the charging voltage reaches the divided voltage that becomes the threshold value, the switching means SW1, SW2, Since control for switching SW3 to SWn is performed, switching to a constant divided voltage has an output voltage characteristic that switches immediately rather than gradually.

  Therefore, when it is desired to change the output voltage time change characteristic of the soft start activation as shown in FIG. 3 (a) without changing the dullness, the soft start circuit 50 according to this embodiment is applied. Thus, a desired soft start start voltage switching characteristic can be obtained.

  FIG. 4 is a diagram showing an example in which the soft start is individually performed in the conventional soft start circuit 50a. FIG. 4 shows a case where soft start is activated from an output system having a large output voltage. In such a case, for example, in FIG. 4, when the output system activated first rises to 90% of the target voltage, the output system to be activated next is activated. As described above, when the output voltages are output in order from the output system having the larger target voltage, it is necessary to provide a capacitor for each output system as shown in FIG. The same applies to the case where it is desired to set the starting order of the soft start in an arbitrary setting order regardless of the output voltage. However, even in such a case, it is difficult to make the gradients of the target voltages the same, as shown in FIG.

  On the other hand, FIG. 5 is a diagram for explaining a case where a plurality of circuits to be supplied with voltage connected in a set to be driven are started up by a soft start in a predetermined order. In FIG. 5, circuits 41 and 42 to be activated are provided in the set 40 so as to be connected to each other. The circuit 41 is supplied with the power supply voltage Vcc1 and the circuit 42 is supplied with Vcc2. Consider a case where the power supply voltage Vcc2 of the circuit 42 is higher than the power supply voltage Vcc1 of the circuit 41 and the circuit 41 having a lower power supply voltage needs to rise first.

  In such a case, it is extremely effective to apply the soft start circuit 50 according to the present embodiment. That is, the soft start circuit 50 according to this embodiment can supply the power supply voltage Vcc1 of the circuit 41 first, and then supply the power supply voltage Vcc2 of the circuit 42. Under such circumstances, the individual setting soft start circuit 50a shown in FIG. 7 of the prior art is applied, and the circuit 41 is set to be supplied with voltage first, and the circuit 42 is set to supply voltage next. In some cases, there may be a situation in which a high voltage is first supplied to the circuit 41 and a low voltage is supplied to the circuit 42 due to some malfunction. In such a case, the circuits 41 and 42 of the set 40 may fail because the start order is not kept. However, since each voltage output circuit of the soft start circuit 50a is a separate system, for example, one of the circuits Such a trouble can occur when an abnormality occurs only in the system.

  However, when the soft start circuit 50 according to this embodiment is applied, the soft start charging voltage is supplied by one system. In other words, it is impossible that the voltage is reversed and supplied, and the whole is affected by the same effect, so that the safety of the circuit 41 and the circuit 42 is ensured. That is, for example, if the arrival time of the voltage output to the target voltage changes, the whole changes in the same way, and if the output voltage is output smaller than the set voltage, the entire output system changes in the same way. The relationship between the order of the circuit 41 and the circuit 42 and the magnitude of the voltage is maintained even if any change occurs. As described above, in the case of an apparatus in which the circuits are sequentially activated in the order of low voltage, the soft start circuit 50 according to the present embodiment has a multi-output based on the one-system capacitor C1 and the current source I1. The relationship between the soft start activation order and the magnitude of the supply voltage is always constant, which is extremely effective for protecting the set of driving targets and the circuit of the device.

  Next, a case where the soft start circuit 50 according to the present embodiment is applied to the DC / DC converter 70 will be described.

  FIG. 6 is a circuit diagram in which the soft start circuit 50 according to this embodiment is applied to a DC / DC converter 70. 6, the DC / DC converter 70 according to this embodiment includes a DC / DC converter driving block 60 in which a soft start block 51 to which the soft start circuit 50 described in FIG. 1 is applied, an error amplifier 61, an oscillator 62, a PWM, It comprises a comparator 63, a drive block 64, and an FET 65. Further, the DC / DC converter 70 according to the present embodiment includes a coil L1, a diode D1, resistors R4 and R5, and a capacitor C4. The DC / DC converter 70 shown in FIG. 6 shows one output system. Since the DC / DC converter 70 according to the present embodiment is a multi-output DC / DC converter 70, the circuit shown in FIG. 6 is provided for the output system, and the soft start block 51 includes output terminals Vout1 to Voutn corresponding to each. Will be assigned.

  The DC / DC converter 70 according to the present embodiment outputs a reference voltage by the soft start block 51, feedback is applied so that the voltage at the feedback terminal matches the reference voltage, and the output voltage of the DC / DC converter 70 is controlled. Then, as described in FIGS. 1 and 2, the reference voltage output from the soft start block 51 is raised with a gradient, and the output voltage of the DC / DC converter 70 is gradually raised.

  Hereinafter, the DC / DC converter circuit 70 according to the present embodiment will be described in detail.

  As described above, the soft start block 51 is assigned to each output system at a constant gradient, outputs an output voltage serving as a reference signal corresponding to the output system, and supplies the output voltage to the inverting input terminal of the error amplifier 61. Is done.

  The error amplifier 61 amplifies the error voltage between the feedback voltage supplied from the feedback terminal to the non-inverting input terminal and the reference voltage generated by the soft start block 51, and supplies the error voltage to the non-inverting terminal of the PWM comparator 63. Supply.

  The oscillator 62 oscillates and outputs a triangular wave having a predetermined frequency that determines the switching period, and supplies the triangular wave to the inverting input terminal of the PWM comparator 63.

  The PWM comparator 63 compares the error voltage supplied from the error amplifier 61 with the triangular wave voltage supplied from the oscillator 62. If the error voltage is higher than the triangular wave voltage, the PWM comparator 63 is at the H level and the error voltage is a triangular wave voltage. If it is lower than that, an L level pulse width modulated PWM signal is output.

  The drive block 64 outputs an on / off signal based on the PWM signal supplied from the PWM comparator 63 and supplies it to the gate of the FET 65.

  The FET 65 is turned on / off according to the duty ratio of the on / off signal supplied from the drive block 64, and is driven to perform switching.

  The coil L1 stores energy when the FET 65 is turned on by a voltage supplied from the power supply VDD, and supplies electric charge to the capacitor C4 via the diode D1 when the FET 65 is turned off.

  Electric charge is stored in the capacitor C4 by the current flowing from the coil L1, and switching control is performed by the FET 65 so as to obtain a desired constant conversion voltage. The conversion output voltage controlled to be constant by the capacitor C4 is output from the output terminal of the DC / DC converter circuit 70.

  The resistors R4 and R5 detect and monitor the output voltage of the DC / DC converter circuit 70, feed back to the feedback terminal, perform feedback control, and keep the output voltage constant.

  As described above, a plurality of DC / DC converter circuits 70 shown in FIG. 6 are provided for each output system, and are supplied from the soft start block 51 to the inverting terminal of the error amplifier 61 and have a constant slope rising characteristic. Based on the start activation voltage, a rising voltage with a constant gradient is output.

  Note that the DC / DC converter 70 according to the present embodiment may be configured in the same chip as an integrated circuit device. As described above, since the area occupied by the capacitor C1 of the soft start block 51 is small, the DC / DC converter 70 can be accommodated in the same integrated circuit device. Therefore, when using the integrated circuit device according to the present embodiment, it is not necessary to reattach an external capacitor serving as the capacitor C1 outside the integrated circuit device. As a result, the entire apparatus including the integrated circuit device according to the present embodiment can be made compact, and a DC / DC converter integrated circuit device with high convenience can be obtained.

  In the present embodiment, the example in which the soft start circuit 50 is applied to the DC / DC converter 70 has been described. However, the soft start circuit 50 according to the present embodiment performs soft start activation as a soft start activation signal control circuit. It can be applied to all multi-output voltage devices to be performed. Therefore, the soft start circuit 50 according to the present embodiment may be applied to various multi-output power supply devices such as a regulator circuit and an integrated circuit device using the regulator circuit.

  The preferred embodiments of the present invention have been described in detail above. However, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the present invention. Can be added.

It is a circuit diagram which shows an example of the soft start circuit 50 to which this invention is applied. It is the figure which showed the time change of the output voltage of each output type | system | group of the soft start circuit 50 which concerns on a present Example. It is the figure which showed the output voltage waveform of the soft start circuit 50 which concerns on a present Example, and the output voltage waveform of the conventional soft start circuit 50a. FIG. 3A is a diagram illustrating an output voltage waveform of the soft start circuit 50 according to the present embodiment. FIG. 3B shows the output voltage waveform of the conventional soft start circuit 50a. It is a figure which shows the example at the time of making a soft start separate in the soft start circuit 50a of a prior art. It is a figure for demonstrating the case where the several circuit connected in a certain set is started by a soft start starting in a predetermined order. 3 is a circuit diagram in which a soft start circuit 50 according to the present embodiment is applied to a DC / DC converter 70. FIG. It is a circuit diagram which shows the conventional soft start circuit 50a. It is a figure which shows the time change characteristic of the output voltage of each output terminal Vout1-Voutn of a prior art.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Charging circuit 20 Voltage dividing circuit 30 Comparison switching part 31, 32, 33, 34 Comparison switching means 40 Drive object apparatus 41, 42 Voltage supply object circuit 50, 50a Soft start circuit 51 Soft start block 60 DC / DC converter drive block 61 Error amplifier 62 Oscillator 63 PWM comparator 64 Drive block 65 FET
70 DC / DC Converter 80 Reference Voltage Generation Circuit 81 Voltage Supply Source 82, 91, 92, 93, 94 Operational Amplifier

Claims (4)

Soft start circuit having n (n is a natural number of 2 or more) output terminals, and outputting at a constant rate of time change until the output voltages from the n output terminals reach their respective predetermined comparison voltages Because
A charging circuit that supplies current from one current source to one capacitor and supplies a common charging voltage to the n output terminals ;
A reference voltage generation circuit for generating a reference voltage;
A voltage dividing circuit that push min to n divided voltage to the voltage generated by the reference voltage generating circuit, corresponding to each of the n output terminals,
Together with the charging voltage is input, the n wherein one of the n divided voltage is inputted as the comparison voltage, for outputting selectively the output terminal of either one of the charging voltage and the comparison voltage Comparison switching means,
Each the n comparison switching means, said outputs the charging voltage from said output terminal when the charging voltage is lower than the comparison voltage, when the charging voltage is higher than the comparison voltage the comparison voltage from the output terminal Is a soft start circuit characterized by outputting.   The soft start circuit according to claim 1, wherein the capacitive element is provided in an integrated circuit.   3. An integrated circuit device, wherein the output voltage of the soft start circuit according to claim 1 is supplied to a multi-output power supply circuit, and the output voltage of the multi-output power supply circuit is controlled.   4. The integrated circuit device according to claim 3, wherein the multi-output power supply circuit is a multi-output DC / DC converter circuit.

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