JP5025658B2 - Platform and processing method using this platform - Google Patents

Description

  The present invention relates to a method for processing an object consisting of basic information on a platform having one or more processors and a memory. The invention further relates to a platform using such a method.

  In this description, basic information is an element of information to be processed and is represented by one or more numerical values. This information can be encoded according to various types of encoding, such as 8-bit encoding, 10-bit encoding, or even 16-bit signed encoding. If the object to be processed is an image, the basic information is the pixels of this image.

  The processing that will be performed on the objects in the platform corresponds to algorithms that can intervene in various fields, such as image processing, data compression and decompression, audio processing, signal modulation and demodulation. Measurement, data analysis, database indexing or searching, computer browsing, graphic processing, simulation, etc., or any field that uses large amounts of data.

  When processing objects of the same type of basic information is required in a platform with a processor and memory, there is great freedom in determining the basic information processing order, loops, and corresponding operation sequences. There is a range of discretion.

  However, limitations related to code size, computation time, memory access speed, memory size, and regularity may be incompatible and it is difficult to exploit platform parallelism as much as possible for a given algorithm.

  In order to solve this problem, it is conventionally known to use a low-level library capable of performing various processing operations on physical blocks such as superposition, multiplication, and application of a correlation table. According to this, these libraries need only be optimized once for each platform. However, this method has many disadvantages as follows.

-The size of the library and hence the size of the code is quite large.
-Given the library call time, it is necessary to use relatively large physical blocks, which results in significant memory usage.

If the inner loop for basic information is located in the library, the sequence of operations cannot be optimized, which results in limited performance.
-Physical blocks are stored in memory, which results in intensive memory usage and a lot of time spent reading and writing intermediate data from the memory.

  In addition, programmable processors, such as those of the scalar processor type, vector signal processor type, signal processor type, especially SIMD ("single instruction multiple data") type, are composed of basic information and can be divided into blocks or sub-objects ( That is, the algorithm can be applied to objects that are decomposed into groups of basic information.

  Traditionally, each operation is applied to a complete block and then the next operation is performed on the block, which could be reduced in size. In fact, some of these operations reduce the size of the block and produce edge effects when subsequent operations are performed. Later, when the algorithm is to be applied on a known processor, a large number of memory access operations are required. This is because one operation is applied to all blocks in succession before proceeding to the next operation, which causes frequent reads and writes in memory.

  It is also necessary to use large blocks to reduce edge effects, and therefore it is necessary to have a relatively large memory to be able to store these large blocks. Furthermore, a large number of loops means that the loop and end-of-loop initialization code exists many times, thereby inducing large code.

Furthermore, certain operations, such as correlation tables and application of local displacements, are not suitable for integration into a vector signaling processor with a communication schema by offset or permutation.
In addition, it has been found that the code poses a regularity problem because the size of the block to which the operation is applied varies from one operation to another. It is therefore difficult to optimize this code in terms of memory and / or computation time. This is because optimization is limited to one operation per block, not the entire sequence.

  Therefore, it is very difficult to optimize code size, memory size, and the number of instructions needed without spending significant time optimizing each algorithm + platform combination. In fact, each platform is both in terms of both the device (eg, the number and type of processors, the size and type of memory) and the language used (C for scalar processors, assembly language for vector signal processors) Has its own characteristics.

  The object of the present invention is a method that allows the processing of objects in the platform by correcting at least one of the aforementioned drawbacks. Among other things, the present invention allows optimization of processing in terms of code size, computation time, memory access speed, and memory size.

This optimization reduces algorithm computation time, electrical consumption required for computation power, memory size and hence silicon surface, data.
This optimization further makes it possible to achieve savings in hardware properties, such as the silicon surface, and the electrical consumption required to run the algorithm for a given computation time.

  The present invention therefore relates to a method for processing an object of the same type of basic information in a platform having one or more processors and memory, the method for processing an object to be processed from N basic information. Each sub-object has the same quantity N of basic information, and the process performs at least one unique operation sequence on the basic information of each sub-object. In particular, the method further comprises the step of performing each specific operation at least N times for each sub-object, whereby each basic information of each sub-object is applied at least once, and on the other hand, each N results of specific operations are generated, and the sequence of specific operations is At least one specific operation k of Nsu is at least one among the whole application of the N times, a sequence such as to produce a result that will be used to process different sub-object.

Preferably, the sequence of specific operations does not include a loop.
In one embodiment, the platform comprises Q processors. Preferably, the processing of each sub-object is distributed across Q processors, each processor performing at least one specific operation IS8 from the specific operation sequence. Thus, all processors are used for each sub-object and one and the same processor is used for the set of sub-objects. Thus, there is no need to assign sub-objects to processors.

  Preferably, when a specific operation is performed by a processor to process a sub-object, the same specific operation is also performed by the same processor to process all other sub-objects. The processing is therefore regular. Specific operations are assigned to the processor and then performed periodically for sub-processing operations for each sub-object.

  Preferably, the set of loops required for processing depends on the topology and platform of the object but is independent of the sequence of specific operations.

  Preferably, the loops are embedded within each other around a complete sequence of unique operations. In this way, the loop encapsulates the entire sequence of specific operations, and the sequence of specific operations is not divided into subsequences each surrounded by a loop. Similarly, sub-objects can be stored simply by temporarily storing the results needed to process another sub-object, without having to memorize the complete object or store the result set of the specific operation. Objects can be processed by processing at the same time. Thus, memory usage is reduced.

Preferably, the sub-object is composed of continuous basic information. For this reason, it is possible to implement a chain of processors including at least one queue.
Next, the concept of a queue according to the present invention is defined.

The queue is used to send and / or store basic information or results from specific operations.
The queue may comprise or use memory.
The queue can be implemented using one or more processes of FIFO (first in first out) type.

The queue comprises at least one input and at least one output.
The queue can be operatively connected to the input computing unit and the output computing unit via any means.
The queue can also be operatively connected to the PR input calculation unit and the PR output calculation unit via any means, in which case the queues each link the input calculation unit to the output calculation unit Behaves like a PR queue.

Preferably, the queue can be used to manage several data fluxes independently, each flux being associated with a predetermined specific instruction.
In one embodiment, it is possible to read and write simultaneously in the queue.
Preferably, the queue uses at least one memory unit to store the same quantity NF of data for each flux.

  Preferably, NF is determined according to the relative placement and scrolling mode of the sub-objects, so that between the processing of sub-objects that generate data and the processing of sub-objects that use the same data, NF− One sub-object is processed.

  Preferably, the chain comprising computing units and queues includes a mechanism that allows management of boot operations. The queue is initialized periodically, for example at the beginning of each line if the queue is part of a horizontal chain and the object is an image. If the queue does not contain NF data, the processor following the queue in the chain takes as input the data to send at the output. The processor that follows the queue in the chain then takes the oldest data in the queue at the input and removes it from the queue.

Preferably, the queue allows data to be output in the same order as it was entered into the queue.
Preferably, the cyclic chain is unidirectional. Preferably, the cyclic chain is such that for each computational unit there is one single link at the input and one single link at the output.

In this way, the use of at least one queue can send results from specific operations required in the computation of at least one other sub-object.
The queue is implemented using, for example, a microprocessor.
It can be noted that throughout this description, the terms “computation unit” and “processor” have the same meaning.

  In one embodiment, each unique operation of the sequence is performed a total of N times and N / Q times for each of the Q processors to process a sub-object consisting of N basic information. If the sequence of specific operations includes conditional connections, each processor implements the portion of the sequence that reflects these conditional connections.

  In one embodiment, sub-objects are not overlaid according to at least one dimension. Thus, at least one unique operation result generated during the processing of one sub-object is used during the processing of another sub-object.

Preferably, sub-objects are not overlaid according to any dimension. Therefore, each processor can use 100% without repeating the calculation.
Preferably, the sequence of unique operations is such that at least one unique operation k of the sequence produces a result that is used to process another sub-object at least once during its N applications. is there.

  Preferably, if there are several circular chains according to the same one dimension of the sub-object (especially when the processors are arranged according to the grid), the queue is between all circular chains according to the same dimension. Shared on. There is preferably exactly one queue for each dimension of the sub-object, and each queue is shared among all circular chains according to the same dimension. Therefore, communication between processors is particularly simple. Therefore, the memory configuration is particularly simple.

  The present invention further allows for a given algorithm to obtain performance proportional to the number of processors, without changing the algorithm or memory size, and using a smaller size processor.

The present invention thus makes it possible to make available on the component the computational power of tens of billions of operations per mm ² per second for components stamped with a 0.09μ process. Traditionally, such densities require an optimized cabling architecture, which is therefore timely for development and lacks the flexibility to change the algorithm. On the contrary, the present invention makes it possible to program any algorithm very easily and thus in a very short time.

This also makes it possible to achieve the performance of approximately several trillion operations per second on a single component.
For this purpose, the present invention regularizes processing operations consisting of operations that present an edge effect.

The object processed by the method as described above is preferably an unprocessed image (of the “raw” type) before the demosaicing operation,
In one alternative, the basic information is a pixel represented by a numerical value corresponding to, for example, red, green or blue according to the absolute position of the pixel.

  In another alternative, the basic information is a group of pixels represented by one number per pixel (eg a group of 2 * 2 green, red and blue pixels, green corresponding to “Bayer”) ).

The object can also be a visible image, in which case the basic information is, for example, pixels represented by three numerical values, each numerical value representing a color, for example red, green and blue.
The object can also be a sequence of images, in particular a sequence of raw or visible images, in which case the basic information is the pixels of the image from the image sequence. Thus, the object corresponds to, for example, a video.

If the object is an image, the image can be received from an image capture device and / or directed to an image rendering device.
The image capture device is integrated in eg a disposable camera, digital camera, reflex camera (digital or non-digital), scanner, fax, endoscope, video camera, camcorder, surveillance camera, toy, telephone or personal assistant or computer Or linked video camera or camera, thermal camera, ultrasound machine, MRI (magnetic resonance) imaging unit, X-ray imaging unit.

The image rendering device is for example a screen, a projector, a television, a virtual reality goggles or a printer;
Image capture and image rendering devices are, for example, scanners / fax / printers, small photo printing labs, video conferencing devices.

  The processing platform can take a variety of forms depending on the application. For example, enumerate when the object is an image, especially when the processing platform is integrated into one of the following devices.

An image capture device that produces a processed image; For example, a digital camera with an integrated processing platform.
An image rendering device that displays or prints the processed image. For example, a video projector or printer with a processing platform.

A mixing device that corrects defects on these elements. For example, a scanner / printer / fax with a processing platform.
A professional image capture device that produces processed images. For example, an endoscope with a processing platform.

The processing platform can be moved completely or partially on the server.
For example, when the object is an image, the algorithm or the object processing operation corresponds to, but not limited to, the following.

-Statistically based calculations on automatic white balance, and / or
-Statistically based calculations on automatic exposure, and / or
-Statistically based calculations on autofocus, and / or
-Statistically based calculations on automatic contrast improvement, and / or

Conversion from raw image to visible image (“image pipe” or “image signal processing (ISP)” and / or
-Correction of optical disturbances and / or
-Improving the depth of field and / or

  -Patent application PCT / FR2006 / 050022 “Method for creating an image capturing and / or rendering device, and device obtained by this method” and / or Patent application PCT / R2006 / 2005 , Using a digital color image ", and / or

-Correction of sensor faults and / or
-Correction of imager faults and / or
-Processing operations, in particular sharpness improvement and / or
-Improving processing operations, in particular color expression, and / or
-Improving processing operations, in particular contrast expression, and / or
-Improvement of processing operations, in particular detail expression, and / or

-Noise reduction and / or-measurement and / or
-Compression and / or
-Decompression and / or
-Interpolation or zoom and / or
-Scanning and / or
-Special effects.

  According to the present invention, the processing operation applied to the object can be in a sequence of operations also called unique operations. The result from the specific operation is also referred to as basic information, and may or may not be the same type as the basic information of the object.

  A sub-object is a set of basic information that has a shape and size, and this shape and size can vary depending on the platform characteristics (especially in terms of memory size and type, and in the case of vector signal processors, the vector Depending on the size) but also on the characteristics of the object being processed.

In one embodiment, objects and sub-objects, and logical blocks have several dimensions.
The sub-object and logical block dimensions correspond to all or part of the object dimensions. The dimensions can be of various types, among others:

-Spatial. For example, distance, angle, or scrolling in the mesh.
-Time.
-Frequency. For example, color, frequency, frequency band.
-Phase.
-Decomposition according to vector space basis. For example, decomposition into wavelets, or decomposition into high and low bytes.

-In general, any spatial dimension of any topology.
The following non-exhaustive list provides examples of objects along with their dimensions.
-Still image with two dimensions. Each dimension corresponds to a distance, in particular a distance measured in pixels.

-Unprocessed still image with two dimensions. Each dimension corresponds to a distance, and each pixel is provided with a color, such as red, green, or blue.
-Still color image with two dimensions. Each dimension corresponds to a distance, and one dimension corresponds to a frequency representing a color channel, for example a frequency representing red / green / blue.
-A video with three dimensions. Two of the dimensions correspond to distances, particularly distances measured in pixels, and one corresponds to time.

-Relief image with three dimensions. The dimension corresponds to the distance.
-Relief image with three dimensions. Two of the dimensions correspond to distance and the third dimension corresponds to viewing angle.

A medical image having a distance dimension and possibly a channel dimension.
A hologram having a viewing angle dimension.
-More generally, images having dimensions of distance and / or angle and / or time and / or frequency.

-Voice with dimension corresponding to time.
-Speech with two dimensions corresponding to time and channel.
A modulated signal having one or more dimensions corresponding to time and possibly frequency and possibly position or angle in space;

  -Signal modulation and demodulation, measurement, data analysis, database indexing or searching, computer browsing, graphic processing, simulation, indicated by basic information arranged according to one or more dimensions.

-More generally, an object having one or more dimensions.
According to the invention, the basic information of an object can have an absolute position and / or scale, which can be in particular by space and / or time and / or frequency, as well It can also be according to any other one of the dimensions of the object.

-Basic information about the "audio" object can correspond to intensity. In this case, the basic information has an absolute position corresponding to a given moment in time, and in the case of multi-channel speech, it has an absolute position corresponding to a given channel.
-Basic information about "image" objects can correspond to pixels. In this case, the basic information has an absolute position corresponding to a position in the image, and in the case of a video image, it has an absolute position corresponding to a given moment in time.

  -Basic information about the "data simulation" object can correspond to the status. In this case, the basic information has an absolute position corresponding to the meshing node and a given moment in time.

  -Basic information about the "modulated signal" object may correspond to intensity and / or phase. In this case, the basic information has an absolute position corresponding to a given point in time, possibly corresponding to a given frequency and / or given position if multiple antennas or transmitters are used. To have an absolute position.

  In particular, the relative position according to at least one dimension in space and / or time and the absolute or relative scale can correspond to various concepts depending on the type of object. These apply between any two blocks, regardless of type (in the case of an image as described above, the logic blocks can be unprocessed, red, green, 8 bits, among others).

  If the object is a still image containing square pixels, the absolute or relative position can correspond to two values (vertical and horizontal) in one embodiment, and the absolute or relative scale can be two values (vertical and horizontal). Horizontal). Pixels on the top line of the object are (0; 0) (0; 1) (0; 2) as absolute positions. . . And the pixels of the nth line can have (n; 0) (n; 1) (n; 2) as absolute positions. In this case, the relative position can be coded as follows. That is, (-1; 0) indicates the top, (0; 0) corresponds to the null displacement, (0; 1) indicates the right, (2; -2) indicates 2 pixels down and 2 pixels left. Show. In this case, a relative scale of (0.5; 0.5) corresponds to half the resolution in each direction.

More generally, the combination of relative displacement and relative scale can be coded using two functions f and g as follows. That is, (f (x; y); g (x; y)) for each pixel in the absolute position. Note that rounding rules are necessary to take the closest pixel, for example. Therefore,
-The relative position above is coded with f (x; y) =-1 and g (x; y) = 0.

  The relative scale 0.7 is coded with f (x; y) = 0.7 * (x−x0) and g (x; y) = 0.7 * (y−y0). x0 and y0 correspond to parameters for absolute positions.

The distortion correction is coded with f and g corresponding to the distortion field.
YUV4: 2: 2 format change, ie YYUV using separate Y, U, V luminance and chrominance information is Y1 Y2 Y3 Y4. . . Y1 Y2 xx xx Y3 Y4 xx xx. . . Subsequent functions can be used to obtain That is, if x is an even number, f (x; y) = (x−x0) * 0.5, and if x−x0 is an odd number, (x + 1−x0) * 0.5 can be used, and f (y) = y-y0. x0 and y0 correspond to parameters relating to absolute positions.

  The following non-exhaustive list provides other examples of embodiments with a variety of different types of objects.

  -If the object is a still image containing hexagonal pixels arranged along a line, and two consecutive lines are offset by half a pixel, the absolute or relative position is two values (vertical and horizontal) The absolute or relative scale can correspond to two values (vertical and horizontal). The pixels on the top line of the object have absolute positions (0; 0) (0; 1) (0; 2) . . The pixels of the nth line are in absolute position if the line is an odd line (n; 0.5) (n; 1.5) (n; 2.5). . . (N; 0) (n; 1) (n; 2) if the line is an even line. . . Can have. The relative position can correspond to two values (vertical and horizontal), for example (−0.5; 0.5) indicates the upper right, (0, 1) indicates the right and (−0. 5; 1.5) indicates a pixel located to the right of the upper right pixel. In this case, the relative scale (0.5; 0.5) corresponds to half the resolution in each direction. Also, the combination of relative displacement and relative scale can be coded using the two functions f and g as follows. That is, (f (x; y); g (x; y)) for each pixel at the absolute positions x and y. Note that rounding rules are necessary to take the closest pixel, for example.

  If the object is a movie containing square pixels, the absolute or relative position can correspond to three values (vertical, horizontal, and time), for example (-1; 0; 0) is the same image Indicates the pixel located above, (0; 0; -1) indicates the pixel at the same position in the previous image, (2; -2; -1) indicates 2 pixels in the previous image The bottom and two pixels left are shown. Also, the combination of relative displacement and relative scale can be coded using the three functions f, g, h as follows. That is, (f (x; y; t); g (x; y; t); h (x; y; t)) for each pixel at the absolute position x and y at time t. Note that rounding rules are necessary to take the closest pixel, for example.

  If the object is a single channel audio, the absolute or relative position can correspond to one value (time). For example, (-1) indicates the previous time, and (2) indicates two hours later. In this case, the function f (t) enables the displacement and relative scale coding. Rounding rules are used to take the closest time.

  -If the object is multi-channel audio, the absolute or relative position can correspond to two values (time, channel). For example, (-1, 0) indicates the previous time on the same channel, (2, 1) indicates two times after the subsequent channel, and this channel is spatially arranged, for example, in a cyclic manner. Is done. Also, the combination of relative displacement and relative scale can be coded using the two functions f and g as follows. That is, (f (t; c); g (t; c)) for each audio sample located at time t in channel c. Note that rounding rules are needed, for example, to take the closest time and channel.

  If the object is a simulation mesh, the absolute or relative position can correspond to n values, each value corresponding to a space or time dimension according to the meshing topology. Also, the combination of relative displacement and relative scale can be coded using n functions. Note that rounding rules are needed, for example, to take the closest node and time.

  If the object is a modulated signal, the absolute or relative position can correspond to n values, each value being a time and, where appropriate, a frequency channel (transmission or reception on multiple frequencies) And, where appropriate, the spatial dimension (spatial transmitters or receivers spatially arranged). Also, the combination of relative displacement and relative scale can be coded using n functions and a rounding rule must be selected.

If the object is a set of measurements, the absolute or relative position can correspond to n values, each value corresponding to one of the object's dimensions, which in some cases It can be time, space, frequency, phase, or other types. Also, the combination of relative displacement and relative scale can be coded using n functions and a rounding rule must be selected.
In the general case where the object is an object of dimension n, the absolute or relative position can correspond to n values, each value corresponding to one of the object's dimensions, Depending on time, space, frequency, phase, or other types. Also, the combination of relative displacement and relative scale can be coded using n functions and a rounding rule must be selected.

  Various types of sub-objects that do not have an overlay are illustrated by FIGS. In these figures, one and the same image is represented by lines (lines 90, 91, 92, 93 in FIG. 1a), columns (columns 94, 95, 96, 97 in FIG. 1b), and any other form of sub-object ( It is shown that it can be divided even into the shapes 70, 71, 72, 73) of FIG. 1c or even into rectangles (shapes 60, 61, 62, 63, 64, 65, 66, 67 of FIG. 1d). If the sub-object does not have an overlay, it is necessary to access the basic information about the previous other sub-object during the filter calculation to process the basic information of the sub-object without losing the edge.

  Thus, in one embodiment, the object being processed has dimension DO and is decomposed into sub-objects having a selected dimension DSO from the object's dimension DO, the decomposition of the object according to at least one of the sub-object's dimensions The decomposition is such that the sub-object has no overlay.

In this configuration, there is no need to recalculate a specific instruction that directly or indirectly applies basic information belonging to two sub-objects.
In a preferred embodiment, the method further includes performing each specific operation exactly N times for each sub-object. Preferably, DSO will be equal to DO.

  In one embodiment, the method further includes adding at least one basic information to the object so that the object can be decomposed into sub-objects without overlay.

  The decomposition into sub-objects can also depend on the sequence of operations to be performed on the object, in particular the number and type of horizontal or vertical filters present in this sequence.

  Furthermore, when some of the sequence specific operations have edge effects, it is necessary to decompose the image into sub-objects with non-null overlays so that basic information is not lost during the execution of the algorithm. This configuration is shown in FIGS. 1e and 1f. FIG. 1e shows a sub-object containing 6 × 6 basic information when the sequence of operations loses one pixel at each edge, and FIG. 1f shows an object containing 100 basic information.

  In FIG. 1e, the sub-objects are shown as four rectangles 80, 82, 83, and 84, each containing 36 basic information. The rectangle 80 is composed of 36 pieces of basic information located at the upper left of the image, and the rectangle 82 is composed of 36 pieces of basic information located at the upper right of the image. Accordingly, the eight basic information 86 is common to both the sub-objects 80 and 82. Eight basic information 85 is common to both sub-objects 80 and 83. Eight basic information 88 is common to both sub-objects 82 and 84. Eight basic information 89 is common to both sub-objects 83 and 84. Finally, the four basic information 87 is common to all four sub-objects 80, 82, 83, and 84.

  If the object is an image, in one embodiment, the image is decomposed into juxtaposed rectangular sub-objects that are processed, for example, from left to right and then from top to bottom. Depending on the platform, sub-objects are selected and stored according to one of the following methods, including but not limited to:

  For signal processors with small fast access memory and large slow memory, the size of the sub-object is selected so that the sub-object can be processed without accessing the slow memory. For example, it is possible to adopt a sub-object corresponding to a square of 32 × 32 pixels, and data required for the calculation related to the next sub-object during the calculation related to the current sub-object is accessed from the low-speed memory at high speed. While being transferred to the memory, the result of the calculation for the previous sub-object is transferred to the slow memory.

  For scalar processors with small cache memory and large slow memory, the size of the sub-object is selected so that the sub-object processing can be implemented using as much cache memory as possible. For example, a sub-object corresponding to a square of 32 × 32 pixels, or a sub-object of 1 pixel, or a sub-object of 4 pixels (2 * 2) or N1 * 2 pixels, especially in the case of “raw” type raw images Can be adopted.

In the case of a vector signal processor, the size of the sub-object is selected as the same or a multiple of the size of the vector that the platform can process and store, eg adopting a sub-object corresponding to 64 horizontal pixels Can do.
Even if the object is of a different type than the image, the decomposition into sub-objects can be similarly adapted to the platform.

  The method according to the invention makes it possible to regularize the sequencing schedule of specific operations performed on sub-objects since the same quantity N of operations is performed each time. This simplifies the hardware architecture and algorithm. Execution of N operations each time is enabled by applying basic information belonging to a sub-object different from the sub-object to which the operation is applied in the execution of these operations.

  In this way, the basic information to which the operation k is applied may belong to the same sub-object or different sub-objects according to the type of specific operation and the position of the basic information in the sub-object.

  This also prevents “edge effects” from occurring at the boundaries of different sub-objects. In fact, using N unique operations that produce N results each time, you are forced to process all the basic information, including the basic information located at the edge of the sub-object. In this case, basic information belonging to another sub-object is requested during the execution of the operation.

  Furthermore, the method allows a number of consecutive specific operations to be applied to one and the same sub-object, for example to a line of the image, before proceeding to the next sub-object. Thus, after one line is read and applied to some specific operations, only the results needed to process other sub-objects can be written to memory and proceed to the next line, so the number of memory access operations Can be reduced.

  In one embodiment, the platform includes at least one inter-object communication memory for storing basic information and / or results from specific operations that are computed during processing of a sub-object and used to process another sub-object. Is provided. Thus, redundant calculations are reduced.

In yet another embodiment, the sequence of specific operations includes only one single specific operation that applies the same data during processing of the object.
In the following, “communication data” refers to basic information and / or the result of an operation used for the processing of several sub-objects or for several different specific operations.

Preferably, the communication data between sub-objects is selected such that their size and number of calculations are minimized.
For example, inter-object communication data according to one dimension includes, inter alia, input data to a filter according to this dimension, as well as data that will be combined with the filter output (which are correctly aligned with each other). If not).

  The inter-object communication memory, i.e., the memory used to store inter-object communication data, varies essentially according to the storage duration and speed required. For example, this memory is in a register and / or local memory for communication according to the dimensions of the internal sub-object scrarin group and / or local and / or shared memory for communication according to other dimensions. Can be.

  In one embodiment of the invention where the object includes a dimension DO, the basic information is first sent to the platform according to the selected DE dimension and then according to the other dimensions. In this embodiment, the sub-object has a dimension DSO that is selected from the object's dimension DO and includes the DE dimension, and the process includes at least one internal sub-object sculling group that is implemented according to the DE dimension.

The inner loop corresponds to a loop for processing sub-objects, which allows N data to be processed using Q processors.
This embodiment uses the memory where the component is located on the same component as the computing unit used for processing operations for inter-object communication, so that basic information is entered into the platform “in execution”, ie in real time. It is especially adapted for processing data at a high speed. Thus, component costs are reduced and memory access speed is proportional to the number of computing units. In particular, this embodiment is used in the case of scalar or vector signals or pipeline processors.

Preferably, the sub-object is a sub-object whose DSO is equal to 1, or a sub-object whose DSO is equal to 2 in the case of a “raw” image. In the latter case, the size of the sub-object in the second dimension is 2.
Preferably, the specific operation is performed by a calculation unit arranged according to the DE dimension.

Preferably, the size of the sub-object in each dimension is a multiple of the size of the processor matrix in that dimension.
Preferably, the dimension DSO is the DE dimension and is the smallest dimension of the dimension DO in order to reduce the required inter-object communication memory.

  Preferably, there is no sub-object overlay in any of the dimensions DO so that each basic information is processed only once. The loop is therefore embedded and therefore the code is compact.

Preferably, the computation is not recalculated during the processing of the two sub-objects.
Preferably, the sub-object scrollin groups are embedded according to the same order as the dimensions when the basic information arrives on the platform.

  In one embodiment where the object includes a dimension DO, basic information is sent to the platform according to the DE dimension of the object and then according to other dimensions. In this embodiment, the sub-object includes an object dimension DO, or includes a dimension DO-1 selected from the object dimension DO and not including the DE dimension. The processing further includes at least one internal sub-object scrarin group implemented according to the DE dimension.

  In another embodiment, the size of the sub-object in each dimension is the size of the object and / or the sending rate at which basic information is sent to the platform, and / or the platform computing rate, and / or the platform memory. At least one of the size and speed.

  In this embodiment, the component is a local memory located on the same component as the computing unit used for processing operations, and communication data according to DO-1 (one dimension does not correspond to DE) Local memory, which acts as a relay for slower shared external memory used for long-term storage, is used for object-to-object communication, at the rate at which basic information is entered into the platform "on the fly" Especially suitable when processing data. In this case, the size of the local memory increases with the size of the sub-object, the speed of the shared memory decreases with the size of the sub-object, and the size of the external memory is the size of the sub-object according to a dimension other than the DE dimension. It increases with size, so the size of the internal and external memory and the speed of the external memory can be adjusted by adjusting the size of the sub-objects. Thus, costs are reduced, memory speed is independent of object size, components can be optimized for object size, and reused with external memory for larger size objects.

  This embodiment is also more specifically adapted when the component processes basic information at a rate slower than the rate at which the basic information is entered into the platform and uses memory to store objects during processing operations. ing. In this case, the objective is to limit the size and processing speed of the internal memory to reduce the required internal memory size, number of computing units, and memory speed.

This embodiment applies inter alia to scalar or vector signals or pipeline processors.
Preferably, the specific operation is performed by Q computing units arranged according to a size dimension larger than Q.
Preferably, the size of the sub-object in each dimension is a multiple of the size of the processor matrix in that dimension.

Preferably, except for the DE dimension, the dimension DSO is the smallest dimension of the dimension DO to limit the required inter-object communication memory.
Preferably there is no sub-object overlay in any of the dimensions DO, so that each basic information can be processed only once. The loop is therefore embedded and the code is compact.

  Preferably, in the small size dimension, there is no overlay of sub-objects and the computation is not recalculated during processing of the two sub-objects, but in the large size dimension this is less important. This is because recalculation represents only a small cost.

  Preferably, during the calculation of the current sub-object, the inter-object communication data generated during the calculation of the previous sub-object is transferred from the local memory to the external memory, and the inter-object required for the calculation of the subsequent sub-object Communication data is transferred from the external memory to the local memory. Since the internal sub-object scrambled group is implemented according to the DE dimension, the transfer between the internal and external memories is only concerned with the inter-object communication data according to the dimension DO-1 excluding the DE dimension. Therefore, the required local memory is a size obtained by adding three times the size of the inter-object communication data according to these dimensions DO-1 and one time the size of the inter-object communication data according to the DE dimension. Limited. For example, for image processing algorithms, the required internal memory size is limited to hundreds or thousands of bytes to process tens of millions of pixels per second.

  Preferably, the data migrates as follows. That is, the basic information of the object is stored in the external memory. When at least one sub-object is in shared memory, the sub-object is read from external memory. Inter-object communication data according to the dimension DO-1 excluding the DE dimension is read from the shared memory. The result from the sub-object processing and the inter-object communication data according to the dimension DO-1 excluding the DE dimension are written into the shared memory. When complete data according to the dimensions used for output is in shared memory, this data is read in shared memory and made available. This makes the transition predictable, simple and regular.

Preferably, the sub-object scallin groups are embedded according to the same order as the dimensions when the basic information arrives on the platform.
The following embodiments can be applied to any processing operation on Q computational units included in a sequence of specific operations performed simultaneously on Q computational units in the case of a vector signal processor. This sequence does not necessarily apply to objects consisting of the same type of basic information. These embodiments describe a new method for setting up communications between different computing units, for example in the case of a vector signal processor.

  In one embodiment, where at least a portion of the specific operations apply at least one parameter value and the specific operations are performed by Q computing units that simultaneously calculate the same specific operations, the sequence of specific operations is Q calculations Including at least one unique selection operation for selecting a parameter value from C parameter values simultaneously on the unit. This selection is made in a differentiated manner by the processor according to at least one basic information and / or at least one specific operation result and / or at least one parameter value.

In one example, C is equal to 8.
To calculate the correlation table, for example, using three unique selection operations according to the input value X for the C modulo table, get the a, b, and c functions of X, corresponding to the parallel calculation of Q spline functions A * X ² + b * X + c can be calculated.
To determine the interpolation filter coefficients corresponding to n / C dephasing, a specific selection operation can be used according to the input value n giving the interpolation coefficients.

  To select a parameter value that is a function of absolute position, one can calculate a function of position that gives a result between 1 and C, and then use the result from this calculation to give a parameter value for the absolute position. Used for input for selection operations. Thus, for example, a position defuzzy intensity function can be adapted.

  To select a differentiated value for each of the intertwined channels in color, resolution, etc., a position function between 1 and C can still be calculated, and the result of this calculation is then expressed as an absolute position Used as input for specific selection operations that give parameter values for.

  Conventionally, in vector signal processors, specific operations for selecting data by either offset or permutation are known. However, the vector signal processor does not allow indirection to be performed on data C, especially when C is less than Q to optimize processor complexity.

  In one embodiment where Q processors correspond to vectors in one dimension, the C constants are expanded in a register of Q constants by replication. C constants to the right of the vector, then C constants, and so on. A value is selected from the value C to the left of each element of the vector using a unique selection operation.

  In one embodiment, where at least a portion of the specific operations are performed by Q computing units that simultaneously calculate the same specific operations, the sequence of specific operations includes at least one basic information and / or at least one specific operation result and / or Or at least one unique selection operation that performs selecting data from C data simultaneously on Q computing units in a manner differentiated by a processor according to relative displacement obtained from at least one parameter value. Including.

  In practice, in an example where Q computation units are arranged according to a circularly chained vector, each computation unit accesses data from its neighboring C on the left in a simultaneous and independent manner. Can do.

The unique selection operation can be conditional to allow selection from 2 * C or more data.
Thus, local deformations, for example distortion according to position, can be calculated and applied locally to the vector. The data can also be combined locally to create a filter, change the scale, or perform any other operation that applies local displacement.

  In one embodiment, a displacement that requires more than data C is decomposed into at least one uniform displacement followed by a differentiated local displacement performed using at least one selection operation. can do. Uniform displacement can be implemented, among other things, by applying several selection operations or by using a communication memory.

  In one example, the relative displacement is common to all basic information about a sub-object and / or object. In another example, the relative displacement is different for each basic information and may or may not depend on the absolute position of the basic information in the sub-object and / or the absolute position of the sub-object in the object. You can also. More generally, this displacement is the result of a calculation according to at least one basic information and / or at least one specific operation result and / or at least one parameter value.

  In one embodiment where the sequence of unique operations includes at least one unique position operation and the object includes a dimension DO, the unique position operation generates position information according to one of the dimensions DO.

  The positions are not particularly limited to those listed below, but the absolute position of the basic information in the object, the position of the sub-object, the position of the C modulo processor, the position of the multiscale data, the relative position in relation to the grid, or any other arbitrary Position.

  In one embodiment, the sequence of unique operations includes at least one unique operation that generates a relative position according to at least one basic information and / or at least one unique operation result and / or at least one parameter value.

The unique relative position calculation operation can be used before the unique selection operation.
In one example, the relative position is common to all basic information belonging to a sub-object and / or object. In another example, the relative position may vary from basic information to basic information, or may depend on the absolute position of the basic information in the sub-object and / or the absolute position of the sub-object in the object. You can also More generally, the relative position can be the result of a calculation according to at least one basic information and / or at least one specific operation result and / or at least one parameter value.

  The size of the sub-objects, that is, the quantity N of basic information present in each object is determined, for example, according to the architecture of the platform used for the processing operation. Thus, in one embodiment, at least a portion of the specific operations are performed by Q computational units, where Q is equal to or a divisor of N. With N being a multiple of Q, the processing operation becomes even more regular. This is because all the calculation units complete the calculation steps at the same time.

In one embodiment, unlike the number of Q processors and the number of N basic information, the processing of sub-objects includes only one inner loop of N / Q iterations.
Processing is therefore regular, the number of memory and registers used is minimized, and communication within each sub-object is preferably performed using registers.

  In one embodiment, there are tens to hundreds of computing units, which are inter alia for images containing tens of millions of pixels per second using the 0.13μ component manufacturing method. Enables the calculation of hundreds of operations.

In another embodiment, the number of computing units ranges from thousands to millions, and the present invention maintains this high level of programming simplicity while also maintaining performance in proportion to the number of computing units. Allows processing of objects using computational power.
To further improve this regularity, the number of unique operations P can also be a multiple of Q. In general, the specific operations are determined by the compiler upstream of the platform, and the compiler obtains this relationship (the number of specific operations is a multiple of Q) when the number of specific operations is not a multiple of Q. Configured to produce unique operations without effects. Thus, whatever the assignment of specific operations to the various computing units, the processing becomes completely regular.

  In one embodiment of the invention, all Q computing units in the platform are identical.

  Some specific operations use parameters, in which case the values of these parameters are also processed. These parameters can be, for example, multiplication factors. These parameters can correspond to, for example, but not limited to:

-Filter coefficients and / or-Saturation values and / or-Offset values and / or-Correlation tables

  In one embodiment, the value of the parameter used by the specific operations depends on the position in the sub-object of the basic information applied directly or indirectly in these specific operations. For example, if the object being processed is an image, defects may appear in the image due to the optical mechanism used for imaging. These defects are generally not uniform throughout the image, especially at the edges.

In this case, the same compensation factor is not applied to all pixels of the image to compensate for this blur.
For example, if parameters common to all basic information are used for the filter, the sharpness can be increased uniformly.

  For example, the use of parameters on the filter that depend on the absolute position of the basic information in the object being processed results in a sharper edge sharpness to compensate for optical defects.

  For example, using a parameter that depends on the absolute position of the basic information in the object being processed for vignetting correction produces a higher compensation at the edge to compensate for optical defects.

For example, if a parameter that depends on the absolute position of the basic information in the object being processed is used in a demosaicing operation, the “red”, “green”, and “blue” pixels in the raw image received from the sensor It can be processed in different ways.
For example, if the second data, in particular the displacement, that depends on the absolute position of the basic information in the object being processed is used in a digital magnification calculation (“zoom”) or distortion correction calculation, it is necessary to calculate the interpolation at each point. New pixels are generated.

The value of the parameter thereby depends on the type of this parameter
-Constant and specific to the algorithm. In this case, the value of the parameter can in particular be sent to the processing means or platform. And / or

  Depends on the source or destination of the object. For example, if the object being processed is an image from a device with a given optical mechanism, the value of the parameter may depend on the type of optical mechanism, and the optical mechanism type is Has an effect on the level of sharpness. In this case, the value of the parameter can in particular be sent to the processing means or platform. And / or

  Depends on the object being processed. For example, if the object being processed is an image from a sensor, the value of the parameter may depend on the sensor gain effectively used to capture this object, and the sensor gain is Has an effect on the noise level. In this case, the value of the parameter can be sent, selected or calculated by the platform, among others. And / or

  Depends on the absolute position of basic information in the object. In this case, the value of the parameter can be sent, selected or calculated by the platform, among others. And / or

-It does not depend on the absolute position of basic information in the object.
The parameter value can be determined simultaneously or apostorily in relation to the algorithm definition.

  We have seen that the value of certain parameters can vary from one object to another, from one sub-object to another sub-object, or from some basic information to another basic information.

  In this case, in one embodiment, the value of the parameter is calculated for each change. In another embodiment, the possible values of the parameter are calculated a priori and the index or address is determined for each change, thereby allowing access to the value of the parameter, for example in a table.

  Another embodiment is more specifically adapted to parameters, whereby values vary between one sub-object and another sub-object according to the absolute position of the sub-object and thereby limit the number of values (e.g. optical However, in this embodiment, a finite number of parameter value sets are determined, each set is stored, and for each sub-object, the set used is, for example, the set used. Is selected by calculating the function of the position giving the address of.

  The assignment of specific operations to a calculation unit depends on the type of operation, the sequence, and the calculation unit itself.

  For example, in one embodiment, the computing unit is specialized. That is, N results from one and the same specific operation are calculated by one and the same calculation unit. Placing specialized computing units saves time if a specific operation requires a parameter that resides in one of the platform's memories. This is because the computing unit responsible for this operation can perform a memory access at the beginning of the process to retrieve the parameters and then apply the operation N times without having to access the memory again.

  Thus, in one embodiment, when at least one specific operation applies at least one parameter, the specific operation is performed by at least one computing unit having access to a memory unit that includes a portion of the parameter value, The part is determined according to the specific operations performed by this calculation unit. Various hardware configurations can exist to store these parameter values, which will be described in detail later. For example, each computing unit can have its own memory, or there can be memory common to all units, or computing units can be grouped together and even have per-group memory. .

  In one embodiment, when at least one specific operation applies at least one parameter, the value of this parameter depends on the position of the sub-object and / or basic information in the object being processed.

  In some operations, the parameter value will be fixed for the entire object being processed, and in other operations this value will vary with position. Thus, for example, the image blur correction coefficient can be made somewhat higher depending on whether the position is the center or the edge of the image.

  Depending on the platform used to perform the processing operation, the configuration of the computing unit can vary. Thus, in one embodiment, the specific operation is performed by a chained computing unit.

  In fact, in this case, the computing units can be chained “in series” or according to a tree, and the result of the computation on the basic information being processed is transferred from one unit to another. Such a configuration is made possible by the regular processing operations and the ability to regularly migrate the basic information.

  The computing units can also be arranged in parallel to process some basic information simultaneously. In this case, the calculation units are chained so that the results of calculations (eg filters) from different basic information can be combined.

  In one embodiment, computational units are chained according to a chain in one dimension to facilitate cabling of components that include various processors. In another embodiment, the computing units are chained according to at least one cyclic chain. This latter embodiment produces uninterrupted processing operations. This is because the basic information moves through all the calculation units, undergoes some special operations, and is then sent again to the first calculation unit.

In one embodiment where the computing units are chained according to at least one circular chain, the chain also includes at least one queue.
This embodiment of the method can thus be implemented.
In another embodiment of the invention in which the sub-object includes a dimension DSO, the specific operations are performed by computational units chained according to at least one circular chain in each dimension of the sub-object. The circular chain (s) in each D1-specific dimension of the sub-object is further at least one shared or not shared between the circular chain (s) in the D1-specific dimension of the sub-object Includes queues.

This embodiment of the method can thus be implemented. This will be described in detail later with reference to the drawings.
Preferably, if there are several circular chains according to the same one dimension of the sub-object (especially when the processors are arranged according to the grid), the queue is shared among all circular chains according to the same dimension Is done. There is preferably exactly one queue for each dimension of the sub-object, and each queue is shared among all circular chains according to the same dimension.

  In another embodiment of the invention in which the sub-object includes a dimension DSO, the specific operation is performed by a computational unit chained according to the DD predetermined dimension of the sub-object using at least one CC1 circular chain. The CC1 cyclic chain further includes at least one queue. In this embodiment, the method further comprises, for at least one specific instruction, each time this specific instruction is applied, the result of this application of the specific instruction performed on the calculation unit UC1 according to this chain. Sending to the calculation unit UC2 or queue following unit UC1.

This embodiment of the method can thus be implemented.
In one embodiment, the sub-object includes a dimensional DSO and the specific operation is performed by a computational unit chained according to the DD predetermined dimension of the sub-object using at least one CC1 circular chain. The CC1 cyclic chain further includes at least one queue. The method further includes the following steps each time the specific operation is applied to at least one specific operation.

Send the result from the above application of the specific operation performed on the calculation unit UC1 to the calculation unit UC2 or queue following this calculation unit UC1 according to this chain.
Conditionally sending the result of applying a specific instruction sent to the queue during the processing of another sub-object from the queue to a subsequent processing unit UC0 in the queue according to the position of the sub-object in the object .

In one embodiment, each computing unit belongs to at least one chain, which is in each dimension of the sub-object.
In one embodiment, the method further determines the result of this application of the specific instruction implemented on the computing unit UC1 each time one of the two specific instructions is applied to at least two specific instructions. Each of which includes sending to a calculation unit UC2 or queue following this calculation unit UC1 according to a chain determined in an independent manner. In practice, the chain used depends on the type of filter (eg vertical or horizontal) performed by the specific instruction sequence.

In one embodiment, there are two types of specific operations:
-Do not apply chaining.
Or apply the chain systematically, ie each time a specific operation is performed. In this case, all chains applied by the same specific operation by different processors follow the same dimensions.

  In one embodiment, the specific operations are performed by computational units that are chained according to at least one circular chain. This chain allows results from a specific operation to be sent to subsequent processors or queues in the chain for the processor that generated the result.

  In one embodiment, the specific operations are performed by computational units that are chained according to at least one circular chain. This circular chain further includes at least one file. This file makes it possible to send the results from the specific operations required for the calculation of at least one other sub-object.

  In another embodiment, the method causes a result from a specific operation used during a sub-processing operation of another sub-object to be stored in memory together according to the relative position of this other sub-object in relation to that sub-object. Grouping and storing.

  In one embodiment, the method further includes grouping together results from a specific operation used during sub-processing of another sub-object together into at least one queue.

  Further, in some embodiments, the method further includes providing instructions to the platform that allow at least a portion of these results from the specific operation to be held in memory or a queue.

  Processing operations must, of course, be adapted to this platform configuration in order to optimally utilize the platform hardware capabilities. To this end, in one embodiment, the method includes assigning specific operations to computing units according to a chain of computing units and according to a sequence. This step can also be performed by a compiler located upstream of the platform.

  Furthermore, in order to make the best use of the capabilities of the platform, it is also possible to use programmable calculation units, ie a sequence of specific operations and / or assignment of specific operations to the various calculation units. It can be interesting to be able to modify a component that contains after it has been created. Thus, in one embodiment, the order and / or nature of specific operations can be modified. However, even if the computing unit is programmable, the computing unit can be programmed first when the component is created. Thus, in one embodiment of the invention, the specific operation is performed by a cabled computing unit according to at least one predetermined specific operation sequence. This embodiment avoids the need to use external memory, for example. In fact, rather than having such a memory contain the sequencing schedule of operations that will be performed on the algorithm, the operations will be performed in the order corresponding to this algorithm that will be applied to the object. The calculation unit can be cabled to.

  The platform on which the processing operations are performed can have various types of memory, and these memories vary in both capacity and access speed. For example, high speed memory and / or registers can be used to store the results from an operation over a short period of time, for operations such as filters that require certain types of data to be reused immediately. Thus, in one embodiment, at least one unique operation is performed by at least one computing unit with a limited capacity memory unit for storing basic information and / or results from the unique operation, Contains at least 16 basic information and / or results from specific operations. Here, high speed memory is generally limited in capacity, so in some cases it may be necessary to also have more memory to store more basic information and / or results from specific operations.

  To this end, in one embodiment, the at least one specific operation has at least one computation with access to a communication memory unit that includes at least one basic information from other sub-objects and / or at least one specific operation result. Implemented by the unit.

  This communication memory is typically used to store basic information and / or results from specific operations used to process other sub-objects over a long period of time. Only some of the specific operations generate or use such data, so the required speed is limited. The regularity provided by the present invention allows a very simple decision as to what this data is, thus avoiding the need to use a cache memory mechanism, thereby reducing platform complexity and cost. Thus, in one embodiment, the communication memory unit has a lower access speed than 0.3 * N access / sub-object / specific operation. Such a memory with a relatively low access speed is less expensive than if a memory with both high speed and high capacity was required. This is one of the advantages of the present invention.

  If the processing platform is a processing platform with reduced memory capacity, the size of the sub-object must be selected so that the processing operation can be applied correctly. Thus, in one embodiment used especially when the platform is integrated into a mobile phone, the value of Q is fixed at 1 and the value of N is comprised between 2 and 16. For example, if the platform is adapted to process photos taken by a mobile phone, all operations will be applied one single pixel at a time.

  Conversely, in some cases, such as when the platform is equipped with a vector signal processor, it is possible to have multiple computing units. This hardware configuration allows for faster processing of objects when the computing unit is used with moderation. For this purpose, in one embodiment, at least one specific operation is performed simultaneously by at least two identical computing units. Thus, the present invention allows for optimal use of the processor due to the regularity of the processing operations.

Depending on the embodiment, the specific operations include at least one specific calculation operation from the group including addition, subtraction, multiplication, application of correlation table, minimum value, maximum value, and selection.
Thus, in one embodiment, the at least one unique calculation operation also performs offset and / or saturation and / or rounding. According to the present invention, the unique selection calculation operation allows data to be selected from at least two data items according to the value of the third data item.

  In one embodiment, the application of the correlation table is performed by calculation using a table entry and a finite number of coefficients. In one embodiment, the finite number of coefficients is fixed at 8.

  Furthermore, in another embodiment, the specific operation is performed by a chained computing unit using at least one circular chain CC1. This circular chain CC1 further includes at least one queue. At least one specific operation IS4 from the specific operation sequence sends the result of the specific operation IS5 performed on the calculation unit UC1 to the calculation unit UC2 or queue following this calculation unit UC1 according to this chain.

  In one embodiment, the IS4 specific operation sends the result of the specific operation IS5 performed during the previous sub-processing operation from the queue to the calculation unit UC0 following the queue. Preferably, the queue allows data to be output in the same order as entered in the queue. Preferably, the chain comprising computing units and queues includes a mechanism that allows management of boot operations. The queue is initialized periodically, for example at the beginning of each line if the queue is part of a horizontal chain and the object is an image. At the first execution of the specific instruction IS4, no data is sent from the queue to UC0. Next, the specific operation IS4 sends the result of the specific operation IS5 performed during the previous sub-processing operation from the queue to the calculation unit UC0 following the queue.

    The values N and Q vary according to the embodiment. Each embodiment has different advantages. Thus, in one embodiment, N is not a multiple of Q. In one alternative of this embodiment, Q is equal to the number of unique operations in the sequence obtained by transforming the sequence of general operations.

  In one embodiment, N is a multiple of Q. This makes the process regular. Preferably, N = Q. This reduces the amount of memory required to store temporary results.

In one embodiment, Q = 1 and N = 4. This allows the same parameter value to be reused to apply the same specific operation multiple times.
In one embodiment, Q> 1 and N = Q. This makes it possible to use 100% of the Q calculation units of the vector signal processor.

  In one embodiment, Q> 1 and N is a multiple of Q. This allows 100% of the vector signal processor's Q computational units to be used, reducing the quantity of results from specific operations performed during processing of a sub-object and used to process another sub-object. Can do.

In one embodiment, each processor performs all operations in a sequence of specific operations.
In one embodiment, all processors perform the same specific operation simultaneously. In another embodiment, all processors perform the same specific operations sequentially, which allows recursive filter implementation.

  Storing basic information and operation results in memory requires relatively simple addressing so as not to waste too much time during basic information retrieval. To this end, in one embodiment, at least a portion of the unique operation result is stored in memory at an address of the format “base address + offset” or “base address + mod offset (buffer memory size)”, where the offset is: It is constant for all results from one and the same specific operation. The buffer memory is preferably integrated into one of the processing platform's memories. In particular, the buffer memory can be a queue.

In another embodiment, the base address is modified each time a sub-object is changed in a processing operation.
In one embodiment, this addressing can be used, inter alia, for data for communication between sub-objects according to at least one dimension.

  In the particular case of vector signal processors, the address calculation is common to all processors, and memory can be used to deliver basic information on the size of the sub-objects and / or groups of specific operation results.

  It has been shown above that in certain hardware configurations each computing unit has its own memory. In this case, a given address may be related to several memories. That is, the memory address defined here actually represents all memory addresses used by all computing units performing one and the same specific operation.

In one embodiment, at least a portion of the unique operation result is stored in memory at a predetermined address for all results from the same unique operation.
The above method is such that the number of computing units required to perform the processing operation can be made relatively small. Thus, in one embodiment, when a specific operation is performed by at least one computing unit with at least one register unit and at least one sub-object communication memory, the number of transistors on the processing platform is no communication memory. The number of related registers is less than 10,000 per calculation unit.

  In one embodiment of the present invention, the platform is preferably provided directly with specific formatted data calculated based on the generic formatted data, the generic formatted data comprising at least one generic operation sequence. The calculation of specific formatted data, including the first data to be described, is performed reflecting the scrolling mode for basic information in the platform and the specific operations from general operations, and these specific operations are performed in the platform. Form a sequence of specific operations performed on the object during the processing of the object at Thus, the processing of an object can be easily modified by changing the generic formatted data to automatically obtain specific formatted data optimized for the platform. This accelerates the time it takes to release the platform to the market. Thereby, the code size, the calculation time and the quantity of memory are optimized. This reduces electrical consumption and platform costs.

  A generic operation is an operation applied to a logical block or abstract entity that consists of basic information and can constitute all or part of an object without the concept of size or format.

  In this description, generic formatted data is digital data that is used to describe processing operations to be performed on objects by a data processing platform, independent of the platform itself. Specific formatted data can be provided directly or indirectly by using a compiler to generate binary code adapted to the platform that uses the specific formatted data.

  There are various possible scrolling modes, some of which are described further below. These scrolling modes can also be used to generate specific operations that are applied to the object being processed. This makes it possible to market the algorithm in a relatively short period of time.

  In one embodiment, the general operations include at least two of logical block and / or parameter addition, logical block and / or parameter subtraction, calculation of absolute values of differences between logical blocks, logical block and / or parameter multiplication, Maximum value of logical blocks and / or parameters, minimum value of at least two logical blocks and / or parameters, application of correlation table, conditional selection of logical blocks and / or parameters (this selection is a> b If c is selected, otherwise d is selected (a, b, c, and d are logical blocks and / or parameters), histogram for logical block, scale for logical block Modify, create a block containing at least one coordinate, Included in the group comprising at least one basic generic operations.

  In another embodiment, the basic information is represented by a numerical value at a fixed point, and the general operation includes an offset operation, a saturation operation, and / or at least one basic general operation combined with the saturation operation.

  It is clear that all the hardware characteristics just defined are valid no matter what type of platform is used or what type of object is to be processed.

Thus, in one embodiment, the object being processed is an image and the basic information is the pixels of this image. In this case, the processing platform is for example part of an image capture and / or rendering device, and the operation has parameters with values that depend on the sequence of operations and / or on the processing platform and / or on the object being processed. These parameter values are linked to the optical and / or sensor and / or imager and / or electronic and / or software characteristics of the image capture and / or rendering device. The characteristic can be, for example, a unique fixed characteristic for all objects, or it can be a variable according to the object, for example, a noise characteristic that varies with the gain of the sensor. The characteristic can also be the same for all basic information or variable information according to the absolute position of the basic information, for example an optical sharpness characteristic.
In other embodiments, the object being processed is a digital audio signal and the basic information is in the audio samples of this signal. Furthermore, the objects to be processed are even numerical meshes, and the basic information is space and time information characterizing each point of meshing.

  The present invention also includes one or more processors that are to process an object (55) consisting of the same type of basic information (54, 56, 58, 60, 154, 156, 158, and 160). With respect to a platform having a memory, this platform defines the object to be processed at least two sub-objects (50, 51, 52, each comprising N basic information (54, 56, 58, 154, 156, 158)). And 53) in which all sub-objects (50, 51, 52, and 53) have the same quantity N of basic information, and basic information (50, 51, 52, 53 of each sub-object). Means for performing at least one specific operation sequence for Means for performing each specific operation at least N times for each sub-object, so that, on the one hand, each basic information of each sub-object is applied at least once, and on the other hand N results of each specific operation are generated And the processing means is configured such that at least one unique operation (62) of the sequence of unique operations is at least once out of its entire N applications (62a, 62b, 62c, 62d, 62e, 62f) This is a processing means for applying basic information (60, 160) belonging to a sub-object directly or indirectly.

  In one embodiment, the object being processed includes a dimension DO, the sub-object includes a dimension DSO selected from the object's dimension DO, and the means for decomposing the object includes the sub-object according to at least one of the sub-object dimensions. Is a means that does not have an overlay.

  Thus, preferably the specific operation is performed by a computing unit chained according to at least one circular chain according to a dimension in which the sub-objects do not have an overlay.

Also preferably, the sub-object does not have an overlay according to any dimension.
In one embodiment, the platform includes at least one inter-object communication memory for storing basic information and / or results from specific operations that are performed during processing of a sub-object and used to process another sub-object. Is provided.

  In one embodiment, the platform comprises means for performing a sequence of specific operations that does not include specific operations that apply the same data during processing of the object.

  In one embodiment, the object includes a dimension DO, and basic information is received in the platform according to one of the object's DE dimensions and then according to the other dimension, and the sub-object is selected from the object's dimension DO and the DE dimension. The platform is a platform in which the internal sub-object scraulin group included in the processing operation is implemented according to the DE dimension.

  In one embodiment, the object includes a dimension DO and the basic information is received in the platform according to one of the object's DE dimensions and then according to the other dimension, and the sub-object includes the object's dimension DO, or The platform is a platform that includes a dimension DO-1 that is selected from the object's dimension DO and that does not include the DE dimension, and in which the internal sub-object scallin group included in the processing operation is implemented according to the DE dimension.

  In one embodiment, the means for decomposing the object to be processed includes the size of the sub-object in each dimension, the size of the object, and / or the rate at which basic information is received by the platform, and / or the computational rate of the platform, And / or means as determined according to the size and speed of at least one of the memory of the platform.

  In one embodiment, if at least a portion of the specific operation applies at least one parameter value, the platform comprises Q calculation units that simultaneously calculate the same specific operation, and the platform further includes at least one specific selection operation. Means for performing at least one unique operation sequence comprising, wherein the unique selection operation is differentiated for each processor according to at least one basic information and / or at least one unique operation result and / or at least one parameter value. In this manner, the parameter value is selected from the C parameter values simultaneously on the Q calculation units.

  In one embodiment, the platform comprises Q computing units that simultaneously compute the same unique operation, and further comprises means for performing at least one unique operation sequence including at least one unique selection operation, the unique selection operation Can simultaneously retrieve data items from data C on Q computing units in a differentiated manner per processor according to at least one basic information and / or at least one specific operation result and / or at least one parameter value. Make a selection.

  In one embodiment, the platform comprises means for performing a sequence of unique operations including at least one unique position operation, the object includes a dimension DO, the unique position operation comprising position information according to one of the dimension DOs. Is generated.

  In one embodiment, the platform performs a sequence of specific operations including at least one specific operation that generates a relative position according to at least one basic information and / or at least one specific operation result and / or at least one parameter value. Means.

In one embodiment, the platform comprises Q computing units for performing at least a portion of the specific operations, where Q is equal to or a divisor of N.
In one embodiment, the number of Q computational units is different from N, and the processing of the sub-object includes one single inner loop of N / Q iterations.
In one embodiment, the platform is such that Q computing units are the same.

In one embodiment, the platform comprises means such that N results from one single specific operation are calculated by one and the same calculation unit.
In one embodiment, the platform comprises means for performing the specific operation when the at least one specific operation applies at least one parameter, and the platform further provides access to a memory unit that includes a portion of the value of the parameter. The platform is such that this part is determined according to the specific operations performed by this calculation unit.

In one embodiment, the platform comprises means such that when at least one specific operation applies at least one parameter, this parameter depends on the sub-object in the object being processed.
In one embodiment, the platform comprises chained computing units.
In one embodiment, the platform comprises computational units chained according to a chain and a dimension.

In one embodiment, the platform comprises computing units that are chained according to at least one circular chain.
Further, this chain may include at least one queue in one embodiment.

  In one embodiment, where the sub-object includes a dimensional DSO, the platform comprises computational units chained according to a circular chain in each dimension of the sub-object. The circular chain (s) in each D1-specific dimension of the sub-object is further at least one shared or not shared between the circular chain (s) in the D1-specific dimension of the sub-object Includes queues.

  In one embodiment, the platform comprises computational units that are chained according to at least one of the predetermined dimensions DD of the sub-objects using a circular chain CC1. The cyclic chain further includes at least one queue. The platform ensures that each time a specific instruction is applied, the result of this application in the first calculation unit UC1 is sent to the calculation unit UC2 or queue following this first calculation unit UC1 according to this chain. Platform.

  In one embodiment, the platform has at least one for storing a result from a specific operation used during a sub-processing operation of another sub-object according to the relative position of this other sub-object in relation to that sub-object. With two memories.

  In yet another embodiment, the platform comprises computing units chained according to at least one cyclic chain and means for assigning specific operations to the computing units according to the chain and sequence of computing units.

In one embodiment, the platform comprises means such that the order and / or type of specific operations can be modified.
In one embodiment, the platform comprises a cabled computing unit for performing specific operations according to at least one predetermined specific operation sequence.

  In one embodiment, the platform comprises at least one computing unit with a limited capacity memory unit for storing basic information and / or specific operational results, the memory comprising at least 16 basic information and // includes specific operation results.

In one embodiment, the platform comprises at least one computing unit having access to a communication memory unit that contains basic information and / or specific operational results from other sub-objects.
In one embodiment, the platform is such that the communication memory unit has a lower access speed than 0.3 * N access / sub-object / specific operation.

In one embodiment, the platform is inter alia integrated into a mobile phone and comprises means such that the value of Q is fixed at 1 and the value of N is comprised between 2 and 16.
In one embodiment, the platform comprises at least two identical computing units that perform at least one specific operation simultaneously.

  In one embodiment, the platform comprises means such that at least a portion of the specific operation result is stored in memory at an address of the format “base address + offset” or “base address + mod offset (buffer memory size)”. , The offset is constant for all results from one and the same specific operation.

In one embodiment, the platform comprises means for modifying the base address each time a sub-object is changed in a processing operation.
In one embodiment, the platform comprises means such that at least a portion of the specific operation results are stored in memory at a predetermined address for all results from one and the same operation.

  In one embodiment, the platform comprises at least one computing unit with memory, and the number of transistors is less than 10,000 per computing unit, including the associated memory unit.

  In one embodiment, the platform comprises means for receiving, preferably directly on the input, specific formatted data calculated from the universal formatted data, the universal formatted data describing at least one universal operation sequence. The calculation of the specific formatted data is performed reflecting the scrolling mode for basic information in the platform and the specific operations from the general operation, and these specific operations are sequence of specific operations. And the platform comprises means for performing this specific sequence of operations on the object.

In one embodiment, the platform comprises means for processing an object composed of an image, the basic information being the pixels of this image.
In one embodiment, the platform is part of an image capture and / or rendering device, and the operation has parameters with values that depend on the sequence of operations and / or on this platform and / or the object being processed. These parameter values are linked to the optical and / or sensor and / or imager and / or electronic and / or software characteristics of the image capture and / or rendering device.

In one embodiment, the platform comprises means for processing an object composed of a digital audio signal, the basic information being audio samples of this signal.
In one embodiment, the platform comprises means for processing objects composed of numerical meshes, and the basic information is spatial and temporal information characterizing each point of meshing.

The present invention also relates to an object processed by the processing method according to the above method.
Other features and advantages of the invention will become apparent from the non-limiting description of some of its embodiments. This description is supported by the figure.

The device shown in FIG. 2 is used to process an image 22, which is a set of pixels represented by at least one numerical value.
In this device, the generalized formatted data 12 is provided to the digital data processing means 10. This processing means can be, for example, a compiler.

  The general formatted data supplied by the method according to the present invention includes first and second data 14, which describe a sequence of general operations, and for these general operations. Provides the relative position of the relevant logical block. The first and second data are illustrated in FIG.

The processing means 10 also receives on the input a scrolling mode 24 for basic information in the platform, determined according to the characteristics of the processing platform 20 such as an image capture or rendering device.
Using this generic formatted data 12 and these parameters, processing means 10 provides processing platform 20 with specific formatted data 18.

  Specific formatting data includes various types of data, such as the configuration of pixels in the platform's memory, the order in which pixels are processed by the platform, and data regarding grouping of specific operations performed by the platform.

  The platform 20 then uses this specific formatted data 18 to process the image 22 received inbound.

  Table 4 below and FIG. 3 show examples of generic formatted data in the form of a generic operation sequence applied to logical block B1. This sequence includes three general operations. The columns in the table indicate the following items in order.

-The rank of the operation in the sequence.
-Name of the generic operation.
A logical block (output) where the result of a general operation is written. That is, where this result will be located if the object is reconstructed at the end of each operation.
-The first input of the general operation (input 1). This can be a logical block or a parameter.

The relative position of the logical block used in relation to the logical block at input 1 when appropriate.
-Second input of general operation (input 2). This can also be a logical block or parameter.
The relative position of the logical block used in relation to the logical block at input 2 when appropriate.

The information located in the column “relative position” is information present in the second data provided to the processing means using the method according to the invention.
In one embodiment, the generic formatted data includes second data, the second data being blocks in relation to each other according to at least one of the dimensions of the object, especially spatially and / or temporally. And / or relative scale of logic blocks and / or parameters in relation to each other, referring to the relative position of parameters and / or according to at least one of the dimensions of the object, in particular spatially and / or temporally Refer to

  In this table, this information is presented in the form of “left” and “right” for simplicity, but is actually a numeric value such as (0; 1) in general formatted data and / or It is also possible to code with a function such as f (x; y).

  In one embodiment, one generic operation generates a logical block composed of absolute positions according to one of the dimensions of the object, and another generic operation called indirection is performed from the third block to the second A block is generated by a displacement and / or a scale change indicated by the block. In this case, a function that provides a relative position and / or relative scale by using a general operation on the block and then performing a relative displacement and / or a corresponding relative scale change using a general indirection operation, eg 0 .5 * (x-100) can be calculated.

Table 4 is only an example of coding, and the first data and the second data can be coded in various ways, coding in table format, but in symbolic format, graph format, or any other format be able to. Further, in this example, additional information regarding data type, offset, and saturation is not shown for simplicity.

  The first logical block used in this operation sequence is the logical block B1 (51). The first general-purpose operation is addition (52) of the logical block B1 (51g) shifted to the left and the logical block B1 (51d) shifted to the right. The result of this addition is recorded in block B2 (53). That is, B2 = B1left + B1right.

  The second operation (54) is to transform block B2 (53) in relation to the table. This operation therefore has a block B2 (53) in the input and a parameter Param1 (55) representing the correction table. The result of this operation is recorded in block B3 (56). That is, B3 = LUT (Param1, B2).

The third and final operation (57) in this sequence is a logic block multiplication. This operation has logical block B3 (56) and logical block B1 (51), ie B4 = B3 * B1 for the input.
Therefore, the logical block B4 (58) is a block obtained at the end of the general operation sequence.

  The generic formatted data in the example of Table 1 includes the platform, the decomposition of the object into sub-objects, the scrolling mode of the object's basic information, the order in which the basic information will be processed in the platform, and Independent of the stored configuration. In fact, the generalized formatted data in Table 1 can be converted into specific formatted data and platform code in various ways, for example, but not limited to, according to the conversions listed below.

The first transformation example illustrates a simple transformation that is not optimal in terms of memory and computation time but does not involve decomposition into sub-objects.
For each pixel BP1 of the input object (corresponding to logical block B1), excluding the two columns on the left and right (pixels are scrolled from left to right and then from top to bottom)
The left pixel and the right pixel of the current pixel are added, and the result is stored in the physical block BP2 (corresponding to the logical block B2).

For each pixel of BP2 that is scrolled from left to right and then from top to bottom,
Apply the table to the current pixel and store the result in physical block BP3 (corresponding to logical block B3).
For each pixel in BP3 that is scrolled from left to right and then from top to bottom,
The current pixel is multiplied by the corresponding pixel of BP1, and the result is stored in physical output block BP4 (corresponding to logical block B4).

  The second conversion example shows that the size and memory used can be reduced without changing the generic formatted data. In fact, in the first example, four physical blocks of a size close to the image are used. Using the same memory for BP2, BP3, and BP4, only two physical blocks can be used. The following conversion is obtained:

For each pixel BP1 of the input object (corresponding to logical block B1), excluding the two columns on the left and right (pixels are scrolled from left to right and then from top to bottom)
The left pixel and the right pixel of the current pixel are added, and the result is stored in the physical block BP2 (corresponding to the logical block B2).

For each pixel of BP2 that is scrolled from left to right and then from top to bottom,
Apply the table to the current pixel and store the result in physical block BP2 (which now corresponds to logical block B3).

For each pixel of BP2 that is scrolled from left to right and then from top to bottom,
Multiply the current pixel by the corresponding BP1 pixel and store the result in physical output block BP2 (which now corresponds to logical block B4).

  The third conversion example shows that the calculation time can be shortened without changing the general formatted data. In fact, in the second example, two physical blocks of a size close to the image are used, but physical block BP2 is completely written three times, physical block BP1 is completely read twice, and physical block BP2 Is completely read twice. This can be limited to only one read and one write using different scrolling modes and different blocks. This reduces the number of operations required, but also reduces memory access requirements. In this case, the sub-object is composed of one pixel. The following conversion is obtained:

For each pixel BP1 of the input object (corresponding to logical block B1), excluding the two columns on the left and right (pixels are scrolled from left to right and then from top to bottom)
The following specific operation sequence is performed. Add the left and right pixels of the current pixel, apply the table to the result, multiply the table output by the current pixel, and store the result in the current physical output block BP2 (corresponding to logical block B4) .

The fourth example is more specifically adapted to a cached scalar processor, but in this fourth example, the result is written to the same memory zone as the input. This further reduces the memory size and makes memory access local. This is very beneficial in the case of cache memory or paged memory. In this case, the sub-object is composed of one pixel. Thus, the following conversion is obtained:
For each pixel BP1 of the input object (corresponding to logical block B1), excluding the two columns on the left and right (pixels are scrolled from left to right and then from top to bottom)
The following specific operation sequence is performed.

  Adds the left and right pixels of the current pixel, applies the table to the result, multiplies the table output by the current pixel, and replaces the result in the current physical output block BP1 with the pixel to the left of the current pixel (This left pixel is no longer used, as opposed to the current pixel, which becomes the left pixel for the next iteration). BP1 partially corresponds to logical block B4 and partially corresponds to logical block B1).

  The fifth transformation example is particularly adapted to signal processors with small fast access memory and large slow memory, where each sub-object maximizes the use of, for example, a 32 × 32 rectangle, or fast access memory A rectangle of any other value, and the rectangles are adjacent. Thus, the following conversion is obtained:

For each sub-object (sub-object is scrolled from left to right and then from top to bottom)
Begins transferring the next physical input block from low-speed memory to high-speed access memory via a DMA ("direct memory access") mechanism. This physical input block corresponds to the next sub-object that is expanded by one column on the left and one column on the right to become 32 × 34.

Begins transferring the previous physical output block from the fast access memory to the slow memory via a DMA ("direct memory access") mechanism.
Extended with additional columns to the left and right to 32 × 34, take the physical block corresponding to the current sub-object obtained at the end of the DMA of the previous iteration.

The following specific operation sequence is performed. For each pixel (scrolled from left to right and then from top to bottom) of the physical input block (corresponding to logical block B1), excluding the two columns on the left and right,
Add the left and right pixels of the current pixel, apply the table to the result, multiply the table output by the current pixel of the block, and store the result in the current physical output block (corresponding to logical block B4) To do.

  The sixth transformation example is particularly adapted to a vector signal processor that can apply one and the same calculation to different pixels of a vector, each sub-object being a rectangle of 64 horizontal pixels, for example, or a platform A rectangle of any other value equal to the size of the vector that can be processed and stored. This transformation does not require any memory since the vectors are processed one at a time. Thus, the following conversion is obtained:

  For each sub-object V1 of input object BP1 (corresponding to logical block B1), excluding the left two columns (sub-objects are scrolled from left to right and then from top to bottom), the following specific operation sequence: To implement.

At the start of each line, a vector V0 is generated containing the two left-hand pixels of the line on the right.
A vector V2 corresponding to the two right pixels of V0 and the left pixel of V1 excluding the two right pixels of V0 is extracted from V0 and V1. V1 and V2 are added to obtain V2, and a table is applied to each pixel of V2 to obtain V2. A vector V3 corresponding to the right pixel of V0 and the left pixel of V1 excluding the right pixel of V0 is extracted from V0 and V1. Copy V1 to V0 for the following iterations: That is, V2 is multiplied by V3 to obtain V2, and the result V2 is stored in the current physical output block.

  The third, fourth, fifth, and sixth examples above correspond to embodiments according to the present invention, particularly for various platforms having different architectures in terms of memory and parallel processing. In the present invention, in particular,

-Only one single loop can be used to reduce the size of the code. And / or
-The size of the memory can be reduced to 0 in the example, but in some more general cases with a vertical filter, several memory lines are Is needed. And / or

-The number of instructions needed can be reduced, especially by grouping loops. And / or
-Can be adapted to any size vector. And / or
-Adaptable to any memory architecture.

  For simplicity, these examples produce an image that is smaller than the input image. If necessary, an output image of the same size as the input image can be easily obtained by duplicating the edge pixels by adding code at the beginning and end of each line.

  FIG. 4 shows the structure of the specific formatted data at the output of the processing means 10. This data is to be provided to the processing platform 20 in accordance with the method according to the present invention.

  The specific formatted data is processed using the generic formatted data 32 provided to the processing means and using the mode 34 for scrolling the basic information in the platform determined by the processing means. Calculated by means. The generic formatted data includes first data 36 that includes data 38 that describes at least one generic operation or sequence of operations performed by the processing means. The generic formatted data also includes second data 40 that refers to the position and relative scale of the logical block relative to each other for general operations using at least two logical blocks. Using this generic formatted data and scrolling mode 34, the processing means provides data 42 related to the specific operation and data 44 related to the loop. This data 42 and 44 is part of the specific formatting data 30.

  FIG. 5 illustrates the application of operations or object specific operations. In this figure, the object 55 is divided into four sub-objects 250, 251, 252 and 253. Each sub-object consists of six basic information. Operation 262 is one of the sequences of operations applied to object 255. This operation is applied six times for each sub-object (262a, 262b, 262c, 262d, 262e, and 262f), thereby producing six results (264). Operation 262 applies basic information about another sub-object while being applied six times to one sub-object. For example, the operation 262 is applied to the sub-object 250 as follows. Application 262 a applies basic information 254 and 256, application 262 b applies basic information 256 and 258, application 262 c applies basic information 258 and 260, and basic information 260 belongs to sub-object 252. The application 262d applies basic information 154 and 156, the application 62e applies basic information 156 and 158, the application 62f applies basic information 158 and 160, and the basic information 160 belongs to the sub-object 252.

  The following are some examples of scrolling modes that can be determined by the method according to the invention. Each of these scrolling modes is intended to be used in the platform of the architecture shown in one of FIGS.

  In the first example shown in FIG. 6, the processing platform comprises five processors chained in one dimension. That is, the calculation result output from the processor ProcA is used for input to the processor ProcB, and so on. The basic information output from the ProcE processor is applied to the input of the processor ProcA.

  Each processor is equipped with a memory unit of limited capacity, referred to as MemA to MemE. The memory unit is adapted to store parameter values used for specific operations performed by the processor, or basic information or results from operations that are defined for immediate reuse by the processor.

  In this first example, the processing operation is to apply a sequence of eight operations referred to as OP1 to OP8 to the basic information constituting the object.

  In order to be processed, each object must be broken down into N basic information sub-objects. N must be a multiple of Q (Q = 5, the number of computational units), but this N is determined upstream from the platform by the method according to the invention, in particular according to the memory capacity of the platform. In this example, N = 5.

  Furthermore, in order to implement regular sequencing of the specific operations used, processing means located upstream of the platform produce specific operations OP9 and OP10 without effect, so that for each sub-object The number of specific operations performed is a multiple of the number of available processors.

According to the specific operation type, each operation is assigned to be performed by the processor. here,
-Processor A implements OP1 and OP6.
-Processor B implements OP2 and OP7.
-Processor C performs OP3 and OP8.
-Processor D performs OP4 and OP9.
-Processor E performs OP5 and OP10.

  Each processor executes a set of instructions (InsA to InsE) corresponding to the assigned specific operation. Parameters stored in a limited amount of memory also depend on this allocation. For example, if OP1 is to multiply by 2, MemA memory will contain the number 2.

Once these assignments are made, the operations are performed according to the sequencing schedule described by Table I below.
In this table, the process progress time is expressed as T1, T2,. . . . . . Shown as T14.

  Each line represents one of ten unique operations OP1 to OP10. Each column represents one of the basic information IE1 to IE5, and each basic information constitutes a sub-object to be processed. The notations IE1 to IE5 are formal and do not necessarily correspond to spatial or temporal reality. In fact, certain special operations generate displacements of basic information. Thus, for example, when the specific operation OP1 is to be shifted to the left, the information IE1 processed by the specific operation OP2 is not a result of applying the specific operation OP1 to the information IE1, but this specific operation OP1 is applied to the information IE2. Result.

  Each box in this table contains the name of the processor performing the specific operation, as well as the time that this specific operation is performed during the processing operation. Obviously, this table represents only part of the processing operation. Here it is assumed that all results from the required specific operations have already been calculated in the processing operation.

  Therefore, it is shown that the ProcA processor performs the operation OP1 on the first information IE1 of the sub-object 1 at time T1. At this point, other processors are performing other operations not shown in this table.

At time T5, each processor is shown performing an operation on one of the sub-object 1 information.
When the processor performs a specific operation on all basic information of the sub-object, the processor proceeds to the next operation assigned to it. Therefore, the ProcA processor executes the operation OP6 from T6.

When the processor performs all the specific operations assigned to it, the next sub-object is processed. Thus, two different sub-objects (sub-object 1 and sub-object 2) are processed simultaneously in the platform.
This table clearly shows that each specific operation is performed N times (N = 5 here).

  This sequencing schedule is obtained by a circular chain in one of the processor dimensions. Therefore, basic information can be transferred from one computing unit to another. For example, the basic information IE1 goes through all the processors and “experiences” the specific operations OP1 to OP5, then returns to the ProcA processor and starts to cycle again, and “experiences” the operations OP6 to OP7. Note that the first basic information IE1 does not necessarily become IE1 information at all steps.

  In the second example shown in FIG. 7, the platform comprises five processors linked to a common memory. Such a structure is classic. That is, it corresponds to the structure of a vector signal processor ("single instruction multiple data", that is, of the SIMD type). In this example, each processor is individually linked to a small memory that can contain parameters such as a correlation table T. In this structure, each processor performs all specific operations. Thus, all processors receive the same instruction set INS.

  In this second example, consider the case where one of the operations is to modify one or more basic information using a table. As can be seen from the above, each processor has access to its own table and all tables are identical. In one alternative, each memory is shared by a group of processors. In one alternative, a group of processors share the same memory and obtain the same parameters simultaneously. In this case, the correlation table must be applied and implemented, for example, by calculation using one or more parameters for calculating the polynomial.

This involves parallel operations. That is, at each time of the process, all processors perform the same operation on different basic information. This process is illustrated by Table II below.
In this table, the process progress time is expressed as T1, T2,. . . . . . Shown as T10.

In this table, it can be seen that the specific operation OPi is performed on the basic information IE1 to IE5 by the processors ProcA to ProcE at a given time Ti.
After the tenth increment, it can be noticed that each unique operation in the sequence of unique operations has been performed on each basic information of the sub-object.

  In this case, it is clear that the sequence of unique operations need not be complete by operations without effect, since the specific operations are performed in parallel by all processors. In this way, when the operation OP8 is completed, the process can be repeated by applying the operation OP1 to the basic information constituting the next sub-object.

  In the third example shown in FIG. 8, the platform comprises a vector signal processor comprised of five processors linked to a common memory, similar to the vector signal processor present among other PC type computers. All of these processors are also linked to a small memory that can contain parameters and inter alia a correlation table. In this structure, each processor performs all specific operations. Thus, all processors receive the same INS instruction set that includes data describing all specific operations to be performed.

  In this example, consider the case where the sequence of two unique operations is to modify one or more basic information using a table. Here, the tables exist only in one single location, so the processors must share these tables.

Since all processors simultaneously perform one and the same operation on different basic information of sub-objects, a parallel operation is performed at the beginning of the process. This process is illustrated by Table III below.
In this table, the process progress time is expressed as T1, T2,. . . . . . Shown as T18.

  In the first three lines of this table, it can be seen that at a given time Ti, the specific operation OPi is performed on the basic information IE1 to IE5 by each processor ProcA to ProcE, respectively.

  When the operation OP4 using the table is reached, an access problem is encountered. This is because not all processors can access the table at the same time. Thus, the processor is forced to "wait for its turn", i.e. wait until the previous processor has finished using the table and is ready to use the table. Therefore, the operation OP4 is performed by the processors ProcA to ProcE at times T4 to T8, respectively. Assuming that operation OP5 also uses a table, the following situation will occur in the same way. That is, the operation OP5 is performed by the processors ProcA to ProcE at times T9 to T13, respectively.

Once these operations are performed, the process can continue as usual.
FIG. 9a illustrates an example embodiment of a platform including several circular chains according to one of the sub-object dimensions. In this first example, the object is an image with two dimensions, the sub-object contains four basic information, and the platform is 4 * corresponding to a rectangle with four processors horizontally and one processor vertically. It comprises four processors arranged according to a one processor grid. These processors are called P1, P2, P3, and P4 from left to right. The method also applies two queues in this example.

  The horizontal queue FHa is connected at the input to the output of P4 and at the output to the input of the processor P1. The output of P1 is connected to the input of P2. The output of P2 is connected to the input of P3, and the output of P3 is connected to the input of P4.

  A vertical queue FVa is connected at the input to the output of P1, P2, P3 and P4 and at the output to the input of the processors P1, P2, P3 and P4.

  -The sequence of specific operations can apply any number of horizontal filters FH using 100% of 4 processors. For example, in the case of the specific operation OS2 that performs the calculation of the filter consisting of the addition of the result of the specific operation OS1 and the result of the same specific operation OS1 on the left, the result of the operation OS1 from the processor P4 is placed in the queue FHa. Will be used by OS2 on P1 during the computation of subsequent sub-objects. The result of operation OS1 from processor P3 is transferred to processor P4 for use by OS2 on P4 together with the result of OS1 on P4. The result of operation OS1 from processor P2 is transferred to P3 for use by OS2 on P3 together with the result of OS1 on P3. The result of operation OS1 from processor P1 is transferred to processor P2 for use by OS2 on P2 along with the result of OS1 on P2. The result of operation OS1 performed by P4 during the calculation of the previous sub-object is output from queue FHa and forwarded to processor P1 for use by OS2 on P1 along with the result of OS1 on P1. . Another operation OS3 on this sequence can apply another horizontal filter, and the data is retrieved in the correct order using the queue.

  The sequence of specific operations can be applied with any number of vertical filters FV, using 100% of 4 processors, with modifications as needed.

  -Finally, the sequence of specific operations can apply any number of filters FVH that are inseparable according to both horizontal and vertical dimensions, using 100% of 4 processors. For example, a non-separable 3x3 filter applied to four results from one specific operation OS4 will prompt FVa twice and then FHa six times, resulting in four previously calculated OS4 results. Can be obtained and combined with the set of OS4 results from the current sub-object. For example, these non-separable filters can be used with vertical and / or horizontal filters, and the two queues allow data to be retrieved in the correct order.

  When two filters are applied, the sequence of unique operations is thus used to process another sub-object at least once during its N applications, each of which is at least two distinct operations distinct from the sequence A sequence that produces a result. The result used to process another sub-object moves through the queue (s).

  Similarly, a second example is shown in FIG. 9b, where in this example the object is an image with two dimensions, the sub-object contains four basic information, and the platform is vertically aligned with two processors. With four processors arranged according to a grid of 2 * 2 processors corresponding to a rectangle with two processors. From left to right, these processors are called P4 and P5 in the upper line, and P6 and P7 in the lower line. The method also uses two queues in this example.

A horizontal queue FHb is connected at the input to the outputs of P3 and P6 and at the output to the inputs of P1 and P4.
A vertical queue FVb is connected at the input to the outputs of P4 and P5 and at the output to the inputs of the processors P6 and P7.

  As in the example of FIG. 9a, the sequence of specific operations can apply any number of vertical and / or horizontal and / or non-separable filters while using 100% of four processors.

  In the third example shown in FIG. 9c, the platform comprises a single processor P8 connected to the horizontal queue FHc and the vertical queue FVc. The two queues can be used by the processor to store results from specific operations that are to be reused later.

  Also in the example of FIG. 9a, the sequence of specific operations can apply any number of vertical and / or horizontal and / or non-separable filters while using 100% of the processor.

It is a figure which shows the example which decomposes | disassembles an image into a subobject by this invention. It is a figure which shows the example which decomposes | disassembles an image into a subobject by this invention. It is a figure which shows the example which decomposes | disassembles an image into a subobject by this invention. It is a figure which shows the example which decomposes | disassembles an image into a subobject by this invention. It is a figure which shows the example which decomposes | disassembles an image into a subobject by this invention. It is a figure which shows the example which decomposes | disassembles an image into a subobject by this invention. Figure 2 shows a device using the method according to the invention. It is a figure which shows the example of the sequence of the general purpose operation applied to several logic blocks and one parameter. FIG. 4 shows the structure of specific formatted data provided to the platform in the method according to the invention. It is a figure which shows application of operation specific to an object. FIG. 2 shows different architectures of a platform that can process objects according to the method according to the invention. FIG. 2 shows different architectures of a platform that can process objects according to the method according to the invention. FIG. 2 shows different architectures of a platform that can process objects according to the method according to the invention. FIG. 4 shows an example of a processor chain in a platform according to the invention. FIG. 4 shows an example of a processor chain in a platform according to the invention. FIG. 4 shows an example of a processor chain in a platform according to the invention.

Claims (6)

A platform for processing an object including a plurality of basic information, the platform including N × P processors, and the N × P processors are rectangular so that there are P vertically and N horizontally. Arranged in a grid, each processor aiming to implement a specific sequence of operations, in which at least any number of vertical, horizontal or non-separable filters are applied to at least one basic information,
Further, each output terminal of the processor is connected in series to an input terminal of another processor via a horizontal queue and / or a vertical queue , so that the result of the specific operation performed by the processor is the other A platform characterized in that a result of a specific operation carried out by a processor located at the end of a grid of at least one column is received by a processor located at the end of another grid.   The platform of claim 1, wherein the P is 1.   The platform according to claim 1 or 2, wherein the object is an image and the basic information is a pixel. An object processing method including a plurality of basic information, wherein the processing method is performed using a platform including N × P processors, and the N × P processors are vertically arranged in N and horizontally in N pieces. And the processing method includes a step in which each processor performs a specific sequence of operations, where at least any number of vertical, horizontal or non-separable filters are included. Applied to one piece of basic information,
The processing method includes a step of transferring a result of a specific operation performed by one processor to another processor,
Further, the processing method includes a processor located at the end of another grid via a horizontal queue and / or a vertical queue for the result of a specific operation performed by a processor located at the end of the grid in at least one column. The processing method characterized by including the step which receives.   The processing method according to claim 4, wherein P is one.   The processing method according to claim 4, wherein the object is an image, and the basic information is a pixel.

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