JP5012865B2 - Voltage conversion device and output current calculation method of voltage conversion device - Google Patents

Description

  The present invention relates to a voltage converter that converts an input voltage to output an output voltage, and more particularly to a voltage converter that can detect an output current and an output current calculation method thereof.

  In recent years, in-vehicle LAN (Local Area Network) represented by CAN (Control Area Network) has been mounted on automobiles, and each function of the automobile is electronically controlled by an ECU (Electric Control Unit). A DC / DC converter (voltage converter) mounted on a hybrid vehicle or the like is also connected to the in-vehicle LAN, and states such as input / output voltage, input / output current, and internal temperature are monitored in detail by the ECU. Therefore, an in-vehicle DC / DC converter needs to detect these states with high accuracy.

  On the other hand, in-vehicle DC / DC converters have recently been increased in power, and the output current rating reaches 200A. Therefore, when a current detector is provided at the output for the purpose of detecting the output current of the DC / DC converter, a large power loss occurs even if the resistance component is small, and as a result, the DC / DC There was a problem of deteriorating the efficiency of the converter.

  By the way, a method for grasping a rough amount of the output current of the power supply without inserting a current detector directly into the output of the power supply has been proposed (for example, Patent Documents 1 and 2). In Patent Document 1, when a plurality of switching power supplies are connected in parallel and operated, the input currents of the respective power supplies are detected for the purpose of controlling the output currents of the respective power supplies to be substantially the same. A method of controlling the power supplies separately has been proposed. Patent Document 2 proposes a method of detecting the input current of a power supply and controlling the driving method of the power supply based on this in order to maintain the efficiency of the switching power supply regardless of the magnitude of the output current. ing.

JP-A-7-59344 JP 2007-68349 A

  On the other hand, for the purpose of detecting the output current with high accuracy, the calculation method of detecting the input voltage, the output voltage, and the input current, and obtaining the output current using a look-up table (LUT) based on them. Can be considered. In this method, output currents in various combinations of input voltage, output voltage, and input current are stored in advance as table data in a lookup table, and based on the detected input voltage, output voltage, and input current. Thus, the output current can be obtained by searching the table data and selecting the output current under the condition closest to these detected values.

  However, since this calculation method selects the output current from the table data recorded in the look-up table, the output current value obtained is obtained because the output current value is quantized. Depending on the conditions, there is an error and the calculation accuracy may be lowered. In order to increase the calculation accuracy, it is necessary to increase the data of the lookup table and to quantize the output current value of the table more finely. For this reason, the memory capacity for storing the lookup table becomes enormous and the circuit scale becomes large. In addition, since a huge amount of measurement data is required for the combination of the actual measurement value of the input voltage, output voltage and input current, and the actual measurement value of the output current, it is necessary for measurement when preparing a lookup table in advance at the design stage. The labor and time are increased, which may increase the cost.

  The present invention has been made in view of such problems, and an object of the present invention is to provide a voltage conversion device capable of obtaining an output current with high calculation accuracy while suppressing a design cost and having a simple and compact configuration, and an output current thereof. It is to provide a calculation method.

  The voltage conversion device of the present invention includes a voltage conversion circuit, n types of detection values detection means, and an arithmetic circuit. Here, the voltage conversion circuit converts the input voltage to output an output voltage. The n types of detection values include at least detection values of three physical quantities, that is, an input voltage, an output voltage, and an input current of the voltage conversion circuit. However, n is a natural number of 3 or more, and may include detected values of physical quantities other than the above three. The arithmetic circuit assigns one detected value of n types of detected values to a one-way polynomial having a predetermined parameter set as a coefficient to obtain a parameter set of the next-stage unit polynomial, and calculates n types of detected values. Of these, the output value of the voltage conversion circuit is obtained by repeating each time the detection values to be substituted are sequentially replaced.

  An output current calculation method for a voltage converter according to the present invention is a method applied to a voltage converter that converts an input voltage to output an output voltage, and the input voltage, the output voltage, and the voltage converter of the voltage converter. N detection values (n is a natural number greater than or equal to 3) are detected, and one detection value of the n types of detection values is substituted into a one-way polynomial whose coefficient is a predetermined parameter set. In this way, the output current of the voltage converter is obtained by repeating the operation for obtaining the parameter set of the one-stage polynomial of the next stage every time the detection values to be substituted are sequentially replaced among the n types of detection values. .

  In the voltage conversion device and the output current calculation method of the present invention, when the input voltage is converted to output the output voltage, n types of detection values including the input voltage, the output voltage, and the input current to the power conversion circuit are included. Is detected. Next, an operation is performed to obtain a parameter set of a one-way polynomial of the next stage by substituting one detection value among the n types of detection values into a one-way polynomial having a predetermined parameter set as a coefficient. This calculation is repeated n times each time the detection values to be substituted are sequentially replaced among the n types of detection values. Then, the value of the one-way polynomial in the final stage of the n-stage calculation by this repetition is obtained as indicating the value of the output current of the voltage converter. At this time, it is preferable that the detection value to be substituted into the one-way polynomial in the final stage calculation is the detection value of the input current.

  For example, when n is 3, the three types of detection values include an input voltage, an output voltage, and an input current. In this case, the following three stages of calculations are performed in the calculation circuit. In the first calculation, the second parameter set of the next stage is substituted by substituting the first detected value of the three types of detected values into the first one-way polynomial having the first parameter set as a coefficient. Is required. In the second calculation, the second parameter value is substituted for the second detected value of the three types of detected values into the second one-way polynomial having the second parameter set as a coefficient. Is required. In the third calculation, by substituting the third detection value of the three types of detection values into the third one-way polynomial having the third parameter set as a coefficient, A value is determined. This value is output as the output current.

  On the other hand, when n is 4, for example, the four types of detection values can be configured by, for example, an input voltage, an output voltage, an input current, and temperature data. In this case, the following four stages of calculations are performed in the calculation circuit. In the first calculation, the second parameter set of the next stage is substituted by substituting the first detection value of the four types of detection values into the first one-way polynomial having the first parameter set as a coefficient. Is required. In the second calculation, the third parameter set of the next stage is substituted by substituting the second detection value of the four types of detection values into the second one-way polynomial having the second parameter set as a coefficient. Is required. In the third calculation, the third parameter value of the next stage is substituted by substituting the third detection value of the four types of detection values into a third one-way polynomial having the third parameter set as a coefficient. Is required. In the fourth calculation, by substituting the fourth detection value of the four types of detection values into the fourth one-way polynomial using the fourth parameter set as a coefficient, A value is determined. This value is output as the output current.

  In the voltage conversion device and the output current calculation method thereof according to the present invention, for example, an m-order polynomial (m is a natural number) of the same order can be used as the unitary polynomial used in the calculation circuit. In this case, m is preferably 2. Alternatively, for example, an m-order polynomial (m is a natural number) may be used as the unitary polynomial used in the arithmetic circuit, and the order of at least one of these may be different. In this case, it is preferable that the order of the one-way polynomial used in the subsequent calculation is higher than the order of the one-way polynomial used in the previous calculation.

  In the output current calculation method of the voltage converter of the present invention, an initial parameter set that is a parameter set used in the first stage calculation process can be obtained as follows, for example. First, in the actual measurement value acquisition step, a plurality of combinations of n types of actual measurement values (n is a natural number of 3 or more) including the input voltage, the output voltage, and the input current, and the actual measurement values of the output current of the voltage converter are divided into a plurality of sets. get. Next, in the first stage calculation step, when the measured value of the output current is expressed by a first-order polynomial of the first stage that is a function of one of the n types of measured values, the coefficient of the one-way polynomial is obtained. Is set as the next parameter set. Subsequently, the subsequent stage calculation step is repeated. In this subsequent stage calculation step, the coefficient set of the one-way polynomial in the case where the parameter set obtained in the previous stage calculation step is expressed by a one-way polynomial that is a function of the other one of the n types of actual measurement values is obtained. This is obtained and set as a parameter set for the next stage. Then, the coefficient of the one-way polynomial obtained by the final stage calculation is adopted as the initial parameter set.

  According to the voltage conversion apparatus and the output current calculation method of the voltage conversion apparatus of the present invention, output is performed by repeating the calculation of a one-way polynomial by n stages based on n types of detection values including the input voltage, the output voltage, and the input current. Since the current is calculated, the output current can be obtained with high calculation accuracy while keeping the design cost low and the simple and compact configuration.

It is a circuit diagram showing the example of 1 structure of the voltage converter which concerns on the 1st Embodiment of this invention. FIG. 2 is a block diagram illustrating a configuration example of a calculation unit illustrated in FIG. 1. It is a circuit diagram for demonstrating one state of the basic operation | movement of the voltage converter shown in FIG. FIG. 6 is a circuit diagram for explaining another state of the basic operation of the voltage conversion device shown in FIG. 1. 3 is a flowchart illustrating an operation example of a calculation unit illustrated in FIG. 2. 6 is a flowchart illustrating a fitting method corresponding to an operation example of the calculation unit illustrated in FIG. 5. FIG. 2 shows the calculation accuracy of the voltage converter, (A) is a characteristic diagram of the voltage converter shown in FIG. 1, and (B) is a characteristic diagram of the voltage converter according to the comparative example. It is a block diagram showing the example of 1 structure of the calculating part which concerns on a comparative example. FIG. 9 is a flowchart illustrating an operation example of a calculation unit illustrated in FIG. 8. It is a flowchart showing the operation example of the calculating part which concerns on the modification of the 1st Embodiment of this invention. It is a circuit diagram showing the example of 1 structure of the voltage converter which concerns on the 2nd Embodiment of this invention. It is a block diagram showing the example of 1 structure of the calculating part shown in FIG. FIG. 12 is a flowchart illustrating an operation example of a calculation unit illustrated in FIG. 11.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

<First Embodiment>
[Configuration example]
FIG. 1 illustrates a circuit configuration example of a voltage conversion device according to a first embodiment of the present invention. In addition, since the output current calculation method of the voltage converter which concerns on embodiment of this invention is embodied by this embodiment, it demonstrates together. The voltage conversion device 1 is a so-called switching power supply device, which functions as a step-down DC input DC output power supply (DC / DC converter), for example, and receives a DC input voltage input from input terminals T1 and T2 on the high voltage battery 10 side. Voltage conversion (decrease) of Vin generates a DC output voltage Vout and supplies the output voltage Vout to the low voltage battery 90 via output terminals T3 and T4. The voltage converter 1 includes an input smoothing capacitor Cin, voltage detection circuits 21 and 23, a current detection circuit 22, a switching circuit 3, a resonance inductor Lr, a transformer 4, a rectifier circuit 5, and a smoothing circuit 6. An SW switching unit 7 and an arithmetic processing unit 8. The high voltage battery 10 is a battery that stores a voltage of about 200V to 500V, and the low voltage battery 90 is a battery that stores a voltage of about 12V to 16V.

  The input smoothing capacitor Cin is disposed between the primary high-voltage line L1H connected to the input terminal T1 and the primary low-voltage line L1L connected to the input terminal T2, and from the high-voltage battery 10 to the input terminal T1, This is for smoothing the DC input voltage Vin input during T2.

  The voltage detection circuit 21 is disposed between the primary high-voltage line L1H and the primary low-voltage line L1L, detects the input voltage Vin between the input terminals T1 and T2, and also detects the detected input voltage Vin. The corresponding detection signal SVin1 is output to the arithmetic processing unit 8. As a specific circuit configuration of such a voltage detection circuit 21, for example, a voltage is detected by a voltage dividing resistor (not shown) disposed between the primary high-voltage line L1H and the primary low-voltage line L1L. In addition, a device that generates a voltage corresponding to this can be used.

  The current detection circuit 22 is disposed on the primary high-voltage line L1H between the input terminal T1 and a switching circuit 3 described later, and detects the input current Iin flowing on the primary high-voltage line L1H. The detection signal SIin1 corresponding to the detected input current Iin is output to the arithmetic processing unit 8. A specific circuit configuration of such a current detection circuit 22 includes, for example, a circuit including a current transformer.

  The switching circuit 3 includes switching elements SW1 to SW4 and constitutes a full bridge type inverter circuit. Each of the switching elements SW1 to SW4 is configured by, for example, a field effect transistor (MOS-FET), a bipolar transistor, an IGBT (Insulated Gate Bipolar Transistor), or the like. Here, the switching elements SW1 to SW4 are all configured by N-channel MOS-FETs. Here, the gate of the switching element SW1 is connected to the signal line of the SW control signal S1, the source is connected to the drain of the switching element SW2, and the drain is connected to the primary high voltage line L1H. The gate of the switching element SW2 is connected to the signal line of the SW control signal S2, the source is connected to the primary side low-voltage line L1L, and the drain is connected to the source of the switching element SW1. The gate of the switching element SW3 is connected to the signal line of the SW control signal S3, the source is connected to the drain of the switching element SW4, and the drain is connected to the primary high-voltage line L1H. The gate of the switching element SW4 is connected to the signal line of the SW control signal S4, the source is connected to the primary side low-voltage line L1L, and the drain is connected to the source of the switching element SW3. The source of the switching element SW3 is connected to one end of a primary winding 41 of the transformer 4 described later via a resonance inductor Lr described later. The source of the switching element SW1 is connected to the other end of the primary winding 41. With such a configuration, the switching circuit 3 converts the DC input voltage Vin into an AC voltage in accordance with SW control signals S1 to S4 supplied from the SW switching unit 7 described later. Each of the SW control signals S1 to S4 is a control signal for performing switching driving by pulse width modulation (PWM).

  The resonance inductor Lr is disposed between the source of the switching element SW1 and the primary winding 41 described above, and constitutes a predetermined LC resonance circuit together with the parasitic capacitance elements in the switching elements SW1 to SW4. Is.

  The transformer 4 includes a magnetic core 40 and primary and secondary windings 41 and 421 and 422 that are insulated from each other. Among these, one ends of the secondary windings 421 and 422 are connected to each other by a center tap CT and further connected to the secondary line L2. The transformer 4 transforms the AC voltage generated by the switching circuit 3 and generates AC voltages that are 180 degrees out of phase with each other between both terminals of the secondary windings 421 and 422. . In this case, the degree of transformation is determined by the turn ratio between the primary winding 41 and the secondary winding 421 and the turn ratio between the primary winding 41 and the secondary winding 422, respectively.

  The rectifier circuit 5 is a single-phase full-wave rectifier type rectifier circuit that performs synchronous rectification by the switching elements SW5 and SW6. Each of the switching elements SW5 and SW6 is configured by, for example, a MOS-FET, a bipolar transistor, or an IGBT. Here, both of the switching elements SW5 and SW6 are configured by N-channel MOS-FETs. The gate of the switching element SW5 is connected to the signal line of the SW control signal S5, the source is connected to the ground line LG having the output terminal T4, and the drain is the center tap CT of the two terminals of the secondary winding 422. Connected to the opposite terminal. The gate of the switching element SW6 is connected to the signal line of the SW control signal S6, the source is connected to the ground line LG, and the drain is connected to the terminal opposite to the center tap CT among the two terminals of the secondary winding 421. It is connected. These SW control signals S5 and S6 are control signals for performing switching driving by pulse width modulation.

  The smoothing circuit 6 has a choke coil 61 and an output smoothing capacitor Cout. The choke coil 61 is inserted between the secondary line L2 and the output line LO connected to the output terminal T3. The output smoothing capacitor Cout is inserted between the output line LO and the ground line LG. With this configuration, the smoothing circuit 6 smoothes the signal rectified by the rectifier circuit 5 and output from the center tap CT to generate a DC output voltage Vout, which is output between the output terminals T3 and T4, and is a low voltage battery. Power is supplied to 90.

  The voltage detection circuit 23 is disposed between the output line LO and the ground line LG, detects the output voltage Vout between the output terminals T3 and T4, and outputs a detection signal SVout1 corresponding to the detected output voltage Vout. This is output to the SW switching unit 7. As a specific circuit configuration of such a voltage detection circuit 23, for example, a voltage is detected by a voltage dividing resistor (not shown) arranged between the output line LO and the ground line LG, and the voltage is detected accordingly. Examples are those that generate voltage.

  The SW switching unit 7 modulates the pulse widths of the SW control signals S1 to S6 based on the detection signal SVout1 corresponding to the output voltage Vout so that the output voltage Vout maintains a constant value, and the SW control signals S1 to S1. S4 is supplied to the switching circuit 3, and SW control signals S5 and S6 are supplied to the rectifier circuit 5. The SW switching unit 7 includes a buffer 71, a resistor R72, a control unit 73, a transformer 76, and SW driving units 77 and 78.

  The buffer 71 outputs a detection signal SVout by performing impedance conversion on the detection signal SVout1 output from the voltage detection circuit 23. The resistor R72 has a function of protecting the buffer 71 and the arithmetic unit 9 by removing noise output from the buffer 71 or limiting surge voltage, overcurrent, and the like. The control unit 73 generates a control signal S74 that is a basis of the SW control signals S1 to S4 based on the input detection signal SVout, supplies the control signal S74 to the SW drive unit 77 via the transformer 76, and the SW control signal S5. , S6 is generated, and the control signal S75 is generated and supplied to the SW drive unit 78. The SW drive unit 77 generates SW control signals S1 to S4 based on the control signal S74 supplied via the transformer 76, and supplies the SW control signals S1 to S4 to the switching elements SW1 to SW4 of the switching circuit 3. The SW drive unit 78 generates SW control signals S5 and S6 based on the supplied control signal S74, and supplies them to the switching elements SW5 and SW6 of the rectifier circuit 5.

  The arithmetic processing unit 8 includes transformers 811 and 812, smoothing circuits 821 and 822, buffers 831 and 832, resistors R841 and R842, and an arithmetic unit 9. The arithmetic processing unit 8 performs arithmetic processing based on the detection signal SVin1 supplied from the voltage detection circuit 21, the detection signal SIin1 supplied from the current detection circuit 22, and the detection signal SVout supplied from the SW switching unit 7. The output current Iout at the output terminal T3 of the voltage converter 1 is obtained and the result is output from the output terminal T5.

  The operation principle of the arithmetic processing unit 8, that is, the operation principle of calculating the output current Iout based on the detection signal SVin1, the detection signal SIin1, and the detection signal SVout is based on the following facts. That is, the output current Iout of the voltage conversion circuit can be generally expressed by the following equation.

ここで、η（Ｖin,Ｖout,Ｉin）は電圧変換回路の効率であり、入力電圧Ｖinと出力電圧Ｖoutと入力電流Ｉinの関数である。

Here, η (Vin, Vout, Iin) is the efficiency of the voltage conversion circuit, and is a function of the input voltage Vin, the output voltage Vout, and the input current Iin.

  Equation (1) means that the output current Iout of the voltage conversion circuit can be expressed by the input voltage Vin, the output voltage Vout, and the input current Iin. Based on the equation (1), the arithmetic processing unit 8 calculates the output current Iout based on the detection signal SVin1 related to the input voltage Vin, the detection signal SIin1 related to the input current Iin, and the detection signal SVout related to the output voltage Vout. It comes to ask for. Note that the voltage conversion circuit to which the expression (1) can be applied is not limited to the switching power supply as shown in the voltage conversion device 1, but other types such as a chopper control power supply and a series regulator power supply, for example. It may be a DC input DC output power supply. Furthermore, the voltage conversion circuit to which the formula (1) can be applied is not limited to the DC input DC output power supply, but may be an AC input DC output power supply, a DC input AC output power supply, or an AC input AC output power supply. Therefore, the operation principle of the arithmetic processing unit 8 can also be applied to all these power sources.

  The transformer 811 has a function of transforming the current detection signal SIin1 supplied from the current detection circuit 22 into a low-voltage signal and outputting it to the smoothing circuit 821. The smoothing circuit 821 is a circuit for smoothing the pulsating flow included in the detection signal SIin1 supplied via the transformer 811. For example, the smoothing circuit 821 includes an LPF (low-pass filter) including a resistor and a capacitor. The The buffer 831 outputs the detection signal SIin by performing impedance conversion on the detection signal SIin1 output from the smoothing circuit 821. The resistor R841 has a function of protecting the buffer 831 and the arithmetic unit 9 by removing noise output from the buffer 831 or limiting surge voltage, overcurrent, and the like.

  The transformer 821 has a function of transforming the voltage detection signal SVin1 supplied from the voltage detection circuit 21 into a low-voltage signal and outputting it to the smoothing circuit 822. The smoothing circuit 822 is a circuit for smoothing the pulsating flow included in the detection signal SVin1 supplied via the transformer 812, and is configured by, for example, an LPF (low-pass filter) including a resistor and a capacitor. The The buffer 832 outputs the detection signal SVin by performing impedance conversion on the detection signal SVin1 output from the smoothing circuit 822. The resistor R842 has a function of protecting the buffer 832 and the arithmetic unit 9 by removing noise output from the buffer 832 or limiting surge voltage, overcurrent, and the like.

  The calculation unit 9 has a function of obtaining the output current Iout based on the detection signal SVin, the detection signal SIin, and the detection signal SVout.

  FIG. 2 shows a block diagram of the calculation unit 9. The arithmetic unit 9 includes A / D conversion circuits 911 to 913, registers 921 to 923, 951 to 953, and 96, a nonvolatile memory 93, an arithmetic circuit 94, and an interface unit 97.

  The A / D conversion circuit 911 is a circuit that converts the analog detection signal SVin into a digital signal, and the register 921 stores the result as the input voltage code DVin. The A / D conversion circuit 912 is a circuit that converts the analog detection signal SVout into a digital signal, and the register 922 stores the result as an output voltage code DVout. The A / D conversion circuit 913 is a circuit that converts the analog detection signal SIin into a digital signal, and the register 923 stores the result as the input current code DIin. The nonvolatile memory 93 is a circuit in which a predetermined calculation parameter set DP (described later) is stored. As will be described later, the arithmetic circuit 94 calculates the output current code CIout by calculation using the input voltage code DVin, output voltage code DVout, input current code DIin, and calculation parameter set DP. Further, although details will be described later, the arithmetic circuit 94 defines the relationship between the input voltage code DVin, the output voltage code DVout, and the input current code DIin with physical quantities (input voltage Vin, output voltage Vout, input current Iin) in advance. Are converted into an input voltage code CVin, an output voltage code CVout, and an input current code CIin using another code system (format). The registers 951 to 953 and 96 store these calculation results. That is, the register 951 stores the input voltage code CVin, the register 952 stores the output voltage code CVout, the register 953 stores the input current code CIin, and the register 96 stores the output current code CIout. These data are exchanged with an external device connected to the terminal T5 via the interface unit 97. The external device is, for example, a control device that controls the entire system to which the voltage conversion device 1 belongs. For the purpose of monitoring the state (input / output voltage, input / output current, temperature, etc.) of the voltage conversion device 1, These data are collected. For example, ECU is mentioned.

  In this example, the arithmetic unit 9 has three A / D conversion circuits 911 to 913. However, the present invention is not limited to this. For example, one A / D conversion circuit operates in a time division manner. You may let them. Moreover, as this calculating part 9, a microcontroller (MCU) etc. can be used, for example. Furthermore, you may implement | achieve the calculating part 9 and the control part 73, or a part of control part 73 with a microcontroller (MCU).

  In FIG. 1, the input smoothing capacitor Cin, the switching circuit 3, the resonance inductor Lr, the transformer 4, the rectifier circuit 5, the smoothing circuit 6, and the SW switching unit 7 are the "voltage conversion circuit" in the present invention. This corresponds to a specific example. The voltage detection circuits 21 and 23 and the current detection circuit 22 correspond to a specific example of “detection means for detecting n types of detection values” in the present invention, and correspond to a case where n is 3. The arithmetic unit 9 corresponds to a specific example of “arithmetic circuit” in the present invention.

[Operation and Action]
Next, the operation and action of the voltage conversion device 1 of the present embodiment will be described.

(Example of basic operation of voltage converter 1)
First, the basic operation of the voltage converter 1 will be described with reference to FIGS. 3 and 4. 3 and 4 show the basic operation of the voltage converter 1 using circuit diagrams. In these drawings, for convenience of explanation, the switching elements SW1 to SW6 are shown in the form of a switch that represents the operation state (ON state or OFF state).

  In this voltage conversion device 1, in the switching circuit 3, the DC input voltage Vin supplied from the high voltage battery 10 via the input terminals T1 and T2 is switched by the switching elements SW1 to SW4, whereby the primary of the transformer 4 is obtained. An AC voltage is generated between the terminals of the side winding 41. The transformer 4 transforms the AC voltage, and the transformed AC voltage is output from the secondary windings 421 and 422.

  In the rectifier circuit 5, the AC voltage output from the transformer 4 is synchronously rectified by the switching elements SW5 and SW6. As a result, a rectified output is generated between the secondary side line L2 and the ground line LG.

  In the smoothing circuit 6, the rectified output generated in the rectifying circuit 5 is smoothed by the choke coil 61 and the output smoothing capacitor Cout, and is output as the DC output voltage Vout from the output terminals T3 and T4. The output voltage Vout is supplied to the low voltage battery 90 for charging, and a load (not shown) is driven.

  At this time, the operation state shown in FIG. 3 and the operation state shown in FIG. 4 are alternately repeated. Specifically, first, as shown in FIG. 3, the switching elements SW1, SW4 of the switching circuit 3 and the switching element SW6 of the rectifier circuit 5 are turned on, and the switching elements SW2, SW3, When the switching element SW5 of the rectifier circuit 5 is turned off, the switching element SW1, the primary winding 41 of the transformer 4, the resonance inductor Lr, the switching element SW4, the high-voltage battery 10 and the input smoothing capacitor Cin, the current detection circuit 22 , The primary loop current Ia1 flows in sequence. At this time, on the secondary side, a secondary loop current Ia2 that passes through the switching element SW6, the secondary winding 421 of the transformer 4, the choke coil 61, the low-voltage battery 90, and the output smoothing capacitor Cout flows in this order. The secondary loop current Ia2 feeds the DC output voltage Vout to the low voltage battery 90 and drives a load (not shown).

  Next, as shown in FIG. 4, the switching elements SW2 and SW3 of the switching circuit 3 and the switching element SW5 of the rectifier circuit 5 are turned on, and the switching elements SW1 and SW4 of the switching circuit 3 and the rectifier circuit 5 are turned on. When the switching element SW6 is turned off, the switching element SW3, the resonance inductor Lr, the primary winding 41 of the transformer 4, the switching element SW2, the high voltage battery 10, the input smoothing capacitor Cin, and the current detection circuit 22 are sequentially passed. Primary loop current Ib1 flows. At this time, on the secondary side, a secondary loop current Ib2 that passes through the switching element SW5, the secondary winding 422 of the transformer 4, the choke coil 61, the low-voltage battery 90, and the output smoothing capacitor Cout sequentially flows. The secondary loop current Ib2 feeds the DC output voltage Vout to the low voltage battery 90 and drives a load (not shown).

  The SW switching unit 7 modulates the pulse widths of the SW control signals S1 to S6 so that the output voltage Vout is maintained at a constant value, and supplies the SW control signals S1 to S4 to the switching circuit 3 to provide the SW control signal S5. , S6 is supplied to the rectifier circuit 5.

  The arithmetic processing unit 8 generates the detection signal SVin based on the detection signal SVin1 supplied from the voltage detection circuit 21, and generates the detection signal SIin based on the detection signal SIin1 supplied from the current detection circuit 22. Further, the calculation unit 9 of the calculation processing unit 8 performs calculation processing based on the detection signal SVin, the detection signal SIin, and the detection signal SVout supplied from the SW switching unit 7, and outputs the output from the output terminal T3 of the voltage converter 1. The current Iout is obtained, and the result is output as a digital code from the output terminal T5.

(Operation example of calculation unit 9)
Next, the calculation operation in the calculation unit 9 of the calculation processing unit 8 will be described.

  FIG. 5 shows a flowchart of the calculation operation in the calculation unit 9.

  First, in S1, the A / D conversion circuits 911 to 913 convert analog input voltages into digital codes, respectively, and the registers 921 to 923 store the results. That is, the A / D conversion circuit 911 converts the detection signal SVin of the input voltage Vin of the voltage conversion device 1 into a digital code, and the register 921 stores the result as the input voltage code DVin. The A / D conversion circuit 912 converts the detection signal SVout of the output voltage Vout of the voltage converter 1 into a digital code, and the register 922 stores the result as the output voltage code DVout. The A / D conversion circuit 913 converts the detection signal SIin of the input current Iin of the voltage converter 1 into a digital code, and the register 923 stores the result as the input current code DIin.

  Next, in S <b> 2, the arithmetic circuit 94 reads out the operation parameter set DP stored in advance from the nonvolatile memory 93. In this example, the number of parameters in the calculation parameter set DP is 27.

  Next, in S3, the arithmetic circuit 94 performs the first operation based on the output voltage code DVout stored in the register 922 and the operation parameter set DP (first parameter set) read in S2. Do. The first calculation is a calculation of nine one-dimensional quadratic polynomials related to the output voltage code DVout using the first parameter set as a coefficient. Then, the arithmetic circuit 94 stores a second parameter set consisting of nine parameters (Aa to Cc) as a result of this calculation in the arithmetic circuit 94.

  Next, in S4, the arithmetic circuit 94 performs a second operation based on the input voltage code DVin stored in the register 921 and the second parameter set obtained in S3. The second calculation is a calculation of three one-dimensional quadratic polynomials related to the input voltage code DVin using the second parameter set as a coefficient. Then, the arithmetic circuit 94 stores in the arithmetic circuit 94 a third parameter set composed of three parameters (A to C) as a result of the arithmetic operation.

  Next, in S5, the arithmetic circuit 94 performs a third operation based on the input current code DIin stored in the register 923 and the third parameter set obtained in S4. The third calculation is a one-dimensional second-order polynomial calculation related to the input current code DIin using the third parameter set as a coefficient. Then, the arithmetic circuit 94 stores the result of this operation in the register 96 as the output current code CIout.

  Next, in S6, the arithmetic circuit 94 uses the input voltage code DVin stored in the register 921, the output voltage code DVout stored in the register 922, and the input voltage code DIin stored in the register 923. Then, format conversion is performed. Here, the format conversion is, for example, that the input voltage code DVin is easily converted from the digital code to the original physical quantity (input voltage Vin) using the relationship between the predefined digital code and the physical quantity (input voltage Vin). This means that the input voltage code CVin using another code system (format) that can be converted into the input voltage is re-expressed. That is, for example, the relationship between the input voltage code DVin and the input voltage Vin of the voltage converter 1 is expressed by the characteristics of the voltage detection circuit 21, the transformer 82, the smoothing circuit 84, the buffer 86, etc. The input voltage Vin cannot be known directly from the code DVin. Therefore, if the input voltage code DVin is converted into the input voltage code CVin in consideration of the characteristics of these circuits, the input voltage Vin can be easily obtained from the input voltage code CVin based on the defined relationship. Can do. In this way, the arithmetic circuit 94 converts the input voltage code DVin into the input voltage code CVin, converts the output voltage code DVout into the output voltage code CVout, and converts the input current code DIin into the input current code CIin. After these format conversions, registers 951-953 store these results. That is, the register 951 stores the input voltage code CVin, the register 952 stores the output voltage code CVout, and the register 953 stores the input current code CIin.

  This completes the calculation. Note that these data stored in the registers 951 to 953 and 96 are exchanged with the external device connected to the terminal T5 via the interface unit 97.

  It is also conceivable to combine the first to third calculations described above into one calculation expression. Specifically, nine formulas of the first calculation (S3) are substituted into three formulas of the second calculation (S4), and further, the substituted three formulas of the third calculation (S5) are substituted. By substituting into the equation, it can be made into one ternary quadratic polynomial. However, in this case, the accuracy of the calculation generally deteriorates due to the complexity of the calculation, such as the necessity of calculating many terms having different orders. On the other hand, in the above embodiment, the calculation is performed in three steps (first to third calculations) as described above, and each is a calculation of a one-dimensional quadratic polynomial. By simplifying the operation in this way, the source code of the operation program can be simplified, the accuracy of the operation can be ensured, and the performance required for the operation circuit 94 can be further reduced.

(Preparation of parameter set DP for calculation)
Next, preparation of the operation parameter set DP stored in advance in the nonvolatile memory 93 will be described. The calculation parameter set DP is obtained by fitting based on a lot of measurement data about the relationship among the input voltage code DVin, the output voltage code DVout, the input current code DIin, and the output current Iout.

  FIG. 6 shows a flowchart of the calculation operation in the calculation parameter set DP.

  First, in S11, a large amount of measurement data used for fitting is collected. The measurement data consists of four sets of input voltage code DVin, output voltage code DVout, input current code DIin, and output current Iout. The input voltage Vin and output voltage Vout are set to various conditions. Collect these data. Then, the output current Iout is converted into the output current code CIout based on the relationship between the predefined output current Iout and the digital code.

  Next, in S12, focusing on the relationship between the output current code CIout and the input current code DIin, the first fitting is performed. The first fitting is to obtain a parameter set including three parameters A to C as coefficients so that the output current Iout can be well approximated by a one-dimensional quadratic polynomial related to the input current code DIin. Note that the measurement data used for the first fitting includes a plurality of sets in which the input voltage code DVin is the same level and the output voltage code DVout is the same level among all the measurement data obtained in S11. It is desirable to be composed of

  As a fitting method, for example, a least square method can be used. Below, the 1st fitting at the time of using the least squares method is demonstrated.

ここで、インデックスｉは、フィッティングに用いる測定データの組のシリアル番号を示す。また、インデックスｎは、フィッティングに用いる測定データの組の全数を示す。 The first fitting has three parameters such that the sum of squares J (the following expression) of the difference between the quadratic expression (the right side of the expression shown in S12 of FIG. 6) relating to the output current code CIout and the input current code DIin is minimized. A to C are obtained.

Here, the index i indicates a serial number of a set of measurement data used for fitting. The index n indicates the total number of measurement data sets used for fitting.

ここで、１番目の式は、式（２）をパラメータＡで偏微分したものであり、２番目の式は、式（２）をパラメータＢで偏微分したものであり、３番目の式は、式（２）をパラメータＣで偏微分したものである。 The three parameters (A to C) that minimize the sum of squares J are parameters such that the result of partial differentiation of Equation (2) with these three parameters A to C is 0 (zero).

Here, the first equation is a partial differentiation of equation (2) with parameter A, the second equation is a partial differentiation of equation (2) with parameter B, and the third equation is , Equation (2) is partially differentiated by the parameter C.

By rearranging equation (3) using a matrix, the following equation is obtained.

ここで、Ｘ、ＦおよびＩは行列であり、次式のように定義される。

また、式（５）において、Ｘ^Tは行列Ｘの転置行列である。式（５）を数値的に解くことにより、３つのパラメータＡ〜Ｃからなるパラメータセットが求められる。 Further, formula (4) is rearranged to obtain the following formula.

Here, X, F, and I are matrices, and are defined as follows:

Further, in the equation (5), a transposed matrix of X ^T is the matrix X. By solving Equation (5) numerically, a parameter set including three parameters A to C is obtained.

  Next, in S13, focusing on the relationship between the parameter set obtained in S12 and the input voltage code DVin, the second fitting is performed. The second fitting is to obtain a parameter set consisting of nine parameters Aa to Cc as coefficients so that each of the three parameters A to C can be well approximated by a one-dimensional quadratic polynomial related to the input voltage code DVin. is there. The calculation method is the same as in S12, and for example, the least square method can be used.

  Next, in S14, focusing on the relationship between the parameter set obtained in S13 and the output voltage code DVout, the third fitting is performed. The third fitting is to obtain a parameter set including 27 parameters Aa1 to Cc3 as coefficients so that each of the nine parameters Aa to Cc can be well approximated by a one-dimensional quadratic polynomial related to the output voltage code DVout. It is. The method of obtaining is the same as S12 and S13, and for example, the least square method can be used.

  This completes the fitting. The parameter set (27 parameters Aa1 to Cc3) obtained by the third fitting in S14 is stored in the nonvolatile memory 93 shown in FIG. 2 as the operation parameter set DP. And when the voltage converter 1 operate | moves, as above-mentioned, the output part Iout is calculated | required because the calculating part 9 operate | moves based on the flow shown in FIG.

  The fitting equation shown in FIG. 6 corresponds to the calculation equation shown in FIG. That is, the expression of the first fitting (S12) is the same as the expression of the third calculation (S5), the expression of the second fitting (S13) is the same as the expression of the second calculation (S4), The expression of the third fitting (S14) is the same as the expression of the first calculation (S3). This is because the output current code CIout calculated and obtained by the flow shown in FIG. 5 using the parameter set (27 parameters Aa1 to Cc3) finally obtained by fitting is obtained when fitting is performed. This means that the value of the output current code CIout, which is the original data, is reproduced.

(Example of calculation accuracy of output current Iout)
FIG. 7A is a plot diagram showing the calculation accuracy of the output current Iout in the voltage conversion device 1. The horizontal axis shows the measured value of the output current Iout, and the vertical axis shows the calculated output current code CIout converted into a current value. In this measurement result example, it can be confirmed that the characteristics are within a range of ± 5%, which is shown as a standard of accuracy, regardless of the input voltage Vin or the output voltage Vout.

  As described above, in the present embodiment, the voltage conversion apparatus 1 obtains the output current code CIout by calculating a quadratic polynomial for each of the input voltage code DVin, the output voltage code DVout, and the input current code DIin. Thereby, as shown in FIG. 7A, the output current code CIout is good for any input voltage Vin and output voltage Vout because the output current code CIout is calculated in accordance with these. Accuracy can be achieved. Further, in the voltage conversion device 1, when the output current Iout is increased, the input current Iin generally increases, but even in this case, the output current code CIout is calculated according to the input current Iin, so that the accuracy is high. Can be realized.

(Comparative example)
Next, a voltage conversion device according to a comparative example will be described. In this comparative example, the method for obtaining the output current code CIout based on the detection signal SVin, the detection signal SVout, and the detection signal SIin is different from that of the first embodiment. That is, in the first embodiment (FIG. 1), the power conversion device 1 is configured using the arithmetic unit 9, but instead, in the present comparative example, the power conversion device 1R is configured using the arithmetic unit 9R. Is configured. Other configurations are the same as those of the first embodiment (FIG. 1).
FIG. 8 shows a block diagram of the arithmetic unit 9R in this comparative example. The arithmetic unit 9R includes a nonvolatile memory (LUT) 93R and a search circuit 94R. The non-volatile memory (LUT) 93R is a memory in which an input voltage code DVin, an output voltage code DVout, an input current code DIin, and an output current code CIout in various combinations thereof are stored in advance. It functions as an uptable. The search circuit 94R searches the nonvolatile memory (LUT) 93R based on the supplied input voltage code DVin, output voltage code DVout, and input current code DIin, and outputs an output current code CIout corresponding to these codes. Is read out. Further, the search circuit 94R also has a function of performing format conversion, as in the first embodiment.

  FIG. 9 shows a flowchart of the calculation operation in the calculation unit 9R.

  First, in S21, as in the first embodiment described above, the A / D conversion circuits 911 to 913 convert analog input voltages into digital codes, and the registers 921 to 923 store the results.

  Next, in S22, the search circuit 94R searches the nonvolatile memory (LUT) 93R based on the input voltage code DVin, the output voltage code DVout, and the input current code DIin, and outputs current corresponding to these codes. The code CIout is read and stored in the register 96.

  Next, in S23, the search circuit 94R performs format conversion as in the first embodiment described above, and the registers 951 to 953 store the results.

  FIG. 7B is a plot diagram showing the calculation accuracy of the output current Iout in the voltage conversion device 1R according to the comparative example. The horizontal axis shows the measured value of the output current Iout, and the vertical axis shows the calculated output current code CIout converted into a current value. In this measurement result example, it can be confirmed that the characteristics greatly change depending on the input voltage Vin and the output voltage Vout, and partially exceed ± 5% shown as a standard of accuracy. Compared to FIG. 7A which is an example of the measurement result according to the first embodiment, the deviation amount from the ideal characteristic of the output current code CIout in the comparative example is compared with the case of the first embodiment. About 5 times. Note that the memory capacity of the nonvolatile memory (LUT) 93R in this comparative example (FIG. 7B) is substantially equal to the memory capacity of the nonvolatile memory 93 in the first embodiment (FIG. 7A). It is.

  In this comparative example, as described above, the voltage conversion device 1R searches the data stored in the nonvolatile memory (LUT) 93R according to the input voltage code DVin, the output voltage code DVout, and the input current code DIin. The output current code CIout is obtained by selecting the corresponding output current code CIout from the lookup table. That is, since the output current code CIout is quantized, the output current code CIout depends on the input voltage Vin and the output voltage Vout as shown in FIG. Will deviate from. In addition, when the data of the lookup table is increased so as to quantize more finely, the output current code CIout becomes closer to the ideal characteristic, but in order to realize this, the nonvolatile memory (LUT) 93R Need to increase memory capacity.

  As described above, in the measurement result of the calculation accuracy (FIG. 7), the memory capacity of the nonvolatile memory 93 in the first embodiment and the memory capacity of the nonvolatile memory (LUT) 93R in the comparative example are almost the same. It is equivalent. That is, with the same memory capacity, the first embodiment can realize higher calculation accuracy. On the other hand, in order to achieve the same calculation accuracy in the first embodiment and the comparative example, the memory capacity of the nonvolatile memory (LUT) 93R in the comparative example is increased, or the first embodiment is compared. This is realized by reducing the memory capacity of the nonvolatile memory 93 in FIG. That is, the memory capacity in the first embodiment can be smaller than the memory capacity in the comparative example. As a result, the first embodiment can achieve higher calculation accuracy with a smaller memory capacity than the comparative example.

  In addition, in the comparative example, when the data of the lookup table is increased in order to obtain high calculation accuracy, it is necessary to collect data under more conditions in order to create the table data in the design stage. The labor and time required for the creation increase, which may increase the cost. On the other hand, in the first embodiment, when the calculation accuracy is further improved, for example, the order of the first to third calculations may be increased, and the effort and time required for data collection at the design stage do not change much. . Therefore, according to the first embodiment, higher calculation accuracy can be realized while minimizing cost increase.

[effect]
As described above, in the present embodiment, since the calculation for obtaining the output current of the voltage converter is performed by a three-level unit polynomial, high calculation accuracy can be realized with a small memory capacity.

  In the present embodiment, as shown in FIG. 5, the third calculation is a one-way polynomial related to the input current code DIin. Corresponding to this, as shown in FIG. 6, the fitting for the input current code DIin is first performed. For example, when the output current Iout of the voltage conversion device 1 can take a wide range of values, the range of the input current Iin is also widened. Therefore, it is necessary to perform fitting with high approximation accuracy over a wide input current Iin range. In the present embodiment, fitting accuracy for the input current Iin that can take a wide range is improved first, so that the fitting approximation accuracy is improved, and as a result, the accuracy of the first to third calculations is improved.

  Further, in the present embodiment, as shown in FIG. 5, the orders of the first to third calculations are all secondary. When the calculation order is increased, the calculation accuracy is improved, but the memory capacity required for the nonvolatile memory 93 is increased. On the other hand, if the order of calculation is lowered, the memory capacity required for the nonvolatile memory 93 can be reduced, but the calculation accuracy deteriorates. In addition, in the first to third operations, when the order of at least one operation is different from the order of other operations, an operation of a one-degree polynomial of a different order (for example, FIG. 10) or a one-way polynomial of a different order Since the fitting is performed, the calculation is slightly complicated. In the present embodiment, by making the orders of the first to third calculations all quadratic, the calculations are simplified, and both high calculation accuracy and a small memory capacity can be achieved.

  In the above embodiment, the first to third calculations shown in FIG. 5 are respectively the output voltage code DVout (first calculation), the input voltage code DVin (second calculation), and the input current code DIin (first calculation). However, the present invention is not limited to this, and the order of operations may be changed. For example, if the sensitivity of the input voltage code DVin to the output current code CIout is the highest among the output voltage code DVout, the input voltage code DVin, and the input current code DIin, the first to third May be a unitary polynomial for the output voltage code DVout (first calculation), the input current code DIin (second calculation), and the input voltage code DVin (third calculation). In this case, also in the first to third fittings shown in FIG. 6, the input voltage code DVin (first fitting), the input current code DIin (second fitting), and the output voltage code DVout (third fitting). ). In this example, by fitting the input voltage code DVin having the highest sensitivity to the output current code CIout first, the approximation accuracy of this fitting is improved. As a result, the accuracy of the first to third calculations is improved. improves.

  In the above embodiment, in the first to third calculations shown in FIG. 5, all the arithmetic expressions are unitary quadratic polynomials, but the present invention is not limited to this. A polynomial (m is a natural number) may be used. For example, a one-way linear polynomial or a one-way third-order polynomial may be used. In this case, all the equations of the first to third fittings shown in FIG. 6 need to be a one-dimensional m-order polynomial having the same degree m as the first to third arithmetic equations. When the order m is increased, the approximation accuracy in this fitting is improved, and as a result, the accuracy of the first to third calculations is improved. On the other hand, if the order m is reduced, the calculation becomes simple, so that the calculation processing time is shortened and the required performance of the calculation circuit 94 can be lowered. Furthermore, since the number of parameters in the operation parameter set DP is reduced, the memory capacity of the nonvolatile memory 93 can be reduced.

  In the above embodiment, in the first to third calculations shown in FIG. 5, all the calculation expressions are set to the same order (secondary). However, the present invention is not limited to this, and the first to third calculations are not limited thereto. The order of at least one of the operations may be different from the order of the other operations. For example, when the sensitivity of the input voltage code DVin (second calculation) to the output current code CIout is the highest among the output voltage code DVout, the input voltage code DVin, and the input current code DIin, The order of the one-way polynomial in the second calculation may be third order. In this case, the order of the one-way polynomial of the second fitting shown in FIG. In this example, the accuracy of the first to third calculations is improved because the approximation accuracy of the fitting for the input voltage code DVin having the highest sensitivity to the output current code CIout is improved.

  Furthermore, when the order of at least one of the first to third operations is different from the order of the other operations, the later order of the operations may increase the order. For example, as illustrated in FIG. 10, the first operation may be a one-way linear polynomial, the second operation may be a one-way second-order polynomial, and the third operation may be a one-way third-order polynomial. In this case, the first to third fitting equations also need to correspond to this, the first fitting equation is a one-dimensional cubic polynomial, the second fitting equation is a one-dimensional quadratic polynomial, The fitting equation must be a one-dimensional linear polynomial. As described above, when the order of the first fitting is increased, the approximation error is reduced, and the second and third fittings are performed with higher accuracy. As a result, the accuracy of the first to third operations is increased. Will improve.

<Second Embodiment>
Next, a voltage converter according to a second embodiment of the present invention will be described. In addition, the same code | symbol is attached | subjected to the component substantially the same as the voltage converter 1 which concerns on the said 1st Embodiment, and description is abbreviate | omitted suitably.

[Configuration example]
FIG. 11 shows a circuit configuration of a voltage conversion device according to the second embodiment of the present invention. The voltage conversion device 1B includes a temperature detection circuit 25 and a calculation processing unit 8B having a calculation unit 9B.

  The temperature detection circuit 25 detects the temperature and outputs a detection signal STemp corresponding to the temperature to the arithmetic processing unit 8B.

  The calculation processing unit 8B has a calculation unit 9B. The arithmetic processing unit 8B is supplied from the detection signal SVin1 supplied from the voltage detection circuit 21, the detection signal SIin1 supplied from the current detection circuit 22, the detection signal SVout supplied from the SW switching unit 7, and the temperature detection circuit 25. Based on the detection signal STemp, arithmetic processing is performed to obtain an output current Iout at the output terminal T3 of the voltage conversion device 1B, and the result is output from the output terminal T5.

  FIG. 12 shows a block diagram of the calculation unit 9B. The arithmetic unit 9B includes an A / D conversion circuit 914, registers 924 and 954, a nonvolatile memory 93B, an arithmetic circuit 94B, and an interface unit 97B.

  Similar to the other A / D conversion circuits 911 to 913, the A / D conversion circuit 914 is a circuit that converts the analog detection signal STemp into a digital signal, and the register 924 stores the result as a temperature code DTemp. . The nonvolatile memory 93B is a circuit that stores a plurality of predetermined calculation parameter sets DPB (described later). As will be described later, the arithmetic circuit 94B obtains the output current code CIout by calculation using the input voltage code DVin, output voltage code DVout, input current code DIin temperature code DTEMP, and calculation parameter set DPB. Further, the arithmetic circuit 94B has a function of performing format conversion as in the first embodiment, and converts the temperature code DTemp into the temperature code CTemp. The register 954 stores the temperature code CTemp. Data in the registers 951 to 954 and 96 is exchanged with an external device connected to the terminal T5 via the interface unit 97B.

  In FIG. 11, the voltage detection circuits 21, 23, the current detection circuit 22, and the temperature detection circuit 25 correspond to a specific example of “detection means for detecting n types of detection values” in the present invention, and n is 4 It corresponds to the case of. The computing unit 9B corresponds to a specific example of “arithmetic circuit” in the present invention.

[Operation and Action]
FIG. 13 shows a flowchart of the calculation operation in the calculation unit 9B.

  First, in S41, the A / D conversion circuits 911 to 914 convert analog input voltages into digital codes, respectively, and the registers 921 to 924 store the results. The A / D conversion circuit 914 converts the temperature detection signal STemp of the voltage converter 1 into a digital code, and the register 924 stores the result as a temperature code DTemp. Others are the same as S1 of 1st Embodiment.

  Next, in S42, the arithmetic circuit 94B reads out the pre-stored operation parameter set DPB from the nonvolatile memory 93B. The number of parameters in the calculation parameter set DPB is 81 in this example.

  Next, in S43, the arithmetic circuit 94B performs the first calculation based on the temperature code DTemp stored in the register 924 and the calculation parameter set DPB (first parameter set) read in S42. . The first calculation is a calculation of 27 one-dimensional quadratic polynomials related to the temperature code DTemp using the first parameter set as a coefficient. Then, the arithmetic circuit 94B stores a second parameter set composed of 27 parameters (Aa1 to Cc3) as a result of the arithmetic operation in the arithmetic circuit 94B.

  Next, in S44, the arithmetic circuit 94B performs a second operation based on the output voltage code DVout stored in the register 922 and the second parameter set obtained in S43. The second calculation is a calculation of nine one-dimensional quadratic polynomials related to the output voltage code DVout using the second parameter set as a coefficient. Then, the arithmetic circuit 94B stores a third parameter set consisting of nine parameters (Aa to Cc) as a result of the arithmetic operation in the arithmetic circuit 94B.

  Next, in S45, the arithmetic circuit 94B performs a third operation based on the input voltage code DVin stored in the register 921 and the third parameter set obtained in S44. The third calculation is an operation of three one-dimensional quadratic polynomials related to the input voltage code DVin using the third parameter set as a coefficient. Then, the arithmetic circuit 94B stores a fourth parameter set composed of three parameters (A to C) as a result of the arithmetic operation in the arithmetic circuit 94B.

  Next, in S46, the arithmetic circuit 94B performs a fourth operation based on the input current code DIin stored in the register 923 and the fourth parameter set obtained in S45. The fourth calculation is a one-dimensional quadratic polynomial calculation related to the input current code DIin using the fourth parameter set as a coefficient. Then, the arithmetic circuit 94B stores the result of this operation in the register 96 as the output current code CIout.

  Next, in S47, the arithmetic circuit 94B performs format conversion in the same manner as in the first embodiment. The arithmetic circuit 94B converts the temperature code DTemp into the temperature code CTemp. The register 954 stores the temperature code CTemp. About others, it is the same as that of S6 of 1st Embodiment.

  This completes the calculation. Note that these data stored in the registers 951 to 954 and 96 are exchanged with the external device connected to the terminal T5 via the interface unit 97.

  The calculation parameter set DPB used in the above calculation is prepared in exactly the same manner as the calculation parameter set DP preparation method (FIG. 6) in the first embodiment described above. That is, first, similarly to S11 of FIG. 6, a set of five data consisting of an output current code DIout, an input current code DIin, an input voltage code DVin, an output voltage code DVout, and a temperature code DTemp is set as one set under various conditions. Collect this data. Thereafter, fitting is performed in the same manner as S12 to S14 in FIG. However, in FIG. 13, due to the fact that the calculation is performed in four stages, the fitting is also performed in four stages. That is, the first fitting corresponds to the fourth calculation in FIG. 13, the second fitting corresponds to the third calculation in FIG. 13, and the third fitting corresponds to the second calculation in FIG. The fourth fitting corresponds to the first calculation of FIG. 13. The parameter set (81 parameters Aa11 to Cc33) obtained by the fourth fitting becomes a calculation parameter set DPB.

[effect]
As described above, in the present embodiment, when calculating the output current of the voltage converter, the temperature is also calculated using a one-way polynomial. Accurate calculation can be realized. Other effects are the same as in the case of the first embodiment.

  The voltage conversion apparatus according to the second embodiment may change the order of the first to fourth computations as in the first embodiment.

  In the voltage conversion apparatus according to the second embodiment, all arithmetic expressions may be one-way m-order polynomials (m is a natural number), for example, one-way first-order polynomials or one-way polynomials, as in the first embodiment. A cubic polynomial may be used.

  In the voltage conversion apparatus according to the second embodiment, as in the first embodiment, the order of at least one of the first to fourth calculations may be different from the order of other calculations. . Furthermore, the order may be increased as the calculation is performed later.

で表される。 <Other variations>
In the first and second embodiments, the input voltage, output voltage, input current, and temperature of the voltage converter are used as physical quantities used when calculating the output current. However, the present invention is not limited to this. Other physical quantities may be further added. As another physical quantity, for example, the cumulative usage time of the voltage converter can be used. In this case, the output current of the voltage converter is calculated using a one-way polynomial for the input voltage, output voltage, input current, temperature, and accumulated usage time, so that the change in the output current characteristics due to changes over time can also be expressed. The accuracy is further improved. If there are n physical quantities and the orders of _one-way polynomials corresponding to these physical quantities in the calculation are m ₁ , m ₂ ,..., M _n , respectively, an operation parameter set (DP in the first embodiment) In addition, the number np of parameters of DPB) in the second embodiment is

It is represented by

DESCRIPTION OF SYMBOLS 1,1B ... Voltage converter, 3 ... Switching circuit, 4 ... Transformer, 5 ... Rectifier circuit, 6 ... Smoothing circuit, 7 ... SW switching part, 8 ... Arithmetic processing part, 9, 9B, 9R ... Arithmetic part, 10 ... High voltage battery, 21, 23 ... Voltage detection circuit, 22 ... Current detection circuit, 25 ... Temperature detection circuit, 40 ... Magnetic core, 41 ... Primary winding, 421, 422 ... Secondary winding, 61 ... Choke coil 71, 831, 832 ... buffer, 73 ... control unit, 76, 811, 812 ... transformer, 77, 78 ... SW drive unit, 821, 822 ... smoothing circuit, 911-914 ... A / D conversion circuit, 921-924 951 to 954, 96, registers, 93, 93B, nonvolatile memory, 93R, nonvolatile memory (LUT), 94, 94B, arithmetic circuit, 94R, search circuit, 97, 97B, interface unit, CIin, Iin: Input current code, CIout, DIout: Output current code, Cin: Input smoothing capacitor, Cout: Output smoothing capacitor, CT: Center tap, CVin, DVin: Input voltage code, CVout, DVout: Output voltage code, DP, DPB ... Calculation parameter set, Ia1, Ib1 ... Primary loop current, Ia2, Ib2 ... Secondary loop current, Iin ... Input current, Iout ... Output current, L1H ... Primary high voltage line, L1L ... Primary low voltage Line, L2 ... Secondary line, LG ... Ground line, LO ... Output line, Lr ... Resonant inductor, R72, R841, R842 ... Resistor, S1-S6 ... SW control signal, S75, S76 ... Control signal, SIin , SIin1, SVin, SVin1, STemp, SVout, SVout1 ... detection signal, SW1 to SW6 ... switching elements, T1, T2 ... input terminals, T3, T4, T5 ... output terminal, Vin ... input voltage, Vout ... output voltage

Claims (7)

A voltage conversion circuit that converts the input voltage to output an output voltage; and
Detection means for detecting n types of detection values (n is a natural number of 3 or more) including the input voltage, the output voltage, and the input current of the voltage conversion circuit;
A calculation process for substituting one detection value of the n types of detection values into a one-way polynomial having a predetermined parameter set as a coefficient to obtain a parameter set of a next-stage unit polynomial is selected from the n types of detection values. A voltage converter comprising: an arithmetic circuit that repeats each time the detection values to be substituted are sequentially replaced, and obtains the result of the final stage operation as an output current of the voltage conversion circuit. The detection means detects three types of detection values consisting of the input voltage, the output voltage, and the input current,
The arithmetic circuit is:
A first calculation for obtaining a second parameter set of the next stage by substituting the first detected value of the three types of detected values into a first one-way polynomial having the first parameter set as a coefficient; ,
A second calculation for obtaining a third parameter set of the next stage by substituting the second detected value of the three types of detected values into a second one-way polynomial having the second parameter set as a coefficient. When,
By substituting the third detection value of the three types of detection values into a third one-way polynomial having the third parameter set as a coefficient, the value of the third one-way polynomial is obtained, and this value is obtained. The voltage conversion apparatus according to claim 1, wherein a third calculation that outputs the output current is performed. The voltage conversion apparatus according to claim 1, wherein each of the one-way polynomials is an m-order polynomial (m is a natural number) having the same order. The voltage conversion apparatus according to claim 1, wherein each of the one-way polynomials is an m-order polynomial (m is a natural number), and at least one of them is a different order. The voltage conversion device according to claim 4, wherein the one-way polynomial has a higher degree than the one-way polynomial in a later-stage operation. A method applied to a voltage converter that converts an input voltage to output an output voltage,
Detecting n types of detection values (n is a natural number of 3 or more) including the input voltage, the output voltage, and the input current to the voltage converter;
A calculation process for substituting one detection value of the n types of detection values into a one-way polynomial having a predetermined parameter set as a coefficient to obtain a parameter set of a next-stage unit polynomial is selected from the n types of detection values. An output current calculation method for a voltage converter, which is repeated each time the detection values to be substituted are sequentially replaced, and obtains the result of the final stage calculation as the output current of the voltage conversion circuit. The step of obtaining an initial parameter set that is the predetermined parameter set used in the first calculation process among the calculation processes to be repeatedly performed,
A plurality of combinations of n kinds of actually measured values (n is a natural number of 3 or more) including the input voltage, the output voltage, and the input current to the voltage converter, and the actually measured values of the output current of the voltage converter. An actual value acquisition step for acquiring minutes;
When the measured value of the output current is represented by a first-order polynomial that is a function of one of the n types of measured values, a coefficient of the one-way polynomial is obtained, and this is used as a parameter set for the next stage. First stage calculation step to be set,
When the parameter set obtained by the previous calculation step is represented by a one-way polynomial that is a function of the other one of the n types of actual measurement values, the coefficient of the one-way polynomial is obtained, And a subsequent calculation step set as a parameter set of
The output of the voltage conversion device according to claim 6, wherein after executing the first stage calculation step, by repeating the subsequent stage calculation step, a coefficient of a one-way polynomial in the final stage calculation is obtained and used as the initial parameter set. Current calculation method.

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