JP5010164B2 - サーバ装置及び仮想計算機の制御プログラム - Google Patents

サーバ装置及び仮想計算機の制御プログラム Download PDF

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JP5010164B2
JP5010164B2 JP2006097594A JP2006097594A JP5010164B2 JP 5010164 B2 JP5010164 B2 JP 5010164B2 JP 2006097594 A JP2006097594 A JP 2006097594A JP 2006097594 A JP2006097594 A JP 2006097594A JP 5010164 B2 JP5010164 B2 JP 5010164B2
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JP2007272576A5 (enExample
JP2007272576A (ja
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直也 服部
俊臣 森本
雄次 對馬
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Hitachi Ltd
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Hitachi Ltd
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Priority to JP2006097594A priority Critical patent/JP5010164B2/ja
Priority to US11/703,662 priority patent/US8104035B2/en
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45533Hypervisors; Virtual machine monitors
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44Arrangements for executing specific programs
    • G06F9/455Emulation; Interpretation; Software simulation, e.g. virtualisation or emulation of application or operating system execution engines
    • G06F9/45504Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators
    • G06F9/45516Runtime code conversion or optimisation

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP2006097594A 2006-03-31 2006-03-31 サーバ装置及び仮想計算機の制御プログラム Expired - Fee Related JP5010164B2 (ja)

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Application Number Priority Date Filing Date Title
JP2006097594A JP5010164B2 (ja) 2006-03-31 2006-03-31 サーバ装置及び仮想計算機の制御プログラム
US11/703,662 US8104035B2 (en) 2006-03-31 2007-02-08 Program for controlling a virtual computer and computer system for virtulization technology

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JP2006097594A JP5010164B2 (ja) 2006-03-31 2006-03-31 サーバ装置及び仮想計算機の制御プログラム

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JP2007272576A JP2007272576A (ja) 2007-10-18
JP2007272576A5 JP2007272576A5 (enExample) 2008-11-20
JP5010164B2 true JP5010164B2 (ja) 2012-08-29

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US (1) US8104035B2 (enExample)
JP (1) JP5010164B2 (enExample)

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US7840398B2 (en) * 2006-03-28 2010-11-23 Intel Corporation Techniques for unified management communication for virtualization systems
US8032897B2 (en) * 2007-07-31 2011-10-04 Globalfoundries Inc. Placing virtual machine monitor (VMM) code in guest context to speed memory mapped input/output virtualization
KR101120591B1 (ko) 2007-10-29 2012-03-09 씨씨알 주식회사 컴퓨터 실행 코드분석 및 조작 방지를 위한 임의 코드실행시스템
US8521966B2 (en) * 2007-11-16 2013-08-27 Vmware, Inc. VM inter-process communications
US8949106B2 (en) * 2009-09-18 2015-02-03 International Business Machines Corporation Just in time compiler in spatially aware emulation of a guest computer instruction set
WO2012103245A2 (en) 2011-01-27 2012-08-02 Soft Machines Inc. Guest instruction block with near branching and far branching sequence construction to native instruction block
WO2012103373A2 (en) 2011-01-27 2012-08-02 Soft Machines, Inc. Variable caching structure for managing physical storage
WO2012103367A2 (en) 2011-01-27 2012-08-02 Soft Machines, Inc. Guest to native block address mappings and management of native code storage
WO2012103253A2 (en) * 2011-01-27 2012-08-02 Soft Machines, Inc. Multilevel conversion table cache for translating guest instructions to native instructions
WO2012103359A2 (en) 2011-01-27 2012-08-02 Soft Machines, Inc. Hardware acceleration components for translating guest instructions to native instructions
WO2012103209A2 (en) 2011-01-27 2012-08-02 Soft Machines, Inc. Guest instruction to native instruction range based mapping using a conversion look aside buffer of a processor
US9063760B2 (en) * 2011-10-13 2015-06-23 International Business Machines Corporation Employing native routines instead of emulated routines in an application being emulated
CN103107905B (zh) * 2011-11-14 2017-08-04 华为技术有限公司 异常处理方法、装置和客户端
US10146545B2 (en) 2012-03-13 2018-12-04 Nvidia Corporation Translation address cache for a microprocessor
US9880846B2 (en) 2012-04-11 2018-01-30 Nvidia Corporation Improving hit rate of code translation redirection table with replacement strategy based on usage history table of evicted entries
US10241810B2 (en) * 2012-05-18 2019-03-26 Nvidia Corporation Instruction-optimizing processor with branch-count table in hardware
US20140189310A1 (en) 2012-12-27 2014-07-03 Nvidia Corporation Fault detection in instruction translations
US10108424B2 (en) 2013-03-14 2018-10-23 Nvidia Corporation Profiling code portions to generate translations
WO2014151652A1 (en) 2013-03-15 2014-09-25 Soft Machines Inc Method and apparatus to allow early dependency resolution and data forwarding in a microprocessor
CN105122206B (zh) 2013-03-15 2018-11-09 英特尔公司 用于支持推测的访客返回地址栈仿真的方法和装置
GB2517494B (en) * 2013-08-23 2021-02-24 Advanced Risc Mach Ltd Handling time intensive instructions
US10963280B2 (en) 2016-02-03 2021-03-30 Advanced Micro Devices, Inc. Hypervisor post-write notification of control and debug register updates
US10387210B2 (en) * 2016-04-04 2019-08-20 International Business Machines Corporation Resource schedule optimization
US11467858B2 (en) * 2019-03-27 2022-10-11 Amazon Technologies, Inc. Techniques for performing continuation workflows
JP7168630B2 (ja) * 2020-11-11 2022-11-09 株式会社日立製作所 計算機システム及びジョブの実行制御方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0792761B2 (ja) 1985-07-31 1995-10-09 株式会社日立製作所 仮想計算機システムの入出力制御方法
JPH01243155A (ja) * 1988-03-25 1989-09-27 Hitachi Ltd 仮想計算機システムにおけるチャネルパスグループ管理方式
US6397242B1 (en) 1998-05-15 2002-05-28 Vmware, Inc. Virtualization system including a virtual machine monitor for a computer with a segmented architecture
JP3807860B2 (ja) 1999-01-29 2006-08-09 インターナショナル・ビジネス・マシーンズ・コーポレーション コンパイル方法および装置、並びにメソッド活動度計算方法および装置
US7373451B2 (en) * 2003-12-08 2008-05-13 The Board Of Trustees Of The Leland Stanford Junior University Cache-based system management architecture with virtual appliances, network repositories, and virtual appliance transceivers

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US20070234358A1 (en) 2007-10-04
US8104035B2 (en) 2012-01-24
JP2007272576A (ja) 2007-10-18

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