JP4956334B2 - Automaton determinizing method, finite state transducer determinizing method, automaton determinizing apparatus, and determinizing program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a determination method of an automaton for reducing memory capacity required for determination, and to provide a determination method of a finite state transducer, an automaton determination device and an automaton determination program. <P>SOLUTION: Partial transition to be determined is selected from transition included in a nondeterministic model every time processing related with determination is repeated, and the name of a determined state configured of the combination of states generated in determining the selected partial transition is changed to single different name every time the processing is repeated. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

  The present invention relates to determinization of a finite state automaton (FSA) or an automaton (such as a finite state transducer, a weighted finite state automaton, or a weighted finite state transducer) that is an extension of FSA.

  An FSA in which a plurality of transition destination states exist when transitioning from a current state by a certain input is called a non-deterministic FSA. Further, an FSA in which there is only one transition destination state when a transition is made from an input to a current state is called a deterministic FSA. Converting non-deterministic FSA to deterministic FSA is called “determinization”, and it is known that this determinization can be realized by a method called a subset construction method (for example, see Non-Patent Document 1). In addition, a method of determinizing an automaton that is an extension of a finite state automaton such as a weighted finite state automaton, a finite state transducer, or a finite state transducer from an automaton in a non-determined state (non-deterministic automaton) has been proposed (for example, Non-patent document 2).

J. et al. Hopcroft / J. Co-authored by Ullmann, "Automaton Language Theory Computation I (2nd edition)", Science Finite-state transducers in language and speech processing, Mehryar Mohri, Computational Linguistics, Volume 23, Issue 2 (June 1997) Pages.269-311

  However, when the scale of the non-deterministic FSA to be determinized or the above-described non-deterministic automaton becomes large and complicated, the conventional determinizing method increases the number of elements that must be stored during the determinizing process. There is a problem that a large amount of memory is required to execute determinization.

  The present invention has been made in view of the above, and is an automaton determinizing method, a finite state transducer determinizing method, an automaton determinizing device, and an automaton The purpose is to provide a determinizing program.

  In order to solve the above-described problems and achieve the object, the present invention relates to a finite state automaton or an automaton that is an extension of the finite state automaton. In the determinizing method, the automaton determinator includes a storage unit, and the partial determinizing unit performs determinization on a part of transitions selected as a determinizing target among transitions included in the non-deterministic automaton. A partial determinizing step to be performed and a name change unit which assigns names of determinized states, which are combinations of any states included in the non-deterministic automaton stored in the storage unit by the determinization, to each other. The non-deterministic automaton is obtained by a name changing step to be replaced with a single name and repeating means. The partial determinizing step is repeatedly executed until determinization is performed for all transitions included in the partial determinizing step, and the partial determinizing step includes the determinizing target for each repetition of the repeating step. The transitions or combinations of transitions selected as are made different.

  The present invention also relates to a weighted finite state transducer for use in a speech recognition apparatus, a weighted finite state transducer determinating method executed by an automaton determinator for determinizing a nondeterministic finite state transducer, The automaton determinizing apparatus includes a storage unit, and a partial determinizing step of performing determinization on a part of transitions selected as determinizing targets among transitions included in the non-deterministic finite state transducer by the partial determinizing unit And by the name changing means, the names of the determinized states made up of any state included in the non-deterministic finite state transducer stored in the storage means by the determinization or a combination of a set including the states are mutually connected. By the name change process to change to a different single name and repeat means, Repeating the partial determinizing step until all the transitions included in the non-deterministic finite state transducer are determinized, and the partial determinizing step is performed for each repetition of the repeating step. The transition or the combination of transitions selected as the determinizing target is made different.

  The present invention also relates to a finite state automaton or an automaton that is an extension of the finite state automaton, and is an automaton determinizing device that determines a nondeterministic automaton, and among the transitions included in the nondeterministic automaton, A partial determinizing unit that performs determinization on a part of transitions selected as a memory, and a memory that stores a determinized state that is generated by the determinization and includes any combination of states included in the non-deterministic automaton Repeating the partial determinizing step until determinizing is performed for all transitions included in the non-deterministic automaton, a name changing unit that replaces the determinized state name with a different single name Repetitive means to be executed, and the partial determinator means repeats the repetitive step. Each is characterized by occupying different set of transition or transition selected as the determination-target.

  Further, the present invention relates to a finite state automaton or an automaton that is an extension of the finite state automaton, and is a program that operates on a computer including a storage unit that determines a nondeterministic automaton and functions as a work area at the time of the determinization. Among the transitions included in the non-deterministic automaton, a partial determinizing function for determinizing a part of transitions selected as determinizing targets, and the non-deterministic automaton stored in the storage means by the determinizing A name change step of changing the name of a determinized state composed of any combination of states included in a single name different from each other, and determinization is performed for all transitions included in the non-deterministic automaton Until the partial determinizing step is repeated, and the partial decision is realized. Function is each iteration by the repeating function, characterized in that occupy different set of transition or transition selected as the determination-target.

  According to the present invention, a part of the transitions to be determinized is selected from the transitions included in the non-deterministic automaton, and the determinization is repeatedly performed while changing the transitions to be determinized each time. Since the total number of states included in the non-deterministic automaton that constitutes the names of determinized states stored by determinization can be reduced, the amount of memory required for execution of determinization can be reduced. .

  Exemplary embodiments of an automaton determinizing apparatus, a determinizing method, and a determinizing program will be described below in detail with reference to the accompanying drawings.

[First Embodiment]
FIG. 1 is a block diagram showing a hardware configuration of an automaton determinizing device 100 according to the present embodiment. As shown in FIG. 1, the automaton determinator 100 includes a CPU (Central Processing Unit) 1, an operation unit 2, a display unit 3, a ROM (Read Only Memory) 4, a RAM (Random Access Memory) 5, and a storage unit 6. Etc., and each part is connected by a bus 7. It is assumed that the automaton determinizing apparatuses 200, 300, and 400 described later have the same hardware configuration as that of the automaton determinizing apparatus 100.

  The CPU 1 performs various processes in cooperation with various control programs stored in the ROM 4 or the storage unit 6 in advance using the predetermined area of the RAM 5 as a work area, and controls the operation of each unit constituting the automaton determinizing apparatus 100. To control. Further, the CPU 1 realizes the functions of each functional unit described later in cooperation with a predetermined program stored in advance in the ROM 4 or the storage unit 6.

  The operation unit 2 is an input device such as a mouse or a keyboard. The operation unit 2 receives information input by a user as an instruction signal, and outputs the instruction signal to the CPU 1.

  The display unit 3 is configured by a display device such as an LCD (Liquid Crystal Display), and displays various types of information based on display signals from the CPU 1.

  The ROM 4 stores in a non-rewritable manner programs and various setting information relating to the control of the automaton determinizing apparatus 100.

  The RAM 5 is a volatile storage medium such as an SDRAM and functions as a work area for the CPU 1. Specifically, the RAM 5 temporarily stores various variables and parameter values generated at the time of sequential determinization processing described later. Plays a role as a buffer.

  The storage unit 6 has a storage medium that can be magnetically or optically recorded, and stores a program, various setting information, and the like related to the control of the automaton determining apparatus 100 in a rewritable manner. In addition, the storage unit 6 stores in advance various types of information related to automata such as a non-deterministic FSA to be processed in a sequential determinizing process described later and a non-deterministic WFST described later.

  FIG. 2 is a diagram showing a functional configuration of the automaton determinizing apparatus 100 realized by the cooperation of the CPU 1 and a predetermined program stored in the ROM 4 or the storage unit 6 in advance. As shown in the figure, the automaton determinizing apparatus 100 includes a determinizing processing unit 11, a subset generation unit 12, a partial determinizing unit 13, and an iterative processing unit 14.

  The determinizing processing unit 11 is a functional unit that determinates the non-deterministic FSA by a known method called a subset construction method. Hereinafter, the determinizing method performed by the determinizing processing unit 11 is referred to as a conventional determinizing method.

Here, a conventional determinizing method performed by the determinizing processing unit 11 will be described. FIG. 3 is a diagram showing an example of A ₁ = (Q ₁ , Σ, E ₁ , I ₁ , F ₁ ) that is a nondeterministic FSA. Q ₁ is a set of states, Σ is a set of input symbols, E ₁ is a set of transitions, E ₁ ⊆Q ₁ × Σ × Q ₁ , I ₁ is a set of initial states, and F ₁ is an accepted state Each means a set. Further, a transition which is the element of the set E ₁ transition as [delta], prev ([delta]) the transition source state, next ([delta]) the destination state, and an input symbol transition input The ([delta]) . Note that prev (δ) εQ ₁ , next (δ) εQ ₁ , and input (δ) εΣ.

In the case of FIG. 3, Q ₁ = {0, 1, 2, 3}, Σ = {a, b, c}, I ₁ = {0}, and F ₁ = {0}. Note that the state name of the FSA is expressed by an integer value. In this example, the transition set E ₁ can be expressed as in the transition table shown in FIG. Here, FIG. 4 is a diagram showing a transition table of the nondeterministic FSA shown in FIG. As shown in the figure, “Transition” that represents the type of transition, “Transition source state” that represents the state of the transition source, “Transition destination state” that represents the state of the transition destination, and this transition “Input symbol” is associated. In this transition table, for example, row R1 represents a transition δ ₀ from state 0 to state 1 by the input symbol a.

  Note that the FSA shown in FIG. 3 is a non-deterministic FSA can be determined by counting the number of transition destination states corresponding to one input symbol. For example, when the current state is the initial state, state 0, referring to the case where the input symbol a is input to this FSA, the transition destination state is state 1 or state 2, and the transition destination state is one. Not determined. From this, it can be seen that the FSA of FIG. 3 is a non-deterministic FSA.

The determinization processing unit 11 executes the determinization process illustrated in FIG. 5 in order to determinate the non-deterministic FSA illustrated in FIG. 3 by the subset configuration method. Hereinafter, the determinizing process performed by the determinizing processing unit 11 is described. As a premise of this processing, a deterministic FSA obtained by determining A ₁ = (Q ₁ , Σ, E ₁ , I ₁ , F ₁ ), which is a non-deterministic FSA, is A ₂ = (Q ₂ , Σ, E _2). , I ₂ , F ₂ ). Here, i ₂ is an initial state, and it is assumed that F ₂ , E _2, and Q ₂ before executing determinization by this processing, that is, before executing step S11, are empty sets. It is assumed that various variables such as q _sub , q ′ _sub, x, and δ ′ _, which will be described later, generated when the determinizing process is executed are temporarily stored in the RAM 5 that functions as a work area. Note that “φ” in the figure represents an empty set.

First, determination processing unit 11 substitutes I ₁ to the initial state i ₂ of A ₂ (step S11), and add i ₂ is the initial state of the A ₂ as an element in the queue S (step S12 ).

Next, the determinizing processing unit 11 determines whether S is an empty set (step S13). Here, when it is determined not to be empty set S (S13; Yes), determination processing unit 11, after assigning it to a single extraction q _sub elements from S (step S14), and for the current q _sub It is determined whether or not the processing in steps S16 to 23 has been performed on all elements (input symbols) included in Σ (step S15).

  If it is determined in step S15 that processing has been performed for all elements of Σ (step S15; Yes), the process returns to step S13 again. If it is determined in step S15 that processing has not been performed for all the elements of Σ (step S15; No), the determinizing processing unit 11 substitutes an input symbol that has not yet been processed for x. (Step S16).

Subsequently, the determinizing processing unit 11 substitutes a set of transition destination states of the transition accompanied by the input symbol x among the states included in q _sub for q ′ _sub (step S17). Next, the determinization processing unit 11 adds a transition δ ′ that can transition from q _sub to q ′ _sub by the input symbol x to E ₂ (step S18).

Next, the determinizing processing unit 11 determines whether or not q ′ _sub already exists in Q ₂ . Here, when it determines with existing (step S19; Yes), it returns to the process of step S15 again.

On the other hand, when it is determined that q ′ _sub does not exist in Q ₂ (step S19; No), the determinizing processing unit 11 adds q ′ _sub to Q ₂ (step S20). Subsequently, the determinizing processing unit 11 determines whether or not the element of q ′ _sub is included in F ₁ (step S21). Here, when it is determined that the element of q ′ _sub is not included in F ₁ (step S21; No), the process immediately proceeds to the process of step S23.

When it is determined in step S21 that the element of q ′ _sub is included in F ₁ (step S21; Yes), the determinizing processing unit 11 sets q ′ _sub to the set of accepted states F ₂ . It adds (step S22) and transfers to the process of step S23.

In subsequent step S23, after the determinizing processing unit 11 adds q ′ _sub to S (step S23), the process returns to the process of step S15 again.

On the other hand, in step S13, when it is determined that an empty set S (step S13; No), the operation proceeds to step S24, after it renames state of being added to Q ₂ (step S24), and the process Exit. This name change will be described later.

  It should be noted that a state or transition on a route that cannot reach the accepting state may be removed. S does not need to be a queue. For example, any element can be used as long as it can add and take out elements one by one, such as a stack, and can check whether the element is empty.

FIG. 6 is a diagram showing the deterministic FSA A ₂ obtained by determining the non-deterministic FSA A ₁ of FIG. 3 by the determinizing process described above. The transition set E ₂ in FIG. 6 is represented by the transition table shown in FIG. FIG. 6 shows a state before the name change process (step S24).

In FIG. 6, the numbers enclosed in “{}” in each state are elements of Q1, and the entire set enclosed in “{}” is added to each q ′ _sub added in step S20 described above. Corresponding. Specifically, state B11 is {0}, the state B12 is {1,2}, the state B13 is as {0,3}, is represented as a subset of the set Q _1. Hereinafter, a state in which this subset is assigned as a name, that is, a state included in Q ₂ before the name change is referred to as a “determinized state”.

Processing replacement name performed in step S24 described above, the name of the determined reduction already state, that is, the name that is represented as a subset of the set to Q ₁ state, it means that the process of replacing the single name Yes. For example, in the case of FIG. 6, element Q ₂ 'of the previous replacement name, ie the name of determination of already state is represented by a set of integers. Since it is inefficient to hold state names as sets in this way, different integer values are assigned to the respective sets. In other words, {0} of the state B11 is renamed to 0, {1,2} of the state B12 is renamed to 1, and {0,3} of the state B13 is renamed to 2. FIG. 8 is a diagram showing an example of the result of renaming the state of FIG. Similarly, the names of “transition source state” and “transition destination state” in FIG. 7 which is the transition table of FIG. 6 can be changed.

By renaming in this way, it is not necessary to hold the state name as a subset of Q ₁ , and the storage area required to store the determinized FSA can be reduced. More specifically, when the integer is expressed by 4 bytes, it is necessary to store the state name and the number thereof in order to store the state name before the name change. In order to store the number of bytes and state names, 12 bytes are required, for a total of 32 bytes. However, after the name is changed, 12 bytes are sufficient.

However, since only the determinizing process of the determinizing processing unit 11 increases the number of states and the number of transitions, the length of the name expressed as a subset of Q ₁ also increases, so the determinized state is stored. Requires a large amount of memory. For this reason, in this embodiment, the subset generation unit 12, the partial determinator 13, and the iterative processing unit 14 execute the sequential determinization process described later to determinate the non-deterministic FSA, thereby determining the determinized state q 'Reduce the amount of memory to reduce the number of states contained in _sub and store the determined state.

Hereinafter, an outline of the sequential determinizing process performed in the present embodiment will be described. How the states included in q ′ _sub are created is as described in step S17 of FIG. 5 described above. If the state after the transition from the determinized state q _sub included in Q ₂ by the input symbol a is q ′ _sub , the state after the transition from the states included in q _sub by taking the input symbol a All states are included in q ′ _sub . Here, a is an input symbol included in the input symbol set Σ. Therefore, among the transitions included in E ₁ , the upper limit of the number of states whose transition source state is included in q _sub and whose number of transitions whose input symbol is a is included in q ′ _sub It becomes.

A set of transitions included in E ₁ in which the state included in q _sub is the transition source, the input symbol is a, and the state included in q ′ _sub is the transition destination is denoted as δ _sub . Then, the determinizing operation can be processed by regarding the transitions included in δ _sub as one transition. In fact, the FSA A2 after determination of the transition to transition to q _'sub taking input symbol a from q _sub is only one. 'Since the upper limit of the number of states included in the _sub, the hopefully q be divided into a number of sets of [delta] _sub' number of transitions included in the [delta] _sub is q reduce the upper limit of the number of states included in the _sub be able to. That is, it can be seen that δ _sub may be divided to reduce the storage area for storing the determinized state.

However, even if all transitions included in δ _sub are divided, those transitions may not be deterministic. For example, if two transitions (δ ₀ , δ ₁ ) related to the input symbol a included in δ _sub are divided, there are two transition destination states that transition from q _sub by taking the input symbol a. This means that it is not deterministic. Therefore, in this embodiment, rather than performing division for all transitions included in the [delta] _sub, divide the transition part of the transition contained in the [delta] _sub, so as not to split the remaining transition . Hereinafter, transitions that are not divided among δ _sub are referred to as “transitions to be determinized”. Further, dividing and determinizing a part of the transitions included in _δsub , that is, determinizing a part of the transition of the non-deterministic FSA is called “partial determinization”. However, determinizing all transitions is also included in the concept of partial determinization.

  In addition, although the storage area for storing the determinized state can be reduced by partial determinization, nondeterministic FSA cannot be determinized only by performing partial determinization once. Therefore, the iterative processing unit 14 causes the partial determinizing unit 13 to repeatedly execute partial determinization while changing the transition to be determinized until all transitions are determinized. In partial determinization, as in step S24 of the process described with reference to FIG. 5, the state name is changed every time it is executed. Therefore, the storage area for storing the determinized state is stored every time partial determinization is completed. It becomes unnecessary.

  That is, the amount of memory for storing the determinized state required in the method of repeatedly executing this partial determinization is the amount of memory for storing the determinized state that required partial determinization each time It is the same value as the most common one. That is, it is possible to reduce the amount of memory for storing the determinized state as compared with the conventional determinizing method described in FIG.

  Hereinafter, the subset generation unit 12, the partial determinization unit 13, and the iterative processing unit 14 will be described.

The subset generation unit 12 is a functional unit that generates a subset Σ _i (i is an integer of 1 or more) of input symbols of transitions to be determinized according to the number of repetitions of determinization processing described later.

Specifically, the subset generation unit 12 arranges input symbols included in the set Σ of non-deterministic FSA to be processed based on a predetermined rule, and some of the input symbols after the arrangement are input. A subset Σ _i from which symbols are extracted is sequentially generated according to the number of repetitions of the partial determinizing process described later.

  Here, there is no particular limitation on the predetermined rule that serves as a reference when determining the arrangement of the input symbols. In the present embodiment, the relational expression r (v (x)) that is determined so that the higher the value obtained by the function v (x) expressed by the following expression (1) is, the higher the order is, as a predetermined rule. Shall be used.

Here, "x" is a one of the input symbols included in Σ a set of non-deterministic FSA to be processed, and the E _x a set of transitions to enter the x symbol. However, E _x is assumed to be included in the E _1. Q _x is a set of states that are transition sources of transitions belonging to E _x . Further, the number of elements of E _x is N (E _x ), the number of elements of Q _x is N (Q _x ), and the number of elements of Q ₁ is N (Q ₁ ).

Here, based on the calculation result of the above formula (1), the arrangement of the input symbols so that the higher the value of the calculation result is, the higher the order is, the arrangement from the largest number of transitions related to each input symbol. It is synonymous with doing. In the above formula (1), the portion of N (Q ₁ ) may be a predetermined constant value. In addition, the predetermined rule that serves as an index when determining the arrangement is not limited to the above example.

The subset Σ _i generated by the subset generation unit 12 satisfies the condition of the following formula (2). Here, “n” represents the total number of repetitions of the partial determinizing process described later (the total number of repetitions), and Σ _n = Σ.

  The dividing method of the set Σ is not particularly limited as long as the condition of the above expression (2) is satisfied. In the present embodiment, the number of input symbols of transitions to be determinized is substantially equal as i increases. A mode of increasing at intervals is adopted.

  Hereinafter, the operation of the subset generation process executed by the subset generation unit 12 will be described with reference to FIG. First, the subset generation unit 12 arranges each input symbol included in the set Σ of non-deterministic FSA based on the predetermined rule described above (step S31).

Next, the subset generation unit 12 substitutes the input symbols in the order in which N (Σ) × i / n are arranged in Σ _i, where N (Σ) is the total number of input symbols, and repeats this by repeating this n times. sequentially generates sigma _i for each number of i (step S32). In other words, a set of input symbols satisfying r (x) ≦ N (Σ) × i / n, where r is a function r that takes an input symbol as an argument and returns a rank (an integer of 1 or more), and the input symbol is x. Substitute for Σ _i for each value of _i .

  The operation of the subset generation process described above will be described using the nondeterministic FSA shown in FIG. First, the subset generation unit 12 calculates the value for each input symbol using the function v (x) shown in Expression (1), and v (a) = (2 + 4) / (1 + 4) = 1. 2, v (b) = (2 + 4) / (2 + 4) = 1.0 and v (c) = (1 + 4) / (1 + 4) = 1.0 are obtained. Here, when the values returned by the function v (x) are the same, if the input symbol is a character, the order may be determined based on the assigned character code or the like, or an integer value may be used. For example, the order may be determined based on the value itself. Next, the subset generation unit 12 uses r (v (a)) = 1, r (v) by using a relational expression r (x) determined so as to be ranked higher in accordance with the magnitude of v (x). (B)) = 2 and r (v (c)) = 3 are derived.

Here, assuming that the total number of iterations n = 3 is set, the subset generation unit 12 sets Σ ₁ = {a}, Σ _{2 for} each iteration number i (i = 1 to 3) as a subset Σ _i. = {A, b}, Σ ₃ = {a, b, c}.

Returning to FIG. 2, the partial determinator 13 selects a transition to be determinized based on the Σ _i generated by the subset generator 12 and inputs an input symbol related to the transition that is not to be determinized Is replaced with a different input symbol, and the conventional determinizing method described in FIG. 5 is used to perform determinization (partial determinization) on the transition to be determinized.

  In addition, the iterative processing unit 14 controls the partial determinizing unit 13 to repeatedly execute the partial determinizing process as many times as the number of repetitions n.

Hereinafter, the sequential determinizing process executed by the partial determinator 13 and the iterative processor 14 will be described with reference to FIGS. As a premise of this process, it is assumed that the subset Σ _i is generated in advance by the subset generation unit 12. It is assumed that various variables such as E _r , E _{d, and} x _new described later that are generated when the sequential determinizing process is executed are temporarily stored in the RAM 5 that functions as a work area.

  FIG. 10 is a flowchart showing the procedure of the sequential determinizing process in the present embodiment. First, the repetition processing unit 14 sets a variable i for counting the number of repetitions to 1 (step S41), and executes a partial determinizing process (step S42) corresponding to the value of i to the partial determinizing unit 13. Let Hereinafter, the partial determinizing process in step S42 will be described with reference to FIG.

FIG. 11 is a flowchart showing the procedure of the partial determinizing process in step S42. First, the partial determinizing unit 13 substitutes for E _{r a} transition to be determinized, that is, a set of transitions in which the input symbol of the transition is included in Σ _i (step S51). Next, the partial determinizing unit 13 substitutes E _d for a transition that is not subject to determinization, that is, a set of transitions in which the input symbol of the transition is not included in Σ _i (step S52). Note that _i in Σ _i corresponds to the value of i set in step S41 or step S45 described later.

Subsequently, area determining unit 13, for all the transitions [delta] _d belonging to E _d, determines whether performing processing steps S54,55 to be described later (step S53). Here, when it is determined that there is an unprocessed transition δ _d (step S53; No), the partial determinator 13 satisfies x _new that satisfies the following expression (3), that is, input symbols of E _d transitions are mutually different. An input symbol x _new that is a different input symbol and also an input symbol different from Σ _i is generated (step S54).

Next, the partial determinizing unit 13 replaces the generated x _new with the input symbol _relating to the transition δ _d (step S55), and returns to the process of step S53 again.

On the other hand, in step S53, for all the transitions [delta] _d belonging to E _d, when it is determined that subjected to the process of step S54,55 (Step S53; Yes), and proceeds to step S56.

Next, area determining section 13, after adding the transition [delta] _d belonging to E _d to E _r (step S56), the non-deterministic FSA A _r = (Q ₁ including the E _r, sigma _r, E _r , I ₁ , F ₁ ) is executed by the determinizing processor 11, and the result is A ′ _r (A ′ _r = (Q ₂ , Σ _r , E ′ _r , i ₂ , F ₂ )). (Step S57). Here, Σ _r is a set of input symbols after replacing the input symbol. The determinizing process performed in step S57 is the same as that described with reference to FIG.

Subsequently, area determining section 13, 'after returning the input symbol sigma _r of _r based on the input symbol before replacing in step S55, the A' A a _{r A 2 = (Q 2,} Σ, E 2 , I ₂ , F ₂ ) (step S58), and the process proceeds to step S43. Here, A ₂ is an FSA in which only a transition having an input symbol belonging to Σ _i in A ₁ is determined.

Returning to FIG. 10, the iterative processing unit 14 determines whether or not the value of i is less than n, which is the maximum number of repetitions (step S43). Here, if the value of i is determined to be below the n (Step S43; Yes), the repeating unit 14, the FSA A ₂ determined reduction in step S42 and the FSA A ₁ (step S44), i 1 is increased by 1 (step S45), and the process returns to step S42 again.

If it is determined in step S43 that the value of i is n or more (step S43; No), this process is terminated. Here, the finally obtained FSA A ₂ is a definitive non-deterministic FSA A ₁ to be processed.

The operation of the sequential determinizing process described above will be described with reference to FIGS. 12 to 17 based on the nondeterministic FSA A ₁ shown in FIG. Note that the total number n of iterations is 3, and the subset Σ _i generated by the subset generation unit 12 is Σ ₁ = {a}, Σ ₂ = {a, b}, Σ ₃ = {a, b, c}. Suppose that

First, with respect to determination of the first time (i = 1), shown in Figure 12 the FSA A _r at the time when renames input symbols (the time of step S57 in FIG. 11). In this example, the input symbol b of the transition from the state 1 to the state 0 is replaced with B, the input symbol b of the transition from the state 2 to the state 3 is replaced with C, and the transition of the transition from the state 3 to the state 0 is changed. The input symbol c is replaced with D.

Area determining unit 13 determines by way of the decision of which describe the FSA A _r in FIG. FIG. 13 shows the FSA before the state name is renamed, that is, immediately before the execution of step S24 in FIG. Then, the determinization processing unit 11 reassigns the state number, and the partial determinization unit 13 restores the input symbol to complete the first determinization. This state is shown in FIG.

  Similarly, during the second determinization process (i = 2), the input symbol c of the transition from state 2 to state 0 shown in FIG. 14 is replaced with C and determinized, and immediately before the state name is changed. The results are shown in FIG. FIG. 16 shows the state numbers reassigned and the input symbols restored.

  Although it has already been determined, the partial determinator 13 performs the third (i = 3) determinization according to the control of the iterative processing unit 14. Here, FIG. 17 is a diagram illustrating a result immediately before the state name is changed. Since there is no replaced input symbol, no processing for restoring the input symbol is performed, and the final result of changing only the state name is the same as in FIG.

  Incidentally, the total number of elements included in the determinized state when only the conventional determinizing method described in FIG. 5 is used is five as shown in FIG. On the other hand, in the result of the first determinization by the determinizing method described with reference to FIG. 10, the total number of elements included in the determinized state is four as can be seen from FIG. Similarly, the second time is four from FIG. 15, and the third time is three from FIG.

  Therefore, the maximum total number of elements in the repeated determinizing process is four, and the maximum value of the total number of elements can be reduced as compared with the conventional determinizing method using only the determinizing process. That is, the amount of memory necessary for storing the determined state can be reduced.

  As described above, according to this embodiment, a part of transitions to be determinized is selected from the transitions included in the non-deterministic FSA, and repeated determinization is performed while changing the transition to be determinized each time. Therefore, since the total number of states included in the non-deterministic automaton constituting the determinized state names stored in one determinization can be reduced, the amount of memory required for executing determinization Can be reduced.

  The program for executing each process in the automaton determinator 100 described above can be read by a computer such as a CD-ROM, a floppy (R) disk (FD), and a DVD in an installable or executable format. It is good also as an aspect which records and provides on a recording medium.

  The program for executing each process in the automaton determinizing apparatus 100 may be stored on a computer connected to a network such as the Internet and provided by being downloaded via the network.

  In this case, the program is loaded onto the RAM 5 by being read from the recording medium and executed by the automaton determinator 100, and each unit described in the software configuration is generated on the RAM 5.

[Second Embodiment]
In the first embodiment described above, the mode in which the input symbol is replaced every time the partial determinizing process is performed has been described. In the present embodiment, an automaton determinator 200 capable of realizing non-deterministic FSA determinization without reducing input symbols and reducing the amount of memory required for the determinization will be described. In addition, about the structure similar to 1st Embodiment mentioned above, the same code | symbol is provided and the description is abbreviate | omitted.

  FIG. 18 is a diagram illustrating a functional configuration of the automaton determinizing apparatus 200 according to the present embodiment realized by cooperation of the CPU 1 illustrated in FIG. 1 and a predetermined program stored in the ROM 4 or the storage unit 6 in advance. It is. As shown in the figure, the automaton determinizing apparatus 200 includes a subset generation unit 12, a partial determinization unit 21, and an iterative processing unit 14.

Here, the partial determinator 21 sequentially selects one input symbol as a processing target from the input symbols related to the transition included in the non-deterministic FSA to be processed, and extracts the transition related to the input symbol to be processed. A set E _d of transitions is generated. Further, the partial determinizing unit 21 selects a transition to be determinized from the transitions included in E _d and performs determinizing for the selected transition. Here, the extraction method related to the generation of E _d is not particularly limited, but in this embodiment, the extraction method is performed based on the subset Σ _i described in the first embodiment.

Hereinafter, with reference to FIGS. 19 to 21, the sequential determinizing process of the present embodiment executed by the partial determinizing unit 21 and the iterative processing unit 14 will be described. As a premise of this process, it is assumed that the subset Σ _i is generated in advance by the subset generation unit 12. It is assumed that various variables, which will be described later, that are generated when the sequential determinizing process is executed are temporarily stored in the RAM 5 that functions as a work area.

  FIG. 19 is a flowchart showing the procedure of the sequential determinizing process in this embodiment. First, the repetition processing unit 14 sets a variable i for counting the number of repetitions to 1 (step S61), and executes a partial determinizing process (step S62) corresponding to the value of i to the partial determinizing unit 21. Let Hereinafter, the partial determinizing process in step S62 will be described with reference to FIG.

FIG. 20 is a flowchart showing the procedure of the partial determinizing process in step S62. First, the partial determinator 21 substitutes I ₁ for the initial state i ₂ of A ₂ (step S71), and adds this i ₂ to the queue S (step S72). At this time, only i ₂ is stored in S.

Next, the partial determinator 21 determines whether or not S is an empty set. If it is determined that it is not an empty set (S73; Yes), after extracting one element from S and substituting it into _qsub (step In step S74, it is determined whether or not processing has been performed on all elements (input symbols) included in Σ with respect to the current q _sub (step S75). If it is determined that processing has been performed for all the elements of Σ (step S75; Yes), the process returns to step S73 again.

  On the other hand, if it is determined in step S75 that processing has not been performed for all elements of Σ (step S75; No), the partial determinator 21 selects one of the input symbols that have not yet been processed. Is substituted for x (step S76).

Subsequently, the partial determinizing unit 21 assigns a set of transitions from the state included in q _sub with the input symbol x to E _d (step S77), and then determines whether this E _d is an empty set. (Step S78). If it is determined that E _d is an empty set (step S78; No), the process returns to step S75 again.

On the other hand, when it is determined in step S78 that E _d is not an empty set (step S78; Yes), the partial determinator 21 performs a transition selection process (step S79) for selecting a transition from E _d . Hereinafter, the transition selection process in step S79 will be described with reference to FIG.

First, the partial determinator 21 determines whether or not the input symbol x substituted in step S76 is included in the subset Σ _i (step S791). Note that _i of Σ _i corresponds to the value of i set in step S61 or step S65 described later.

Here, when the input symbol x is determined to be included in the subset sigma _i (Step S791; Yes), by substituting E _d to the set E _t transitions (step S792), step S80 of FIG. 20 Move on to processing.

On the other hand, if it is determined in step S791 that the input symbol x is not included in the subset Σ _i (step S791; No), one arbitrary transition is extracted from E _d and substituted into the transition set E _t . After (step S793), the process proceeds to step S80 in FIG.

Returning to FIG. 20, the partial determinizing unit 21 removes the transitions belonging to the set of transitions E _t selected in step S79 from E _d (step S80). Subsequently, area determining section 21, when a transition included in the E _t was [delta], by substituting the set q _s of transition destination state of the transition [delta] to q _'sub (step S81).

Next, the partial determinator 21 determines that δ ′ in which the transition source state of δ ′ is q _sub , the transition destination state of δ ′ is q ′ _sub , and the input symbol of δ ′ is x is E After adding to ₂ (step S82), it is determined whether q ′ _sub exists in Q ₂ (step S83). If it is determined that q ′ _sub already exists in Q ₂ (step S83; Yes), the process returns to step S78 again.

On the other hand, in step S83, 'if _{the sub} is judged not present in Q _2, i.e. q' q _{if sub} is determined to be a new state (step S83; No), area determining section 21, Q ′ _sub is added to Q ₂ (step S84). Subsequently, the partial determinizing unit 21 determines whether or not the element of q ′ _sub is included in F ₁ (step S85). Here, if it is determined that the element of q ′ _sub is not included in F ₁ (step S85; No), the process immediately proceeds to the process of step S87.

If it is determined in step S85 that the element of q ′ _sub is included in F ₁ (step S85; Yes), the partial determinator 21 sets q ′ _sub to the set of accepted states F ₂ . After the addition (step S86), the process proceeds to step S87.

In subsequent step S87, after partial determinator 21 adds q ′ _sub to S (step S87), the process returns to step S78 again.

On the other hand, in step S73, when it is determined that an empty set S (step S73; No), the operation proceeds to step S88, after renames state of being added to Q ₂ (step S88), FIG. 19 The process proceeds to step S63.

Returning to FIG. 19, the iterative processing unit 14 determines whether or not the value of i is less than n which is the maximum value of the number of repetitions (step S <b> 63). Here, if the value of i is determined to be below the n (Step S63; Yes), the repeating unit 14, the FSA A ₂ derived in step S62 and FSA A ₁ (step S64), the i After incrementing the value by 1 (step S65), the process proceeds to step S62 again.

Further, when it is determined in step S63 that the value of i is n or more (step S63; No), this process ends. Here, the finally obtained FSA A ₂ is a definitive non-deterministic FSA A ₁ to be processed.

  As described above, according to this embodiment, a part of transitions to be determinized is selected from the transitions included in the non-deterministic FSA, and repeated determinization is performed while changing the transition to be determinized each time. Therefore, since the total number of states included in the non-deterministic automaton constituting the determinized state names stored in one determinization can be reduced, the amount of memory required for executing determinization Can be reduced.

  Further, according to the present embodiment, since the transition to be determinized can be directly specified, the transition to be determinized can be selected by a method other than the selection of the transition by the input symbol.

[Third Embodiment]
The method described in the first embodiment can be similarly applied not only to FSA but also to automata determinizing FSA. In the present embodiment, an automaton determinizing apparatus 300 that performs automaton determinization with expanded FSA will be described. In addition, about the structure similar to 1st Embodiment mentioned above, the same code | symbol is provided and the description is abbreviate | omitted.

  FIG. 22 is a diagram showing a functional configuration of the automaton determinizing apparatus 300 realized by the cooperation of the CPU 1 and a predetermined program stored in the ROM 4 or the storage unit 6 in advance. As shown in the figure, the automaton determinizing apparatus 300 includes a determinizing processing unit 31, a subset generation unit 12, a partial determinizing unit 32, and an iterative processing unit 33.

  The determinization processing unit 31 includes a weighted finite state automaton (WFSA), a finite state transducer (FST), and a weighted finite state transducer (Weighted Finite State Transducer) in which a plurality of transition destination states exist. Determinizing an automaton (non-deterministic automaton) in a non-deterministic state obtained by extending a non-deterministic FSA such as WFST).

  Here, WFSA is obtained by adding a weight to the transition of FSA. Therefore, an input symbol and a weight are assigned to the WFSA transition. Here, “weight” means any probability value, score, penalty, etc., and is calculated according to a predetermined rule (addition, multiplication, minimum value, maximum value, etc.) along the path for accepting the input symbol. It is.

  The FST is obtained by adding an output symbol to an input symbol of an FSA transition. When a symbol string consisting of input symbols is given as an input, a symbol string consisting of output symbols is output. This FST is used for symbol string conversion, for example.

  WFST is a model in which an output symbol is assigned in addition to an input symbol and a weight assigned to a WFSA transition. That is, in WFST, three elements of an input symbol, an output symbol, and a weight are assigned to the transition. This WFST is used, for example, as a model for speech recognition.

  The methods for determinating these extended models of FSA (especially WFSA and FST) are described in Finite-state transducers in language and speech processing, Mehryar Mohri, Computational Linguistics, Volume 23, Issue 2 (June 1997) Pages.269- 311 etc. The determinizing processing unit 31 is a functional unit that performs determinizing processing using these known methods. Hereinafter, the determinizing method performed by the determinizing processing unit 31 is referred to as a conventional determinizing method.

Hereinafter, a conventional determinizing method performed by the determinizing processing unit 31 will be described. Here, WFST is a processing target, and nondeterministic WFST to be determinized is T ₁ = (Q ₁ , Σ, Δ, E ₁ , I ₁ , F ₁ , λ ₁ , ρ ₁ ), T ₁ after determinization is deterministic WFST T ₂ = (Q ₂ , Σ, Δ, E ₂ , i ₂ , F ₂ , λ ₂ , ρ ₂ ).

In the above nondeterministic WFST T ₁ , Q ₁ is a set of states, Σ is a set of input symbols, Δ is a set of output symbols, E ₁ is a set of transitions, and E ₁ ⊆Q ₁ × Σ × Δ × K × Q ₁ and I ₁ are a set of initial states, and F ₁ is a set of accepting states. Λ ₁ is an initial weight function that takes an initial state as an argument and returns an initial weight assigned to the initial state passed to the argument. ρ ₁ is an end weight function that takes an accepted state as an argument and returns an end weight assigned to the accepted state passed to the argument. _{Incidentally, Q 2, E 2, F} 2 relates T _2, which is the same for [rho _2. However, i ₂ is an initial state, and λ ₂ is an initial weight. K is a set representing a weight, and may be an entire integer, an entire positive integer, or an entire real number, for example.

FIG. 23 is a flowchart showing a procedure of determinizing processing performed by the determinizing processing unit 31. First, the determinizing processing unit 31 sets F ₂ as an empty set (step S91), and then substitutes the smallest value among the initial weights in all initial states for λ ₂ (step S92).

Next, the determinization processing unit 31 generates a set including the triplet of the state name (q), the character string, and the weight of T ₁ and assigns it to i ₂ as the initial state name of T ₂ (step S93). ). Of these triplets, the character string is referred to as “remainder character string”, and ε, which is an empty character string, is set in step S93. On the other hand, the weight of the triplet is referred to as “remainder weight”, and λ ₁ (q) −λ ₂ is substituted in step S93.

Subsequently, the determinizing processing unit 31 adds i ₂ to the queue S (step S94), and then determines whether S is an empty set (step S95). Here, if it is determined that S is not empty (step S95; Yes), determination processing unit 31 takes out one included elements in S, substituting the extracted elements to q ₂ (step S96 ).

Next, the determinization processing unit 31 accepts a state where q is T ₁ out of a set (q, l, w) of the triplet of the state name, the surplus character string, and the surplus weight included in q _2. It is determined whether or not it is included in the set F ₁ (step S97). Here, q is when it is determined that not included in the set F ₁ of accepting states of T _1; immediately proceeds to the processing of (step S97 No), step S100.

Further, in step S97, if q is determined to be in the set F ₁ of accepting states of T ₁ (step S97; Yes), determination processing unit 31, an accepting state of the q ₂ T ₂ To the set F ₂ (step S98).

Next, the determinizing processing unit 31 calculates w + ρ ₁ (q) for all q included in the set F _{1 of} accepted states among q of the triplet (q, l, w) belonging to q _2. , and it substitutes the minimum value ρ ₂ (q ₂₎ as the end weight q ₂ (step S99).

  Subsequently, the determinizing processing unit 31 determines whether or not the processing from step S101 to step S109 described later has been executed for all elements (input symbols) included in Σ (step S100). Here, when it is determined that the process has been executed for all the elements of Σ (step S100; Yes), the process returns to the process of step S95 again.

On the other hand, if it is determined in step S100 that there is an unprocessed element (step S100; No), the determinizing processing unit 31 substitutes one of the input symbols not yet processed for x. (Step S101), it is determined whether Γ (q ₂ , x) is empty (Step S102). Here, Γ (q ₂ , x) is Γ (q ₂ , x) = {(q, l, w) ∈q ₂ | δ∈E ₁ , prev (δ) = q, input (δ) = x }. That is, among the triples (q, l, w) included in q ₂ , the triples satisfying the condition that the transition δ whose input symbol is x and whose transition source is q exists in E ₁ ( q, l, w).

If it is determined in step S102 that Γ (q ₂ , x) is empty (step S102; No), the process returns to step S100 again. If it is determined in step S102 that Γ (q ₂ , x) is not empty (step S102; Yes), the determinizing processing unit 31 determines whether the transition source is q ₂ and the input symbol is x. A weight is calculated, and the calculation result is substituted for w ₂ (step S103). The value of w ₂ substituted here is the smallest value among the following values for all triples (q, l, w) belonging to Γ (q ₂ , x). The value is a value obtained by adding w to the smallest value among the weights of the transition δ in which the transition source is q and the input symbol is x among the transitions belonging to E ₁ . Note that weight (δ) represents the weight of the transition δ.

Subsequently, the determinizing processing unit 31 calculates an output symbol of a transition whose transition source is q _{2 and} whose input symbol is x, and substitutes this calculation result into l ₂ (step S104). The value of l ₂ substituted here is the longest forward match among the next character strings for all triples (q, l, w) belonging to Γ (q ₂ , x). The character string is a string in which the character string l is connected in front of the character string having the longest forward match of the output symbol of the transition δ whose transition source is q and the input symbol is x among the transitions belonging to E ₁ It is. For example, if there is only one triple (q, l, w) belonging to Γ (q ₂ , x) and two δ satisfying the condition, the output symbol output (δ) is AB and AC. If the character string l is P, the character string assigned to l ₂ is PA.

Next, the determinizing processing unit 31 generates a transition destination state q ′ ₂ that transitions from q ₂ by the input symbol x (step S105). Here, in order to generate q ′ ₂ , it is necessary to generate a set of triples composed of the state name of T ₁ , the surplus character string, and the surplus weight. Of these, the state belongs to ν (q ₂ , x), and its element is q ′. Ν (q ₂ , x) = {q ′ | (q, l, w) ∈q ₂ , δ∈E ₁ , prev (δ) = q, input (δ) = x, next (δ) = q '}. That is, with respect to the triplet (q, l, w) belonging to q ₂ , of the transitions δ belonging to E ₁ , the transition destination state where the transition source state is q and the input symbol is x If q ′ is q ′, a set of q ′ satisfying this condition is a value returned by ν (q ₂ , x).

The remaining character string that is the second value of the triplet is the following character string for q ′. The character string is from the front of the character string obtained by adding the output character string of δ after l to each of the four sets (q, l, w, δ) belonging to the set γ (q ₂ , x). A character string obtained by removing the character string of l ₂ is calculated, and the longest forward match of those character strings is obtained. Here, γ (q ₂ , x) = {(q, l, w, δ) ∈q ₂ × E ₁ | prev (δ) = q, input (δ) = x}. That is, among the triples (q, l, w) included in q ₂ , the quadruple (q, including the transition belonging to E ₁ whose input symbol is x and whose transition source is q) , l, w, δ) is a value returned by γ (q ₂ , x).

The remaining weight, which is the third value of the triplet, is as follows for q ′. The value of the weight is the value obtained by adding the weight of δ to w and subtracting w ₂ for each of the four sets (q, l, w, δ) belonging to the set γ (q ₂ , x). The smallest value. A set of triples generated by the above calculation is q ′ ₂ .

In subsequent step S106, the determinizing processing unit 31 adds a transition from q ₂ to q ′ ₂ to E ₂ (step S106). The input symbol of the transition added here is x, the output symbol is l ₂ , and the weight is w ₂ .

Then, determination processing unit 31, when the generated q _'2 in step S105, it is determined whether or not included in Q _2, is determined to be included (step S107; No), step S100 Return to the process.

If it is determined in step S105 that q ′ ₂ is not included in Q ₂ (step S107; Yes), the determinizing processing unit 31 adds q ′ ₂ to Q ₂ (step S108). After adding q ′ ₂ to S (step S109), the process returns to step S100 again.

On the other hand, if it is determined in step S95 that S is empty (step S95; No), the determinizing processor 31 belongs to the set Q ₂ of T ₂ states that determined T ₁ . Is renamed (step S110), and the process is terminated.

That is, before the name change, the name of the state belonging to Q ₂ was expressed by a set of triples of the state name belonging to Q ₁ , the remainder output symbol, and the remainder weight, but if the determinizing process is completed, Rename it to a new name because it is unnecessary. For example, a new name may be assigned to each state in order from 0, and the storage area can be reduced by this processing. Even in a model in which FSA is expanded as in WFST, the state included in Q ₂ before the name change is referred to as “determinized state” as in the case of FSA.

An example when the WFST is determinized by the determinizing process described above will be described with reference to FIGS. FIG. 24 is a diagram showing non-deterministic WFST T ₁ before determinization. In the figure, the state written as “0/0” is the initial state, the left side of “/” represents the state number, and the right side represents the initial weight. Further, states “1/0” and “2/2” drawn by double circles are accepting states, the left side of “/” represents the state number, and the right side represents the end weight. That is, the end weight in state 1 is 0, and the end weight in state 2 is 2. The character written in each transition means “input symbol: output symbol / weight”. For example, in the case of transition from state 0 to state 1, the input symbol is a, the output symbol is A, and the weight is 1. It shows that there is.

  FIG. 25 is a diagram showing the WFST immediately before the name is changed in step S110 of the determinizing process. Here, the state indicated by B21 is the initial state, the set of triples is (0, ε, 0), and the initial weight is 0. That is, the state before determinization corresponding to B21 is state 0, the remainder output symbol is an empty character string, and the remainder weight is 0.

  The state indicated by B22 is an acceptance state, and the end weight is 1. Of the states 1 and 2 before determinization corresponding to this state B22, the surplus character string is an empty character string and the remainder weight is 1 in the triplet related to state 1. Further, in the triple for state 2, the surplus character string is an empty character string, and the weight of the remainder is zero. The same applies to the other states B23 to B25.

  FIG. 26 is a diagram showing the WFST after the name is changed in step S110 of the determinizing process, that is, the WFST after determinizing. By comparing the state names included in FIG. 26 and FIG. 25, it can be seen that the amount of memory required to store the state name is reduced by the name change. For example, the state indicated by B24 in FIG. 25 is “{(0, ε, 2), (1, A, 1), (2, A, 0)} / 1”, which includes three triples. It remembers the set and end weight. On the other hand, in FIG. 26, in the state indicated by B31 corresponding to B24, “3/1” is obtained, and only the state number and the end weight are stored.

  However, with only the determinizing method by the determinizing processing unit 31 described above, a large amount of memory is required to store the determinized state as the number of states and transitions of WFST increases. Therefore, in the present embodiment, by providing the subset generation unit 12, the partial determinization unit 32, and the iterative processing unit 33, the amount of memory for storing the determined state is reduced. Hereinafter, the partial determinator 32 and the iterative processor 33 will be described.

The partial determinator 32 selects a transition to be determinized based on a subset Σ _i of input symbols corresponding to the number of repetitions i, and inputs different input symbols related to transitions not to be determinized. By replacing with symbols and using the conventional determinizing method described with reference to FIG. 23, determinization (partial determinization) is performed on the transition to be determinized.

  The iterative processing unit 33 controls the partial determinizing unit 32 to repeatedly execute the partial determinizing process as many times as the number of repetitions n.

Next, the sequential determinizing process executed by the partial determinator 32 and the repetitive processor 33 will be described with reference to FIGS. As a premise of this process, it is assumed that the subset Σ _i is generated in advance by the subset generation unit 12. It is assumed that various variables, which will be described later, that are generated when the sequential determinizing process is executed are temporarily stored in the RAM 5 that functions as a work area.

  FIG. 27 is a flowchart showing the procedure of the sequential determinizing process in the present embodiment. First, the repetition processing unit 33 sets a variable i for counting the number of repetitions to 1 (step S121), and executes a partial determinizing process (step S122) according to the value of i on the partial determinizing unit 32. Let Hereinafter, the partial determinizing process in step S122 will be described with reference to FIG.

FIG. 28 is a flowchart showing the procedure of the partial determinizing process in step S122. First, the partial determinizing unit 32 substitutes for E _{r a} transition to be determinized, that is, a set of transitions in which the input symbol of the transition is included in Σ _i (step S131). Next, the partial determinizing unit 32 substitutes E _d for a transition that is not subject to determinization, that is, a set of transitions in which the input symbol of the transition is not included in Σ _i (step S132). Note that _i of Σ _i corresponds to the value of i set in step S121 or step S125 described later.

Subsequently, area determining unit 32, for all the transitions [delta] _d belonging to E _d, determines whether performing the processing of step S134,135 to be described later (step S133). Here, if it is determined that the transition [delta] _d unprocessed exists (step S133; No), area determining unit 32, x _{new new} satisfying Equation (3) described above, i.e., the input symbol transitions E _d An input symbol x _new that is different from each other and that is also different from Σ _i is generated (step S134). Then, the partial determinizing unit 32 replaces the generated x _new with the input symbol relating to the transition δ _d (step S135), and returns to the process of step S133 again.

On the other hand, in step S133, for all the transitions [delta] _d belonging to E _d, when it is determined that subjected to the process of step S134,135 (step S133; Yes), and proceeds to step S136.

Next, area determining unit 32, after adding the transition [delta] _d belonging to E _d to E _r (step S136), the non-deterministic WFST T _r = (Q ₁ including the E _r, sigma _r, delta, The determinizing processing unit 31 executes the determinizing process of E _r , I ₁ , F ₁ , λ ₁ , ρ ₁ ), and the result is T ′ _r (T ′ _r = (Q ₂ , Σ _r , Δ, E). ' _r , i ₂ , F ₂ , λ ₂ , ρ ₂ )) (step S137). Here, Σ _r is a set of input symbols after replacing the input symbol. Note that the determinizing process performed in step S137 is the same as that described with reference to FIG.

Subsequently, area determining unit 32 'after returning the input symbol sigma _r of _r based on the input symbol before replacing in step S135, the T' T a _{r T 2 = (Q 2,} Σ, Δ, E ₂ , i ₂ , F ₂ , λ ₂ , ρ ₂ ) (step S138), and the process proceeds to step S123 in FIG. Here, T ₂ is WFST in which only transitions having input symbols belonging to Σ _i in T ₁ are determined.

Returning to FIG. 27, the iterative processing unit 33 determines whether or not the value of i is less than n which is the maximum number of repetitions (step S123). Here, if the value of i is determined to be below the n (Step S123; Yes), repetitive processing unit 33, a WFST T ₂ determined reduction in step S122 as WFST T ₁ (step S124), i 1 is increased by 1 (step S125), and the process returns to step S122 again.

If it is determined in step S123 that the value of i is n or more (step S123; No), this process ends. Here, the finally obtained WFST T ₂ is obtained by determinizing the non-deterministic WFST T ₁ to be processed.

The operation of the sequential determinizing process described above will be described with reference to FIGS. 29 to 31 based on the nondeterministic WFST T ₁ shown in FIG. It is assumed that the total number n of iterations is 2, and the subset Σ _i generated by the subset generator 12 is Σ ₁ = {a}, Σ ₂ = {a, b}.

First, regarding the first determinization (i = 1), WFST before determinizing and replacing the state name (immediately before executing step S110) is shown in FIG. From this figure, it can be seen that the input symbol is deterministic for the transition of a. Further, the input symbol b is replaced with symbols b ₁ and b ₂ , and both of them are changed to b, so that it is understood that the transition related to the input symbol b has not yet been determinized. Note that the WFST as a result of changing the state name in the subsequent step S110 and returning the input symbol in FIG. 29 to the original input symbol in the subsequent step S138 is as shown in FIG.

  Next, the second (i = 2) determinization is executed. That is, the WFST in FIG. 30 is determinized. As a result of this determinization, the WFST in FIG. 30 becomes as shown in FIG. FIG. 31 shows the WFST before the state name is changed. When the state name is changed, it becomes as shown in FIG.

  By the way, if the WFST in FIG. 24 is determinized using only the determinizing process (conventional determinizing method) described in FIG. 23, it is expressed as shown in FIG. is there. At this time, when the number of triples (state name, remainder character string, remainder weight) that must be stored is counted, one is {(0, ε, 0)} in state B21, and in state B22. Are two in {(1, ε, 1), (2, ε, 0)}, two in state B23, two in {(0, ε, 0), (3, ε, 1)}, in state B24 Are {(0, ε, 2), (1, A, 1), (2, A, 0)}, and state B25 has {(0, ε, 0), (1, ε, 1). , (2, ε, 0)}, there are three, a total of eleven.

  On the other hand, when the WFST of FIG. 24 is determined by the sequential determinizing process described with reference to FIGS. 27 and 28, the first determinization is as shown in FIG. 29, and the state B41 has {(0, ε, 0)}. 1 state, 2 in state B42 {(1, ε, 1), (2, ε, 0)}, and 1 state B43 in {(3, ε, 0)}, a total of 4 is there. Further, in the second determinization, it becomes as shown in FIG.

  Therefore, in the determinizing method using the sequential determinizing process, the maximum number of triples that must be stored as state names at the time of determinizing is eight, which is more than the determinizing method using only the determinizing process. The maximum value of the total number of elements can be reduced. That is, the amount of memory necessary for storing the determined state can be reduced.

  Next, as a modification of the automaton determinizing apparatus 300 according to the present embodiment, a mode in which the determinizing method (sequential determinizing process) according to the present embodiment is applied to a speech recognition apparatus will be described.

  FIG. 32 is a diagram schematically showing the configuration of the speech recognition apparatus 500. As shown in FIG. 32, the speech recognition apparatus 500 includes a feature amount extraction unit 501 that extracts a feature amount necessary for speech recognition from a speech signal input via a microphone (not shown), and a WFST synthesis described later. And a synthesis optimization unit 502 that performs optimization, and a decoder 503 that converts the extracted feature quantity into a character string based on the WFST optimized by the synthesis optimization unit 502.

  The speech recognition apparatus 500 stores an acoustic model 504, a word dictionary 505, and a language model 506 in advance in storage means (not shown). Here, the acoustic model 504 holds information for determining which phoneme is closest to the input voice signal. The word dictionary 505 holds what phoneme string each word is composed of. The language model 506 holds information (score) for determining which word sequence is likely in the recognition target language.

  In the speech recognition apparatus 500, it is assumed that the acoustic model 504, the word dictionary 505, and the language model 506 are expressed in the above-described WFST. An example of a method for creating a WFST used in such a speech recognition apparatus is described in Mehryar Mohri, Michael Riley, Integrated Context-Dependent Networks in Very Large Vocabulary Speech Recognition, EUROSPEECH '99, Volume 2, Page 811-814. ing.

  Specifically, HMM (Hidden Markov model) is generally used for the acoustic model 504. In this case, the input symbol is set to the function number for calculating the transition probability and the output probability, and the output symbol is set as the phoneme as WFST. Can express. However, the weight of this WFST is calculated dynamically using the function of the number designated by the input symbol, that is, when the decoder 503 receives the feature amount.

  Also, the word dictionary 505 can be expressed in WFST using phonemes as input symbols and words as output symbols. The language model can be expressed by using words as input symbols and output symbols, and using the language model scores as weights.

  The synthesizing optimization unit 502 uses a known method of synthesizing a plurality of WFSTs into one, WFST representing the acoustic model 504, WFST representing the word dictionary 505, and WFST representing the language model 506 as one WFST. To synthesize.

  The synthesis optimization unit 502 optimizes each WFST including the synthesized WFST so that the processing amount of the decoder 503 is reduced and the decoder 503 can easily process the WFST. One of the processes for performing the optimization includes the sequential determinizing process according to the present embodiment. That is, the synthesis optimizing unit 502 includes the automaton determinizing apparatus 300 that executes the sequential determinizing process of the present embodiment described above.

  The decoder 503 uses the WFST synthesized and optimized by the synthesis optimization unit 502 to convert the feature value of the voice signal extracted by the feature value extraction unit 501 into a character string, and outputs this as a recognition result. . For example, Viterbi search can be used for conversion to a character string.

  FIG. 33 shows a change in storage area required when performing the above-described sequential determinizing process on the WFST obtained by synthesizing the WFST representing the word dictionary 505 and the WFST representing the language model 506 by the synthesis optimization unit 502. FIG. Here, the graph shown with the continuous line has shown the result of having determinized by the determinizing method (sequential determinizing process) of this embodiment. For comparison, the result of determinization by the conventional determinizing method is indicated by a broken line.

The horizontal axis represents the number of times the processing from step S95 to step S109 in FIG. 23 is repeated, and the order is “× 1000”. In other words, it shows how many states have been processed with respect to the state after determinization placed in the queue S. The vertical axis represents the total number of triples that are included in the determination of pre-state, which is included in Q ₂ (state name, the remainder of the string, the weight of the remainder), the order is a "× 1000000" It has become. The number of states before determinizing is 18688 and the number of transitions is 230930. The number of input symbols is 60.

  In FIG. 33, the result of determinizing by the conventional determinizing method is indicated by a dotted line. As is clear from the figure, in the conventional determinizing method, as the number of processed states increases, the total number of triples included in the determinized state increases abruptly, as indicated by C11. Processing is complete.

  On the other hand, the result of determinizing by the determinizing method (sequential determinizing process) of this embodiment is shown by a solid line. In this example, the process is repeated 6 times, and the number of input symbols of transition determined by one partial determinization is increased by 10 for each repetition. The total number of triples included in the determinized state does not increase monotonously and becomes zero each time the partial determinizing process in step S122 in FIG. 27 is completed. This is because a name replacement process is performed after determinization.

  In FIG. 33, C21 indicates that the first partial determinization has been completed in the series of processes, and C22 indicates that the second partial determinization has been completed. Thereafter, similarly, C23 to 25 indicate the points at which the third to fifth partial determinization is completed, and C26 indicates the point at which the sixth determinization is completed (the point at which the sequential determinization process is completed). Yes.

  As is apparent from FIG. 33, the determinizing method (sequential determinizing process) according to the present embodiment stores the determinized state although the number of repetitions is increased as compared with the conventional determinizing method. It is possible to reduce the storage area.

  As described above, according to the present embodiment, a part of transitions to be determinized is selected from the transitions included in the non-deterministic WFST, and repeated determinization is performed while changing the transition to be determinized each time. Thus, since the number of triples constituting the determinized state stored in one determinization can be reduced, the amount of memory required for executing determinization can be reduced.

  In the present embodiment, the determinization of non-deterministic WFST has been described. However, the present invention is not limited to this, and the determinization method of the present embodiment can be applied to an automaton that extends FSA such as WFSA and FST. It is.

[Fourth Embodiment]
In the above-described third embodiment, the aspect in which the input symbol is replaced every time the partial determinizing process is performed has been described. In the present embodiment, an automaton determinator 400 capable of realizing determinization of nondeterministic WFST without reducing input symbols and reducing the amount of memory required for the determinism will be described. In addition, about the structure similar to 3rd Embodiment mentioned above, the same code | symbol is provided and the description is abbreviate | omitted.

  FIG. 34 is a diagram showing a functional configuration of the automaton determinator 400 realized by cooperation of the CPU 1 shown in FIG. 1 and a predetermined program stored in the ROM 4 or the storage unit 6 in advance. As shown in the figure, the automaton determinizing apparatus 400 includes a subset generation unit 12, a partial determinization unit 41, and an iterative processing unit 33.

Here, the partial determinator 41 determines from the transitions having the same input symbol among the transitions in which the state of the non-deterministic WFST included in the determinized state is the transition source during the determinizing process described above. A transition to be selected is selected by a predetermined transition selection method, and a determinized state is generated from the selected transition. Here, the predetermined transition selection method is not particularly limited, but in the present embodiment, the predetermined transition selection method is performed based on the subset Σ _i described in the first embodiment.

Hereinafter, with reference to FIGS. 35 to 37, the sequential determinizing process of the present embodiment executed by the partial determinizing unit 41 and the iterative processing unit 33 will be described. As a premise of this process, it is assumed that the subset Σ _i is generated in advance by the subset generation unit 12.

  FIG. 35 is a flowchart showing the procedure of the sequential determinizing process in this embodiment. First, the repetition processing unit 33 sets a variable i for counting the number of repetitions to 1 (step S141), and executes a partial determinizing process (step S142) according to the value of i to the partial determinizing unit 41. Let Hereinafter, with reference to FIG. 36, the partial determinizing process in step S142 will be described.

FIG. 36 is a flowchart showing the procedure of the partial determinizing process in step S142. First, the partial determinator 41 sets F ₂ as an empty set (step S151), and then substitutes the smallest value among the initial weights of all initial states for λ ₂ (step S152).

Next, the partial determinizing unit 41 generates a set having the triplet of the state name (q), the character string, and the weight of T ₁ as elements, and substitutes it into i ₂ as the initial state name of T ₂ (step S153). ). Of these triplets, the character string is referred to as “remainder character string”, and ε, which is an empty character string, is set in step S153. On the other hand, the weight of the triplet is referred to as “remainder weight”, and λ ₁ (q) −λ ₂ is substituted in this step.

Subsequently, after adding i ₂ to the queue S (step S154), the partial determinator 41 determines whether S is an empty set (step S155). Here, if it is determined that S is not empty (step S155; Yes), area determining section 41 takes out one included in the S element, substitutes the extracted elements to q ₂ (step S156 ).

Next, the partial determinator 41 accepts a state where q is T ₁ out of a set (q, l, w) of triples of the state name, the remainder character string, and the remainder weight included in q _2. It is determined whether or not it is included in the set F ₁ (step S157). Here, when it is determined that q is not included in the acceptance state set F ₁ of T ₁ (step S157; No), the process immediately proceeds to step S160.

Further, in step S157, q is when it is determined to be included in the set F ₁ of accepting states of T ₁ (step S157; Yes), area determining section 41, an accepting state of the q ₂ T ₂ Is added to the set F ₂ (step S158).

Next, the partial determinator 41 calculates w + ρ ₁ (q) for all q included in the set F _{1 of} accepted states among q of the triplet (q, l, w) belonging to q _2. , and it substitutes the minimum value ρ ₂ (q ₂₎ as the end weight q ₂ (step S159).

  Subsequently, the partial determinator 41 determines whether or not the processing of steps S161 to S172 described later has been executed for all elements (input symbols) included in the set Σ (step S160). Here, when it is determined that the process has been executed for all elements (input symbols) included in Σ (step S160; Yes), the process returns to the process of step S155 again.

  On the other hand, if it is determined in step S160 that there is an unprocessed element (step S160; No), the partial determinator 41 substitutes one of the input symbols that have not yet been processed for x ( Step S161).

Next, the partial determinator 41 takes the transition symbol q and the input symbol x among the transitions δ belonging to E ₁ in the set of triples (q, l, w) belonging to q _2. After the transition set is substituted for E _d (step S162), it is determined whether this E _d is an empty set (step S163). If it is determined that E _d is an empty set (step S163; No), the process returns to step S160 again.

On the other hand, if it is determined in step S163 that E _d is not an empty set (step S163; Yes), the partial determinator 41 executes a transition selection process (step S164) for selecting a transition from E _d . Hereinafter, the transition selection processing in step S164 will be described with reference to FIG.

FIG. 37 is a flowchart showing the procedure of the transition selection process in step S164. First, the partial determinator 41 determines whether or not the input symbol x substituted in step S161 is included in the subset Σ _i (step S1641). Note that _i of Σ _i corresponds to the value of i set in step S141 or step S145 described later.

Here, when the input symbol x is determined to be included in the subset sigma _i (step S1641; Yes), by substituting E _d to the set E _t transitions (step S1642), step S165 of FIG. 36 Move on to processing.

On the other hand, in step S1641, if the input symbol x is judged it not included in the subset sigma _i (step S1641; No), take out one any transition from E _d, and assigned to the set E _t of the transition After (step S1643), the process proceeds to step S165 in FIG.

Returning to FIG. 36, the partial determinator 41 removes the transition belonging to the set of transitions E _t selected in step S164 from E _d (step S165).

Subsequently, the partial determinator 41 calculates the weight of the transition whose transition source is q ₂ and the input symbol is x, and substitutes this calculation result for w ₂ (step S166). The value of w ₂ substituted here is the smallest value among the following values for all triples (q, l, w) belonging to Γ ′ (q ₂ , x). And its value among the transition belonging to E _t, a value obtained by adding w to the smallest value among the weights of the transition δ such that the transition source is q and the input symbol is x. Note that Γ ′ (q ₂ , x) = {(q, l, w) ∈q ₂ | δ∈E _t, prev (δ) = q, input (δ) = x}.

Next, the partial determinator 41 calculates the output symbol of the transition whose transition source is q ₂ and the input symbol is x, and substitutes this calculation result for l ₂ (step S167). The value of l ₂ assigned here is the one with the longest forward match among the next character strings for all triples (q, l, w) belonging to Γ ′ (q ₂ , x). . Those thereof of transition belonging to E _t is a string, the transition source is connecting the string l in front of the string taken forward longest match of output symbols of the transition δ as q and the input symbol is x It is. For example, if there is only one triple (q, l, w) belonging to Γ ′ (q ₂ , x) and two δ satisfying the condition, the output symbol output (δ) is AB and AC. If the character string l is P, the character string assigned to l ₂ is PA.

Next, the partial determinator 41 generates a transition destination state q ′ ₂ that transitions from q ₂ by the input symbol x (step S168). Here, in order to generate q ′ ₂ , it is necessary to generate a set of triples composed of the state name of T ₁ , the surplus character string, and the surplus weight. Of these, the state belongs to ν ′ (q ₂ , x), and its element is q ′. Ν ′ (q ₂ , x) = {q ′ | (q, l, w) ∈q ₂ , δ∈E _t , prev (δ) = q, input (δ) = x, next (δ) = q ′}. That is, three pairs belonging to _{q 2 (q, l, w} ) with respect to, among transition δ belonging to E _t, transition source state is q, the input symbol is the transition destination of the transition such that x state If q ′ is q ′, a set of q ′ satisfying this condition is a value returned by ν ′ (q ₂ , x).

The remaining character string that is the second value of the triplet is the following character string for q ′. The character string is the front of the character string obtained by adding the output character string of δ after l to each of the four sets (q, l, w, δ) belonging to the set γ ′ (q ₂ , x). A character string obtained by removing the character string of l ₂ from is calculated, and the longest forward match of those character strings is obtained. Here, γ ′ (q ₂ , x) = {(q, l, w, δ) ∈q ₂ × E _t | prev (δ) = q, input (δ) = x}. That is, three contained in q ₂ pairs (q, l, w) among the four pairs of input symbols and the transition source is x is included transitions belonging to E _t such that q (q , l, w, δ) is a value returned by γ ′ (q ₂ , x).

The remaining weight, which is the third value of the triplet, is as follows for q ′. The value of the weight is the value obtained by adding the weight of δ to w and subtracting w ₂ for each of the four sets (q, l, w, δ) belonging to the set γ ′ (q ₂ , x). , The smallest value. A set of triples generated by the above calculation is q ′ ₂ .

In subsequent step S169, partial determinator 41 adds a transition from q ₂ to q ′ ₂ to E ₂ (step S169). The input symbol of the transition added here is x, the output symbol is l ₂ , and the weight is w ₂ .

Then, area determining section 41, when the generated q _'2 it is determined whether or not included in the Q _2, is determined to be included in Step S168 (Step S170; No), step S163 Return to the process.

Further, at step S170, _{'if 2} is determined not to be included in Q ₂ (step S170; Yes), area determining unit 41, q' q ₂ Add to Q ₂ (step S171) After adding q ′ ₂ to S (step S172), the process returns to step S163 again.

On the other hand, in step S155, when it is determined that an empty set S (step S155; No), area determining unit 41, a state belonging to the set Q ₂ of states of T ₂ determined the T ₁ The name is changed (step S173), and the process proceeds to step S143 in FIG.

Returning to FIG. 35, the iterative processing unit 33 determines whether or not the value of i is less than n, which is the maximum value of the number of repetitions (step S143). Here, if the value of i is determined to be below the n (Step S143; Yes), repetitive processing unit 33, a WFST T ₂ determined reduction in step S142 as WFST T ₁ (step S144), i Is incremented by 1 (step S145), the process returns to step S142 again.

If it is determined in step S143 that the value of i is n or more (step S143; No), this process is terminated. Here, the finally obtained WFST T ₂ is obtained by determinizing the non-deterministic WFST T ₁ to be processed.

  As described above, according to the present embodiment, a part of transitions to be determinized is selected from the transitions included in the non-deterministic WFST, and repeated determinization is performed while changing the transition to be determinized each time. Thus, since the number of triples constituting the determinized state stored in one determinization can be reduced, the amount of memory required for executing determinization can be reduced.

  Further, according to the present embodiment, since the transition to be determinized can be directly specified, the transition to be determinized can be selected by a method other than the selection of the transition by the input symbol.

  In the present embodiment, the determinization of non-deterministic WFST has been described. However, the present invention is not limited to this, and the determinization method of the present embodiment can be applied to an automaton that extends FSA such as WFSA and FST. It is.

  Although the embodiments of the invention have been described above, the present invention is not limited to these embodiments, and various modifications, substitutions, additions, and the like can be made without departing from the spirit of the present invention.

It is the figure which showed the hardware constitutions of the automaton determinizing device. It is the figure which showed an example of the functional structure of an automaton determinizing device. It is the figure which showed an example of the finite automaton. It is the figure which showed an example of the transition table of a finite automaton. It is the flowchart which showed an example of the procedure of determinizing processing. It is the figure which showed an example of the finite automaton. It is the figure which showed an example of the transition table of a finite automaton. It is the figure which showed an example of the finite automaton. It is the flowchart which showed an example of the procedure of a subset generation process. It is the flowchart which showed an example of the procedure of a sequential determinization process. It is the flowchart which showed an example of the procedure of the partial determinization process. It is a figure for demonstrating the operation | movement of a sequential determination process. It is a figure for demonstrating the operation | movement of a sequential determination process. It is a figure for demonstrating the operation | movement of a sequential determination process. It is a figure for demonstrating the operation | movement of a sequential determination process. It is a figure for demonstrating the operation | movement of a sequential determination process. It is a figure for demonstrating the operation | movement of a sequential determination process. It is the figure which showed an example of the functional structure of an automaton determinizing device. It is the flowchart which showed an example of the procedure of a sequential determinization process. It is the flowchart which showed an example of the procedure of the partial determinization process. It is the flowchart which showed an example of the procedure of a transition selection process. It is the figure which showed an example of the functional structure of an automaton determinizing device. It is the flowchart which showed an example of the procedure of determinizing processing. It is a figure showing an example of a weighted finite state transducer. It is a figure showing an example of a weighted finite state transducer. It is a figure showing an example of a weighted finite state transducer. It is the flowchart which showed an example of the procedure of a sequential determinization process. It is the flowchart which showed an example of the procedure of the partial determinization process. It is a figure for demonstrating the operation | movement of a sequential determination process. It is a figure for demonstrating the operation | movement of a sequential determination process. It is a figure for demonstrating the operation | movement of a sequential determination process. It is the figure which showed the structure of the speech recognition apparatus typically. It is the figure which showed the change of the storage area required at the time of sequential determinization processing. It is the figure which showed an example of the functional structure of an automaton determinizing device. It is the flowchart which showed an example of the procedure of a sequential determinization process. It is the flowchart which showed an example of the procedure of the partial determinization process. It is the flowchart which showed an example of the procedure of a transition selection process.

Explanation of symbols

100 automaton determinator 200 automaton determinator 300 automaton determinator 400 automaton determinator 1 CPU
2 Operation section 3 Display section 4 ROM
5 RAM
6 Storage Unit 7 Bus 11 Determinization Processing Unit 12 Subset Generation Unit 13 Partial Determinization Unit 14 Repetition Processing Unit 21 Partial Determinization Unit 31 Determinization Processing Unit 32 Partial Determinization Unit 33 Repetition Processing Unit 41 Partial Determinization Unit 500 Audio Recognizer 501 feature extraction unit 502 synthesis optimization unit 503 decoder 504 acoustic model 505 word dictionary 506 language model

Claims (10)

A finite state automaton or an automaton that is an extension of the finite state automaton, an automaton determinizing method that is executed by an automaton determinator for determinizing a nondeterministic automaton,
The automaton determinator comprises a storage means,
A partial determinizing step for performing determinization on a part of transitions selected as determinizing targets among the transitions included in the non-deterministic automaton by partial determinizing means;
A name change by which the name of the determinized state consisting of any combination of states included in the non-deterministic automaton stored in the storage unit by the determinizing unit is renamed to a single different name by the name changing unit Process,
A repeating step of repeatedly executing the partial determinizing step until determinizing is performed for all transitions included in the non-deterministic automaton by a repeating unit;
Including
In the partial determinizing step, the transition or the combination of transitions selected as the determinizing target is made different for each repetition in the repeating step. A subset generation step of sequentially generating a subset obtained by extracting some of the input symbols among the input symbols related to the transition included in the non-deterministic automaton according to the number of repetitions;
The automaton determinizing method according to claim 1, wherein the partial determinizing step sets a transition related to the input symbol as a determinizing target based on an input symbol included in the subset. The partial determinizing step includes
Of the transitions included in the non-deterministic automaton, a replacement step of replacing input symbols related to transitions other than the determinizing target with different symbols,
Determinizing the non-deterministic automaton after the replacing step, and generating a deterministic automaton;
Among the transitions included in the deterministic automaton, a restoration step of returning the input symbol replaced in the replacement step to the original symbol;
Including
3. The repetition step causes the partial determinization step to process the deterministic automaton as a non-deterministic automaton until determinization is performed for all transitions included in the non-deterministic automaton. The determinating method of the automaton described in 1. The partial determinizing step includes
An input symbol selection step of sequentially selecting one input symbol as a processing target from input symbols related to transitions included in the non-deterministic automaton;
Transition set extraction means for generating a transition set obtained by extracting transitions related to the input symbol to be processed among the transitions included in the non-deterministic automaton;
Selecting means for selecting a transition to be determinized from transitions included in the transition set;
The automaton determinizing method according to claim 1, wherein the automaton is deterministic.   The automaton determinizing method according to claim 2, wherein the subset generation step selects an input symbol to be extracted according to a type of an input symbol related to a transition included in the non-deterministic automaton.   3. The subset generation step selects an input symbol to be extracted according to the number of transitions related to each input symbol among the input symbols related to the transition included in the non-deterministic automaton. Or, the automaton determinizing method according to 5.   The subset generation step includes, for each input symbol related to the transition included in the non-deterministic automaton, a sum of the number of transitions related to the input symbol and the number of states included in the non-deterministic automaton. A value obtained by dividing the number of transition source states of the transition relating to the symbol by the sum of the number of states included in the non-deterministic automaton is calculated, and an input symbol to be extracted is selected according to the calculated value. The determinizing method for an automaton according to claim 6. A weighted finite state transducer determinating method executed by an automaton determinator for determinizing a nondeterministic finite state transducer with respect to a weighted finite state transducer used in a speech recognition device,
The automaton determinator comprises a storage means,
A partial determinizing step for determinizing a part of transitions selected as determinizing targets among the transitions included in the non-deterministic finite state transducer by a partial determinizing unit;
By the name changing means, the names of the determinized states made up of any state included in the non-deterministic finite state transducer stored in the storage means by the determinization or a combination of a set including the states are different from each other. A name change process to be replaced with one name;
A repeating step of repeatedly performing the partial determinizing step until determinizing is performed for all transitions included in the non-deterministic finite state transducer by a repeating means;
Including
In the partial determinizing step, the transition or combination of transitions selected as the determinizing target is made different for each repetition in the repeating step. An automaton determinator for determining a nondeterministic automaton with respect to a finite state automaton or an automaton obtained by extending the finite state automaton,
Of the transitions included in the non-deterministic automaton, a partial determinizing unit that performs determinization on a part of transitions selected as determinization targets;
Storage means for storing a determinized state formed by a combination of any state included in the non-deterministic automaton generated by the determinization;
Name changing means for changing the name of the finalized state to a different single name;
Repeating means for repeatedly executing the partial determinizing step until determinization is performed for all transitions included in the non-deterministic automaton;
With
The automaton determinizing apparatus characterized in that the partial determinizing unit changes a transition or a set of transitions to be selected as the determinizing target for each repetition in the repetition step. Regarding a finite state automaton or an automaton that is an extension of the finite state automaton, a non-deterministic automaton is determined, and a computer having storage means that functions as a work area at the time of the determination
Of the transitions included in the non-deterministic automaton, a partial determinizing function that performs determinization on some transitions selected as determinizing targets;
A name changing step of replacing the name of the determinized state consisting of any combination of states included in the non-deterministic automaton stored in the storage means by the determinizing method with a different single name;
A repeat function that repeats the partial determinization step until determinization is performed for all transitions included in the non-deterministic automaton;
Realized,
The automaton determinizing program characterized in that the partial determinizing function changes a transition or a set of transitions selected as the determinizing object for each repetition by the repetitive function.

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