JP4893538B2 - Information processing apparatus and program - Google Patents

Description

  The present invention relates to an information processing apparatus and a program.

Various techniques for power saving of an image forming apparatus have been proposed. An example of a configuration for realizing power saving will be described using an example of an image forming apparatus including modules such as a scanner and a printer.
When the period during which an instruction to execute copying or the like is not continuously input to the image forming apparatus reaches a predetermined value, the control unit executes switching from the normal mode to the power saving mode. FIG. 5A is a diagram showing a change in the voltage of the power supplied to each module. Before shifting to the power saving mode, the voltage of the power supplied to each module is maintained at a predetermined value (for example, 100 V) (first operation mode). When the control unit decides to shift to the power saving mode, the power supply circuit is instructed to stop power supply to the module ((1) in the figure) (transition to the second operation mode), and then supplied to the control unit The power supply circuit is instructed to reduce the voltage of the electric power to the necessary minimum ((2) in the figure) (transition to the third operation mode). After that, when a new instruction is input to the image forming apparatus after the voltage of the module has decreased to a predetermined value (for example, 0.1 V) or less, the control unit determines to cancel the power saving mode ((3 in the figure)). )) (Release of the third operation mode), the voltage of the power supplied to the control unit itself is restored, and the power supply to the module is resumed (release of the second operation mode). When the voltage of the power supplied to the module returns to 100V ((4) in the figure), the module is restarted and starts the operation according to the input instruction.

The reason why the power saving mode has two modes (second operation mode and third operation mode) is as follows.
By providing the second operation mode, i.e., the mode in which the power supply to the control unit is the same as the normal mode, it is possible to shorten the return time from the power saving mode, and further, the third operation mode, i.e., the control unit This is because by providing a mode for reducing the power supply, it is possible to reduce the power consumption compared to the second operation mode and to achieve a further power saving effect.

  By the way, in the above configuration, the condition for restarting the module is that the voltage of the supplied power is less than or equal to a predetermined value. However, the voltage of the power supplied to the module decreases instantaneously. Instead, as shown in the figure, it takes a certain amount of time to decrease to a predetermined value. Accordingly, when a new instruction is input to the image forming apparatus immediately after the control unit stops supplying power to the module as shown in FIG. 5B ((3) in the figure), the voltage of the module is a predetermined value. The power supply is resumed before it decreases ((3) to (4) in the figure), and the module may not be restarted. In this case, if the control unit starts control on the assumption that the module has been restarted by canceling the power saving mode, the image forming apparatus may not be able to operate normally.

  In order to avoid such a situation, for example, a configuration is known in which a module is forcibly restarted by a control unit supplying a signal indicating a restart instruction (restart signal) to the module. However, this configuration requires a circuit for the controller to supply a restart signal to the module and a circuit for each module to receive the restart signal, which complicates the configuration.

As an example of a technology related to device initialization when canceling the power saving mode, for example, a power-on reset circuit proposed in Patent Document 1 includes a power saving mode falling delay circuit that delays the end timing of the power saving mode instruction, An OR logic reset output suppression circuit that does not output even when an edge signal is generated by the edge signal generation circuit while a delayed power saving mode instruction is input from the power saving mode falling delay circuit Thus, when the flash ROM returns from the power saving mode, an unnecessary power-on reset signal is not generated.
JP 2003-304146 A

  An object of the present invention is to provide a technique capable of operating an information processing apparatus normally even when the power saving mode is canceled immediately after shifting to the power saving mode.

The invention according to claim 1 is an instruction receiving unit that receives a user instruction, a communication unit that receives data from the outside, a module provided for each function, a control unit that controls the module, a power supply circuit, A restart circuit for restarting the module when the power supplied from the power supply circuit to the module reaches a second value higher than the first value through a state where the power is less than or equal to the first value; The control unit has a period during which an instruction is not continuously input to the instruction receiving unit within an operation mode period in which the power supply circuit supplies power for operating the module to the module. Reaches a predetermined value, and when the period during which data reception by the communication unit is not continuously performed reaches a predetermined value, the first power supply circuit is instructed to reduce the power supply to the module. Electric power And an elapsed time from when the first power reduction means instructs the power supply to decrease, the power supplied from the power supply circuit to the module is from the second value to the first value. A second power reduction means for instructing the power supply circuit to reduce the power supply to the control unit when a maximum required time which is the maximum value of the time required for the reduction is reached; The power supply to the control unit is performed when either of the input of the instruction to the instruction receiving unit and the reception of data by the communication unit is performed after the power reduction unit instructs the reduction of the power supply. A first power return means for instructing the power supply circuit to return to the power before the reduction by the second power reduction means; and power return to the module following the return of power by the first power return means. Supply the first power drop hand A second power return means for instructing the power supply circuit to return to the power before the power reduction by the power supply, and after the power return by the second power return means, the setting contents relating to the module are initialized and the module There is provided an information processing apparatus comprising restarting means for restarting the control .

The invention according to claim 2 is an instruction receiving unit that receives a user instruction, a communication unit that receives data from the outside, a module provided for each function, a control unit that controls the module, a power supply circuit, A restart circuit for restarting the module when the power supplied from the power supply circuit to the module reaches a second value higher than the first value through a state where the power is less than or equal to the first value; A period during which an instruction is not continuously input to the instruction receiving unit within a period of an operation mode in which the power supply circuit supplies power for operating the module to the module. And when the period during which data reception by the communication unit is not continuously performed reaches a predetermined value, a first power supply that instructs the power supply circuit to decrease the power supply to the module. And a time elapsed since the first power reduction means instructed to reduce the power supply, the power supplied from the power supply circuit to the module is from the second value to the first value. A second power reduction means for instructing the power supply circuit to reduce the power supply to the control unit when a maximum required time which is the maximum value of the time required for the reduction is reached; The power supply to the control unit is performed when either of the input of the instruction to the instruction receiving unit and the reception of data by the communication unit is performed after the power reduction unit instructs the reduction of the power supply. A first power return means for instructing the power supply circuit to return to the power before the reduction by the second power reduction means; and power return to the module following the return of power by the first power return means. Supply the first power drop A second power return means for instructing the power supply circuit to return to the power before the reduction due to the stage; and after the power return by the second power return means, the setting contents relating to the module are initialized and the Provided is a program for causing a module to function as restarting means for restarting control of a module .

According to the first and second aspects of the invention, the information processing apparatus can be operated normally even when the power saving mode is canceled immediately after shifting to the power saving mode .

Embodiments of the present invention will be described below with reference to the drawings. In this embodiment, the present invention is applied to an image forming apparatus having a function of a copying machine.
First, a hardware configuration of the image forming apparatus 1 will be schematically described. FIG. 1 is a diagram illustrating a hardware configuration of the image forming apparatus 1.

  The control unit 4 includes a CPU (Central Processing Unit) 44, a ROM (Read Only Memory) 45, and a RAM (Random Access Memory) 46. The storage unit 5 is, for example, a hard disk device, and stores a program such as an OS (Operating System). The ROM 45 stores an IPL (Initial Program Loader), and when the image forming apparatus 1 is turned on, the CPU 44 executes the IPL, whereby the OS is read from the storage unit 5. Then, each part of the image forming apparatus 1 is controlled by the CPU 44 executing the OS. The RAM 46 is used as a work area when the CPU 44 executes various programs.

  The oscillation circuit 49 oscillates the system clock signal SYSCLK and supplies it to each part of the image forming apparatus 1. The system clock signal SYSCLK is a signal that determines the operating frequency of data transmission between the components of the image forming apparatus 1. The oscillation circuit oscillates an internal clock signal CLK having an operating frequency that is an integer multiple or a half integer multiple (an integral multiple of one-half) of the system clock signal SYSCLK, and supplies the internal clock signal CLK to the CPU 44.

  The instruction receiving unit 41 includes a display unit 39 having a liquid crystal display screen and a key input unit 40 including a start key, a stop key, a reset key, and a numeric keypad. The user instructs the image forming apparatus 1 via the instruction receiving unit 41. Can be entered. The instruction received by the instruction receiving unit 41 is sent to the CPU 44, and the CPU 44 controls the image forming apparatus 1 according to the sent instruction.

  A communication I / F (Interface) 48 is connected to a communication network (not shown) such as a LAN (Local Area Network) and the image forming apparatus according to a communication protocol such as TCP / IP (Transmission Control Protocol / Internet Protocol). Mediates communication between 1 and other devices.

  The image input unit 12 optically reads a document and outputs an image signal representing an image of the document. Specifically, the light source 13 irradiates light on the document placed on the platen glass 2, and the reflected light is received by the light receiving unit 17 through the optical system 3. The light receiving unit 17 converts the reflected light into an image signal and outputs the image signal to the image processing unit 18.

  The image processing unit 18 performs image processing on the image signal output from the image input unit 12. Specifically, the image processing unit 18 converts the image signal into image data representing an image of Y (Yellow) color, M (Magenta) color, C (Cyan) color, and K (Black) color, For example, color conversion, enlargement / reduction, background removal, binarization, and the like are performed. Then, the image processing unit 18 outputs the image data subjected to these processes to the image output unit 6.

  The image output unit 6 includes image forming engines 7Y, 7M, 7C, and 7K, a transfer belt 8, and the like. The image forming engine 7Y includes a charging device 21Y, an exposure device 19Y, a developing device 22Y, a transfer device 25Y, and the like around the photosensitive drum 20Y. The same applies to the image forming engines 7M, 7C, and 7K. The image forming engines 7Y, 7M, 7C, and 7K respectively transfer Y, M, C, and K toner images on the transfer belt 8 by electrophotography based on the image data output from the image processing unit 18. Overlaid on the surface. The toner image on the transfer belt 8 is transferred to the recording medium 10 sent out from the medium supply unit 9, and the recording medium 10 to which the toner image is transferred is discharged to the medium discharge unit 32.

  In the following description, the image input unit 12, the image processing unit 18, the image output unit 6, and the storage unit 5 are referred to as a module 80. That is, each module 80 is a component divided for each function. FIG. 2 is a diagram illustrating the connection between the control unit 4 and each module 80. Each module 80 is connected to the control unit 4 via a standardized interface (not shown), and operates according to an instruction given from the control unit 4.

Now, the image forming apparatus 1 is configured to operate in one of two operation modes. Here, two operation modes will be described.
The first operation mode is an operation mode in which power for operating each unit of the image forming apparatus 1 is continuously supplied to each unit. When the image forming apparatus 1 is turned on, the image forming apparatus 1 starts operating in the first operation mode. In the first operation mode, the image forming apparatus is in a state where all the provided functions can be realized.

  On the other hand, the second operation mode is a so-called power saving mode, which is a mode in which power consumption by the image forming apparatus 1 is suppressed more than in the first operation mode. Within the period of the second operation mode, the CPU 44 stops the power supply to each module 80 and reduces the voltage of the power supplied to the control unit 4 to the minimum necessary voltage.

The operation mode is switched as follows.
During the period of the first operation mode, the CPU 44 monitors the state of each part of the image forming apparatus 1 and switches the operation mode to the second operation mode when the state of each part satisfies a predetermined condition. For example, within the period of the first operation mode, (A) the period during which the instruction is not continuously input to the instruction receiving unit 41 has reached a predetermined value, (B) the data of the communication I / F 48 is When both of the fact that the period during which reception is not continuously performed reaches a predetermined value are satisfied, the CPU 44 switches from the first operation mode to the second operation mode. In addition, said conditions are an example and you may use other conditions.

  On the other hand, during the period of the second operation mode, the CPU 44 monitors the state of each part of the image forming apparatus 1 and switches the operation mode to the first operation mode when the state of each part satisfies a predetermined condition. For example, when either (C) an instruction input to the instruction receiving unit 41 or (D) reception of data by the communication I / F 48 is performed within the period of the second operation mode, the CPU 44 Switching from the second operation mode to the first operation mode is performed. In addition, said conditions are an example and you may use other conditions.

  FIG. 3 is a diagram illustrating a mechanism for supplying power to each module 80. The image forming apparatus 1 is provided with a power supply circuit 90 (not shown in FIG. 1). The power supply circuit 90 transforms the voltage of power supplied from a power line (not shown) to a voltage predetermined for each module 80 and supplies the voltage to each module 80 in accordance with an instruction given from the CPU 44.

  Each module 80 is provided with a CPU 81 and a restart circuit 82. The CPU 81 controls the operation of the module. The restart circuit 82 determines whether to restart the module according to the voltage of the power supplied from the power supply circuit 90. Specifically, when the power supply (for example, 100 V) is resumed after the voltage of the supplied power is below a predetermined value (for example, 0.1 volt), the restart circuit 82 restarts the module 80. A signal (reactivation signal) indicating that activation is performed is sent to the CPU 81. The CPU 81 that has received the restart signal initializes the hardware settings of the module 80 and starts the operation of the module 80.

  As described above, it takes a certain amount of time for the voltage of the power supplied to the module 80 to decrease from 100 V before the transition to the power saving mode to the predetermined value 0.1 V. In the following description, this time will be referred to as “reduction required time”. The time required for the decrease is a value determined depending on the configuration of the module 80, and even if the configuration is the same, machine difference variation may occur. The ROM 45 stores in advance the maximum value (hereinafter referred to as “maximum required time”) of the required time for each module 80. When the CPU 44 determines to shift to the power saving mode, the CPU 44 reads the maximum required time from the ROM 45 and performs processing for shifting to the power saving mode based on the read value.

  Next, operations for shifting to and canceling the power saving mode will be described. FIG. 4 illustrates processing executed by the image forming apparatus 1 when a condition for shifting from the normal mode to the power saving mode, that is, a condition for switching from the first operation mode to the second operation mode is satisfied. It is a figure showing a flow. As described above, within the period of the first operation mode, (A) the period during which the instruction is not continuously input to the instruction receiving unit 41 has reached a predetermined value, (B) by the communication I / F 48 In a case where both of the time periods during which data reception is not continuously performed reach a predetermined value are satisfied, the CPU 44 switches from the first operation mode to the second operation mode. FIG. 6 is a diagram illustrating a change in the voltage of the power supplied to each module 80 that occurs in association with this processing.

  First, in step A01, the CPU 44 instructs the power supply circuit 90 to stop power supply to each module 80 ((1) in FIG. 6). Then, the power supply circuit 90 stops power supply to each module 80 (second operation mode). Further, the CPU 44 starts counting the number of clocks S of the internal clock CLK from the time when the power supply circuit 90 is instructed to stop power supply to each module 80. Further, the CPU 44 reads the maximum required time from the ROM 45, converts the read maximum required time into the number of clocks of the internal clock CLK, and holds the obtained converted value as the threshold value T.

  In step A02, the CPU 44 determines whether or not to cancel the power saving mode. Specifically, the CPU 44 determines whether or not a condition for canceling the power saving mode, that is, a condition for switching from the second operation mode to the first operation mode is satisfied. As described above, when either (C) input of an instruction to the instruction receiving unit 41 or (D) reception of data by the communication I / F 48 is performed within the period of the second operation mode, the CPU 44. Switches from the second operation mode to the first operation mode. If this condition is not satisfied (step A02: NO), the process proceeds to step A03. If this condition is satisfied (step A02: YES), the process proceeds to step A08.

  In step A03, the CPU 44 determines whether or not the clock number S started counting in step A01 has reached the threshold value T. If the clock number S has reached the threshold T (step A03: YES), the process proceeds to step A05. If the number of clocks S has not reached the threshold T (step A03: NO), the process proceeds to step A04.

  In step A04, the CPU 44 determines whether or not to cancel the power saving mode. Specifically, as in step A02, it is determined whether or not a condition for canceling the power saving mode is satisfied. If the power saving mode is not cancelled (step A04: NO), the process returns to step A03. When canceling the power saving mode (step A04: YES), the process proceeds to step A08.

In step A05, the CPU 44 instructs the power supply circuit 90 to reduce the voltage of the power supplied to the control unit 4 to the minimum voltage ((2) in FIG. 6) (third operation mode). Then, the power supply circuit 90 supplies only the power of the voltage necessary for the RAM 46 to hold the stored contents, and stops the power supply to the CPU 44 and the ROM 45. Since the RAM 46 is supplied with electric power of a voltage necessary for the RAM 46 to hold the stored contents, the RAM 46 continues to hold the setting contents regarding each module 80.
Note that when the processing proceeds to step A05, the number of clocks S has reached the threshold value T, and the voltage of the power supplied to the module 80 has dropped to 0.1 V or less. Therefore, at this time, when the power supply to the module 80 is resumed, the condition for the restart circuit 82 to issue a restart signal is satisfied.

  In step A06, the power supply circuit 90 determines whether or not the condition for canceling the power saving mode is satisfied. If the condition is satisfied (step A06: YES), the process proceeds to step A07. Specifically, when an instruction is input to the instruction receiving unit 41 within the period of the second operation mode, the instruction receiving unit 41 transmits a release signal indicating cancellation of the power saving mode to the power supply circuit 90. . In addition, when data is received by the communication I / F 48 within the period of the second operation mode, the communication I / F 48 transmits a release signal indicating release of the power saving mode to the power supply circuit 90. The power supply circuit 90 monitors whether or not a release signal is received. If the release signal is received, the process proceeds to step A07.

  In step A07, the voltage of the power supplied from the power supply circuit 90 to the control unit 4 is restored to the value before shifting to the power saving mode. Specifically, the power supply to the CPU 44 and the ROM 45 is resumed, and the voltage of the power supplied to the RAM 46 is returned to the voltage before the transition to the power saving mode. Thereby, the control unit 4 starts the operation (release of the third operation mode).

  In step A08, the CPU 44 sends an instruction to the power supply circuit 90 to resume the power supply to each module 80 ((3) in FIG. 6) (cancel the second operation mode). Then, the power supply circuit 90 resumes the power supply to each module 80, and the voltage of the power supplied to each module 80 returns to 100V ((4) in FIG. 6) (first operation mode). When the power supply is resumed in this way, the restart circuit 82 of each module 80 sends a restart signal to the CPU 81. The CPU 81 that has received the restart signal initializes the hardware settings of the module 80 and starts the operation of the module 80. On the other hand, the CPU 44 recognizes that each module 80 has been restarted when the count number S reaches the threshold value T. Accordingly, the CPU 44 initializes the setting contents regarding each module 80 held in the RAM 46 and then resumes the control for each module 80.

The present invention is not limited to the form described above, and can be implemented in various forms. For example, the embodiment described above can be modified as follows.
<Modification 1>
In the above embodiment, an example in which the power supply to the CPU 44 is stopped in step A05 when the mode is shifted to the power saving mode has been described. However, the voltage of the power supplied to the CPU 44 may be decreased. In this case, for example, the instruction receiving unit 41 or the communication I / F 48 may transmit a cancel signal to the CPU 44 instead of the power supply circuit 90, and thereby the CPU 44 may determine to cancel the power saving mode.

<Modification 2>
In the above embodiment, an example is shown in which the count number S is compared with the threshold value T in step A03. However, the determination may be performed under other conditions. For example, when the voltage of power supplied to each module 80 is constantly measured, it is determined whether or not the voltage value has decreased to a predetermined value (0.1 V in the embodiment), and when this predetermined value is reached. You may make it progress to the process of step A05.

<Modification 3>
In the above embodiment, each module 80 is configured by hardware. However, each module 80 includes a memory storing a program for operating the module 80, and the CPU 81 executes the program. The module 80 may be operated.

<Modification 4>
In the above embodiment, the example in which the present invention is applied to the image forming apparatus including the image input unit 12, the image output unit 6, the image processing unit 18, and the storage unit 5 as the module 80 has been described. The present invention may be applied to any one or a plurality. Further, the number of modules 80 may be any number. Moreover, you may provide the component other than the above as the module 80. FIG. For example, the image forming unit may include an after-processing device that binds a plurality of recording media on which images are formed by the image output unit 6 as a module 80.
In the above embodiment, the example in which the present invention is applied to the image forming apparatus has been described. However, the present invention may be applied to apparatuses other than the image forming apparatus. For example, the present invention may be applied to an information processing apparatus provided with a plurality of read / write devices for storage media of different standards as the module 80.

<Modification 5>
In the above-described embodiment, the example in which the power supply to each module 80 is stopped in the second and third operation modes has been described. However, the power supply to each module 80 in the second and third operation modes is a predetermined value. You may make it reduce to.

<Modification 6>
In the above embodiment, an example is shown in which a program for operating the image forming apparatus 1 is stored in the storage unit 5 in advance. However, the program is written and distributed in a storage medium such as a magneto-optical disk, and the storage medium The pre-gram read from the above may be written in the storage unit 5. Alternatively, the program may be received via a communication network and written to the storage unit 5.

2 is a diagram illustrating a hardware configuration of the image forming apparatus 1. FIG. It is a figure showing the connection of the control part 4 and each module 80. FIG. 3 is a diagram illustrating a mechanism for supplying power to each module 80. FIG. 3 is a diagram illustrating a flow of processing executed by the image forming apparatus 1. FIG. It is a figure showing the change of the voltage of the electric power supplied to each module. 4 is a diagram illustrating a change in voltage of power supplied to each module 80. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Image forming apparatus, 4 ... Control part, 44 ... CPU, 45 ... ROM, 46 ... RAM, 5 ... Memory | storage part, 49 ... Oscillation circuit, 41 ... Instruction reception part, 39 ... Display part, 40 ... Key input part, 48 ... Communication I / F, 12 ... Image input unit, 2 ... Platen glass, 13 ... Light source, 3 ... Optical system, 17 ... Light receiving unit, 18 ... Image processing unit, 6 ... Image output unit, 7Y, 7M, 7C, 7K ... image forming engine, 8 ... transfer belt, 20Y ... photosensitive drum, 21Y ... charging device, 19Y ... exposure device, 22Y ... developing device, 25Y ... transfer device, 9 ... medium supply unit, 10 ... recording medium, 32 ... Medium ejecting unit, 80 ... module, 90 ... power supply circuit, 81 ... CPU, 82 ... restart circuit

Claims (2)

An instruction receiving unit for receiving user instructions;
A communication unit for receiving data from the outside;
Modules provided for each function;
A control unit for controlling the module;
A power circuit;
A restart circuit for restarting the module when the power supplied from the power supply circuit to the module reaches a second value higher than the first value through a state where the power is less than or equal to the first value;
Have
The controller is
Within a period of an operation mode in which the power supply circuit supplies power for operating the module to the module, a period in which an instruction is not continuously input to the instruction receiving unit reaches a predetermined value, and First power reduction means for instructing the power supply circuit to reduce power supply to the module when a period during which data is not continuously received by the communication unit reaches a predetermined value;
The elapsed time from when the first power reduction means instructs the power supply to decrease is that the power supplied from the power supply circuit to the module decreases from the second value to the first value. Second power lowering means for instructing the power supply circuit to lower the power supply to the control unit when the maximum required time which is the maximum value of the required time is reached;
After the second power lowering means gives an instruction to reduce the power supply, when either an instruction input to the instruction receiving unit or data reception by the communication unit is performed, First power return means for instructing the power supply circuit to return the power supply to the power before the reduction by the second power reduction means;
Subsequent to the return of power by the first power return means, a second power return that instructs the power supply circuit to return the power supply to the module to the power before the reduction by the first power reduction means. Means,
An information processing apparatus comprising: resuming means for initializing setting contents related to the module and resuming control of the module following power restoration by the second power restoration means . An instruction receiving unit for receiving user instructions;
A communication unit for receiving data from the outside;
Modules provided for each function;
A control unit for controlling the module;
A power circuit;
A restart circuit for restarting the module when the power supplied from the power supply circuit to the module reaches a second value higher than the first value through a state where the power is less than or equal to the first value;
A computer having
Within a period of an operation mode in which the power supply circuit supplies power for operating the module to the module, a period in which an instruction is not continuously input to the instruction receiving unit reaches a predetermined value, and First power reduction means for instructing the power supply circuit to reduce power supply to the module when a period during which data is not continuously received by the communication unit reaches a predetermined value;
The elapsed time from when the first power reduction means instructs the power supply to decrease is that the power supplied from the power supply circuit to the module decreases from the second value to the first value. Second power lowering means for instructing the power supply circuit to lower the power supply to the control unit when the maximum required time which is the maximum value of the required time is reached;
After the second power lowering means gives an instruction to reduce the power supply, when either an instruction input to the instruction receiving unit or data reception by the communication unit is performed, First power return means for instructing the power supply circuit to return the power supply to the power before the reduction by the second power reduction means;
Subsequent to the return of power by the first power return means, a second power return that instructs the power supply circuit to return the power supply to the module to the power before the reduction by the first power reduction means. Means,
A program for initializing setting contents related to the module and functioning as resuming means for resuming control of the module following power restoration by the second power restoring means .

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