JP4893463B2 - Exposure equipment - Google Patents

Description

The present invention relates EXPOSURE APPARATUS.

  Conventionally, a configuration shown in FIG. 10 is known as an electrostatic chucking holding device that electrostatically chucks and holds an object by electrostatic chucking force. This electrostatic chucking holding device is used for fixing and releasing a mask, a wafer, a component of the device, or the like as required in a semiconductor manufacturing device, for example, an exposure device or an etching device. In FIG. 10, 1 is an adsorption stand, 2a and 2b are a pair of electrodes, 3 is an insulating layer, and 8 is a conductive adsorbent. When a voltage is applied between the electrodes 2a and 2b, an electric field is generated in the insulating layer 3 via the adsorbent 8, and a dielectric polarization is generated to generate an electric charge. As a result, an electrostatic attraction force is generated between the object to be adsorbed 8 and the electrodes 2 a and 2 b, and the object to be adsorbed 8 is held by the insulating layer 3.

Further, along with the recent demand for fine processing, an exposure apparatus using extreme ultraviolet (EUV) with a wavelength of 5 to 20 nm (hereinafter referred to as “EUV exposure apparatus”) has been attracting attention. EUV light is used in a vacuum environment because of its large gas absorption. In a vacuum, cooling due to heat transfer of gas from the wafer surface cannot be performed, and heat tends to accumulate in the wafer. The same problem occurs when an electron beam is used as exposure light. As a conventional cooling method in a vacuum, heat conduction or radiation in which a refrigerant is brought into direct contact has been proposed (see, for example, Patent Document 1).
JP 2003-68626 A

  Since the EUV exposure apparatus locally irradiates light onto the wafer W, as shown in FIG. 11, the temperature after irradiation of the exposure light on the wafer W rises by ΔT with respect to the temperature before irradiation centering on the irradiation range. . In FIG. 11, the horizontal axis represents the distance from the center of the wafer W as the object 8 to be adsorbed, and the vertical axis represents the temperature of the wafer W. The uneven temperature distribution of the wafer W causes a local thermal displacement, resulting in misalignment in alignment. In this case, if the cooling position is set for the entire wafer, the portion where the temperature has not risen is also cooled, and the uneven temperature distribution cannot be removed.

The present invention relates to an exposure apparatus having an electrostatic suction holding equipment to reduce or eliminate the deviation of the temperature distribution of the adsorbate in a vacuum environment.

An exposure apparatus according to one aspect of the present invention includes a plurality of electrodes and an insulating layer, and when a voltage is applied to the electrodes, the insulating layer generates dielectric polarization, and a conductive substrate is formed on the insulating layer. At the time of exposure of the substrate , an adsorption table for holding the substrate by electrostatic adsorption, a cooling unit for cooling the adsorption table, a voltage adjusting unit connected to the plurality of electrodes and individually applying a voltage to the plurality of electrodes A control unit that controls the voltage adjusting unit by acquiring information on a temperature distribution at a time prior to the start of exposure and determining a distribution of voltages that the voltage adjusting unit should apply to the plurality of electrodes based on the information ; It is characterized by having.

  Further objects and other features of the present invention will become apparent from the preferred embodiments described below with reference to the accompanying drawings.

    According to the present invention, it is possible to provide an electrostatic chucking holding device that reduces or eliminates the uneven temperature distribution of an object to be sucked in a vacuum environment, and an exposure apparatus having the same.

  Hereinafter, an EUV exposure apparatus 100 as one aspect of the present invention will be described with reference to FIG. Here, FIG. 1 is a schematic sectional view of the exposure apparatus 100. The exposure apparatus 100 is a projection exposure apparatus that exposes a circuit pattern of a mask (original plate) 120 onto a wafer W using EUV light in a step-and-scan manner. The exposure apparatus 100 includes an illumination device 110, a mask stage 125, a projection optical system 130, an alignment detection mechanism 160, and a focus position detection mechanism 170.

  The EUV light has a wavelength of 5 nm to 20 nm (for example, a wavelength of 13.4 nm). Since EUV light has a low transmittance to the atmosphere and generates contamination due to a reaction with a residual gas (polymer organic gas) component, at least in the optical path through which the EUV light passes (that is, the entire optical system) is a vacuum atmosphere. It is VA.

  The illumination device 110 illuminates the mask 120 with arc-shaped EUV light with respect to the arc-shaped visual field of the projection optical system 130, and includes an EUV light source unit 112 and an illumination optical system 114.

  The EUV light source unit 112 is a laser plasma light source, but a discharge plasma light source may be used. The illumination optical system 114 includes a condenser mirror 114a, an optical integrator 114b, and an aperture 114c. The condensing mirror 114a collects EUV light radiated approximately isotropically from the laser plasma light source. The optical integrator 114b uniformly illuminates the mask 120 with a predetermined numerical aperture. The aperture 114c is provided at a position conjugate with the mask 120, and limits the illumination area of the mask 120 to an arc shape.

  The mask 120 is a reflective mask and is supported and driven by a mask stage 125. Diffracted light emitted from the mask 120 is reflected by the projection optical system 130 and projected onto the wafer W. The mask 120 and the wafer W are arranged in an optically conjugate relationship. Since the exposure apparatus 100 is a step-and-scan exposure apparatus, the mask pattern is reduced and projected onto the wafer W by synchronously scanning the mask 120 and the wafer W.

  The mask stage 125 supports the mask 120 via a chuck 125a and is connected to a moving mechanism (not shown). Any structure known in the art can be applied to the mask stage 125. The chuck 125a is an electrostatic chuck and attracts the mask 120 by electrostatic attraction force.

  The projection optical system 130 projects the mask pattern image on the wafer W, which is the image plane, by using a plurality of multilayer mirrors 130a. The number of the plurality of mirrors 130a is about 4 to 6. In order to realize a wide exposure area with a small number of mirrors, the mask 120 and the wafer W are simultaneously scanned using only a thin arc-shaped area (ring field) separated from the optical axis by a certain distance. Transcript. In the present embodiment, the projection optical system 130 is constituted by four mirrors 130 a and reduces the pattern of the mask 120 to ¼ and forms an image on the wafer W.

  In another embodiment, the wafer W widely includes a liquid crystal substrate and other substrates (objects to be exposed). The wafer W is coated with a photoresist. The wafer W is a conductive object to be adsorbed.

  Wafer stage 140 supports wafer W via wafer chuck 141. The wafer stage 140 moves the wafer W using, for example, a linear motor.

  The alignment detection mechanism 160 measures the positional relationship between the position of the mask 120 and the optical axis of the projection optical system 130 and the positional relationship between the position of the wafer W and the optical axis of the projection optical system 130. The alignment detection mechanism 160 sets the positions and angles of the mask stage 125 and the wafer stage 140 so that the projected image of the mask 120 matches a predetermined position on the wafer W.

  The focus position detection mechanism 170 measures a so-called Z-direction focus position on the wafer W surface. The focus position detection mechanism 170 controls the position and angle of the wafer stage 140 to always keep the wafer W surface at the image formation position by the projection optical system 130 during exposure.

  Hereinafter, details of the wafer chuck 141 will be described in detail in the first and second embodiments. The wafer chuck 141 is an example of an electrostatic chuck holding device.

  The wafer chuck 141 according to the first embodiment has a configuration shown in FIGS. 2 (a) and 2 (b). That is, the wafer chuck 141 includes an adsorption table 142, a plurality of electrodes 143, an insulating layer 144, a temperature sensor 145, a tube 146, a liquid 147, a temperature adjustment element 148, and a control system. The control system includes a CPU 150 as a control unit, a memory 151, a voltage adjustment unit 152, and temperature adjustment units 154 and 156. Here, FIG. 2A is a schematic plan view of the wafer chuck 141. FIG. 2B is a cross-sectional view taken along the line AA in FIG. In FIG. 2A, the stage 140 is omitted.

  The suction table 142 is made of an organic material or ceramic, and holds the wafer W via an insulating layer 144 formed on the surface thereof. As shown in FIG. 2B, the plurality of electrodes 143 are arranged at the same height in the suction table 142 over the entire effective area of the suction table 142 in a lattice shape. The insulating layer 144 is composed of a silicon oxide film or a silicon nitride film.

  The temperature sensor 145 detects the temperature of the adsorption table 142 and uses a platinum resistance thermometer. The same number of temperature sensors 145 as the electrodes 143 are arranged. In an actual process, it is not necessary to detect temperature by performing a simulation. Since the temperature of the wafer W cannot be measured directly, the temperature sensor 145 measures the temperature distribution of the wafer W indirectly by measuring the temperature of the suction table 142.

  The tube 146, the liquid 147, and the temperature adjustment unit 156 recover the heat of the back surface of the temperature adjustment element 148 and maintain the temperature of each part in the vacuum chamber. The tube 146 is attached to the back surface of the temperature control element 148 and forms a flow path through which the liquid 147 as a refrigerant flows. The material of the tube 146 is determined by the liquid 147, and stainless steel, brass, copper, or the like is used. The liquid 147 may be liquid or gas, and is composed of, for example, water, helium, or nitrogen.

  The temperature control element 148 is attached to the back surface of the adsorption table 142, and is a cooling element composed of, for example, a Peltier element. The plurality of temperature control elements 148 function as a cooling unit that cools the adsorption table 142. The plurality of temperature control elements 148 are provided in the same number as the plurality of electrodes 143, and each temperature control element 148 is provided in a region corresponding to the electrode to be written.

  The CPU 150 is connected to the memory 151, the voltage adjustment unit 152, and the temperature adjustment units 154 and 156. The CPU 150 functions as a control unit that controls the voltage adjustment unit 152 and the temperature adjustment units 154 and 156 based on information in the memory 151 and other information. The CPU 150 also performs drive control of the stage 140. The memory 151 stores a control method to be described later and necessary data.

  The voltage adjustment unit 152 controls the voltage of the electrode 143 individually. The voltage adjusting unit 152 of this embodiment supplies a voltage to all the electrodes 143 instead of supplying a voltage only to one of the electrodes 143, but the supplied voltage has a distribution. The voltage distribution is determined by the CPU 150 based on the temperature information of the wafer W.

  The temperature adjustment unit 154 individually adjusts the temperature of the temperature adjustment element 148. In Example 1 to be described later, the voltage adjustment unit 152 adjusts the temperature of all the temperature adjustment elements 148 to be constant, not only the temperature of any one of the temperature adjustment elements 148. Further, in Example 2 described later, the voltage adjustment unit 152 adjusts the temperature of all the temperature adjustment elements 148 instead of adjusting only the temperature of any one of the temperature adjustment elements 148, but the temperature is distributed. There is. The temperature distribution is determined by the CPU 150 based on the temperature information of the wafer W.

  The temperature adjustment unit 156 controls the temperature of the liquid 147 in the tube 146.

  Hereinafter, the operation of the CPU 150 will be described with reference to FIG. Here, FIG. 3 is a control flow of the CPU 150. First, as a premise, exposure conditions are set in the memory 151 from an input unit (not shown) (step 1002). The exposure conditions are defined by exposure parameters such as shot layout, exposure sequence, exposure time, light source energy, numerical aperture (NA) of the projection optical system 130, and depth of focus.

  Next, the CPU 150 acquires temperature data at the time of exposure at each shot position (step 1004). In the present embodiment, the temperature of the wafer W is made uniform in-process, that is, without measuring the temperature during actual exposure. For this purpose, it is necessary to know in advance the exposure parameters and the temperature distribution of the wafer W for each shot. The temperature distribution of the wafer W is obtained by actually exposing the test wafer under the same exposure conditions as the main exposure wafer and measuring the temperature distribution or calculating the temperature distribution by simulation.

  Next, the main exposure wafer W is set (step 1006), and the shot number i of the wafer W is set to 1 (step 1008). Next, it is determined whether the shot number i exceeds the total shot number n (step 1010). If the CPU 150 determines that the shot number i does not exceed the total shot number n (step 1010), the CPU 150 exposes the mask pattern to the target shot (step 1012). At that time, the CPU 150 controls the electrostatic attraction force of the target shot or the temperature distribution of the suction table 142 based on the temperature distribution data before exposing the target shot (step 1014). Details of step 1014 will be described later. Thereafter, i is incremented to i + 1 (step 1016), and the process returns to step 1010. On the other hand, if the CPU 150 determines that the shot number i does not exceed the total shot number n (step 1010), since all shots on the wafer W have been exposed, the process is terminated.

  Hereinafter, a method for acquiring temperature data in step 1004 will be described. Here, a case where a test wafer is used will be described. First, a test wafer W as an object to be adsorbed is placed on the adsorption table 142, and a voltage is applied to the electrode 143. Then, an electric field is generated in the insulating layer 144 via the wafer W, and the insulating layer 144 generates dielectric polarization to generate electric charges. As a result, an electrostatic attraction force is generated between the wafer W and the electrode 143, and the wafer W is held on the insulating layer 3. When step-and-scan exposure is performed on the test wafer W, the temperature of the test wafer W rises locally. By detecting such a temperature change by the temperature sensor 145, the temperature distribution of the wafer W can be known in advance. By detecting the temperature distribution, it is possible to cope with not only the direct irradiation of the exposure light but also the case where the flare and the previous cooling are insufficient. The amount of heat applied to the wafer W is calculated from the detected temperature distribution. The calculated amount of heat is the amount of heat applied to the wafer W by exposure, and this is the amount of heat to be recovered.

  Here, ΔQ is the amount of heat moving from the wafer W to the suction table 142, Δt is time, and λ is the thermal conductivity from the wafer W to the suction table 142. S is an area where the wafer W and the suction table 142 are apparently in contact with each other. In the present embodiment, as described above, although the electrostatic attraction force is distributed, the electrostatic attraction force acts on the entire surface of the attraction table 142. Therefore, S is the smaller one of the wafer W and the attraction surface of the attraction table 142. Area. dT (z) / dz is a temperature difference or a temperature gradient between the wafer W and the suction table 142. The Z direction is the direction shown in FIG. 1, FIG. 2 (a), and FIG. 6 (a). Equation 1 represents that the amount of heat ΔQ moves through the area S during the time Δt.

  Since the contact resistance or thermal resistance between the suction table 142 and the wafer W is proportional to the reciprocal of the thermal conductivity λ, Formula 2 is established. Equation 2 indicates that the thermal conductivity λ is proportional to the contact pressure p.

Here, H _M is Meyer hardness, p is the contact pressure. FIG. 4 is a graph showing the relationship between contact pressure and contact resistance. From FIG. 4, it is understood that the contact resistance can be reduced by increasing the contact pressure p.

  In the parallel plate capacitor, the electrostatic force acting between both electrodes is defined by Equation 3.

Here, S ₁ is the area of the electrodes, V is voltage, d is spacing, F is the electrostatic force between the plates, epsilon is the dielectric constant between the plates. The force acting between the wafer W and the electrode 143 can be inferred from Equation 3.

  On the other hand, there is a relationship of Formula 5 between the contact pressure p and the electrostatic force F.

  When the force F of Formula 3 changes, the contact pressure p changes from Formula 4. When the contact pressure p changes, the thermal conductivity λ changes from Equation 2.

  In order to prevent the temperature distribution of the wafer W from becoming non-uniform due to the energy of the exposure light applied to the wafer W during exposure, the voltage V applied to the electrode 143 is increased to increase the thermal conductivity λ, Needs to be easily recovered from the wafer W.

  The CPU 150 controls the electrostatic attraction force to recover the amount of heat. Based on the information on the temperature distribution of the wafer W, the CPU 150 controls the distribution of the voltage applied by the voltage adjustment unit using Equations 1 to 4. Such control may be performed in real time during exposure. However, in the feedback control, a delay time is generated, and in this embodiment, the measurement result relating to the test wafer W is applied to the main exposure wafer W. Thereby, control responsiveness can be ensured.

  Here, it is assumed that the wafer W exhibits the temperature distribution shown in FIG. FIG. 5A is a graph showing the temperature distribution of the wafer W before and after the exposure light irradiation, the horizontal axis is the distance from the center of the wafer W, and the vertical axis is the temperature. N is an irradiation area. A straight line B1 of the temperature T1 is a temperature distribution of the wafer W before irradiation. A curve B2 is the temperature distribution of the wafer W after the wafer W is irradiated with the exposure light in the irradiation region N. A curve B2 is a temperature distribution of the wafer W after exposure light irradiation when the CPU 150 does not perform adsorption force control.

  The CPU 150 obtains the temperature distribution shown in FIG. In response to this, the CPU 150 controls the voltage adjustment unit 152 so that the electrostatic adsorption force of the electrode 143 directly below or around the irradiation region N of the exposure light among the plurality of electrodes 143 is increased. In this way, the CPU 150 controls the electrostatic attraction force shown in FIG. 5B so that the curve B2 shown in FIG. 5A becomes the straight line B1. FIG. 5B is a graph showing the relationship between the position of the wafer W and the electrostatic chucking force acting locally, the horizontal axis is the distance from the center of the wafer W, and the vertical axis is the electrostatic chucking force. is there.

  In the irradiation region N, the electrostatic attraction force f0 increases to f1. Outside the irradiation region N, the electrostatic chucking force f0 is greater than 0, so the chuck 141 applies a certain amount of chucking force to the entire surface of the wafer W.

  As described above, the CPU 150 acquires the temperature distribution shown in FIG. 5A in step 1004 and obtains the electrostatic attraction force distribution shown in FIG. 5B in step 1014. Find the distribution. In this case, it is preferable to correct the calculation result based on an empirical rule after obtaining to some extent by Equations 1 to 4. The correction data can be formed from data of deviation from the straight line B1 when the temperature of the test wafer W is controlled based on the voltage distribution obtained by calculation. In the calculation, a database including the volume resistivity, thickness, relative permittivity of the insulating layer 144, the gap between the suction table 142 and the wafer W, and the contact resistance is stored in the memory 151 in advance and used. it can.

  The CPU 150 steps to the next shot after the scanning exposure of the wafer W, changes the electrostatic adsorption force at the irradiation position before the temperature of the wafer W rises due to irradiation, and maintains the uniformity of the temperature distribution of the wafer W. . After completion of irradiation, the electrostatic adsorption force at the irradiation position returns to the original, and the electrostatic adsorption force of the next irradiation region N is controlled. In this embodiment, the cooling time is fixed to the irradiation time, but in another embodiment, the cooling time is different from the irradiation time.

  Hereinafter, the wafer chuck 141A according to the second embodiment will be described with reference to FIGS. FIG. 6A is a schematic plan view of a wafer chuck 141A of the second embodiment. FIG. 6B is a cross-sectional view taken along the line AA in FIG. In FIG. 6A, the stage 140 is omitted. 6 (a) and 6 (b), members similar to those in FIGS. 2 (a) and 2 (b) are denoted by the same reference numerals.

  In the first embodiment, the temperature of the temperature adjustment element 148 in charge of the irradiation region N and the temperature of the surrounding temperature adjustment element 148 are set to be the same. Although the configuration of Example 1 increases the thermal conductivity λ of Formula 1, when the irradiation energy of the exposure light is large, the temperature rise in the irradiation region N increases, and the electrostatic attraction force is controlled. There may be a problem that the total amount of heat cannot be recovered. Thus, in addition to this, the second embodiment further increases the temperature difference dT (z) / dz of Equation 1 to increase the cooling efficiency.

  In the second embodiment, the same number of temperature control elements 148 are arranged for the plurality of electrodes 143. As in the first embodiment, the CPU 150 of this embodiment acquires information on the temperature distribution of the wafer W in advance in step 1004 and controls the electrostatic adsorption force in step 1014 and simultaneously controls the temperature of the temperature adjustment element 148. .

  Here, it is assumed that the wafer W exhibits the temperature distribution shown in FIG. FIG. 7A is a graph showing the temperature distribution of the wafer W before and after exposure light irradiation, the horizontal axis is the distance from the center of the wafer W, and the vertical axis is the temperature. N is an irradiation area. A straight line B1 of the temperature T1 is a temperature distribution of the wafer W before irradiation. A curve B2 is the temperature distribution of the wafer W after the wafer W is irradiated with the exposure light in the irradiation region N. A curve B2 is a temperature distribution of the wafer W after exposure light irradiation when the CPU 150 does not perform adsorption force control.

  When the temperature distribution shown in FIG. 7A is acquired in step 1004, the CPU 150 first increases the electrostatic attraction force of the electrodes 143 directly below or around the irradiation region N of the exposure light among the plurality of electrodes 143. The voltage adjustment unit 152 is controlled. For this reason, the CPU 150 first controls the electrostatic attraction force shown in FIG. FIG. 7B is a graph showing the relationship between the position of the wafer W and the electrostatic chucking force acting locally, the horizontal axis is the distance from the center of the wafer W, and the vertical axis is the electrostatic chucking force. is there. In the irradiation region N, the electrostatic attraction force f0 increases to f1. Since the electrostatic attraction force f0 is greater than 0 outside the irradiation region N, the chuck 141 applies a certain amount of attraction force to the entire surface of the wafer W.

  Further, as shown in FIG. 7C, the CPU 150 lowers the temperature of the temperature adjustment element 148 directly below or around the irradiation region N among the plurality of electrodes 143 than the surrounding temperature adjustment element 148. As a result, the temperature difference between the wafer W and the suction table 142 in the irradiation region N can be increased to enhance the cooling effect. If the temperature of the surrounding temperature control element 148 is also cooled, the temperature of the region of the wafer W corresponding to the surrounding temperature control element 148 becomes too low, and the temperature distribution cannot be made uniform.

  The CPU 150 steps to the next shot after the scanning exposure of the wafer W, changes the electrostatic adsorption force and the temperature gradient at the irradiation position before the temperature of the wafer W rises due to irradiation, and the curve shown in FIG. The electrostatic attraction force and the temperature difference are controlled so that B2 becomes a straight line B1. The uniformity of the temperature distribution of the wafer W is maintained. After the irradiation is completed, the electrostatic adsorption force and the temperature difference at the irradiation position are restored, and the electrostatic adsorption force and the temperature difference in the next irradiation region N are controlled. That is, in this embodiment, the cooling time is the irradiation time.

  2A and 2B, the number of electrodes 143 and the number of temperature sensors 145 are the same. 6 (a) and 6 (b), the number of electrodes 143, the number of temperature sensors 145, and the number of temperature control elements 148 are the same. This is for simplification when calculating the electrostatic attraction force and the control target temperature of the temperature adjustment element 148 from the measurement value of the temperature sensor 145, and includes the number of electrodes 143, the number of temperature sensors 145, and the temperature adjustment element. The same effect can be obtained even if the number of 148 is not necessarily the same. Most preferably, the number of electrodes 143, the number of temperature sensors 145, and the number of temperature control elements 148 are the same as the total number of shots.

  In the exposure, the EUV light from the illumination device 110 uniformly illuminates the mask 120 and projects an image of the mask pattern onto each shot of the wafer W via the projection optical system 130. At this time, since the CPU 150 controls the temperature of the wafer W by controlling the wafer chuck 141, high-quality exposure can be performed on the wafer W by preventing a local temperature distribution bias and a positional shift associated therewith.

  Next, an embodiment of a device manufacturing method using the exposure apparatus 100 will be described with reference to FIGS. FIG. 8 is a flowchart for explaining the manufacture of a semiconductor device (a semiconductor chip such as an IC or LSI, or a liquid crystal panel or a CCD). In step 1 (circuit design), a semiconductor device circuit is designed. In step 2 (reticle fabrication), a reticle on which the designed circuit pattern is formed is fabricated. On the other hand, in step 3 (wafer manufacture), a wafer is manufactured using a material such as silicon. Step 4 (wafer process) is called a pre-process, and an actual circuit is formed on the wafer by lithography using the prepared reticle and wafer. The next step 5 (assembly) is referred to as a post-process, and is a process for forming a semiconductor chip using the wafer produced in step 4, such as an assembly process (dicing, bonding), a packaging process (chip encapsulation), and the like. including. In step 6 (inspection), the semiconductor device manufactured in step 5 undergoes inspections such as an operation confirmation test and a durability test. Through these steps, the semiconductor device is completed and shipped (step 7).

  FIG. 9 is a detailed flowchart of the wafer process in Step 4 of FIG. In step 11 (oxidation), the surface of the wafer is oxidized. In step 12 (CVD), an insulating film is formed on the wafer surface. In step 13 (electrode formation), an electrode is formed on the wafer by vapor deposition or the like. In step 14 (ion implantation), ions are implanted into the wafer. In step 15 (resist process), a photosensitive material is applied to the wafer. Step 16 (exposure) uses the exposure apparatus 100 to expose a reticle pattern onto the wafer. In step 17 (development), the exposed wafer is developed. In step 18 (etching), portions other than the developed resist image are removed. In step 19 (resist stripping), the resist that has become unnecessary after the etching is removed. By repeatedly performing these steps, multiple circuit patterns are formed on the wafer. By using the manufacturing method of this embodiment, it is possible to manufacture a higher quality device (semiconductor element, LCD element, imaging element (CCD, etc.), thin film magnetic head, etc.) than conventional ones. In addition, a device manufacturing method using the exposure apparatus 100 and a device as a result (intermediate, final product) also constitute one aspect of the present invention.

As mentioned above, although preferable embodiment of this invention was described, this invention is not limited to these embodiment, A various deformation | transformation and change are possible within the range of the summary. For example, a step-and-repeat method may be used as an exposure method, or an electron beam may be used instead of EUV light .

It is a schematic block diagram of the exposure apparatus of Example 1 of this invention. FIG. 2A is a schematic plan view of the wafer chuck according to the first embodiment. FIG. 2B is a cross-sectional view taken along the line AA in FIG. It is an operation | movement flow of CPU shown to Fig.2 (a). It is a graph which shows the relationship between contact pressure and thermal resistance (contact resistance). FIG. 5A is a graph showing the temperature distribution of the wafer before and after exposure light exposure. FIG. 5B is a graph showing a distribution of electrostatic attraction force for eliminating the temperature distribution shown in FIG. FIG. 6A is a schematic plan view of the wafer chuck of the second embodiment. FIG. 6B is a cross-sectional view taken along the line AA in FIG. FIG. 7A is a graph showing the temperature distribution of the wafer before and after exposure light exposure. FIG. 7B and FIG. 7C are graphs showing the electrostatic adsorption force and the temperature distribution of the adsorption platform for eliminating the temperature distribution shown in FIG. 7A. It is a flowchart for demonstrating the device manufacturing method using the exposure apparatus shown in FIG. It is a detailed flowchart of step 4 shown in FIG. It is a schematic sectional drawing of the conventional electrostatic attraction holding | maintenance apparatus. It is the schematic explaining the problem of the conventional EUV exposure apparatus.

Explanation of symbols

100 Exposure apparatus 141, 141A Wafer chuck (electrostatic chucking holding apparatus)
142 Suction Stand 143 Electrode 144 Insulating Layer 145 Temperature Sensor 148 Temperature Control Element 150 CPU
152 Voltage controller

Claims (9)

An adsorption platform having a plurality of electrodes and an insulating layer, and when a voltage is applied to the electrodes, the insulating layer generates dielectric polarization and holds a conductive substrate on the insulating layer by electrostatic adsorption;
A cooling unit for cooling the adsorption table;
A voltage adjusting unit connected to the plurality of electrodes and individually applying a voltage to the plurality of electrodes;
Information on temperature distribution at the time of exposure of the substrate is acquired prior to the start of exposure, and the voltage adjustment unit determines the distribution of voltage to be applied to the plurality of electrodes based on the information. An exposure apparatus comprising: a control unit that controls the exposure apparatus. The cooling unit has a plurality of cooling elements,
The exposure apparatus according to claim 1, wherein the control unit controls the cooling unit by determining a temperature distribution to be formed by the cooling unit based on the information. Further comprising a temperature sensor for detecting the temperature of the adsorption table, each temperature sensor and each cooling element is assigned to a region corresponding to each electrode, and each of the plurality of electrodes, the cooling element and the plurality of temperature sensors is The exposure apparatus according to claim 2, wherein the exposure apparatus is equal to the number of regions formed on the substrate and controlled in temperature. Exposure apparatus described a pattern formed on the original plate in a vacuum environment with the use of light to claim 1, wherein to Rukoto exposure light onto the substrate from the light source. Exposing the substrate with the exposure apparatus according to claim 4;
And developing the exposed substrate. A device manufacturing method comprising: An adsorption platform having a plurality of electrodes and an insulating layer, and when a voltage is applied to the electrodes, the insulating layer generates dielectric polarization and holds a conductive substrate on the insulating layer by electrostatic adsorption; In a control method of an exposure apparatus, comprising: a cooling unit that cools the suction table; and a voltage adjusting unit that is connected to the plurality of electrodes and individually applies a voltage to the plurality of electrodes.
Acquiring information on temperature distribution at the time of exposure of the substrate prior to the start of exposure ;
And a step of determining a distribution of voltages to be applied to the plurality of electrodes based on the information. The control method according to claim 6, wherein the acquiring step is acquired by actual measurement or simulation of the substrate . In an exposure method for exposing a pattern formed on an original plate in a vacuum environment using light from a light source,
Preliminarily acquiring temperature distribution information of the substrate shot irradiated with the light, and holding the substrate by electrostatic attraction and cooling the chuck before exposing the target shot of the substrate; An exposure method comprising: setting an electrostatic attracting force corresponding to a target shot to be stronger than an electrostatic attracting force of another region of the substrate based on the information.   Before exposing the target shot of the substrate, setting a temperature corresponding to the target shot of the chuck to be lower than a temperature of another region of the substrate based on the information. Item 9. The exposure method according to Item 8.