JP4858540B2 - Photoelectric conversion device and radiation image capturing device - Google Patents

Description

  The present invention relates to a photoelectric conversion device and a radiation image capturing device.

  Conventionally, a film screen system in which an intensifying screen and a radiographic film are combined is often used for capturing a radiographic image. According to this method, the radiation including the internal information of the subject that has passed through the subject is converted into visible light proportional to the intensity of the radiation by the intensifying screen, and the visible light is exposed to the radiographic film so that the radiation image is formed. Formed on a film. However, in such a film system, there is a problem that it takes time and effort because there is a film development process in the middle before the doctor obtains the captured radiation image.

  Further, due to recent technological advances, there is an increasing demand in the medical industry to obtain radiographic image information directly as an electrical signal without using a radiographic film. That is, radiation is converted into visible light proportional to the intensity of the radiation by a phosphor, and an electric signal converted by a photoelectric conversion element such as a photodiode is read by a circuit using a thin film transistor (hereinafter referred to as “TFT”). Radiation imaging devices using flat panel detectors (hereinafter referred to as “FPD”) are beginning to be used.

  In such a radiation image capturing apparatus, it is necessary to reduce the radiation intensity as much as possible in order to suppress the X-ray exposure to the subject as much as possible. The photodiode is required to have low noise performance so that a clear image can be obtained even under such conditions.

  There are various causes of photodiode noise, and one of them is shot noise generated due to leakage current. Leakage current is generated when electrons are thermally excited through trap levels present in the photoelectric conversion film. The leak current fluctuates and becomes noise called shot noise. When the average value of the number of electrons thermally excited to the trap level is N, √N is shot noise.

  As described above, the cause of the leakage current and the shot noise is that a trap level exists in the photoelectric conversion film. Although the trap level exists in the photoelectric conversion film and on the side surface, the trap level is likely to be generated particularly on the side surface because the photoelectric conversion film is easily damaged by processing such as etching.

In order to solve such a problem, a method has been proposed in which a mesa photodiode is formed and embedded in another semiconductor layer to reduce trap levels and reduce leakage current (see, for example, Patent Document 1). ).
Japanese Patent Laid-Open No. 6-232443

  A problem of leakage current generated in a photoelectric conversion device using a conventional photoelectric conversion element will be described with reference to FIG.

  FIG. 1A is an explanatory diagram for explaining a conventional driving method of a photoelectric conversion element, FIG. 1B is an explanatory diagram showing a relationship between an exposure amount and generated electron / hole pairs, and FIG. FIG. 1D is an explanatory view showing the relationship between the exposure amount and the leakage current.

  As an example of a conventional photoelectric conversion element, a PIN (P-INTRINSIC-N) photodiode 10 shown in FIG. 1A will be described as an example. The PIN photodiode 10 includes a cathode electrode 2, an anode electrode 6 on the substrate 1, an N-type semiconductor layer 3 that is a photoelectric conversion layer 50 formed between the cathode electrode 2 and the anode electrode 6, and an i-type semiconductor layer. 4 and P-type semiconductor layer 5.

  A procedure for accumulating charges by exposing the PIN photodiode 10 to a predetermined time will be described. A positive side terminal of a reference power supply 20 is connected to the cathode electrode 2 via a switch 21. The negative electrode terminal of the reference power supply 20 is connected to the anode electrode 6. When the switch 21 is turned on and the voltage V is applied to the cathode electrode 2, a reverse bias voltage is applied to the PIN photodiode.

  Next, the switch 21 is turned off to start exposure. The anode electrode 6 side is a light receiving surface, and a light beam L indicated by an arrow in FIG. 1A passes through the transparent anode electrode 6 and irradiates the P-type semiconductor layer 5. The irradiated light beam L passes through the P-type semiconductor layer 5 and enters the i-type semiconductor layer 4, absorbs the energy, and generates electron-hole pairs in the i-type semiconductor layer 4. As shown in FIG. 1B, the electron / hole pairs generated increase as the exposure amount increases. Then, the potential of the cathode electrode 2 decreases as shown in FIG. As described above, the cathode electrode 2 decreases in proportion to the exposure amount from the voltage V in the initialized state, so that the exposure amount can be obtained from the voltage of the cathode electrode 2 after exposure.

  On the other hand, as the potential difference between the cathode electrode 2 and the anode electrode 6 is larger, the leakage current io flowing through the side surface of the photoelectric conversion layer 50 is larger. Therefore, as shown in FIG. The reset current is the largest, and the leak current io decreases as the exposure dose increases and the voltage of the cathode electrode 2 decreases.

  As described above, the conventional photoelectric conversion element has a characteristic that the ratio of the leakage current io to the signal current increases as the exposure amount decreases. However, such a characteristic is problematic in terms of S / N. That is, the smaller the exposure amount, the greater the ratio of the leak current io which is noise to the signal current due to electron / hole pairs generated by exposure, and the S / N becomes worse. For this reason, even if the leak current io is reduced by adopting a process for reducing the trap current and reducing the leak current io as in Patent Document 1, the S / N is poor when the exposure amount is small. The characteristics cannot be changed.

  This invention is made | formed in view of the said subject, Comprising: It aims at providing the photoelectric conversion apparatus and radiographic imaging apparatus which improved S / N when there is little exposure amount.

1. A photoelectric conversion element including a photoelectric conversion layer composed of a first electrode and a plurality of layers and a second electrode on a substrate,
A bias power supply that constantly applies a first voltage to the first electrode;
A reference power supply for applying a second voltage to the second electrode;
An initialization mode in which the second electrode is initialized by applying a second voltage at which the photoelectric conversion element is reverse-biased, and light incident on the photoelectric conversion layer with the second electrode in a floating state A switching means for switching a photoelectric conversion mode for converting electrons or holes generated by the above-mentioned second electrode into an electric signal,
The photoelectric conversion element includes a third electrode surrounding the second electrode on the same plane as the second electrode, and the photoelectric conversion device further applies a third voltage to the third electrode. And the third voltage is when the second voltage is lower than the first voltage,
The photoelectric conversion device, wherein the photoelectric conversion device is a voltage lower than the first voltage and is higher than the first voltage when the second voltage is higher than the first voltage.

  2. 2. The photoelectric conversion device according to 1, wherein the photoelectric conversion layer includes a P-type semiconductor layer and an N-type semiconductor layer.

  3. 2. The photoelectric conversion device according to 1, wherein the photoelectric conversion layer includes a P-type semiconductor layer, an i-type semiconductor layer, and an N-type semiconductor layer.

  4). 2. The photoelectric conversion device according to 1, wherein the photoelectric conversion layer includes a P-type semiconductor layer and an i-type semiconductor layer.

  5. 2. The photoelectric conversion device according to 1, wherein the photoelectric conversion layer includes an insulating layer, an i-type semiconductor layer, and an N-type semiconductor layer.

  6). 6. The photoelectric conversion device according to any one of 1 to 5, wherein at least the second electrode and the layer in contact with the third electrode of the photoelectric conversion layer are not continuous.

  7). The photoelectric conversion device according to any one of 1 to 6, wherein the third voltage is the same voltage as the second voltage.

8.1 to a photoelectric conversion device according to any one of 7 to 7;
And a fluorescent plate provided in the photoelectric conversion device.

  ADVANTAGE OF THE INVENTION According to this invention, the photoelectric conversion apparatus and radiographic image imaging device which improved S / N when there is little exposure amount can be provided.

It is explanatory drawing explaining the subject of the leakage current generate | occur | produced with the conventional photoelectric conversion element. It is explanatory drawing explaining the structure of the photoelectric conversion apparatus of 1st Embodiment concerning this invention. It is explanatory drawing explaining the leakage current when the 3rd voltage V3 given to the 3rd electrode 103 is changed. It is a circuit diagram of FPD which has the photoelectric conversion apparatus of 1st Embodiment. It is explanatory drawing explaining the structure of the photoelectric conversion element of 2nd Embodiment concerning this invention. It is explanatory drawing explaining the structure of the photoelectric conversion element of 3rd Embodiment concerning this invention. It is explanatory drawing explaining the structure of the photoelectric conversion element of 4th Embodiment concerning this invention. It is explanatory drawing explaining the structure of the photoelectric conversion element of 5th Embodiment concerning this invention. It is a circuit diagram of FPD which has the photoelectric conversion apparatus of 2nd Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Board | substrate 3 N type semiconductor layer 4 i type semiconductor layer 5 P type semiconductor layer 20 Reference power supply 21 Switch 50 Photoelectric conversion layer 87 Guard electrode power supply 101 1st electrode 102 2nd electrode 103 3rd electrode is, iu Leakage current V2 second voltage V3 third voltage

  Hereinafter, the present invention will be described in detail with reference to embodiments, but the present invention is not limited thereto.

  FIG. 2 is an explanatory diagram illustrating the configuration of the photoelectric conversion apparatus according to the first embodiment of the present invention.

  2A and 2C are explanatory diagrams for explaining a driving method of the photoelectric conversion device of the first embodiment, and FIG. 2B is a cross-sectional view A of the second electrode 102 and the third electrode 103. FIG. 2D is an explanatory diagram for explaining a cross section BB ′ of the N-type semiconductor layer 3.

  First, the structure of the PIN photodiode 11 which is a photoelectric conversion element of this embodiment will be described with reference to FIGS.

As shown in FIGS. 2A and 2C, the second electrode 102 and the third electrode 103 are provided on the substrate 1, and i is provided between the second electrode 102 and the third electrode 103. A type semiconductor layer 4 is formed. FIG. 2B is a front view of the cross section AA ′ of FIG. As shown in FIG. 2B, a third electrode 103 is formed so as to surround the second electrode 102 with the i-type semiconductor layer 4 interposed therebetween.
The shape of the third electrode 103 is not limited to the closed shape surrounding the second electrode 102 shown in FIG. 2B, and may be a partially open shape, for example, a U-shape. By making the shape of the third electrode 103 a partly open shape, the wiring to the second electrode 102 on the inner side is formed in the same plane where the third electrode 103 and the second electrode 102 exist. can do. Therefore, it is not necessary to provide a layer for wiring, and the manufacturing efficiency can be improved.

  An N-type semiconductor layer 3 is formed on the second electrode 102 and the third electrode 103. FIG. 2D is a front view of the cross section B-B ′ of FIG. As shown in FIG. 2D, the N-type semiconductor layer 3 is formed on the second electrode 102 and the third electrode 103, and is separated with the i-type semiconductor layer 4 interposed therebetween. That is, the N-type semiconductor layer 3 formed on the second electrode 102 and the third electrode 103 is not continuous.

  An i-type semiconductor layer 4 is formed on the N-type semiconductor layer 3, and a P-type semiconductor layer 5 is further formed on the upper layer. On the P-type semiconductor layer 5, the first electrode 101 is formed at a position facing the second electrode 102. As described above, the photoelectric conversion layer 50 of the PIN photodiode 11 includes the N-type semiconductor layer 3, the i-type semiconductor layer 4, and the P-type semiconductor layer 5.

  Next, the photoelectric conversion operation of the PIN photodiode 11 will be described.

  2E is an explanatory diagram showing the relationship between the exposure dose and the generated electron / hole pairs, FIG. 2F is an explanatory diagram showing the relationship between the exposure dose and the second electrode potential, and FIG. It is explanatory drawing which shows the relationship between an exposure amount and leak current.

  A procedure for exposing the PIN photodiode 11 of the first embodiment for a predetermined time and accumulating charges will be described. As shown in FIG. 2A, the positive terminal of the reference power supply 20 is connected to the second electrode 102 via the switch 21, and the second voltage V2 is applied. A ground side terminal of the reference power supply 20 is connected to the first electrode 101, and 0V is always applied as the first voltage V1. The guard electrode power supply 87 is a power supply that applies the third voltage V <b> 3 to the third electrode 103. In the present embodiment, the first voltage V1 <the second voltage V2, the third voltage V3 = the second voltage V2, that is, the case where the first voltage V1 <the third voltage V3 = the second voltage V2. This will be described with reference to FIG.

  In the initialization mode, as shown in FIG. 2A, the switch 21 is turned on, the second voltage V2 is applied to the second electrode 102, and the reverse bias voltage is applied to the PIN photodiode 11. . The switch 21 is a switching means of the present invention.

  In the photoelectric conversion mode, as shown in FIG. 2C, the switch 21 is turned off to start exposure. The first electrode 101 side is a light receiving surface, and a light beam L indicated by an arrow in FIG. 2C is a transparent first electrode 101 formed of a compound containing indium or tin such as ITO, an oxide, or the like. Then, the P-type semiconductor layer 5 is irradiated. The irradiated light beam L passes through the P-type semiconductor layer 5 and enters the i-type semiconductor layer 4 to generate electron / hole pairs. As shown in FIG. 2E, the electron / hole pairs generated increase as the exposure amount increases. Then, the potential of the second electrode 102 decreases as shown in FIG. Accordingly, like the PIN photodiode 10 described in FIG. 1, the voltage of the second electrode 102 is highest when the switch 21 is turned on and initialized before exposure, and the voltage decreases as the exposure amount increases. To do.

  In the PIN type photodiode 11 of the present embodiment, as shown in FIG. 2C, the leakage current is flowing from the third electrode 103 to the first electrode 101 and the third electrode 103 to the second electrode 102. A flowing leak current iu is generated. In the present embodiment, since the third electrode 103 is connected to the guard electrode power supply 87 and is always fixed to the third voltage V3, the potential of the second electrode 102 is affected even if the leakage current is flows. Don't give.

  On the other hand, since the leakage current iu is generated by the potential difference between the third electrode 103 and the second electrode 102, the switch 21 is turned on and the third voltage 103 and the second electrode 102 have the same voltage. In the initialization state where V2 and the third voltage V3 are applied, the leakage current iu is zero. When exposure is performed with the switch 21 turned off, the voltage of the second electrode 102 decreases as shown in FIG. 2 (f). Therefore, the leakage current iu flowing from the third electrode 103 to the second electrode 102 is as shown in FIG. As shown by a solid line in (g), it increases in proportion to the exposure amount. As indicated by a broken line in FIG. 2 (g), the leak current io generated in the conventional PIN photodiode 10 is the largest when the exposure amount is small, so the S / N when the exposure amount is small was poor. In the present embodiment, since the leakage current iu increases in proportion to the exposure amount, the S / N when the exposure amount is small is greatly improved.

  Further, the conventional leakage current io flows from the second electrode 102 to the first electrode 101 through the side surface of the PIN photodiode 10 as shown in FIG. 1, and the distance between them is the thickness of the semiconductor layer. For example, it is about 1 μm.

  On the other hand, in this embodiment, the distance between the third electrode 103 and the second electrode 102 through which the generated leakage current iu flows can be greatly separated, for example, about 5 to 10 μm, and the resistance value therebetween can be increased. In this way, the maximum value of the leakage current iu can be made smaller than the maximum value of the conventional leakage current io, so that the S / N can be further improved.

  Further, as shown in FIG. 2D, in the present embodiment, the N-type semiconductor layer 3 is separated between the second electrode 102 and the third electrode 103, and only the i-type semiconductor layer 4 is interposed between them. The resistance value is higher than when the N-type semiconductor layer 3 and the P-type semiconductor layer 5 are included. As a result, the maximum value of the leakage current iu can be further reduced, and the S / N can be further improved.

  So far, in this embodiment, the third voltage V3 applied to the third electrode 103 is the same voltage as the second voltage V2 that is the voltage applied to the second electrode 102 in the initialized state. As described above, when the first voltage V1 <the second voltage V2, the same effect can be obtained as long as the third voltage V3 exceeds the first voltage V1. That is, the first voltage V1 <the third voltage V3 may be satisfied. Note that, when the first voltage V1 ≧ the third voltage V3, the PIN photodiode 10 is biased in the forward direction and does not function as a photoelectric conversion element.

  FIG. 3 is an explanatory diagram for explaining the leakage current when the third voltage V3 applied to the third electrode 103 is changed.

  First, the case where the third voltage V3 applied to the third electrode 103 using FIGS. 3A and 3B is lower than the second voltage V2 that is the initial voltage applied to the second electrode 102 is shown. explain. That is, the first voltage V1 <the third voltage V3 <the second voltage V2. Also in this case, the leakage current is flowing from the third electrode 103 to the first electrode 101 does not affect the potential of the second electrode 102 as described with reference to FIG.

  On the other hand, since the leakage current iu is generated by the potential difference between the third electrode 103 and the second electrode 102, the third electrode 103 is in an initialized state where the second electrode 102 is applied with the second voltage V2. (The third voltage V 3) is lower, and the leakage current iu flows from the second electrode 102 to the third electrode 103. The direction of the leakage current iu shown in FIG. 2C is the opposite direction, and in FIG. 3B, it is represented by a negative current value. As the exposure amount increases, the absolute value of the leakage current iu decreases, and when the potential of the second electrode 102 becomes equal to the third voltage V3, the leakage current iu becomes zero. When the exposure amount further increases, the direction of the leakage current iu flows from the third electrode 103 to the second electrode 102.

  Next, the case where the initial voltage applied to the second electrode 102 is higher than the second voltage V2 when the third voltage V3 applied to the third electrode 103 is described with reference to FIGS. To do. That is, the first voltage V1 <the second voltage V2 <the third voltage V3. Also in this case, the leak current is flowing from the third electrode 103 to the first electrode 101 does not affect the potential of the second electrode 102 in the same manner.

  On the other hand, even in the initialization state where the second electrode 102 is applied with the second voltage V2, the third voltage V3 of the third electrode 103 is higher, and the third electrode 103 to the second electrode 102 are higher. A leakage current iu flows through. Furthermore, the leakage current iu increases as the exposure amount increases.

  As described above, the leakage current iu when the exposure amount is 0 is not 0, but the absolute value can be made smaller than that of the conventional leakage current io, so that the S / N is improved as compared with the conventional technique described in FIG. be able to. Further, by setting the third voltage V3 applied to the third electrode 103, the exposure amount at which the leakage current iu becomes 0 can be set. In general, the same voltage as the second voltage V2, which is a voltage given to the second electrode 102 in the initialization state, is set as the third voltage V3, and the leakage current iu when the exposure amount is 0 is preferably set to 0. . Further, when the third voltage V3 and the second voltage V2 are the same voltage, the guard electrode power supply 87 and the reference power supply 20 can be shared. Specifically, when the third voltage V3 is determined, the behavior of the leakage current iu is the distance between the second electrode 102 and the third electrode 103, the i-type semiconductor layer 4 or the i-type semiconductor layer 4 existing between the electrodes. Since it varies depending on the state of the interface between the substrate and the substrate 1, it is preferable to determine by experiment.

  Next, a flat panel detector (hereinafter referred to as FPD) will be described with reference to FIG. 4 as an example of a photoelectric conversion apparatus having the PIN photodiode 11 of the present embodiment.

  FIG. 4 is a circuit diagram illustrating an example of an FPD having the photoelectric conversion apparatus according to the first embodiment.

  The FPD 80 shown in FIG. 4 has PIN type photodiodes 11 of 2 rows × 3 columns as photoelectric conversion elements.

  The FPD 80 is a type classified as an indirect type, and includes a fluorescent plate 200 that converts radiation into visible light, a PIN photodiode 11 that photoelectrically converts visible light on the fluorescent plate 200, and a readout circuit using a switch element 84. The circuit board 95 is formed.

  FIG. 4 shows a circuit of the circuit board 95 and peripheral circuits. In addition, the same number is attached | subjected to the functional element which has the same function as the functional element demonstrated in FIG. 21, and description is abbreviate | omitted.

  The circuit board 95 forms one pixel by one combination of the PIN photodiode 11 and the switch element 84, and has a total of 2 rows × 3 columns of pixels.

  4 is, for example, a TFT (THIN FILM TRANSISTOR), and the source of the switch element 84 is connected to the source lines 93a, 93b, and 93c, and the drain is the second electrode 102 of each PIN photodiode 11 ( To the cathode). The switch element 84 is not particularly limited, and any element having a switch function such as an a-Si TFT, a poly-Si TFT, or an organic transistor can be used.

  The gate of the switch element 84 is connected to the gate lines 85a and 85b. The first electrode 101 (anode) of the PIN photodiode 11 is connected to a bias line 83, the bias line 83 is connected to a bias power supply 82, and a first voltage is applied thereto. In the present embodiment, the first voltage V1 will be described as being set to 0V.

The gate lines 85a and 85b are connected to the output terminals G ₁ and G ₂ of the scanning drive circuit 86, respectively, and the source lines 93a, 93b and 93c are connected to the − input terminal of the OP amplifier 90, respectively. The second voltage V <b> 2 is applied from the reference power supply 20 to the + input terminal of the OP amplifier 90. A capacitor 91 and a switch 92 are connected in parallel between the negative input terminal and the output of the OP amplifier 90 to form a charge sensing amplifier 99.

  The charge sensing amplifier 99 is a known integration circuit. The current flowing into the negative input terminal is integrated by the capacitor 91, and the integrated value of the input current becomes the output voltage. The switch 92 is provided to short-circuit both ends of the capacitor 91 and reset the output voltage of the OP amplifier. In the example of FIG. 4, the reading unit 97 includes three circuits of charge sensing amplifiers 99 including an OP amplifier 90, a capacitor 91, and a switch 92.

  The third electrode 103 is connected to a guard electrode power supply 87, and a third voltage V3 is applied from the guard electrode power supply 87. The third voltage V3 may be a voltage exceeding the first voltage V1, that is, the third voltage V3> the first voltage V1. In this embodiment, the guard electrode power supply 87 and the reference power supply 20 are separately provided. For example, the third voltage V3 is set to the same voltage as the second voltage V2, and the second voltage V2 is supplied from the guard electrode power supply 87. May be applied. In the present embodiment, the third voltage V3 is applied to a line common to all the third electrodes 103. However, the third electrode 103 is divided into blocks, and a plurality of guard electrode power supplies 87 are used. The third voltage V3 may be applied.

The scanning drive circuit 86 is a drive means for the switch element 84. The scanning drive circuit 86 has gate lines 85a and 85b connected to its output terminals G ₁ and G ₂ , and sequentially outputs positive voltages to scan the gate lines 85a and 85b. When a positive voltage is output from the scanning drive circuit 86, the switch element 84 connected to the same gate line is turned on, and the second electrode 102 is connected to the OP amplifier 90 via the source lines 93a, 93b, and 93c. -Connected to the input terminal. Then, the charge accumulated in the PIN photodiode 11 is converted into a voltage by the charge sensing amplifier 99. In the present embodiment, an example in which the charge sensing amplifier 99 is used in the reading unit 97 will be described. However, a circuit that directly reads the voltage of the PIN photodiode 11 may be used.

  The fluorescent plate 200 covers the above-described circuit board and is configured such that visible light generated by the fluorescent plate 200 is incident on the PIN photodiode 11.

  The operation of the above FPD 80 will be described.

  In the initialization mode, the switch 92 is on and the output voltage of the OP amplifier 90 is the same voltage as the second voltage V2. When the scanning drive circuit 86 sets the gate lines 85a and 85b to high, all the switch elements 84 connected to the gate lines are turned on, and the second voltage V2 is applied to the second electrode 102. The switch element 84 is a switching means of the present invention.

  In the photoelectric conversion mode, the scanning drive circuit 86 sets the gate lines 85a and 85b to low and all the switch elements 84 are turned off, and then radiation exposure is started from a radiation irradiation apparatus (not shown). When the radiation is exposed, the fluorescent plate 200 that has been exposed to the radiation emits fluorescence, and the PIN photodiode 11 that has received the fluorescence generates an electron-hole pair therein, and the charged charge is generated. Discharge. Therefore, the charge charged in the PIN photodiode 11 is reduced by the generated electron / hole pair. During this time, all switches 92 are on.

  Following the radiation exposure, a readout scan is performed. During the readout scan, the switch 92 is off. When the scanning drive circuit 86 sequentially outputs a positive voltage to the gate lines 85 a and 85 b and turns on the switch element 84, a charge-voltage converted voltage is output from the OP amplifier 90. The voltage subjected to the charge-voltage conversion corresponds to a charge that disappears from the PIN photodiode 11 by discharge during radiation exposure. In this way, an image of radiation incident on the fluorescent screen 200 is read out two-dimensionally as a voltage.

  Next, a second embodiment will be described.

  FIG. 5 is an explanatory diagram for explaining the configuration of the photoelectric conversion apparatus according to the second embodiment of the present invention.

  FIGS. 5A and 5C are explanatory views for explaining a driving method of the photoelectric conversion device of the second embodiment, and FIG. 5B is a cross-sectional view C of the second electrode 102 and the third electrode 103. It is explanatory drawing explaining -C '.

  First, the structure of the PIN photodiode 12 which is a photoelectric conversion element of this embodiment will be described with reference to FIGS.

  The difference from the PIN photodiode 11 described in FIG. 2 is that the second electrode 102 and the third electrode 103 are formed in the uppermost layer in this embodiment. As shown in FIGS. 5A and 5C, the first electrode 101 is provided on the substrate 1. Between the first electrode 101, the second electrode 102, and the third electrode 103, A photoelectric conversion layer 50 including the N-type semiconductor layer 3, the i-type semiconductor layer 4, and the P-type semiconductor layer 5 is formed.

FIG. 5B is a front view of the cross section CC ′ of FIG. As shown in FIG. 5B, the third electrode 103 is formed on the P-type semiconductor layer 5 so as to surround the second electrode 102. As described above, the P-type semiconductor layer 5 is separated into a portion in contact with the second electrode 102 and a portion in contact with the third electrode 103. That is, the portion in contact with the second electrode 102 and the P-type semiconductor layer 5 in contact with the third electrode 103 are not continuous.
The shape of the third electrode 103 is not limited to the closed shape surrounding the second electrode 102 shown in FIG. 5B, and may be a partially open shape, for example, a U-shape. By making the shape of the third electrode 103 a partly open shape, the wiring to the second electrode 102 on the inner side is formed in the same plane where the third electrode 103 and the second electrode 102 exist. can do. Therefore, it is not necessary to provide a layer for wiring, and the manufacturing efficiency can be improved.

  Next, the photoelectric conversion operation of the PIN photodiode 12 will be described.

  FIG. 5D is an explanatory diagram showing the relationship between the exposure dose and the generated electron / hole pairs, FIG. 5E is an explanatory diagram showing the relationship between the exposure dose and the second electrode potential, and FIG. These are explanatory drawings showing the relationship between the exposure amount and the leakage current.

  A procedure for exposing the PIN photodiode 12 of the second embodiment for a predetermined time and accumulating charges will be described. As shown in FIG. 5A, the positive terminal of the reference power supply 20 is grounded to the ground, and the negative terminal of the reference power supply 20 is connected to the second electrode 102 via the switch 21. Therefore, in the second embodiment, the second voltage V <b> 2 that is a negative voltage is applied to the second electrode 102. On the other hand, since the first electrode 101 is grounded, the first voltage V1 is 0V. The guard electrode power supply 87 applies the third voltage V <b> 3 to the third electrode 103. In the present embodiment, the second voltage V2 <the first voltage V1, the third voltage V3 = the second voltage V2, that is, the second voltage V2 = the third voltage V3 <the first voltage V1. This will be described with reference to FIG.

  In the initialization mode, when the switch 21 is turned on and the second voltage V2 is applied to the second electrode 102, a reverse bias voltage is applied to the PIN photodiode 12.

  In the photoelectric conversion mode, as shown in FIG. 5C, the switch 21 is turned off and exposure is started. The second electrode 102 side is a light receiving surface, and a light beam L indicated by an arrow in FIG. 5C passes through the transparent second electrode 102 and irradiates the P-type semiconductor layer 5. The irradiated light beam L passes through the P-type semiconductor layer 5 and enters the i-type semiconductor layer 4 to generate electron / hole pairs. As shown in FIG. 5D, the electron / hole pairs generated increase as the exposure amount increases. Then, the potential of the second electrode 102 increases as shown in FIG. Accordingly, in the second embodiment, the potential of the second electrode 102 is lowest when the switch 21 is turned on and initialized before exposure, and the voltage increases as the exposure amount increases.

  In the PIN type photodiode 12 of the present embodiment, as shown in FIG. 5C, the leakage current iv flowing from the first electrode 101 to the third electrode 103 and the second electrode 102 to the third electrode 103. A flowing leak current iw is generated.

  Similar to the first embodiment, the third electrode 103 is connected to the reference power supply 20 and is always fixed to the third voltage V3. Therefore, even if the leakage current iv flows, the third electrode 103 is kept at the potential of the second electrode 102. Has no effect.

  On the other hand, since the leak current iw is generated by the potential difference between the third electrode 103 and the second electrode 102, the third voltage 103 and the second electrode 102 having the same voltage by turning on the switch 21. In the initialization state where V3 and the second voltage V2 are applied, the leakage current iw is zero. When exposure is performed with the switch 21 turned off, the voltage of the second electrode 102 rises as shown in FIG. 5E, so that the leakage current iw flowing from the second electrode 102 to the third electrode 103 is as shown in FIG. ) Increases in proportion to the exposure amount as indicated by the solid line. As indicated by a broken line in FIG. 5 (f), the leak current io generated in the conventional PIN photodiode 10 is the largest when the exposure amount is small, so that the S / N when the exposure amount is small is bad. In this embodiment, since the leak current iw is proportional to the exposure amount, the S / N when the exposure amount is small is greatly improved.

  Further, similarly to the first embodiment, the distance between the third electrode 103 and the second electrode 102 can be greatly separated, for example, about 5 to 10 μm, and the resistance value therebetween can be increased. Furthermore, as shown in FIG. 5A, in the present embodiment, the P-type semiconductor layer 5 is separated between the second electrode 102 and the third electrode 103, and the P-type semiconductor layer 5 is also included in the interval. It is a gap, and no leak current flows through the gap. As a result, the maximum value of the leakage current iw can be further reduced, and the S / N can be further improved.

  In the description of FIG. 5, the third voltage V3 applied to the third electrode 103 is the same voltage as the second voltage V2 that is the voltage applied to the second electrode 102 in the initialized state. However, for the same reason as in FIG. 3, when the second voltage V2 <the first voltage V1, the same effect can be obtained if the third voltage V3 is a voltage lower than the first voltage V1. can get. That is, it is sufficient if the third voltage V3 <the first voltage V1. Specifically, when the third voltage V3 is determined, the behavior of the leakage current iw is the distance between the second electrode 102 and the third electrode 103, the P-type semiconductor layer 5 or the i-type semiconductor layer 4 existing between the electrodes. It is preferable to determine by experiment because it changes depending on the condition of the surface and the surface.

  Further, in this embodiment, after all the layers are formed, the second electrode 102, the third electrode 103, and the underlying P-type semiconductor layer 5 are separated by etching, so that the manufacturing is easy.

  Although the case where the photoelectric conversion layer 50 of the photoelectric conversion element is a PIN type photodiode has been described so far, the present invention can also be applied to a PN type or Schottky type photodiode.

  FIG. 6 is an explanatory diagram for explaining the configuration of the photoelectric conversion element according to the third embodiment of the present invention. A PN photodiode 13 according to the third embodiment will be described with reference to FIG. In addition, the same number is attached | subjected to the same component as the component demonstrated in FIG. 5, and description is abbreviate | omitted.

  5 is different from the PIN photodiode 12 described in FIG. 5 in that the photoelectric conversion layer 50 is composed of the N-type semiconductor layer 3 and the P-type semiconductor layer 5 in this embodiment, and the i-type semiconductor layer 4 is not provided. The irradiated light beam L generates electron / hole pairs at the junction between the N-type semiconductor layer 3 and the P-type semiconductor layer 5. The configurations and operations of the second electrode 102 and the third electrode 103 are the same as those described with reference to FIG. 5, and the leakage current increases in proportion to the exposure amount. Therefore, the S / N when the exposure amount is small. Is greatly improved.

  FIG. 7 is an explanatory view illustrating the configuration of the photoelectric conversion element according to the fourth embodiment of the present invention. In addition, the same number is attached | subjected to the same component as the component demonstrated in FIG. 5, and description is abbreviate | omitted.

  FIG. 7 shows a Schottky photodiode 14 in which the photoelectric conversion layer 50 is composed of the i-type semiconductor layer 4 and the P-type semiconductor layer 5, and there is no N-type semiconductor layer 3. Instead, the first electrode 101 has a function similar to that of the N-type semiconductor layer 3. Since the first electrode 101 is made of a metal having a small work function, for example, Al, it passes electrons out of the electron / hole pairs generated in the i-type semiconductor layer 4 and blocks the holes. The holes are directed toward the second electrode 102 by the internal electric field, and the potential of the second electrode 102 rises as shown in FIG.

  The configurations and operations of the second electrode 102 and the third electrode 103 are the same as those described with reference to FIG. 5, and the leakage current increases in proportion to the exposure amount. Therefore, the S / N when the exposure amount is small. Is greatly improved.

  6 and 7, the case where the second electrode 102 and the third electrode 103 are in the uppermost layer has been described. However, the second electrode 102 and the third electrode 103 are formed on the substrate 1 as shown in FIG. The PN-type or Schottky-type photoelectric conversion layer 50 can also be used when formed on the substrate.

  FIG. 8 is an explanatory view illustrating the configuration of the photoelectric conversion element of the fifth embodiment according to the present invention. The photoelectric conversion element of 5th Embodiment is demonstrated using FIG. The basic configuration of the photoelectric conversion element of the fifth embodiment is a MIS (METAL INSULATOR SEMICONDUCTOR) type photoelectric conversion element 15. The MIS type photoelectric conversion element includes, for example, a first electrode 101, an insulating layer 30, an i-type semiconductor layer 4, an N-type semiconductor layer 3, and a first electrode disclosed on Japanese Patent No. 3416351. In this embodiment, a third electrode 103 is provided around the second electrode 102 as shown in FIG. 5B. The photoelectric conversion layer 50 of the present invention includes an insulating layer 30, an i-type semiconductor layer 4, and an N-type semiconductor layer 3.

  The insulating layer 30 is an insulating layer formed of silicon nitride (SiN) or the like that blocks passage of both electrons and holes, and has a thickness of 500 angstroms or more, which is a thickness that prevents electrons and holes from passing through the tunnel effect. Is set. The N-type semiconductor layer 3 is formed of an a-Si n + layer in order to prevent injection of holes from the second electrode 102 side into the i-type semiconductor layer 4.

  Next, the photoelectric conversion operation of the MIS photoelectric conversion element 15 will be described.

  The relationship between the voltages applied to the respective electrodes is the same as in the description of FIG. 5, and will be described below assuming that the third voltage V3 = the second voltage V2.

  A procedure for accumulating charges by exposing the MIS photoelectric conversion element 15 for a predetermined time will be described. The positive terminal of the reference power supply 20 is grounded to the ground, and the negative terminal of the reference power supply 20 is connected to the second electrode 102 via the switch 21. On the other hand, the first electrode 101 is grounded.

  In the initialization mode, the switch 21 is turned on and a negative voltage is applied to the second electrode 102 as the second voltage V2. Then, holes in the i-type semiconductor layer 4 are guided to the second electrode 102 by an electric field, and electrons are injected into the i-type semiconductor layer 4. The switch 21 is turned on to initialize until holes in the i-type semiconductor layer 4 are ejected from the i-type semiconductor layer 4.

  In the photoelectric conversion mode, the switch 21 is turned off to start exposure. The second electrode 102 side is a light receiving surface, and a light beam L indicated by an arrow in FIG. 8 passes through the transparent second electrode 102 and irradiates the N-type semiconductor layer 3. The irradiated light beam L passes through the N-type semiconductor layer 3 and enters the i-type semiconductor layer 4 to generate electron / hole pairs. As described with reference to FIG. 5D, the electron / hole pairs generated increase as the exposure amount increases. The generated holes are guided to the second electrode 102 by the electric field, and the electrons move in the i-type semiconductor layer 4 and move to the interface of the insulating layer 30. However, since it cannot move into the insulating layer 30, it remains in the i-type semiconductor layer 4. Therefore, the potential of the second electrode 102 is lowest when the switch 21 is turned on and reset before exposure as shown in FIG. 5E, and the potential increases as the exposure amount increases.

  Also in the MIS photoelectric conversion element 15 of the present embodiment, the leak current iv flowing from the first electrode 101 to the third electrode 103 shown in FIG. 8 and the second electrode 102 as in the PIN photodiode 12 and the like. A leakage current iw flowing from the first to the third electrode 103 is generated.

  Similar to the second embodiment, since the third electrode 103 is connected to the guard electrode power supply 87 and is always fixed to the third voltage V3, the potential of the second electrode 102 even if the leakage current iv flows. Has no effect.

  Similarly to the second embodiment, since the leakage current iw is generated by the potential difference between the third electrode 103 and the second electrode 102, the switch 21 is turned on and the third electrode 103 and the second electrode 102 are turned on. In the initialization state where the third voltage V3 and the second voltage V2 are applied, the leakage current iw is zero. When exposure is performed with the switch 21 turned off, the voltage of the second electrode 102 rises as shown in FIG. 5E, so that the leakage current iw flowing from the second electrode 102 to the third electrode 103 is as shown in FIG. As shown by the solid line in (f), it increases in proportion to the exposure amount. As indicated by a broken line in FIG. 5 (f), the leak current io generated in the conventional PIN photodiode 10 is the largest when the exposure amount is small, so that the S / N when the exposure amount is small is bad. In this embodiment, since the leakage current iw increases in proportion to the exposure amount, the S / N when the exposure amount is small is greatly improved.

  Next, a configuration example of an FPD having the photoelectric conversion device of the second embodiment will be described with reference to FIG.

  FIG. 9 is a circuit diagram of an FPD 80 'having the photoelectric conversion device of the second embodiment.

  In the circuit described in FIG. 9, the forward direction of the PIN photodiode 12 which is a photoelectric conversion element is connected in the opposite direction to that in FIG. Accordingly, the voltage relationship between the first voltage V1 applied to the first electrode and the second voltage V2 applied to the second electrode at the time of initialization is reversed. That is, the difference is that V2 <V1.

  In addition, the same number is attached | subjected to the functional element which has the same function as the functional element demonstrated in FIG. 4, and description is abbreviate | omitted.

  The circuit board 95 forms one pixel by one combination of the PIN photodiode 12 and the switch element 84, and has a total of 2 rows × 3 columns of pixels.

  The first electrode 101 (cathode) of the PIN photodiode 12 is connected to a bias line 83, the bias line 83 is connected to a bias power source 82, and a first voltage is applied thereto. In the present embodiment, the first voltage V1 will be described as being set to 0V.

  The third electrode 103 is connected to a guard electrode power supply 87, and a third voltage V3 is applied from the guard electrode power supply 87. The third voltage V3 may be a voltage lower than the first voltage V1, that is, the third voltage V3 <the first voltage V1.

  In this embodiment, the guard electrode power supply 87 and the reference power supply 20 are separately provided. For example, the third voltage V3 is set to the same voltage as the second voltage V2, and the second voltage V2 is supplied from the guard electrode power supply 87. May be applied. In the present embodiment, the third voltage V3 is applied to a line common to all the third electrodes 103. However, the third electrode 103 is divided into blocks, and a plurality of guard electrode power supplies 87 are used. The third voltage V3 may be applied.

  The FPD 80 'described above operates in the same manner as the FPD 80 described with reference to FIG.

  In the initialized state, the switch 92 is on and the output voltage of the OP amplifier 90 is the same voltage as the second voltage V2. When the scanning drive circuit 86 sets the gate lines 85a and 85b to high, all the switch elements 84 connected to the gate lines are turned on, and the second voltage V2 is applied to the second electrode 102.

  Next, when the scanning drive circuit 86 turns off the gate lines 85a and 85b, exposure of radiation to the fluorescent screen 200 is started. When the radiation is exposed, the fluorescent plate 200 that has been exposed to the radiation emits fluorescence, and the PIN photodiode 12 that has received the fluorescence generates an electron-hole pair therein, and the charged charge is generated. Discharge. Therefore, the charge charged in the PIN photodiode 12 is reduced by the amount of generated electron / hole pairs. During this time, all switches 92 are on.

  Following the radiation exposure, a readout scan is performed. During the readout scan, the switch 92 is off. When the scanning drive circuit 86 sequentially outputs positive voltages to the gate lines 85 a and 85 b and turns on the switch element 84, a charge-voltage converted voltage is output from the OP amplifier 90. The voltage subjected to the charge-voltage conversion corresponds to a charge that disappears from the PIN photodiode 12 due to discharge during radiation exposure. In this way, an image of radiation incident on the fluorescent screen 200 is read out two-dimensionally as a voltage.

  The photoelectric conversion element used in the circuit of FIG. 9 is not limited to the PIN photodiode 12, but the PN photodiode 13 of the third embodiment, the Schottky photodiode 14 of the fourth embodiment, The MIS photoelectric conversion element 15 of the fifth embodiment can also be applied.

  As described above, according to the present invention, it is possible to provide a photoelectric conversion device and a radiation image capturing device that have improved S / N when the exposure amount is small.

Claims (8)

A photoelectric conversion element including a photoelectric conversion layer composed of a first electrode and a plurality of layers and a second electrode on a substrate,
A bias power supply that constantly applies a first voltage to the first electrode;
A reference power supply for applying a second voltage to the second electrode;
An initialization mode in which the second electrode is initialized by applying a second voltage at which the photoelectric conversion element is reverse-biased, and light incident on the photoelectric conversion layer with the second electrode in a floating state A switching means for switching a photoelectric conversion mode for converting electrons or holes generated by the above-mentioned second electrode into an electric signal,
The photoelectric conversion element includes a third electrode surrounding the second electrode on the same plane as the second electrode, and the photoelectric conversion device further applies a third voltage to the third electrode. And the third voltage is lower than the first voltage when the second voltage is lower than the first voltage, and the second voltage is higher than the first voltage. When the voltage is higher than the first voltage, the photoelectric conversion device is higher than the first voltage. The photoelectric conversion device according to claim 1, wherein the photoelectric conversion layer includes a P-type semiconductor layer and an N-type semiconductor layer. The photoelectric conversion device according to claim 1, wherein the photoelectric conversion layer includes a P-type semiconductor layer, an i-type semiconductor layer, and an N-type semiconductor layer. The photoelectric conversion device according to claim 1, wherein the photoelectric conversion layer includes a P-type semiconductor layer and an i-type semiconductor layer. 2. The photoelectric conversion device according to claim 1, wherein the photoelectric conversion layer includes an insulating layer, an i-type semiconductor layer, and an N-type semiconductor layer. 6. The photoelectric device according to claim 1, wherein at least the second electrode and the layer in contact with the third electrode of the photoelectric conversion layer are not continuous. 7. Conversion device. The photoelectric conversion device according to any one of claims 1 to 6, wherein the third voltage is the same voltage as the second voltage. The photoelectric conversion device according to any one of claims 1 to 7,
And a fluorescent plate provided in the photoelectric conversion device.