JP4831802B2 - Mask with any composite transmission function - Google Patents

Description

【００６１】
で与えられる。ここで、（ｘ₀,ｙ₀）及び（ｘ₀´,ｙ₀´）はマスク平面上の点であり、Ｋ（ｘ₀,ｙ_0,ｘ_i,ｙ_i）はマスクの点とイメージの点の間にある光学系のコヒーレント点応答関数であり、Ｆ（ｘ₀,ｙ₀）はマスクの複合透過関数であり、Ｂ（ｘ₀,ｙ_0, ｘ₀´,ｙ₀´）は2つのマスクの点（ｘ₀,ｙ₀）及び（ｘ₀´,ｙ₀´）の位相コヒーレンス因子である。
【００６２】
k_maxより大きい周波数は光学系を通過することができず、事実上フィルターとして機能する。本発明の好適実施例では、遮断周波数k_maxは概ね、
【００６３】
【数２】

【００６４】
で与えられる。ここでλは入射光の波長である。光学系の遮断周波数を説明するために、光学系の開口数を考慮したモデルを含む種々の他のモデルを用いてもよいことに留意されたい。しかしながら、大部分の場合では式（２）は十分正確な結果を、特に開口数が多い光学系に対して、提供してくれる。
【００６５】
マスク透過関数Ｆ（ｘ_m,ｙ_m）は、k_maxより大きい周波数を含んでいる。これらの周波数が光学系を通過できないので、マスク透過関数はフィルタリングされる。フィルタリング結果は、まず関数Ｆのフーリエ変換をみつける事で得られ、即ち、
【００６６】
【数３】

【００６７】
である。そして、次にＦのフーリエ変換をローパスフィルターの変換関数と掛け合わせる。光学系のフィルタリング効果は、遮断周波数k_maxを伴う理想的なローパスフィルターと近似であると仮定できて、即ち、
【００６８】
【数４】

【００６９】
となる。
上記の操作は、以下の空間領域での相関の計算と等しい。
【００７０】
【数５】

【００７１】
ここで、マスク透過率はメッシュ上のサンプルとして、
【００７２】
【数６】

【００７３】
と与えられる。
【００７４】
エイリアシング問題を回避してマスク透過関数をサンプリングできる最大ステップ値は、
【００７５】
【数７】

【００７６】
で与えられる。したがって、Δ以下のステップ値が上記ステップ４４のマスクパターンのサンプリングに用いられるのが好ましく、上記に説明されたマスクブランクス中の格子間隔としても用いられるのが好ましい。異なるステップ値（及び異なる格子間隔）がｘ方向及びｙ方向に用いられてもよく、それにより光学系がｘ方向及びｙ方向に異なる間の反応を有する。
【００７７】
上記で説明された位相シフトマスクブランクスは、
【００７８】
【数８】

【００７９】
の条件を満たす任意の複合関数Ｆの実装が可能である。
【００８０】
前述の証明は以下のようにして示される。マスクの孔（開口）の大きさはΔに比べて小さいと仮定して、積分（５）は、以下のようにメッシュノード（ｘ_k,ｙ₁）の周囲に間隔付けられた開口A_k1積分の和によって表わされる。
【００８１】
【数９】

【００８２】
この好適実施例では、マスクの孔の大きさがΔの約1／10以下であるときに、マスクの孔がΔに比べて「小さい」としている。
【００８３】
Δに比べて小さい開口が与えられたので、開口では
【００８４】
【数１０】

【００８５】
と仮定することができる。
したがって、
【００８６】
【数１１】

【００８７】
上述の場合には領域A_mnは、|F|=1且つ固定位相であるような3つのサブエリアから成っている。すなわち、
【００８８】
【数１２】

及び
【００８９】
【数１３】

【００９０】
である。
【００９１】
任意の複合関数|F|ｅ^{i φ}が式（１３）の形（|F|=A_mm／２である）で表されることを示すのは容易である。この実施例では、個々のサブエリアの大きさは、式（１２）を用いて以下の2つの式
【００９２】
【数１４】

【００９３】
【数１５】

【００９４】
をA⁽¹⁾ _mn、A⁽²⁾ _mn、及びA⁽³⁾ _mnについて解くことによって決定できる。
【００９５】
単純な孔の形状では、形成される孔の幾何学的形状についての情報を式（１２）、（１４）及び（１５）と結びつけて、それによりこれらの式から上記の大きさの制約に従い、任意の複合透過率を得るために必要な孔の位置を決定する。より複雑な形状の孔については、繰り返すことにより、若しくはルックアックテーブルを用いることで孔の位置を決定することが可能である。
【００９６】
同様に、本発明には２π／３ラジアンの相対的な位相シフトを有するような3種類の位相シフト要素が用いられているが、代わりに任意の数の異なる種類の位相シフト要素を用いてもよい。しかしながら、少なくとも3種類の異なる位相シフト要素が概ね接するような頂点は任意の複合透過率を提供することが必要とされ、3つだけが用いられる場合ならば、それらの3つは、3つのうちのどの1つも他の２つの線形結合で作ることができないという意味で独立であるべきである。もちろん、他の種類の位相シフト要素が代わりに用いる場合、特定の式、特に式（１２）、（１４）及び（１５）を修正しなければならない。しかしながら、本明細書で提供する技術に関しての当業者にはそれらの修正は明らかであろう。特に、孔の大きさがΔと比べて小さいとき、任意の数の異なる種類の位相シフト要素についての式は以下の式
【００９７】
【数１６】

【００９８】
【数１７】

【００９９】
から導かれる。ここでA^(k) _mnは開口と重なるような種類kの位相シフト要素の領域であり、C_kは種類kの位相シフト要素の透過の振幅であり（通常１若しくは１に近い値）、φ_kは種類kの位相シフト要素の位相シフトである。
【０１００】
C．マスク設計システム環境
通常、本明細書に記載の方法またはその一部は、１つのプロセッサまたは複数のプロセッサのいずれかを伴う汎用コンピュータを用いて実行されることになる。一般的には初期パターンはデジタル化された形態で与えられる。次に、エアリアルイメージシミュレーション、振幅と位相の関連付け、及び孔の位置の同定が汎用コンピュータによって実行され、適切なパターンの孔が生成される。次に、生成された孔はマスクの形成に利用される。
【０１０１】
図５は、上記した発明方法を実行するための複数の適切なコンピュータプラットフォームの１つを表すような汎用コンピュータシステムを示す図である。図５は、本発明に基づく汎用コンピュータシステム５５０が、中央処理装置（CPU）１５２、読出し専用記憶素子（ROM）１５４、ランダムアクセスメモリ（RAM）１５６、拡張RAM１５８、入出力（I/O）回路１６０、ディスプレイアセンブリ１６２、入力装置１６４及び拡張バス１６６を有することを示している。コンピュータシステム１５０には、ディスクドライブユニットなどのマスストレージ装置１６８またはフラッシュメモリ及びリアルタイムクロック１７０などの不揮発性記憶をオプションで含めることもできる。
【０１０２】
CPU１５２は、データバス１７２、制御バス１７４及びアドレスバス１７６によってROM１５４に接続されている。ROM１５４は、コンピュータシステム１５０のための基本オペレーティングシステムを有する。CPU１５２はまた、バス１７２、１７４及び１７６によってRAM１５６に接続されている。所望に応じて、拡張RAM１５８は、CPU１５２による使用のためにRAM１５６に接続される。CPU１５２はまた、周辺装置を用いてデータを転送できるようにデータバス１７２、制御バス１７４及びアドレスバス１７６によってI/O回路１６０に接続されている。
【０１０３】
I/O回路１６０には通常、複数のラッチ、レジスタ及びダイレクトメモリアクセス（DMA）コントローラが含まれる。I/O回路１６０の目的は、ディスプレイアセンブリ１６２、入力装置１６４及びマスストレージ装置１６８などの周辺装置とCPU１５２との間にインタフェースを提供することである。
【０１０４】
ディスプレイアセンブリ１６２のためのスクリーンは、様々な製造業者から市販されているタイプの、陰極線管（CRT）、液晶ディスプレイ（LCD）などを用いたデバイスとし得る。入力装置１６４としては、位置検出ディスプレイと協働してスタイラス、キーボード、マウスなどを利用し得る。これらの入力装置は様々な業者から入手可能であり、当分野で公知である。
【０１０５】
通常望ましいと考えられているマスストレージ装置１６８もあるが、ユーザアプリケーションプログラム及びデータを保存するのに十分な量のRAM１５６及び拡張RAM１５８を提供することにより、マスストレージ装置１６８を用いないことも可能である。その場合には、RAM１５６及び１５８に所望に応じてバックアップバッテリを備え付け、コンピュータシステム１５０の電源が落ちてもデータが消失しないようにする。しかし通常は、或る種の長期マスストレージ装置１６８、例えば市販のハードディスクドライブなどのフラッシュメモリや、バッテリ付きRAM、PCデータカードなどの不揮発性記憶を有することが望ましい。
【０１０６】
取外し可能記憶読出し／書込みデバイス１６９をI/O回路１６０に結合して、取外し可能記憶媒体１７１からの読み出し及び同媒体への書き込みを行うことができる。取外し可能記憶媒体１７１の代表的なものは、磁気ディスク、磁気テープ、光磁気ディスク、光学ディスクなどである。一実施例では、そのような取外し可能記憶媒体を経由して発明の方法を実行するための命令をネットワークに提供し得る。
【０１０７】
操作中にコンピュータシステム１５０に情報を入力するには、キーボードで打ち込むか、マウスまたはトラックボールを操作するか、或いはタブレット上またはディスプレイアセンブリ１６２の位置検出位置感知スクリーン上に「書き込む」。その後、オペレーティングシステムの制御下でCPU１５２が、データと、ROM１５４及び／またはRAM１５６に記憶されたアプリケーションプログラムとを処理する。CPU１５２は通常、ディスプレイアセンブリ１６２に出力されるデータを作成し、スクリーンに適切なイメージを生成する。
【０１０８】
拡張バス１６６は、データバス１７２、制御バス１７４及びアドレスバス１７６に接続されている。拡張バス１６６には、ネットワークインタフェース回路、モデム、ディスプレイスイッチ、マイクロホン、スピーカーなどの装置をCPU１５２に接続するための余分なポートが提供される。ネットワーク通信は、ネットワークインタフェース回路及び適切なネットワークにより達成される。
【０１０９】
種々の業者から入手し得る適正なコンピュータを用いて本発明を実行し得る。しかしながら、種々のコンピュータは、サイズ及びタスクの複雑さに応じて用いることができる。適正コンピュータには、メインフレームコンピュータ、マルチプロセッサコンピュータ、ワークステーションまたはパーソナルコンピュータを含む。上記では汎用コンピュータシステムについて説明してきたが、それに加えて、本発明の方法を実行するために専用コンピュータを更に（または代替として）用いることができる。
【０１１０】
本発明はまた、本発明の要求を満たすようなレチクル設計が記憶された機械読み取り可能媒体若しくは、本発明の方法を実行するためのプログラム命令が記憶された機械読取り可能媒体にも関連があることを理解されたい。そのような媒体には、例として磁気ディスク、磁気テープ、CD-ROMなどの光学的に読取り可能な媒体、PCMCIAカードなどの半導体等がある。それぞれの場合において、媒体は、小ディスク、ディスケット、カセットなどの携帯用アイテムの形状を取るか或いはコンピュータに備えられたRAMまたはハードディスクドライブなどの比較的大型または固定アイテムの形状を取り得る。
【０１１１】
Ｄ．結論
本発明はしたがって、あらかじめ準備され、次に単にマスクブランクスの非透過層に適切に孔を形成することによって任意の複合透過機能を提供するように処理され得るマスクブランクスを用いることで、多くの先行技術の問題を克服している。つまり、マスクブランクスパターンは、露光する光の波長や或いは光学系の特性といった、製造される個々のチップとは無関係な要因だけに依存する。したがって、マスクブランクスは、多数の異なるASICに対してあらかじめ設計及び製造をすることが可能である。マスクブランクスのカスタマイズに関係があるのは単に非透過層のエッチング部分だけなので、通常の2進振幅マスク（binary amplitude mask）に対してマスクブランクスをカスタマイズすることとさほど変わらない。結果として、本発明はASICを製造するために実用的な位相シフトマスクを作製し得る。さらに、本発明にしたがった位相シフトマスクは、ただ2つだけの（即ち、既に存在する0位相のシフト基盤上への）付加的な位相シフト要素の形態を必要とするだけで任意の複素透過機能を有することができる。上述したように、従来の位相シフトマスクの大部分では、可能な位相シフトの数はマスク上に形成されたシフト位相要素の数で概ね制限されている。
【０１１２】
本発明について典型的実施例及びその図面に関連して詳細に説明してきたが、本発明の精神及び特許請求の範囲から逸脱することなく本発明の種々の適合及び改変を達成し得ることは当業者に明らかである。従って上記本発明は、図示及び上記詳細説明した詳細実施例に限定されるものではない。従って、そのような全ての改変は本発明の精神から逸脱しない限り、本明細書中の請求項のみで制限されるような特許請求の範囲内にあると考えられる。
【０１１３】
特許請求の範囲において、「ミーンズ（means for）」の語を含まないものは、35USC（米国特許法）１１２条第６パラグラフに基づくミーンズとは解釈しないでいただきたい。
【図面の簡単な説明】
【図１】 図１は、ＩＣチップのパターニングを示す機能ブロックダイアグラムである。
【図２】 図２は、本発明の代表的な好適実施例にしたがって、どのようにしてマスクのサンプル値が概ね決定されるかを説明するフローダイアグラムである。
【図３Ａ】 図３Ａは、本発明の好適実施例で用いられているマスクブランクスの断面図を示している。
【図３Ｂ】 図３Ｂは、本発明の好適実施例で用いられているマスクブランクスの透過層の図を示している。
【図４】 図４は、本発明の好適実施例にしたがって、図３Ｂで示されたマスクブランクスを、所望の複合透過機能を達成するために処理した後の図を示している。
【図５】 図５は、本発明の方法を実行するための適正なプラットフォームの１つである汎用コンピュータのブロックダイアグラムを図示している。[0001]
(Technical field)
The present application relates to semiconductor wafer manufacturing, and more particularly to masks with any composite transmission function used in patterning integrated circuit (IC) chips during semiconductor wafer manufacturing.
[0002]
(Background of the Invention)
A.Wafer manufacturing
Photolithography is a common technique used in the manufacture of semiconductor devices. Usually, a semiconductor wafer is coated with a layer (film) of a photosensitive material such as a photoresist. Using a patterned mask or reticle, the wafer is exposed to projection light. The light is usually actinic light, which reveals the photochemical effect on the photoresist. Subsequently, the photoresist is chemically etched, leaving a pattern of photoresist “lines” on the wafer corresponding to the pattern on the mask.
[0003]
A “wafer” is a thin piece of semiconductor material from which semiconductor chips are manufactured. In order to manufacture a wafer, four basic operations are performed: (1) film formation, (2) patterning, (3) doping, and (4) heat treatment.
[0004]
In the film forming operation, a thin layer of a material such as an insulator, a semiconductor, and a conductor is added to the wafer surface. During the film-forming operation, either the layer is grown or deposited. Oxidation is involved in the growth of the silicon dioxide (insulator) layer on the silicon wafer. Examples of deposition techniques include chemical vapor deposition, vacuum vapor deposition, and sputtering. Semiconductor deposition is usually performed by chemical vapor deposition, and conductor deposition is usually performed by vacuum deposition or sputtering.
[0005]
Patterning involves the removal of selected portions of the surface layer. After removing the material, a pattern is formed on the wafer surface. The removed material can form holes or islands. Patterning processes are also known to those skilled in the art such as microlithography, photolithography, photomasking and masking. The patterning operation helps to manufacture the semiconductor device parts on the wafer surface with the dimensions required by the circuit design and place them in place on the wafer surface.
[0006]
Doping involves implanting dopant from the layer openings into the surface of the wafer to create the n-type and p-type pockets necessary to form NP junctions for operating individual devices such as transistors and diodes. . Doping is typically accomplished by thermal diffusion (heating the wafer to expose the desired dopant) and ion implantation (ionizing dopant atoms, accelerating at a high rate and implanting them on the wafer surface).
[0007]
In the field of semiconductor manufacturing, it is well known to manufacture semiconductor wafers having these steps. For an example of the wafer manufacturing process, see US Patent No. 5,679,598 "Method of Making a CMOS Dynamic Random-Access Memory (DRAM)" granted to Yee on October 21, 1997, Rostoker on September 2, 1997. US Patent No. 5,663,076 "Automating Photolithography in the Fabrication of Integrated Circuits", US Patent No. 5,595,861 granted to Garza on January 21, 1997 "Method of Selecting and Applying a Top Antireflective Coating" of a Partially Fluorinated Compound ", US Patent No. 5,444,265 granted to Hamilton on August 22, 1995" Method and Apparatus for Detecting Defective Semiconductor Wafers During Fabrication Thereof ", granted to Pasch et al. on March 24, 1987 U.S. Pat. No. 4,652,134, “Mask Alignment System”. The specifications of the five patents cited in this chapter are incorporated herein by reference in their entirety.
[0008]
B.Patterning and proximity effects
Patterning, one of the most important tasks in wafer manufacturing, sets the dimensions of electronic devices for mounting on IC chips. Errors in the patterning process can cause distortions that change the function of the electronic device.
[0009]
Design rule limits are often referred to as critical dimensions. The critical dimension of a circuit is usually defined as the minimum width of a line or the minimum distance between two lines. As a result, critical dimensions determine the overall dimensions and density of the IC. In the current IC technology, the minimum critical dimensions of the latest circuit are line width and line spacing of 0.3 μm.
[0010]
Once the circuit layout has been created, the next step in manufacturing the integrated circuit is to transfer the layout to the semiconductor substrate. Photolithography is a known process that transfers the geometry present on a mask to the surface of a silicon wafer. In the field of IC lithography processing, a photosensitive polymer film called a photoresist is usually applied to a silicon substrate wafer and dried. An exposure tool is used to expose a wafer with a unique geometric pattern through a mask (also referred to as a reticle) with a source of light or radiation. After the exposure, the wafer is processed, and the mask image transferred to the photosensitive material is developed. Next, a device function of the circuit is created using this masking pattern.
[0011]
An important limiting characteristic of an exposure tool is its resolution value. The resolution for an exposure tool is defined as the minimum function that can repeatedly expose the exposure tool to the wafer. Currently, the resolution for the highest exposure tool is about 0.2 μm. Therefore, the resolution value of the lithographic apparatus is close to the critical dimension for most IC circuit designs. As a result, the resolution of the exposure tool can affect the final size and density of the IC circuit. As the critical dimension of the layout decreases and approaches the resolution value of the lithographic apparatus, the degree of coincidence between the actual layout pattern developed in the photoresist and the mask pattern is significantly reduced. In particular, it is recognized that the difference in pattern development of circuit patterns is due to the proximity of the patterns.
[0012]
The magnitude of such a proximity effect depends on the proximity or proximity of two patterns present in the masking pattern. Proximity effects are known to result from optical diffraction in the projection system. Optical diffraction causes adjacent patterns to interact with each other in such a manner, resulting in pattern-dependent changes.
[0013]
Regarding the proximity effect and a method for correcting the proximity effect, US Patent No. 5,682,323 "System and Method for Performing Optical Proximity Correction on Macrocell Libraries" (hereinafter referred to as "Pasch'323 patent") granted to Pasch et al. "). The specification of the Pasch '323 patent is hereby incorporated by reference in its entirety. The system and method described in the Pasch '323 patent performs optical proximity correction on an integrated circuit mask design by first performing optical proximity correction on a library of cells used in IC fabrication. Then, the cell for which the preliminary test has been performed is taken into the mask design. All cells are spaced apart by a minimum distance so that no proximity effect occurs between elements fully integrated in different cells. By performing proximity effect correction only on components (for example, lines) that are not completely incorporated in one cell, optical proximity effect correction is performed by mask design.
[0014]
A description of the proximity effect and a method for correcting it is described in US Pat. No. 5,705,301 “Performing Optical Proximity Correction with the Aid of Design Rule Checkers” (hereinafter “Garza”) issued to Garza et al. Also called the '301 patent'). The specification of the Garza '301 patent is incorporated herein by reference in its entirety. The system described in the Garza '301 patent includes a method for identifying an area of an integrated circuit layout design where optical proximity correction is most useful and exhibiting optical proximity correction only in this area.
[0015]
More specifically, such a method includes: (a) analyzing an integrated circuit layout design using a design rule checker, and placing an integrated circuit layout design pattern that conforms to a predetermined standard; b) performing optical proximity effect correction in a pattern that meets the criteria for reticle design. The criteria used by the design rule checker to select a pattern include the outer angle of the pattern, the inner angle of the pattern, the pattern size, the pattern shape, and the pattern angle.
[0016]
C.Proximity effect correction
Techniques related to proximity effects include the use of modified shapes or adjacent subresolution geometries to improve imaging. An example is the use of serifs at the contact corners. When touching at a dimension close to the optical resolution limit, the square pattern on the reticle will be printed as a more nearly circular shape. The additional geometry at the corners will help to square the corners of the contacts. Such a technique is often referred to as proximity effect correction. An example of such a technique is described in US patent application Ser. No. 09 / 034,550, filed Mar. 3, 1998, entitled “Method And Apparatus For Application Of Proximity Correction With Relative Segmentation”. The entire text is incorporated herein by reference.
[0017]
The proximity effect is a well-known phenomenon in electron beam lithography, and is caused by electron scattering. In optical lithography, proximity effects are caused by diffraction phenomena. As a result of the proximity effect, the relationship between the printed pattern and the reticle dimensions is not exactly the same. For this reason, it is difficult to manufacture a photomask that can provide a wafer desired by a designer.
[0018]
Certain proximity correction techniques have been used for at least 20-30 years. Such pattern correction is usually performed by a wafer engineer based on knowledge of specific process steps. In recent years, proximity effect correction has become even more scientific with the introduction of several proximity effect correction software programs. The proximity effect correction process includes measuring several common test patterns processed on the wafer and building a multi-level lookup table from the measured data.
[0019]
D.Phase shift mask
The concept of phase shift mask was first introduced by Levenson in 1982. See “Improving Resolution in Photolithography with a Phase Shift Mask” on page 1828 of 1982 IEEE Trans. Elec. Dev. ED26 by M.D. Levenson, N.S. Visnwathan, and R.A. Simpson. The entire text is incorporated herein by reference. Phase shifts can often significantly improve resolution by using destructive interference (rather than constructive interference) at the bottom of the near-field diffraction distribution on the mask.
[0020]
Various techniques have been proposed for manufacturing phase shift masks. These prior art techniques are usually implemented in one of two ways. One applies a layer of phase shift material to the mask and then etches to produce the desired phase shift. The other etches the quartz mask itself to a depth sufficient to produce the desired phase shift.
[0021]
The unique technique first proposed by Levenson is used for masks with diffraction gratings. Every other diffraction grating aperture is coated with a phase-shifting material. The thickness and refractive index of the phase shift material are sufficient to allow the incident light to shift exactly 180 degrees relative to the light that does not pass through the phase shift material. Although this technique can work well for simple structures such as diffraction gratings, it generally does not produce optimal results for more complex patterns.
[0022]
In another technique, called rim phase shifting, which has been proposed to achieve phase shifting, the phase shifting is performed only near the edges of the mask pattern. This technique also generally does not produce optimal results and may be difficult to implement.
[0023]
In general, with a normal phase shift mask, (1) it is difficult to mount on a substrate for a specific application, and / or (2) no significant improvement in resolution is obtained in all cases. These drawbacks are that it is difficult to produce a unique phase shift pattern for each order on each separate IC chip and the number of different phase shifts that can actually be implemented on the mask. Is mainly due to the limitations.
[0024]
In this regard, most conventional techniques, which typically require patterning and subsequent etching of the mask for each desired phase shift, result in different phase shifts that are actually implemented. The number is limited to one or two. In addition, since patterning and etching typically must be customized for each different type of chip being manufactured, the use of a phase shift mask is limited to large-scale manufactured chips such as DRAM manufacturing. . To date, the use of phase shift masks for the manufacture of application specific ICs (ASICs) has been very impractical.
[0025]
(Summary of Invention)
The present invention provides such a mask having a grating defined by the point where three different phase shift elements contact, or such a mask having a grating of holes in which three different types of phase shift elements can overlap. To deal with the above problem.
[0026]
That is, in one embodiment, the present invention is a mask having a composite transmission function and including a transmission layer and a non-transmission layer. The transmission layer has three types of phase shift elements, and each phase shift element is alternately arranged in both the x and y directions, and each gives a different phase shift relative to the other. The non-transmissive layer has a plurality of holes that are arranged in a substantially evenly spaced grating pattern defined by a common point at the boundaries of the phase shift elements. As a characteristic of this embodiment of the invention, the centers of at least two holes of the non-transmissive layer have different offsets from their corresponding common points.
[0027]
In another embodiment, the present invention is a mask having a composite transmissive function and including a transmissive layer and a non-transmissive layer. The transmission layer has three types of phase shift elements arranged such that points common to all three types of boundaries form regularly spaced gratings. The non-transmissive layer has pores that coincide with the points on the lattice. A characteristic of this embodiment of the invention is that each type of phase shift element imparts a different phase shift relative to the other, and the center of the hole in the transmission layer has a different offset from the point on the grating. ing.
[0028]
In yet another embodiment, the present invention is a mask having a composite transmissive function and including a transmissive layer and a non-transmissive layer. The transmission layer has three types of phase shift elements, each imparting a different phase shift relative to the others. The non-transmissive layer has a plurality of holes arranged in a lattice pattern with substantially uniform spacing. As a characteristic of this embodiment of the present invention, the sizes of the holes are substantially the same, and the three types of phase shift elements overlap in different combinations.
[0029]
In yet another embodiment, a mask blank including a transmissive layer and a non-transmissive layer. The transmission layer has three types of phase shift elements arranged so that the points common to all three types of boundaries form a regularly spaced grating, and each type of phase shift element is relative to the other. A relatively different phase shift is applied.
[0030]
Thanks to the arrangement described above, it is possible to obtain roughly any composite transmittance at each point of regularly spaced grid points by simply changing the position of the holes relative to the grid points. As a result, any composite transmission function can generally be obtained in a fairly simple manner.
[0031]
The present invention also addresses conventional problems by providing mask blanks with three different phase shift elements that are alternately arranged in both the x and y directions.
[0032]
That is, in yet another embodiment, the present invention is a mask blank including a transmissive layer and a non-transmissive layer. The transmission layer has three types of phase shift elements, and each phase shift element is alternately arranged in both the x and y directions, and each gives a different phase shift relative to the other.
[0033]
By interleaving three different phase shift elements in this manner, the present invention generally provides mask blanks that often facilitate processing such as forming suitable holes in the non-transmissive layer. Thereby providing an optional composite transmission function. Furthermore, mask blanks according to the present invention may be used to make masks with a composite transmission function for use in patterning ASICs that are arbitrarily specified for use.
[0034]
The present invention also addresses the problems of the prior art by providing a technique for determining the location of holes in a mask blank that produces the desired composite transmission function.
[0035]
That is, in yet another embodiment, the present invention is directed to the manufacture of a mask having a composite transmission function. A mask blank having a transmissive layer having three kinds of phase shift elements each imparting a relatively different phase shift to the other and a non-transmissive layer is obtained. Next, a plurality of holes are formed in the non-transmissive layer, thereby adjusting the amount of holes overlapping each type of phase shift element to synthesize the desired composite transmittance for each hole. .
[0036]
In yet another embodiment, the mask design is directed to have at least three types of phase shift elements to implement the desired composite transmission function. A sample value of the desired composite transmission function is obtained. Next, the positions where holes are formed in the layer of the mask are identified, so that for each hole, each type of phase shift element is combined to synthesize one of the sample values that match the hole. Adjust the amount of overlapping holes.
[0037]
In general, the techniques described above can be applied with respect to the processing of mask blanks to produce masks having any composite transmission function. In addition, since such a process only requires forming a hole at the identified location, such a process creates a simple binary mask (ie, zero phase and amplitude 0 or 1). It is generally less complicated than the processing required by conventional techniques.
[0038]
The above summary merely provides a general understanding of the nature of the invention. A more complete understanding of the invention can be obtained by reference to the claims and the preferred embodiments described in detail below in connection with the accompanying drawings.
[0039]
(Best Mode for Carrying Out the Invention)
FIG. 1 illustrates a functional block diagram of a system for patterning an IC chip 26 using a mask 22 manufactured in accordance with the present invention. Referring to FIG. 1, light 21 is incident on mask 22 at an appropriate angle. This is an example in which a single point light source is directly above the mask 22 and is sufficiently away from the mask 22 so that the wavefront is generally planar with the mask 22. However, it should be noted that the light 21 is drawn in this way for illustrative purposes only. Typically, the light source is a wide range of objects consisting of many different points, so that light typically illuminates the mask 22 at many different angles.
[0040]
The mask 22 includes a transmissive portion and a non-transmissive portion that effectively transmit and block the light 21 in order to generate a desired pattern on the IC chip 26. In accordance with the present invention, the transmission portion of the mask 22 includes holes that overlap several different types of phase shift elements, and the net effect is that each of the holes provides an arbitrary transmission amplitude and phase. By processing these composite transmittances, it is possible to finely adjust destructive interference between diffraction distributions from adjacent mask patterns.
[0041]
The light 23 extending from the mask 22 passes through the optical system 24 and finally comes into contact with the IC chip 26, thereby forming a desired pattern. In the preferred embodiment of the present invention, optical system 24 simply has a distance between mask 22 and IC chip 26; however, in another embodiment, optical system 24 includes one or more lenses. , Mirrors, and / or other optical elements.
[0042]
A.Mask design
In the following, an overview of a design technique for a mask with an arbitrary composite transmission function according to a preferred embodiment of the present invention will be described in connection with the flow diagram shown in FIG. Briefly, the initial mask pattern is synthesized according to FIG. 2; the initial mask pattern is sampled; the aerial image produced by the mask is simulated; if the image is within an acceptable range, the sample mask pattern Process mask blanks to generate a mask according to: otherwise modify the amplitude and phase of the mask sample values and simulate a new aerial image based on the modified values.
[0043]
More specifically, an initial mask pattern is synthesized at step 42. Preferably, these initial mask patterns have a zero phase, an amplitude of 1 at which the pattern is assumed to appear on the chip, and an amplitude of 0 at which the pattern does not appear on the chip. However, this initial mask pattern may be specified by another method. In particular, the initial values may include serifs and / or predetermined phase shift values depending on the particular pattern to be generated.
[0044]
In step 44, the initial mask pattern is sampled. It is preferable to sample at equal intervals in the x and y directions. The sampling rate is preferably a value sufficient to avoid aliasing problems. In this regard, it should be noted that the optics used between mask 22 and IC chip 26 generally limit the spatial frequency components imaged on the surface of the IC chip. That is, the optical system 24 acts as a low-pass filter. Therefore, any aliasing problem can be avoided by utilizing a sufficient sampling rate in combination with the low pass filter effect of the optical system 24. Quantitative considerations for selecting a sufficient sampling rate in the preferred embodiment of the present invention are described in more detail in Section B below.
[0045]
In step 46, an aerial image produced by a mask having mask sample values is simulated. For example, aerial images are fully incorporated herein by reference, a US patent application entitled “Hybrid Aerial Image Simulation” by Marina Medvedeva, Ranko Scepanovic, and Dusan Petranovic, filed on the same date as this application. You may simulate using the technique described in the description as part of the specification. Alternatively, this step may be performed using any conventional technique for simulating aerial images. In particular, an aerial image is obtained by processing a mask sample value according to a low pass filter function defined by equation (4) below, and then simulating the aerial image of the resist surface using equation (1). It becomes possible to simulate.
[0046]
In step 48, it is determined whether the simulated image is within an acceptable range. Whether the simulated image has sufficient resolution to allow patterning and error-free device fabrication is preferably the primary criterion in making the decision. If the image is within an acceptable range, processing proceeds to step 50 to design and manufacture a mask having the identified composite transmittance. Otherwise, the process proceeds to step 52.
[0047]
In step 52, the amplitude and phase of the mask sample values are modified, and after the modification is complete, the process returns to step 46 to simulate an aerial image based on the modified mask sample values. In step 52, various techniques may be used to modify the mask sample values, the goal being to improve the resolution of the image produced on the IC chip 26 by fine adjustment of the destructive interference between the diffraction distributions.
[0048]
In step 50, the mask blanks are processed to generate a mask having the composite transmission sample value of the mask identified in the previous step. In this preferred embodiment, this step begins with a mask blank 60 as shown in FIGS. 3A and 3B. FIG. 3A illustrates a cross-section of a mask blank 60 according to a preferred embodiment of the present invention. As shown in FIG. 3A, the mask blank 60 includes a transmissive layer 61 and a non-transmissive layer 62. The transmissive layer 61 preferably has a material such as quartz, but other types of materials such as a film formed on the non-transmissive layer 62 may be used. The non-transmissive layer 62 preferably has a material such as chromium. The main mask pattern (ie, hole) is finally formed in the non-transmissive layer 62.
[0049]
In the preferred embodiment of the present invention, the transmission layer 61 of the mask blank 60 includes three different phase shift elements. These phase shift elements are shown in FIG. 3B as phase shift types 71, 72 and 73. In the preferred embodiment of the invention, each of the three different types of phase shift elements also causes a phase shift of 2π / 3 radians from another type of phase shift element. In addition, one type of phase shift element has a phase shift of 0 (no phase shift), another type of phase shift element produces a phase shift of 2π / 3 radians, and the last type of phase shift element is It is preferable to produce a phase shift of -2π / 3 radians. Therefore, in this embodiment, the phase shift of the type 71 phase shift element is 0, the type 72 phase shift element produces a phase shift of 2π / 3, and the type 73 phase shift element of −2π / 3. Produce.
[0050]
Further, as shown in FIG. 4, three different types of phase shift elements touch each other at a point 75. In the preferred embodiment of the present invention, points 75 form a regularly spaced grid that matches the mask sample locations identified in step 44 above. That is, it is preferable that the distance between the points 75 in the x and y directions is determined based on the cutoff frequency of the optical system 24 to be used. In the preferred embodiment of the present invention, the optical system 24 has the same response in both the x and y directions. Therefore, the spacing between the points 75 is the same in both the x and y directions. In order to cope with this interval pattern, the phase shift elements 71 to 73 are formed in a rectangular shape, and the length of each of the phase shift elements 71 to 73 is twice the width. For the same reason, the phase shift elements 71 to 73 are arranged in a row, and three types of phase shift elements are arranged to repeat 123 patterns in each row (ie 71, 72, 73, 71, 72, 73, ...). Further, the adjacent columns are offset from each other (in the x direction) by 1.5 times the length of the phase shift elements 71-73.
[0051]
Although the preferred embodiment of the present invention uses a particular phase shift element structure in the mask blank, it should be understood that other configurations are possible. However, at least three different types of phase shift elements meet at a number of common points, each type of phase shift element provides a different phase shift, and regularly spaced grids are placed at the common points at appropriate sampling rates. Is preferred. As will be described in more detail below, such an arrangement allows the mask designer to simply place a hole (or opening) appropriately at point 75 to provide any composite transmittance at each of the points 75. It can be implemented. However, using different numbers of different types of phase shift elements in the mask blank (though less than 3 may limit the range of achievable composite transmission) and / or phase shift elements It should be understood that other arrangements and / or other geometric structures may be used.
[0052]
Techniques for manufacturing the phase shifts 71-73 on the mask blank 70 are well known in the art. In one example of such a technique, first of all the phase shift elements 72 and 73 described above using either an electron beam mask writer or a laser mask writer for writing a pattern in the resist on the transmission layer 61. According to the arrangement, the transmissive layer 61 is patterned. Next, the pattern is developed on the resist layer, and the transmission layer 61 is etched to a depth sufficient to cause a phase shift of 2π / 3. After etching, the resist is removed and a new layer of resist is deposited. Next, the patterning, development, and etching processes described above are repeated only for the arrangement pattern of the shift phase element 73. Thus, after processing is complete, no Type 71 phase shift element is etched at all, and therefore the phase shift is zero; Type 72 phase shift element is etched only once, thus resulting in a 2π / 3 phase shift. The type 73 phase shift is etched twice, thus producing a phase shift of 4π / 3 (−2π / 3).
[0053]
As described above, when the mask blank 60 is used, an arbitrary composite transmittance can be mounted on each of the points 75. That is, a hole (or opening) is formed at the position of the non-transmissive layer 62 that coincides with the point 75. With reference to FIG. 4B, it can be readily seen that the hole overlaps all three types of phase shift elements 71-73 if the hole is precisely placed on the center of one of the points 75. In the particular embodiment shown in FIG. 4B, assuming a symmetric hole, 50% of the hole area overlaps with one type of phase shift element, and 25% of the hole area each represents the other. The type corresponding to 50% depends on the arrangement of the points 75. As will be readily appreciated, shifting the position of the hole up / down / left / right changes the relative contributions of the different types of phase shift elements, thus changing the amplitude and phase of the composite transmittance. As shown below, any composite transmittance can be produced by this method by utilizing the type of phase shift element used in this embodiment of the invention.
[0054]
Of the formula that can be used to arrange the holes to produce any composite transmittance
Derivation is described in Section B below. Depending on the specific geometry of the hole used, obtain a closed-form solution for the hole, where the relative x and y positions are a function of the desired composite transmittance It is possible. However, for more complex geometric holes, it is necessary to repeatedly determine the relative x and y positions. Alternatively, the relative x and y positions may be pre-stored in a look-up table for various desired composite transmittances.
[0055]
In a preferred embodiment of the present invention, the holes are generally square in shape and have a side length that is about 1/10 of the spacing between the holes, and as described above, the optical system Preferably based on the filtering characteristics of The holes may have any shape, but are preferably about 1/10 or less of the distance between the holes. Further, the size of the holes is preferably about 1/10 to about 1/20 of the interval between the holes.
[0056]
Methods for forming such holes are well known in the art. In one example, the non-transmissive layer 62 is first patterned using either an electron beam mask writer or a laser mask writer for writing a pattern to the resist on the non-transmissive layer 62 according to the desired hole arrangement. Next, the pattern is developed on the resist, and the transmission layer 61 is etched in order to actually form holes according to the development pattern.
[0057]
FIG. 4 illustrates the mask blank 60 after it has been processed to implement any composite transmittance on the grid defined by points 75. As shown in FIG. 4, the individual holes are arranged differently with respect to the corresponding lattice points 75. For example, the hole 91 is arranged at the center of the corresponding lattice point 75. Thus, 50% of the area of the hole 91 is located on the Type 71 phase shift element, 25% on the Type 72 phase shift element, and 25% on the Type 73 phase shift element. The hole 92 is arranged so that the majority of its area is on the type 72 phase shift element and only a small portion is on the type 71 and 73 phase shifts. The holes 93 are positioned so that 50% of their area is located on the Type 71 phase shift element and 50% on the Type 72 phase shift element.
[0058]
Usually, at least two holes have different offsets from their respective grid points 75. However, a mask according to the present invention may have a minimum number of holes of 5, 10, 20, 50 or even 100 with different offsets from the respective grid points 75.
[0059]
B.Mask design formulas and theoretical support
This section formulates and explains some theoretical support for the above devices and techniques. Intensity with uniform mask I₀Assuming that it is irradiated with a monochromatic radiation of_i, y_iThe strength at
[0060]
[Expression 1]

[0061]
Given in. Where (x₀, y₀) And (x₀', Y₀′) Is a point on the mask plane, and K (x₀, y_0,x_i, y_i) Is a coherent point response function of the optical system between the mask point and the image point, and F (x₀, y₀) Is the composite transmission function of the mask, B (x₀, y_0, x₀', Y₀') Is the two mask points (x₀, y₀) And (x₀', Y₀′) Is a phase coherence factor.
[0062]
k_maxLarger frequencies cannot pass through the optical system and effectively function as a filter. In the preferred embodiment of the present invention, the cutoff frequency k_maxIs generally
[0063]
[Expression 2]

[0064]
Given in. Here, λ is the wavelength of incident light. It should be noted that various other models may be used to describe the cutoff frequency of the optical system, including models that take into account the numerical aperture of the optical system. However, in most cases, equation (2) provides a sufficiently accurate result, especially for optical systems with a large numerical aperture.
[0065]
Mask transmission function F (x_m, y_m) K_maxContains larger frequencies. Since these frequencies cannot pass through the optics, the mask transmission function is filtered. The filtering result is obtained by first finding the Fourier transform of the function F, ie
[0066]
[Equation 3]

[0067]
It is. Then, the Fourier transform of F is multiplied with the conversion function of the low-pass filter. The filtering effect of the optical system is the cutoff frequency k_maxCan be assumed to be an approximation to an ideal low-pass filter with
[0068]
[Expression 4]

[0069]
It becomes.
The above operation is equivalent to the calculation of the correlation in the following spatial domain.
[0070]
[Equation 5]

[0071]
Here, the mask transmittance is a sample on the mesh,
[0072]
[Formula 6]

[0073]
And given.
[0074]
The maximum step value that can sample the mask transmission function while avoiding aliasing problems is
[0075]
[Expression 7]

[0076]
Given in. Accordingly, a step value equal to or less than Δ is preferably used for sampling of the mask pattern in step 44, and is also preferably used as a lattice interval in the mask blank described above. Different step values (and different grating spacings) may be used in the x and y directions, so that the optical system has a reaction between different in the x and y directions.
[0077]
The phase shift mask blanks described above are
[0078]
[Equation 8]

[0079]
It is possible to implement an arbitrary composite function F that satisfies the above condition.
[0080]
The above proof is shown as follows. Assuming that the size of the mask hole (opening) is small compared to Δ, the integral (5) is:_k, y₁) Openings A spaced around_k1It is represented by the sum of integrals.
[0081]
[Equation 9]

[0082]
In this preferred embodiment, the mask hole is “smaller” than Δ when the size of the mask hole is about 1/10 or less of Δ.
[0083]
Since an aperture smaller than Δ was given,
[0084]
[Expression 10]

[0085]
Can be assumed.
Therefore,
[0086]
[Expression 11]

[0087]
Region A in the above case_mnConsists of three subareas with | F | = 1 and fixed phase. That is,
[0088]
[Expression 12]

as well as
[0089]
[Formula 13]

[0090]
It is.
[0091]
Arbitrary composite function | F | e^{i φ}Is the form of equation (13) (| F | = A_mmIt is easy to show that it is represented by / 2. In this embodiment, the size of each sub-area is expressed by the following two equations using equation (12).
[0092]
[Expression 14]

[0093]
[Expression 15]

[0094]
A⁽¹⁾ _mn, A⁽²⁾ _mnAnd A⁽³⁾ _mnCan be determined by solving for
[0095]
For simple hole shapes, the information about the geometry of the holes formed is combined with equations (12), (14) and (15) so that these equations are subject to the above size constraints, Determine the location of the holes needed to obtain any composite transmittance. For more complex holes, it is possible to determine the position of the hole by repeating or using a look-up table.
[0096]
Similarly, the present invention employs three types of phase shift elements having a relative phase shift of 2π / 3 radians, but any number of different types of phase shift elements may be used instead. Good. However, vertices where at least three different phase shift elements are generally in contact are required to provide arbitrary composite transmission, and if only three are used, then three of them are Should be independent in the sense that no one of them can be made with the other two linear combinations. Of course, if other types of phase shift elements are used instead, certain equations, in particular equations (12), (14) and (15) must be modified. However, those modifications will be apparent to those skilled in the art with respect to the techniques provided herein. In particular, when the hole size is small compared to Δ, the equation for any number of different types of phase shift elements is:
[0097]
[Expression 16]

[0098]
[Expression 17]

[0099]
Derived from. Where A^(k) _mnIs the region of type k phase shift element that overlaps the aperture, and C_kIs the amplitude of transmission through a phase-shift element of type k (usually 1 or a value close to 1), φ_kIs the phase shift of a type k phase shift element.
[0100]
C.Mask design system environment
Generally, the methods described herein, or portions thereof, will be performed using a general purpose computer with either one processor or multiple processors. Generally, the initial pattern is given in digitized form. Next, aerial image simulation, amplitude and phase correlation, and hole location identification are performed by a general purpose computer to generate an appropriately patterned hole. The generated holes are then used to form a mask.
[0101]
FIG. 5 is a diagram illustrating a general purpose computer system representing one of a plurality of suitable computer platforms for performing the inventive method described above. FIG. 5 shows that a general-purpose computer system 550 according to the present invention includes a central processing unit (CPU) 152, a read-only storage element (ROM) 154, a random access memory (RAM) 156, an expansion RAM 158, and an input / output (I / O) circuit. 160 having a display assembly 162, an input device 164, and an expansion bus 166. Computer system 150 may optionally include a mass storage device 168 such as a disk drive unit or non-volatile storage such as flash memory and real time clock 170.
[0102]
The CPU 152 is connected to the ROM 154 by a data bus 172, a control bus 174, and an address bus 176. ROM 154 has a basic operating system for computer system 150. CPU 152 is also connected to RAM 156 by buses 172, 174 and 176. As desired, expansion RAM 158 is connected to RAM 156 for use by CPU 152. The CPU 152 is also connected to the I / O circuit 160 by a data bus 172, a control bus 174, and an address bus 176 so that data can be transferred using a peripheral device.
[0103]
The I / O circuit 160 typically includes a plurality of latches, registers, and a direct memory access (DMA) controller. The purpose of the I / O circuit 160 is to provide an interface between the CPU 152 and peripheral devices such as the display assembly 162, the input device 164, and the mass storage device 168.
[0104]
The screen for display assembly 162 may be a device using a cathode ray tube (CRT), liquid crystal display (LCD), etc., of the type commercially available from various manufacturers. As the input device 164, a stylus, a keyboard, a mouse, or the like can be used in cooperation with the position detection display. These input devices are available from various vendors and are known in the art.
[0105]
Some mass storage devices 168 are generally considered desirable, but it is possible to eliminate the mass storage device 168 by providing a sufficient amount of RAM 156 and expansion RAM 158 to store user application programs and data. is there. In that case, RAMs 156 and 158 are provided with a backup battery as desired so that data is not lost even when the computer system 150 is powered off. However, it is usually desirable to have some kind of long-term mass storage device 168, for example, flash memory such as a commercially available hard disk drive, non-volatile storage such as RAM with battery, PC data card.
[0106]
A removable storage read / write device 169 can be coupled to the I / O circuit 160 to read from and write to the removable storage medium 171. Typical examples of the removable storage medium 171 include a magnetic disk, a magnetic tape, a magneto-optical disk, and an optical disk. In one embodiment, instructions may be provided to the network for performing the inventive method via such removable storage media.
[0107]
Information can be entered into the computer system 150 during operation by typing on the keyboard, operating a mouse or trackball, or “writing” on the tablet or on the position sensing position sensitive screen of the display assembly 162. Thereafter, the CPU 152 processes data and application programs stored in the ROM 154 and / or the RAM 156 under the control of the operating system. CPU 152 typically creates data that is output to display assembly 162 and generates an appropriate image on the screen.
[0108]
The expansion bus 166 is connected to the data bus 172, the control bus 174, and the address bus 176. The expansion bus 166 is provided with an extra port for connecting devices such as a network interface circuit, a modem, a display switch, a microphone, and a speaker to the CPU 152. Network communication is accomplished by a network interface circuit and a suitable network.
[0109]
The invention can be implemented using any suitable computer available from a variety of vendors. However, various computers can be used depending on size and task complexity. Suitable computers include mainframe computers, multiprocessor computers, workstations or personal computers. Although a general computer system has been described above, in addition, a dedicated computer can be further (or alternatively) used to perform the method of the present invention.
[0110]
The present invention also relates to a machine readable medium that stores a reticle design that satisfies the requirements of the present invention, or a machine readable medium that stores program instructions for performing the method of the present invention. I want you to understand. Examples of such media include optically readable media such as magnetic disks, magnetic tapes, and CD-ROMs, and semiconductors such as PCMCIA cards. In each case, the media can take the form of portable items such as small disks, diskettes, cassettes, or can be in the form of relatively large or fixed items such as RAM or hard disk drives provided with computers.
[0111]
D.Conclusion
The present invention thus provides a number of priorities by using mask blanks that can be prepared in advance and then processed to provide any composite transmission function simply by appropriately perforating the non-transparent layer of the mask blank. Overcoming technical problems. That is, the mask blank pattern depends only on factors that are not related to individual chips to be manufactured, such as the wavelength of light to be exposed and the characteristics of the optical system. Thus, mask blanks can be pre-designed and manufactured for many different ASICs. Since it is only the etched part of the non-transparent layer that is related to the customization of the mask blank, it is not much different from customizing the mask blank with respect to a normal binary amplitude mask. As a result, the present invention can produce a practical phase shift mask for manufacturing ASICs. Furthermore, the phase shift mask according to the present invention requires only two additional forms of phase shift elements (ie on the already existing zero phase shift base), and any complex transmission. Can have functions. As mentioned above, in most conventional phase shift masks, the number of possible phase shifts is largely limited by the number of shift phase elements formed on the mask.
[0112]
Although the invention has been described in detail with reference to exemplary embodiments and drawings, it is to be understood that various adaptations and modifications of the invention may be achieved without departing from the spirit of the invention and the claims. It is clear to the contractor. Accordingly, the present invention is not limited to the detailed embodiments shown and described in detail above. Accordingly, all such modifications are intended to be within the scope of the claims as limited only by the claims hereof without departing from the spirit of the invention.
[0113]
Any claims that do not include the word “means for” in the claims should not be construed as means under 35 USC 112 (paragraph 6).
[Brief description of the drawings]
FIG. 1 is a functional block diagram showing patterning of an IC chip.
FIG. 2 is a flow diagram illustrating how mask sample values are generally determined in accordance with an exemplary preferred embodiment of the present invention.
FIG. 3A shows a cross-sectional view of a mask blank used in a preferred embodiment of the present invention.
FIG. 3B shows a diagram of the transmission layer of the mask blank used in the preferred embodiment of the present invention.
FIG. 4 shows a view after the mask blank shown in FIG. 3B has been processed to achieve the desired composite transmission function, in accordance with a preferred embodiment of the present invention.
FIG. 5 illustrates a block diagram of a general purpose computer that is one suitable platform for performing the method of the present invention.

Claims (29)

A mask having a composite transmission function,
A transmission layer having three types of phase shift elements that are alternately arranged in both the x and y directions, each imparting a different phase shift relative to the other, wherein the three types of phase shift elements are The transmissive layer in contact at a common point of each boundary, the common point forming an equally spaced lattice pattern; and
A non-transmissive layer having a plurality of holes formed at a position corresponding to a common point in the transmissive layer,
The centers of each of the at least two of the holes of the non-transmissive layer are arranged relative to their corresponding common points so that the offsets from the corresponding common points are different. mask.     The mask of claim 1, wherein the three types of phase shift elements produce phase shifts that are offset from each other by approximately 2π / 3 radians.     The mask according to claim 1, wherein the plurality of holes have substantially the same size and substantially the same shape.     2. The mask according to claim 1, wherein the size of the hole is about 1/10 to 1/20 of an interval between common points.     The phase shift elements are arranged in a sequence of columns such that the three types repeat in a certain order in each column, and two adjacent columns are 1.5 times the length of one phase shift element in the x direction. The mask according to claim 1, wherein the mask is offset so that two adjacent phase shift elements are not of the same type. A mask having a composite transmission function,
A transmission layer having three types of phase shift elements and arranged so that the common points of all three types of boundaries form a regularly spaced grating;
A non-transparent layer having a plurality of holes that coincide with the points forming the lattice,
The three types of the phase shift element, are arranged alternately in both the vertical and horizontal, each assigned different relative phase shift with respect to the other type,
The centers of each of the at least two of the holes of the non-transmissive layer are arranged relative to their corresponding common points so that the offsets from the corresponding common points are different. mask.     7. The mask of claim 6, wherein the three types of phase shift elements produce phase shifts that are offset from each other by approximately 2π / 3 radians.     The mask according to claim 6, wherein the plurality of holes have substantially the same size and substantially the same shape.     The mask according to claim 6, wherein the size of the hole is about 1/10 to 1/20 of an interval between lattice points.     The phase shift elements have a substantially quadrangular shape, and are arranged in a row such that the three types repeat in a certain order in each row. 7. A mask according to claim 6, wherein the mask is offset by 1.5 times its length so that two adjacent phase shift elements are not of the same type. A mask having a composite transmission function,
transmissive layers alternately disposed in both the x and y directions, each having three types of phase shifts that impart different phase shifts relative to each other;
A non-transmissive layer having a plurality of holes arranged in a substantially equidistant lattice pattern,
A plurality of the holes having substantially the same size and overlapping with three types of phase shift elements in different combinations.     The mask of claim 11, wherein the three types of phase shift elements produce phase shifts that are offset from each other by approximately 2π / 3 radians.     The mask of claim 12, wherein the three types of phase shift elements cause a phase shift of about 0, 2π / 3 radians, and -2π / 3 radians, respectively.     The mask according to claim 11, wherein the plurality of holes have substantially the same shape.     The mask according to claim 11, wherein the lattice pattern is defined by a common point of boundaries of at least three kinds of phase shift elements.     16. The mask according to claim 15, wherein the size of the hole is about 1/10 to 1/20 of an interval between common points of boundaries of at least three kinds of phase shift elements.     The phase shift elements are arranged in a sequence of columns such that the three types repeat in a certain order in each column, and two adjacent columns are 1.5 times the length of one phase shift element in the x direction. 12. The mask of claim 11, wherein the mask is offset so that two adjacent phase shift elements are not of the same type. A method of manufacturing a mask having a composite transmission function,
Alternatingly arranged in both the x and y directions, each having a transmissive layer having three types of phase shifts that impart a relatively different phase shift relative to the other, and a non-transmissive layer Obtaining a new mask blank,
Forming a plurality of holes in the non-transmissive layer, wherein each of the holes overlaps each type of the phase shift element to synthesize a desired composite transmittance in each of the holes. A method characterized by controlling the amount.     The method of claim 18, wherein the holes are formed in the non-transmissive layer in a regularly spaced grid pattern.     The method according to claim 19, wherein the grating pattern is defined by a common point of boundaries of at least three types of the phase shift elements.     21. The method of claim 20, wherein the size of the hole is about 1/10 to 1/20 of an interval between common points of boundaries of at least three types of phase shift elements. The mask is intended to be used for patterning an integrated circuit (IC) chip and used with optics inserted between the mask and the IC chip;
The method according to claim 19, wherein an interval between the points on the lattice pattern is not substantially larger than π / k _max , where k _max is a spatial cutoff frequency of the optical system. The desired composite transmittance for each of the holes is F (x _m , y _m ), the size of each region of the hole overlapping the type k phase shift element is Amn ^(k) , and the type k phase shift element is When the phase shift to be applied is φ _k , the amount of overlap with each type of the phase shift element is adjusted until F (x _m , y _m ) = ΣA, so that a desired composite for each of the holes The method of claim 18, wherein the transmittance is synthesized.     The method of claim 18, wherein the three types of phase shift elements produce phase shifts that are offset from each other by approximately 2π / 3 radians.     25. The method of claim 24, wherein the three types of phase shift elements produce phase shifts of approximately 0, 2π / 3 radians, and −2π / 3 radians, respectively.     The method of claim 18, wherein the plurality of holes have approximately the same size and approximately the same shape.     The phase shift elements are arranged in a sequence of columns such that the three types repeat in a certain order in each column, and two adjacent columns are 1.5 times the length of one phase shift element in the x direction. The method according to claim 18, characterized in that it is offset so that two adjacent phase shift elements are not of the same type. Mask blanks,
a transmission layer having three types of phase shift elements, each of which is alternately arranged in both the x and y directions, each giving a different phase shift relative to the other;
A mask blank having an impermeable layer. Mask blanks,
A transmission layer having three types of phase shift elements arranged so that the common points of all three types of boundaries form a regularly spaced grating;
A non-transparent layer;
A mask blank, wherein each of the phase shift elements imparts a different phase shift relative to the others.

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