JP4825230B2 - Deblocking filter - Google Patents

Description

  The present invention relates to a deblocking filter used in a video encoding device or a video decoding device, and more particularly to a deblocking filter for processing a picture of an interlaced frame.

  In general, encoding / decoding of a moving image is performed for each block obtained by dividing one picture into a plurality of regions. However, in the method of performing encoding / decoding for each block, noise or distortion occurs at the boundary between adjacent blocks. For this reason, many video coding standards (for example, VC-1, H.264, etc.) define deblocking filters for reducing block noise.

  FIG. 24 is a diagram illustrating a sequence for performing deblocking filter processing in units of macroblocks (16 × 16 pixels). The deblocking filter process is performed on the decoded picture data. Here, the decoding process is performed in order from the upper left block in the picture. Therefore, the deblocking filter process is basically performed on the pixel data in the upper left area of the current macroblock (the macroblock to be processed) as shown in FIG.

  FIG. 25 is a diagram for explaining pixel data required in the deblocking filter. Here, it is assumed that pixel data of the current macroblock 101 is newly read. A filter target area 105 indicated by a broken line is an area to be filtered when the current macroblock 101 is designated. That is, the filtering process is performed on each horizontal edge and each vertical edge in the filter target area 105. Here, “edge” means “boundary” between blocks.

  In order to perform this filtering process, in addition to the pixel data of the current macroblock 101, the pixel data of the areas 102, 103, and 104 are required. An area 102 is an area adjacent to the left side of the current macroblock 101 and is a block processed immediately before the current macroblock 101. An area 103 is an upper adjacent area of the current macroblock 101. An area 104 is an upper left adjacent area of the current macroblock 101. Note that the region 104 is an upper adjacent region with respect to the region 102. Then, using the pixel data of the current macroblock 101 and the areas 102 to 104, filter processing is performed for each horizontal edge and each vertical edge.

  FIG. 26 is a diagram illustrating an outline of the deblocking filter process. In the deblocking filter process, pixel data of pixels near the boundary between adjacent blocks (integer transform blocks such as 8 × 8 pixels, 8 × 4 pixels, 4 × 8 pixels, 4 × 4 pixels, etc.) are filtered. The That is, in the example shown in FIG. 26, pixel data P1 to P8 located on both sides of each edge (including the horizontal edge and the vertical edge) are extracted, and pixel data adjacent to the edge based on these pixel data P1 to P8. P4 and P5 are corrected. By this filter processing, image disturbance at the boundary between blocks can be suppressed. Note that filter calculation is performed in the order of x = 2, 0, 1, 3 at each edge.

VC-1 defines three types of picture structures (progressive, interlaced field, and interlaced frame). Among these structures, the interlace frame picture is composed of a top field (even number line) and a bottom field (odd number line) as shown in FIG. When the horizontal edge is processed by the deblocking filter, the top field processing and the bottom field processing are executed independently of each other. That is, the pixel data P4 and P5 are corrected based on the top field pixel data P1 to P8, and the pixel data P4 and P5 are corrected based on the bottom field pixel data P1 to P8.

  FIG. 28 is a diagram illustrating a configuration of an example of a deblocking filter. In FIG. 28, the pixel input unit 51 stores the decoded pixel data of the current macroblock in the internal RAM 52 via the RAM interface. At this time, for example, in the example shown in FIG. 25, in order to perform the filtering process on the filter target area 105 corresponding to the current macroblock 101, in addition to the pixel data of the current macroblock 101, the pixel data of the areas 102 to 104 is required. Here, it is assumed that the pixel data of the previously decoded area is stored in the external memory 53. However, the pixel data in the areas 102 and 104 are assumed to remain in the internal RAM 52 because they are the calculation results of the previous filter processing. Then, the pixel data that needs to be read from the external memory 53 in order to perform the filtering process on the filter target region 105 is the pixel data of the region 103. Therefore, the pixel data in the area 103 is transmitted from the external memory 53 to the internal RAM 52.

  Using the pixel data of the current macroblock 101 and the regions 102 to 104, the filter operation is performed for the horizontal edge and the vertical edge. The calculation result is once stored in the internal RAM 52 and then transmitted to the external memory 53. At this time, pixel data (including pixel data after filtering) in the area 106 indicated by a broken line in FIG. 29 is transmitted from the internal RAM 52 to the external memory 53.

  For example, the following techniques are known as devices for reducing noise in encoding moving images. The activity calculation circuit obtains an activity for the image data encoded in a block shape. The block noise prediction circuit predicts the average noise in the block based on the activity obtained by the activity calculation circuit. The pixel noise prediction circuit obtains a noise prediction value of each pixel from the block noise prediction value obtained by the block noise prediction circuit and the activity obtained by the activity calculation circuit. The filter coefficient determination circuit determines a filter coefficient. The filter circuit predicts and outputs the image data from which the noise component has been removed. In the prediction, the horizontal processing is performed before the vertical processing in the noise reduction circuit.

  The following techniques are also known as other techniques. The image decoding apparatus includes a variable length decoding unit, an inverse quantization unit, an inverse orthogonal transform unit, a control unit, and a block noise removal unit. The variable length decoding unit performs variable length decoding on the image data compressed using orthogonal transform, quantization, and variable length code for each block. The inverse quantization unit inversely quantizes the image data decoded by the variable length decoding unit. The inverse orthogonal transform unit generates decoded image data by performing inverse orthogonal transform on the image data inversely quantized by the inverse quantization unit. Predetermined image data is extracted from the decoded image data. The block noise removing unit removes block noise at the block boundary portion of the image data extracted by the control unit.

As another technique, it is known to provide a deblocking filter having a function of adjusting the dependency between the horizontal filter processing and the vertical filter processing and executing them in parallel.
JP-A-7-236140 JP 2002-77914 A JP 2006-174138 A

  FIG. 30 is a diagram illustrating filter processing for non-interlaced frame pictures. The non-interlaced frame picture is, for example, a progressive picture or an interlace field picture. In the following description, it is assumed that filter processing is performed for each macroblock of 16 × 16 pixels. The pixel data is assumed to be expressed in a YCbCr (luminance / color difference) system. In FIG. 30, the horizontal edge that should be filtered for the current macroblock is indicated by a circle, and the vertical edge that is to be filtered is indicated by a square.

  When filter processing is performed in the filter area corresponding to the current macroblock, as shown in FIG. 30A, pixel data for eight lines is read from the external memory 53 for Y data. Similarly, pixel data for 8 lines are read from the external memory 53 for Cb data and Cr data, respectively.

  Pixel data obtained as a calculation result of the filter processing is once stored in the internal RAM 52 and then transmitted to the external memory 53. At this time, as shown in FIG. 30B, for Y data, pixel data for 24 lines is transmitted. For Cb data and Cr data, pixel data for 16 lines is transmitted.

  FIG. 31 is a diagram illustrating interlaced frame picture filter processing. When filtering the horizontal edge of an interlaced frame picture, as described with reference to FIG. 27, the number of necessary pixels is doubled as compared with a non-interlaced frame picture. For this reason, for example, in order to perform the filtering process on the horizontal edge A shown in FIG. 31A, pixel data for the upper eight lines and pixel data for the lower eight lines of the edge are required. Further, the vertical edge filtering process is performed collectively for the top field for four lines and the bottom field for four lines. That is, for example, the filtering process is performed on the vertical edges B and C all at once.

  Therefore, when the filtering process is performed on the filter target region corresponding to the current macroblock, as shown in FIG. 31A, for each of the Y data, Cb data, and Cr data, the upper 16 of the current macroblock. Pixel data for a line is required. That is, 16 lines of pixel data are read from the external memory 53. Further, as shown in FIG. 31B, pixel data for 32 lines is transmitted to the external memory 53 as a filter calculation result for Y data. For Cb data and Cr data, pixel data for 24 lines is transmitted.

  FIG. 32 is a table summarizing the amount of access to the external memory when the conventional filtering process is performed. Here, the moving image is 30 frames / second. Further, in a picture of 1920 × 1088 pixels, filter processing is performed for each 16 × 16 macroblock. Further, the number of bits of Y data, Cb data, and Cr data of each pixel is 8 bits. In this case, in the case of a non-interlaced frame picture, the access amount (total amount of data read and data write) to the external memory 53 is 209 MB (megabytes) / second. In the case of an interlace frame picture, it is 328 MB / second.

  As described above, in the conventional deblocking filter, when the block noise of the interlace frame picture is removed, the access amount to the external memory becomes very large.

  An object of the present invention is to reduce a memory access amount when removing block noise of an interlaced frame picture.

  A deblocking filter according to an aspect of the present invention is configured to perform filtering for each block obtained by dividing a picture of a moving image, and stores first pixel data of the picture read from a frame memory. A memory, a horizontal filter that performs filtering on a horizontal edge in the first filter area corresponding to the first block of the picture, and a predetermined filter in the first filter area after the filtering by the horizontal filter. A second memory that stores pixel data of the specified area, a vertical filter that performs a filtering process on a vertical edge in the first filter area after the filtering process by the horizontal filter, and a filtering process by the vertical filter After, the pixel data of the first filter area is stored in the frame memory. It comprises transmission means for signals to, a. The horizontal filter applies pixel data stored in the first memory and pixel data stored in the second memory to a second block adjacent to the first block. Filter processing is performed for the horizontal edge in the corresponding second filter region.

  According to this configuration, the second memory stores pixel data in a state before the filtering process is performed on the vertical edges in the first filter region. Then, when the filtering process is performed on the horizontal edge in the second filter region, the pixel data stored in the second memory is used. That is, the horizontal filter process is not performed on the pixel data after the vertical filter process. Therefore, it is possible to satisfy the rule that “filtering is performed for horizontal edges before vertical edges”. As a result, the current macroblock and the filter area corresponding to the current macroblock can be brought close to each other or overlapped while satisfying the above-mentioned regulations, so that the amount of pixel data to be read from the external memory (and the filter to be transmitted to the external memory) The amount of subsequent pixel data) can be reduced.

  A deblocking filter according to another aspect of the present invention is configured to perform filtering for each block obtained by dividing a picture of a moving image, and stores first pixel data of the picture read from a frame memory. A horizontal filter that performs filtering on a horizontal edge in a first filter area corresponding to the first block of the picture, and a vertical filter in the first filter area after the filtering by the horizontal filter. A vertical filter that performs filtering on an edge; a second memory that stores correction values by the vertical filter for pixel data adjacent to a predetermined vertical edge in the first filter region; and After the filtering process, the pixel data of the first filter area is converted into the frame. Comprises transmission means for transmitting to the memory, the. The horizontal filter uses the pixel data stored in the first memory and the correction value stored in the second memory to apply a second block adjacent to the first block to the second block. Filter processing is performed for the horizontal edge in the corresponding second filter region. According to this configuration, the amount of data stored in the second memory is reduced as compared with the above-described aspect.

  The disclosed deblocking filter has the effect of reducing the amount of memory access when removing block noise from interlaced frame pictures.

  Embodiments of the present invention will be described with reference to the drawings. Below, VC-1 is taken up and explained as a moving picture coding standard, but the present invention is not limited to this standard. That is, the present invention can be applied to a standard in which filter processing is performed for each block obtained by dividing a moving picture picture, and horizontal filter processing is performed prior to vertical filter processing.

  FIG. 1 is a diagram illustrating a configuration of a video encoding device 20 equipped with the deblocking filter of the embodiment. The moving image data is input to the moving image encoding device 20 for each frame (that is, for each picture). Also, the encoding process is performed for each macroblock.

  The motion compensation encoding unit 21 selectively performs interframe prediction or intraframe prediction, and outputs prediction error data. In inter-frame prediction, prediction error data is generated based on an input image and a predicted image. The integer conversion unit 22 performs integer conversion on the prediction error data. The quantization unit 23 quantizes the integer-converted prediction error data. The entropy encoding unit 24 entropy encodes the prediction information and quantized data of the macroblock. The entropy encoding unit 24 also has a scan conversion function in this embodiment. As a result, an encoded data stream is generated.

  The inverse quantization unit 25 performs inverse quantization on the output data of the quantization unit 23. The inverse integer transform unit 26 performs inverse integer transform on the output data of the inverse quantization unit 25. The motion compensation decoding unit 27 selectively performs inter-frame prediction or intra-frame prediction, and decodes encoded data. The deblocking filter 28 removes block noise (or block distortion) of the image data obtained by the motion compensation decoding unit 27. The frame memory 29 temporarily stores output data from the deblocking filter 28. The image data stored in the frame memory 29 is given to the motion compensation encoding unit 21 and the motion compensation decoding unit 27 as a predicted image.

  FIG. 2 is a diagram illustrating a configuration of the video decoding device 30 equipped with the deblocking filter of the embodiment. The video decoding device 30 receives and decodes the encoded data stream generated by the video encoding device 20 shown in FIG.

  The entropy decoding unit 31 receives the encoded data stream and performs entropy decoding. The entropy decoding unit 31 also has a scan conversion function in this embodiment. The inverse quantization unit 32, the inverse integer transformation unit 33, the motion compensation decoding unit 34, the deblocking filter 35, and the frame memory 36 are basically composed of an inverse quantization unit 25, an inverse integer transformation unit provided in the video encoding device 20. 26, motion compensation decoding unit 27, deblocking filter 28, and frame memory 29.

  The deblocking filter of the embodiment of the present invention corresponds to the deblocking filter 28 shown in FIG. 1 or the deblocking filter 35 shown in FIG. In other words, the deblocking filter according to the embodiment receives image data decoded in order for each block, and performs a filtering process to remove block noise. Note that the decoding process is performed in order (raster order) from the block located above the picture, as shown in FIG. Specifically, the process proceeds in the right direction sequentially from the block in the upper left corner, and thereafter proceeds to the lower right corner in the same manner. Therefore, the filtering process by the deblocking filter is also performed in the same order.

  FIG. 3 is a diagram illustrating a configuration of the deblocking filter 10 according to the embodiment. In this embodiment, the deblocking filter 10 includes a pixel input unit 1, an internal RAM 2, an external memory input / output unit 3, a horizontal filter calculation unit 4, a vertical filter calculation unit 5, a local memory 6, a local memory control unit 7, and a RAM interface. 8 is provided. Note that the external memory 9 corresponds to the frame memory of FIG. 1 or 2 and may be provided as a part of the deblocking filter 10.

The pixel input unit 1 writes input pixel data given for each block in the internal RAM 2. The pixel data includes a luminance signal (Y data) and a color difference signal (Cb data, Cr data). The internal RAM 2 is a semiconductor memory, for example, and stores pixel data. The external memory input / output unit 3 accesses the external memory 9 and controls data writing and data reading. The horizontal filter calculation unit 4 performs filter processing on the horizontal edge. The vertical filter calculation unit 5 performs filter processing on the vertical edge. The local memory 6 is a semiconductor memory, for example, and temporarily stores pixel data used for filter calculation. The local memory control unit 7 accesses the local memory 6 and controls data writing and data reading. The RAM interface 8 connects the units 1 to 7 to each other and controls data exchange.

  The horizontal filter calculation unit 4 and the vertical filter calculation unit 5 basically execute the same filter calculation. That is, the filter operation unit (referred to as the horizontal filter operation unit 4 and / or the vertical filter operation unit 5), as described with reference to FIG. The pixel data P4 and P5 are corrected based on the pixel data P1 to P8 in the vicinity of the vertical edge). In this embodiment, the pixel data P4 and P5 are corrected based on the pixel data P1 to P8, but the present invention is not limited to this. That is, the present invention can be applied to a configuration in which the pixel data P3 to P6 are corrected based on the pixel data P1 to P8, for example.

  FIG. 4 is an example of filter processing by the filter calculation unit. Pixel data P1 to P8 are input to the filter calculation unit. In this embodiment, the pixel data includes Y data, Cb data, and Cr data. Then, the filter calculation unit performs calculations on Y data, Cb data, and Cr data independently of each other.

Since the arithmetic expression shown in FIG. 4 is a known technique, only the main points will be briefly described. In the filter operation of the embodiment, first, variables ao to a3 are generated based on the pixel data P1 to P8. Subsequently, the correction amount D is calculated according to the variables a0 to a3. Then, using this correction amount D, the pixel data P4 and P5 are corrected by the following equations (1) and (2).
P4 = P4-D (1)
P5 = P5 + D (2)
FIG. 5 is a diagram illustrating an example of filter processing. In the example shown in FIG. 5, discontinuity occurs between the pixel data P4 and P5. The filter calculation unit corrects the pixel data P4 and P5 so that the pixel data P1 to P8 change continuously (that is, so as to remove block noise).

  Based on the pixel data in the current macroblock and the pixel data in the peripheral area of the current macroblock, the filter calculation unit performs a filter process on the edge (that is, the block boundary) in the filter target area corresponding to the current macroblock. Do.

  FIG. 6 is a diagram illustrating a current macroblock and a corresponding filter target area. The filter target area is basically set on the upper left side of the current macroblock as shown in FIG. However, when the current macroblock is located at the left end and the right end of the picture, the filter target areas are set as shown in FIGS. 6A and 6C, respectively. When the current macroblock is located at the lower left end, the lower end, and the lower right end of the picture, the filter target areas are set as shown in FIGS. 6 (d), 6 (e), and 6 (f), respectively. Is done.

  FIG. 7 is a diagram illustrating an area in which pixel data after filtering is written. Basically, the pixel data of the area surrounded by the broken line in FIG. 7B is written out. That is, the pixel data in that region is transmitted to the external memory 9. However, when the current macroblock is located at the left end and the right end of the picture, the pixel data in the areas shown in FIGS. 7A and 7C are written out, respectively.

  Next, the concept of the deblocking process of the embodiment will be described with reference to FIGS. Here, as shown in FIG. 8, the filtering process will be described focusing on the macroblock B1 and the macroblock B2 located below the macroblock B1. Here, the horizontal direction of the picture is assumed to be composed of K blocks. In this case, the filtering process for the area corresponding to the block B2 is executed after K cycles from the time when the filtering process for the area corresponding to the block B1 is performed.

  A filter target area F1 is set on the upper left side of the block B1. Further, the filter target area F2 is set on the upper left side of the block B2. The filter target area F2 is disposed adjacent to the lower side of the filter target area F1.

  FIG. 9A is a diagram illustrating a filter process when the block B1 is a current macroblock. Here, ◯ represents a horizontal edge to be filtered, and □ represents a vertical edge to be filtered.

  In the deblocking filter of the embodiment, pixel data for the upper 12 lines of the current block (pixel data in a region indicated by hatching in FIG. 9A) is read from the external memory 9. On the other hand, in the prior art shown in FIG. 31A, pixel data for the upper 16 lines of the current macroblock is read from the external memory 9. That is, in the deblocking filter of the embodiment, the amount of pixel data read from the external memory 9 is small as compared with the conventional technique.

  FIG. 9B is a diagram illustrating the filtering process when the block B2 is the current macroblock. In this case, the pixel data for the upper 12 lines of the block B2 (pixel data in the area indicated by diagonal lines) is read from the external memory 9, and the horizontal edge and vertical edge in the upper left area of the block B2 are filtered. Is called. Here, attention is paid to the horizontal edges 1 to 4. In order to perform the filtering process on the horizontal edges 1 to 4, the pixel data of the regions c5 to c8 are necessary in the interlace frame picture. Specifically, when the filtering process is performed for the horizontal edges 1 to 4, as shown in FIG. 10, the upper eight pixels of the horizontal edges 1 to 4 (only the horizontal edges 1 and 2 are drawn in FIG. 10). The pixel data of the pixels adjacent to the horizontal edges 1 to 4 are corrected based on the pixel data of the lower 8 pixels.

In addition, the deblocking filter according to the embodiment is assumed to operate in accordance with the rule that “filtering is performed for horizontal edges before vertical edges”. Then, when only the blocks B1 and B2 are considered, it is necessary to perform the filter processing in the following order.
Procedure 1: Horizontal filter processing procedure corresponding to block B1: Vertical filter processing procedure corresponding to block B1: Horizontal filter processing procedure corresponding to block B2 4: Vertical filter processing corresponding to block B2 However, FIG. ) And the filter processing shown in FIG. 9B cannot be satisfied by simply executing the filtering process. That is, in the procedure 2, the filtering process for the vertical edge corresponding to the block B1 is performed. At this time, in the areas c2 to c5, the pixel data of the pixels adjacent to each vertical edge is corrected. Subsequently, in procedure 3, a filtering process is performed on the horizontal edge corresponding to the block B2. At this time, in order to perform the filtering process on the uppermost horizontal edge (that is, the horizontal edges 1 to 4), the pixel data of the regions c5 to c8 are necessary as described above.

Here, attention is focused on the region c5. When the filter processing shown in FIGS. 9A to 9B is simply performed on the pixel data in the region c5, the vertical filter processing is performed in step 2.
It is then used for horizontal filtering in procedure 3. In this case, the pixel data in the region c5 does not satisfy the rule that “the horizontal edge is filtered before the vertical edge”.

  Therefore, in the deblocking filter of the embodiment, in order to satisfy the above-mentioned definition, the pixel data is subjected to vertical filter processing in the filter processing corresponding to the block B1, and the horizontal filter processing is performed in the block processing corresponding to the block B2. Pixel data to be used for the purpose is temporarily saved in the local memory 6 before performing the vertical filter processing of the block B1. Then, the pixel data saved in the local memory 6 is used in the block processing corresponding to the block B2. By introducing this procedure, it is possible to satisfy the rule that “filtering is performed for the horizontal edge before the vertical edge” also in the region c5.

  In the above procedure, the pixel data in the area c5 is saved in the local memory 6 before the vertical filter process corresponding to the block B1 is performed. However, the deblocking filter of the embodiment is configured to correct the pixel data P4 and P5 based on the pixel data P1 to P8. That is, in FIG. 10, when the filtering process is performed for the vertical edge 1, only the pixel data P4 and P5 are corrected without changing the pixel data P1 to P3 and P6 to P8. Therefore, if only the pixel data P4 and P5 are saved in the local memory 6, it is possible to satisfy the rule that “filtering is performed for the horizontal edge before the vertical edge”. In the example shown in FIG. 10, pixel data of 2 × 4 pixels is saved. Hereinafter, the pixel data to be saved in the local memory 6 may be referred to as “saved pixel data”. In addition, an area from which saved pixel data should be extracted may be referred to as a “saved area”.

  In the case where the filtering process is performed for the horizontal edges 1 and 2 shown in FIG. 10, the pixel data P1 adjacent to the vertical edge 0 and the vertical edge 2 are adjacent before the filtering process for the vertical edges 0 and 2 is performed. Pixel data P8 to be saved is also saved in the local memory 6.

  FIG. 9C is a diagram illustrating a save area when the filter processing of FIGS. 9A to 9B is performed. In this embodiment, image data is extracted from each of the five save areas E1 to E5 and transmitted to the local memory 6. Each of the save areas E1 and E5 is 1 × 4 pixel data. The save areas E2 to E4 are 2 × 4 pixel data, respectively.

  FIG. 11 is a flowchart illustrating a processing procedure of the deblocking filter according to the embodiment. 12 to 18 are diagrams illustrating a data flow of the deblocking filter according to the embodiment. In the following description, it is assumed that the pixel data of the block that has been subjected to the decoding process and the filter process are stored in the external memory 9. In the following description, it is assumed that the block B2 shown in FIG. 9B is a current macroblock. In this case, the saved pixel data obtained by the filter processing corresponding to the block B1 is stored in the local memory 6.

  In step S1, as shown in FIG. 12, the pixel data in the upper area of the block B2, which is the current macroblock, is transmitted from the external memory 9 to the internal RAM 2. In the example shown in FIG. 9B, pixel data in the shaded area is read. Note that the pixel data of the left adjacent area and the upper left adjacent area of the current macroblock are used in the filter processing for the immediately preceding macroblock, and therefore remain in the internal RAM 2.

In step S2, pixel data of the current macroblock is stored in the internal RAM 2 via the pixel input unit 1, as shown in FIG. This pixel data is obtained by a decoding process for each block.

  In step S3, save pixel data is acquired from the local memory 6 as shown in FIG. At this time, the saved pixel data is read by the local memory control unit 7 and transmitted to the internal RAM 2. In this embodiment, saved pixel data (pixel data in the areas E1 to E5 indicated by diagonal lines in FIG. 9C) obtained by the filter processing for the block B1 shown in FIG. 9 is read. The saved pixel data is written in the local memory 6 by the filtering process for the block B1.

  When writing the saved pixel data to the internal RAM 2, the pixel data in the corresponding area previously stored in the internal RAM 2 is overwritten. That is, the pixel data of the corresponding area previously stored in the internal RAM 2 is replaced with the saved pixel data.

  In step S4, as shown in FIG. 15, horizontal filter processing is performed using the pixel data collected in steps S1 to S3. At this time, part of the pixel data is replaced with the saved pixel data in step S3. The saved pixel data is pixel data in a state before the vertical filter processing corresponding to the block B1 is performed. Therefore, the horizontal filter process in step S4 is performed on the pixel data in a state before the vertical filter process is performed. Note that the calculation result of the horizontal filter processing is stored in the internal RAM 2.

  In step S5, the saved pixel data is read from the internal RAM 2 and saved in the local memory 6 as shown in FIG. In this embodiment, after the filtering process for each horizontal edge shown in FIG. 9B is completed, an area adjacent to the right side of the vertical edge 5 (1 × 4 pixels) and an area adjacent to the vertical edges 6 to 8 ( 2 × 4 pixels) and pixel data of an area adjacent to the left side of the vertical edge 9 (1 × 4 pixels) are transmitted to the local memory 6 as saved pixel data.

  In step S6, as shown in FIG. 17, pixel data is read from the internal RAM 2 and vertical filter processing is performed. The calculation result of the vertical filter processing is stored in the internal RAM 2 again. In step S7, the pixel data after the filter processing is transmitted from the internal RAM 2 to the external memory 9, as shown in FIG. The pixel data transmitted at this time is as described with reference to FIG. In the example shown in FIG. 9B, the pixel data of the areas c6 to c11 are transmitted to the external memory 9. That is, pixel data for 24 lines is transmitted to the external memory 9.

  9 to 10 show filter processing for Y data in the pixel data. The deblocking filter of the embodiment performs the same filtering process for Cr data and Cb data.

  FIG. 19A is a diagram illustrating a filter process when the block B1 is the current macroblock. In this case, the pixel data for 12 lines in the upper region of the block B1 is read from the external memory 9. FIG. 19B is a diagram illustrating a save area when the filter process is performed on the block B1. The save area is the same as the Y data filtering process, and is 2 × 4 pixels. Then, the pixel data in the save area is stored in the local memory 6 after the horizontal filter processing corresponding to the block B1 and before the vertical filter processing. In addition, the pixel data after the filter processing is transmitted to the external memory 9. At this time, pixel data of the regions c2 to c7 (that is, pixel data for 24 lines) is transmitted to the external memory 9.

FIG. 19C is a diagram illustrating a filter process when the block B2 adjacent to the lower side of the block B1 is the current macroblock. In this case, the pixel data in the save area shown in FIG. 19B is acquired from the local memory 6. As a result, it is possible to satisfy the rule that “filtering is performed for horizontal edges before vertical edges”.

  Note that the filter processing for each macroblock is performed in raster order. Therefore, in the embodiment shown in FIG. 9, the process for the block B2 is executed Kth from the process for the block B1. For example, if a filter process is performed every 16 × 16 macroblocks in a picture of 1920 × 1088 pixels, K = 120. Therefore, in this case, the saved pixel data for 120 blocks is stored in the local memory 6.

  FIG. 20 is a table showing comparison results for bandwidth. Here, the bandwidth means an access amount (data read and data write) to the external memory 9 per unit time. Further, it is assumed that the prior art is the filter processing described with reference to FIG.

  It is assumed that the moving image to be subjected to the filtering process is the same as the condition described in FIG. That is, the moving image is 30 frames / second. Further, in a picture of 1920 × 1088 pixels, filter processing is performed for each 16 × 16 macroblock. Further, the number of bits of Y data, Cb data, and Cr data of each pixel is 8 bits.

  In the deblocking filter of the embodiment, the data amount of pixel data transmitted from the external memory 9 to the internal RAM 2 and the data amount of pixel data transmitted from the internal RAM 2 to the external memory 9 are significantly larger than those of the conventional technology. Less. As a result, the bandwidth required between the internal RAM 2 and the external memory 9 in the deblocking filter of the embodiment is significantly reduced as compared with the conventional technology.

  As described above, the deblocking filter according to the embodiment greatly reduces the necessary bandwidth between the internal RAM and the external memory while satisfying the rule of “filtering the horizontal edge before the vertical edge”. can do.

  Note that the deblocking filter of the embodiment needs to provide the local memory 6 as compared with the conventional configuration shown in FIG. However, the local memory 6 suffices if it can store the saved pixel data, and can be realized with a small and inexpensive memory element.

<Other embodiments>
In the embodiment described with reference to FIGS. 11 to 18, the pixel data of the save area after the horizontal filter processing and before the vertical filter processing is stored in the local memory 6. On the other hand, in another embodiment described below, a configuration for reducing the amount of data to be stored in the local memory 6 is provided.

  FIG. 21 is a flowchart illustrating a processing procedure of a deblocking filter according to another embodiment. In another embodiment, steps S11 and S12 are executed following step S2. In step S11, as shown in FIG. 22, first, the correction value D is read from the local memory 6. Further, the pixel data corrected by the correction value D in the previous filter processing is read from the internal RAM 2. In this embodiment, the pixel data P4 and P5 are corrected based on the pixel data P1 to P8. Accordingly, the pixel data P4 and P5 are read out.

Subsequently, in step S12, the pixel data before correction is restored by the inverse calculation of the correction. In this embodiment, pixel data P4 before correction is obtained by the following equations (3) and (4).
Restore P5.
P4 = P4 + D (3)
P5 = P5-D (4)
Thereafter, horizontal filter processing is performed in step S4, and vertical filter processing is performed in step S5. In this embodiment, these filter processes follow the arithmetic expression shown in FIG.

  In step S13, the correction value D obtained by the vertical filter process is stored in the local memory 6, as shown in FIG. This correction value D is used to restore the pixel data before correction when the filter processing is performed on the block adjacent to the lower side of the current macroblock (corresponding to steps S11 to S12). Thereafter, the decoded pixel data for which the filtering process has been completed is transmitted to the external memory 9 in step S7.

  The first embodiment shown in FIG. 11 is compared with the second embodiment shown in FIG. As for pixel data to be saved in the local memory 6, pixel data P4 and P5 are stored in the local memory 6 in the first embodiment. Here, the pixel data (for example, Y data) is 8-bit data representing 0-255. Therefore, a total of 16 bits of data is stored in the local memory 16 for one filter element. On the other hand, in the second embodiment, assuming that the correction value D represents −18 to +18, the data stored in the local memory 16 is 6 bits for one filter element.

  As a result, if a filter process is performed for each 16 × 16 macroblock in a 1920 × 1088 pixel picture, the data stored in the local memory is 7680 bytes in the first embodiment. On the other hand, in the second embodiment, the data stored in the local memory is 2880 bytes.

The following additional notes are further disclosed regarding the deblocking filter including each embodiment described above.
(Appendix 1)
A deblocking filter that performs filtering for each block obtained by dividing a picture of a moving image,
A first memory for storing pixel data of the picture read from a frame memory;
A horizontal filter that performs filtering on a horizontal edge in a first filter region corresponding to a first block of the picture;
A second memory for storing pixel data of a predetermined specific area in the first filter area after the filtering process by the horizontal filter;
A vertical filter that performs a filtering process on a vertical edge in the first filter region after the filtering process by the horizontal filter;
Transmission means for transmitting pixel data of the first filter area to the frame memory after the filtering process by the vertical filter;
The horizontal filter corresponds to a second block adjacent to the first block using pixel data stored in the first memory and pixel data stored in the second memory. A deblocking filter that performs a filtering process on a horizontal edge in a second filter region.
(Appendix 2)
The deblocking filter according to attachment 1, wherein
Replacement means for replacing the corresponding part of the pixel data read from the first memory with the pixel data read from the second memory;
The deblocking filter, wherein the horizontal filter performs a filtering process on a horizontal edge in the second filter region by using pixel data obtained by the replacement unit.
(Appendix 3)
The deblocking filter according to attachment 1, wherein
The deblocking filter, wherein the picture is an interlaced frame picture.
(Appendix 4)
The deblocking filter according to attachment 1, wherein
The deblocking filter is configured to perform filter processing in raster order.
The deblocking filter, wherein the second block is adjacent to the first block on the lower side.
(Appendix 5)
The deblocking filter according to attachment 1, wherein
The specific region is a region where a pixel adjacent to a vertical edge closest to the second block is located in the first filter region.
(Appendix 6)
The deblocking filter according to attachment 1, wherein
The horizontal filter corrects pixel data of pixels adjacent to a horizontal edge;
The deblocking filter, wherein the vertical filter corrects pixel data of a pixel adjacent to a vertical edge.
(Appendix 7)
A deblocking filter that performs filtering for each block obtained by dividing a picture of a moving image,
A first memory for storing pixel data of the picture read from a frame memory;
A horizontal filter that performs filtering on a horizontal edge in a first filter region corresponding to a first block of the picture;
A vertical filter that performs a filtering process on a vertical edge in the first filter region after the filtering process by the horizontal filter;
A second memory for storing a correction value by the vertical filter for pixel data adjacent to a predetermined vertical edge in the first filter region;
Transmission means for transmitting pixel data of the first filter area to the frame memory after the filtering process by the vertical filter;
The horizontal filter corresponds to a second block adjacent to the first block by using pixel data stored in the first memory and a correction value stored in the second memory. A deblocking filter that performs a filtering process on a horizontal edge in a second filter region.
(Appendix 8)
The deblocking filter according to appendix 7,
A restoration unit for restoring pixel data from the correction value read from the second memory;
The deblocking filter, wherein the horizontal filter performs a filtering process on a horizontal edge in the second filter region using pixel data obtained by the restoration unit.

It is a figure which shows the structure of the moving image encoder which mounts the deblocking filter of embodiment. It is a figure which shows the structure of the moving image decoding apparatus carrying the deblocking filter of embodiment. It is a figure which shows the structure of the deblocking filter of embodiment. It is an Example of the filter process by a filter calculating part. It is a figure which shows an example of a filter process. It is a figure which shows a filter object area | region. It is a figure which shows the area | region which writes image data. It is a figure explaining the order of filter processing. It is a figure explaining the deblocking filter process of embodiment. It is a figure explaining the pixel data which should be saved. It is a flowchart which shows the process sequence of the deblocking filter of embodiment. It is a figure (the 1) which shows the flow of data. It is a figure (the 2) which shows the flow of data. FIG. 6 is a third diagram illustrating the flow of data. It is FIG. (4) which shows the flow of data. FIG. 6 is a diagram (part 5) illustrating the flow of data. It is FIG. (6) which shows the flow of data. FIG. 10 is a diagram (No. 7) illustrating a data flow; It is a figure which shows the filter process about color difference data. It is a table | surface which shows the comparison result of embodiment and a prior art. It is a flowchart which shows the process sequence of the deblocking filter of other embodiment. It is a figure (the 1) which shows the flow of the data in other embodiment. It is FIG. (2) which shows the flow of the data in other embodiment. It is a figure explaining the sequence of a filter process. It is a figure explaining the pixel data required for a filter process. It is a figure explaining the outline | summary of a deblocking filter process. It is a figure explaining an interlace frame picture. It is a figure which shows the structure of an example of a deblocking filter. It is a figure explaining the output of the calculation result of a deblocking filter. It is a figure explaining the filter process of a non-interlaced frame picture. It is a figure explaining the filter process of an interlace frame picture. It is the table | surface which summarized the access amount to the external memory by a prior art.

Explanation of symbols

1 Pixel input unit 2 Internal RAM
3 External Memory Input / Output Unit 4 Horizontal Filter Operation Unit 5 Vertical Filter Operation Unit 6 Local Memory 7 Local Memory Control Unit 8 RAM Interface 9 External Memory 10 Deblocking Filter 20 Video Encoding Device 28 Deblocking Filter 30 Video Decoding Device 35 Deblocking filter

Claims (5)

A deblocking filter that performs filtering for each block obtained by dividing a picture of a moving image,
A first memory for storing pixel data of the picture read from a frame memory;
A horizontal filter that performs filtering on a horizontal edge in a first filter region corresponding to a first block of the picture;
A second memory for storing pixel data of a predetermined specific area in the first filter area after the filtering process by the horizontal filter;
A vertical filter that performs a filtering process on a vertical edge in the first filter region after the filtering process by the horizontal filter;
Transmission means for transmitting pixel data of the first filter area to the frame memory after the filtering process by the vertical filter;
The horizontal filter corresponds to a second block adjacent to the first block using pixel data stored in the first memory and pixel data stored in the second memory. A deblocking filter that performs a filtering process on a horizontal edge in a second filter region. The deblocking filter according to claim 1,
Replacement means for replacing the corresponding part of the pixel data read from the first memory with the pixel data read from the second memory;
The deblocking filter, wherein the horizontal filter performs a filtering process on a horizontal edge in the second filter region by using pixel data obtained by the replacement unit. The deblocking filter according to claim 1,
The specific region is a region where a pixel adjacent to a vertical edge closest to the second block is located in the first filter region. A deblocking filter that performs filtering for each block obtained by dividing a picture of a moving image,
A first memory for storing pixel data of the picture read from a frame memory;
A horizontal filter that performs filtering on a horizontal edge in a first filter region corresponding to a first block of the picture;
A vertical filter that performs a filtering process on a vertical edge in the first filter region after the filtering process by the horizontal filter;
A second memory for storing a correction value by the vertical filter for pixel data adjacent to a predetermined vertical edge in the first filter region;
Transmission means for transmitting pixel data of the first filter area to the frame memory after the filtering process by the vertical filter;
The horizontal filter corresponds to a second block adjacent to the first block by using pixel data stored in the first memory and a correction value stored in the second memory. A deblocking filter that performs a filtering process on a horizontal edge in a second filter region. The deblocking filter according to claim 4,
A restoration unit for restoring pixel data from the correction value read from the second memory;
The deblocking filter, wherein the horizontal filter performs a filtering process on a horizontal edge in the second filter region using pixel data obtained by the restoration unit.