JP4816630B2 - Data line driving circuit, electro-optical device, and electronic apparatus - Google Patents

Description

  The present invention relates to a technique for adjusting the luminance of a pixel of an electro-optical device.

  As a drive circuit for driving a pixel circuit of an electro-optical device such as an organic EL (Electro Luminescence) display, a drive circuit using a current addition type digital / analog conversion circuit (hereinafter referred to as DAC) is widely known. Since the current addition type DAC can be configured with fewer wirings than the voltage output type DAC, it has an advantage that it can easily cope with the multi-gradation of the electro-optical device. Various techniques have been proposed for current addition type DACs (for example, Patent Documents 1, 2, and 3).

Patent Document 1 describes a current addition type DAC that selects and adds currents from a plurality of current sources according to gradation data. Here, the gradation data has n bits (n ≧ 1), and the amount of current supplied from each current source corresponds to, for example, 1: 2: 4:...: 2 corresponding to the bits of the gradation data. ^It is configured to have a ratio of ^n-1 , thereby reducing the number of wirings. The current addition type DAC described in Patent Document 2 turns on / off a plurality of current sources connected to a capacitor in accordance with gradation data, and drives a pixel using charges accumulated in the capacitor. As a result, the number of capacitors can be reduced and the size of the circuit can be reduced. The current addition type DAC described in Patent Document 3 adjusts the voltage so as to have a value within a predetermined range when converting the added current according to the gradation data into a voltage, so that each channel has a predetermined value. Eliminates voltage variations.

JP-A-5-216439 JP-A-8-95522 JP 2002-26729 A

By the way, in an organic EL display using a voltage-driven pixel circuit, a voltage corresponding to gradation data is applied to a driving transistor provided in the pixel circuit, and a current corresponding to this voltage is supplied to the organic EL element. As a result, the organic EL element emits light at a luminance corresponding to the gradation data. An example of such a pixel circuit is shown in FIG. The relationship between the current I flowing between the source and drain of the transistor 162 and the gate voltage Vgs is expressed by equation (1).
I = (1/2) β (Vgs−Vth) ² (1)
Here, β: gain coefficient, Vth: threshold voltage.

  However, if β and Vth are the same for all the drive transistors, the current I is uniquely determined by Vgs. However, since the drive transistors actually vary in β and Vth, the current I also varies. As a result, luminance variation occurs. Even if a pixel circuit having a Vth compensation function is used, the variation in luminance remains, and thus the variation in luminance cannot be eliminated. Further, none of the above-mentioned patent documents discloses a configuration for solving this problem.

  On the other hand, there are the following problems. There are cases where the manufacturing process is different between the driving transistor provided in the pixel circuit and the transistor used in the driving circuit. In many cases, a thin film transistor (TFT) is used in the pixel circuit, and an integrated circuit (IC) composed of a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is used in the drive circuit. In transistors having different manufacturing processes, the gain coefficient β and the threshold voltage Vth shown in the equation (1) are different due to differences in manufacturing processes. Thus, when the gain coefficient β and the threshold voltage Vth are different, a current having a current value different from a desired current value corresponding to the gradation data is generated in the driving transistor of the pixel circuit, and the organic EL There arises a problem that the element cannot emit light with a desired luminance. None of the above-mentioned patent documents disclose a configuration for solving this problem.

  SUMMARY An advantage of some aspects of the invention is that it provides a technique capable of adjusting the luminance of an electro-optical device for each pixel. It is another object of the present invention to provide a technique capable of causing a pixel to emit light with a desired luminance even if the characteristics of the driving transistor of the pixel circuit and the transistor of the driving circuit are different.

The invention according to claim 1 is provided at each intersection of the plurality of scanning lines and the plurality of data lines, and generates a current according to the applied voltage, and is supplied from the driving transistor. A pixel circuit having a driven element driven by a current, a switching transistor in which a gate is connected to the scanning line, a source is connected to the data line, and a drain is connected to a gate of the driving transistor; In the data line driving circuit for driving the data line of the electro-optical device, the scanning line driving circuit that sequentially selects each of the scanning lines and supplies a selection signal to the selected scanning line. A gray scale that generates a gray scale current based on gray scale data representing the gray scale of a pixel provided on the scan line during a period in which the current is supplied A gray-scale current generation circuit comprising: a current generation circuit; and a first transistor in which a drain and a gate are short-circuited and the gate is connected to the gate of the drive transistor via the data line and the switching transistor A current-voltage conversion circuit that generates a voltage corresponding to the grayscale current by supplying the grayscale current generated in step 1 to the first transistor, and the current-voltage conversion circuit includes the first transistor When the threshold voltage of the first transistor is lower than the threshold voltage of the driving transistor, the first power supply voltage of the first transistor is set to be higher than the first power supply voltage of the driving transistor. The threshold voltage of the first transistor is set to a voltage lower by the difference between the threshold voltage of the transistor and the driving transistor. When the threshold voltage of the transistor is higher, the higher power supply voltage of the first transistor is set to be higher than the higher power supply voltage of the drive transistor. The data line driving circuit is characterized in that the voltage is set higher by the threshold voltage difference.

The invention according to claim 2 is provided at each intersection of the plurality of scanning lines and the plurality of data lines, and generates a current according to the applied voltage, and is supplied from the driving transistor. A pixel circuit having a driven element driven by a current, a switching transistor in which a gate is connected to the scanning line, a source is connected to the data line, and a drain is connected to a gate of the driving transistor; In the data line driving circuit for driving the data line of the electro-optical device, the scanning line driving circuit that sequentially selects each of the scanning lines and supplies a selection signal to the selected scanning line. A gray scale that generates a gray scale current based on gray scale data representing the gray scale of a pixel provided on the scan line during a period in which the current is supplied A current generation circuit, a plurality of transistors whose gates are connected in common, and a switch that short-circuits the drain and gate of each of the plurality of transistors based on pre-created data and connects the drains in common And the gate is connected to the gate of the driving transistor via the data line and the switching transistor, and supplies the plurality of transistors with the grayscale current generated by the grayscale current generation circuit. have a current-voltage conversion circuit which generates a voltage corresponding to the gradation current by the current-voltage conversion circuit, the threshold voltage of the plurality of transistors is lower than the threshold voltage of the driving transistor In this case, the high-side power supply voltage of the plurality of transistors is the high-side power supply voltage of the driving transistor. On the other hand, when the threshold voltage of the plurality of transistors is set lower than the threshold voltage of the driving transistor, the threshold voltage of the plurality of transistors is set lower than the threshold voltage of the driving transistor. The high-side power supply voltage of the plurality of transistors is set to a voltage that is higher than the high-side power supply voltage of the driving transistor by a difference between the threshold voltages of the plurality of transistors and the driving transistor. This is a data line driving circuit.

According to a third aspect of the present invention, there is provided an electro-optical device comprising the data line driving circuit according to the first or second aspect.
According to a fourth aspect of the present invention, there is provided an electronic apparatus comprising the electro-optical device according to the third aspect.

<First Embodiment>
A first embodiment of the present invention will be described. FIG. 1 is a diagram illustrating a configuration of an electro-optical device 100 according to the first embodiment. In this embodiment, an example in which the present invention is applied to an organic EL display will be described.
The electro-optical panel 10 has m scanning lines 11 and n data lines 12. Each of the scanning lines 11 and each of the data lines 12 are orthogonal to each other, and a pixel circuit 16 is provided at each intersection of the scanning lines 11 and the data lines 12. The image memory 80 stores gradation data supplied to the data line driving circuit 22. The control device 60 includes a CPU (Central Processing Unit), a RAM (Random Access Memory), a ROM (Read Only Memory), and the like, and each part of the electro-optical device 100 is executed by the CPU executing a program stored in the ROM. Control. The power supply circuit 70 is a circuit that supplies power to each unit of the electro-optical device 100.

The scanning line driving circuit 21 is a circuit that supplies a scanning signal to each of the scanning lines 11. FIG. 2 is a diagram illustrating signals supplied from the scanning line driving circuit 21. Specifically, the scanning line driving circuit 21 selects the scanning lines 11 one by one every one horizontal scanning period (1H) from the start point of one vertical scanning period (1F), and selects the selected scanning line. 11 is supplied with an active level (H level) scanning signal (selection signal), and the other scanning lines 11 are supplied with an inactive level (L level) scanning signal (non-selection signal). Here, the scanning signal supplied to the scanning line of the i-th row (i = 1, 2,..., M) is denoted as Yi.
On the other hand, the data line driving circuit 22 is a circuit that applies a voltage corresponding to the gradation data to each of the pixel circuits 16 via the data line 12. Details of the data line driving circuit 22 will be described later.

  Next, the configuration of the pixel circuit 16 will be described. FIG. 3 is a diagram illustrating an example of the configuration of the pixel circuit 16. Although only the pixel circuit 16 located at the intersection of the scanning line 11 in the i-th row and the data line 12 in the j-th column (j = 1, 2,..., N) is shown in FIG. The circuit 16 has a similar configuration. The transistor 164 is an n-channel transistor that functions as a switching transistor, and has a gate connected to the scanning line 11, a source connected to the data line 12, and a drain connected to the gate of the transistor 162 and one end of the capacitor 166. Has been. The other end of the capacitive element 166 is connected to the power supply line 14 to which the higher power supply voltage Vdd is applied. The transistor 162 is a p-channel transistor that functions as a drive transistor, and has a source connected to the power supply line 14 and a drain connected to the anode of the organic EL element 168. The cathode of the organic EL element 168 is connected to the lower power supply voltage Gnd. An organic EL layer is sandwiched between the anode and the cathode of the organic EL element 168.

  Next, the operation of the pixel circuit 16 located at the intersection of the i-th scanning line 11 and the j-th data line 12 will be described. When the i-th scanning line 11 is selected and the scanning signal Yi becomes H level, the transistor 164 is turned on, and the voltage Vout is applied to the gate of the transistor 162. Then, a current Iout corresponding to the voltage Vout flows between the source and drain of the transistor 162, and the organic EL element 168 emits light with luminance corresponding to the current Iout. At this time, electric charge corresponding to the voltage Vout is accumulated in the capacitor 166.

Subsequently, when the scanning line 11 in the i-th row is not selected and the scanning signal Yi becomes the L level, the transistor 164 is turned off, but the gate voltage of the transistor 162 is held by the capacitor 166, so A current lout having the same magnitude as that when the transistor 164 is on continues to flow through the EL element 168. For this reason, the organic EL element 168 continues to emit light with luminance corresponding to the current Iout at the time of selection even when the scanning line 11 in the i-th row is not selected.
The above operation is performed in all the pixel circuits 16 located at the intersections of the i-th scanning line 11 and the data lines 12. Further, by selecting the scanning lines 11 in order, the same operation is performed in all the pixel circuits 16, thereby displaying an image of one frame. Then, the display of the image of one frame is repeated every one vertical scanning period.

  Next, the data line driving circuit 22 will be described. FIG. 4 is a diagram showing a configuration of the data line driving circuit 22. The line memory 221 receives supply of gradation data corresponding to the pixel located at the intersection of the scanning line 11 selected by the scanning line driving circuit 11 and each data line 12 from the image memory 80, and the supplied gradation Store the data. The reference voltage generation circuit 223 generates a reference voltage and applies it to the DAC 222. The DAC 222 receives supply of gradation data corresponding to each of the pixel circuits 16 from the line memory 221, generates a current corresponding to the supplied gradation data, and supplies the generated current to the current-voltage conversion circuit 224. . The current-voltage conversion circuit 224 generates a voltage (data signal) corresponding to the supplied current, and outputs this voltage to each of the data lines 12 via the buffer circuit 225.

Next, the DAC 222 will be described. FIG. 5 is a diagram illustrating the configuration of the DAC 222 and the reference voltage generation circuit 223. The DAC 222 includes n DACs 31 and n DACs 32 corresponding to the data lines 12. The DAC 31 is a DAC for generating a gradation current based on the gradation data, and the DAC 32 is a DAC for generating a correction current that is added to the current generated by the DAC 31.
The reference voltage generation circuit 223 includes n reference voltage generation circuits 33 corresponding to the respective DACs 31 and n reference voltage generation circuits 34 corresponding to the respective DACs 32. The reference voltage generation circuit 33 is a circuit for applying a reference voltage to each DAC 31, and the reference voltage generation circuit 34 is a circuit for applying a reference voltage to each DAC 32.
In FIG. 5, only the DAC 31, DAC 32, reference voltage generation circuit 33, and reference voltage generation circuit 34 corresponding to the data line 12 in the j-th column are shown in order to avoid complication of the drawing.

  Next, the configuration of the DAC 31 and the reference voltage generation circuit 33 will be described. The DAC 31 includes a transistor 31a, a transistor 31b, a transistor 31c, and a transistor 31d. The transistors 31a to 31d are all n-channel transistors, and their sources are grounded. The drains of the transistors 31a to 31d are connected to one ends of the switches 31e, 31f, 31g, and 31h, respectively. The other ends of the switches 31e to 31h are all connected to the terminal A. The reference voltage generation circuit 33 includes a constant current source 331 and a transistor 332. The transistor 332 is an n-channel transistor, its drain is connected to the constant current source 331, and its source is grounded. Here, the drain and gate of the transistor 332 are short-circuited to form a diode connection. A current mirror circuit is formed by connecting the gate of the transistor 332 and the gates of the transistors 31a to 31d. As a result, a gate voltage having a magnitude equal to the gate voltage of the transistor 332 is applied to the gates of the transistors 31a to 31d, and a current (element current) corresponding to the gate voltage flows between the sources and drains of the transistors 31a to 31d. It becomes.

  Here, the channel size ratio of the transistors 31a to 31d will be described. The transistors 31a to 31d all have the same channel length L1, but have different channel widths. When the channel widths of the transistors 31a, 31b, 31c, and 31d are Wa, Wb, Wc, and Wd, respectively, the ratio is Wa: Wb: Wc: Wd = 1: 2: 4: 8. The gain coefficient β of the transistor is expressed as β = μCW / L. Here, μ is the carrier mobility, C is the gate capacity, W is the channel width, and L is the channel length. Therefore, the current flowing through the transistor is proportional to the channel width. Therefore, when the same gate voltage is applied, the ratio of the currents flowing through the transistors 31a, 31b, 31c, and 31d is 1: 2: 4: 8.

  In the present embodiment, the gradation data consists of a 4-bit binary number. When the gradation data is supplied to the DAC 31 via the line memory 221, the switches 31e to 31h are turned on / off according to the gradation data. Specifically, each bit corresponds to the switches 31e, 31f, 31g, and 31h in order from the least significant bit. For example, when the value of the least significant bit is 0, the switch 31e is turned off, and when it is 1, the switch 31e is turned on. In this manner, the switches 31e to 31h are turned on / off based on the gradation data, and a current flows through the transistor corresponding to the switch that is turned on. Therefore, the sum of these currents can have 16 levels of current values including 0, and the gradation current Idata1 having a magnitude corresponding to the gradation data is output.

  The DAC 32 has the same configuration as the DAC 31, and the reference voltage generation circuit 34 has the same configuration as the reference voltage generation circuit 33. In FIG. 5, the reference numerals of the constituent elements of the DAC 32 are obtained by replacing “31” in the reference numerals of the constituent elements of the DAC 31 with “32”, and the reference numerals of the constituent elements of the reference voltage generation circuit 34. Is obtained by replacing “33” in the reference numerals of the components of the reference voltage generation circuit 33 with “34”.

Incidentally, correction data is input to the DAC 32 instead of gradation data. The input / output characteristics of an organic EL element change due to the influence of environmental conditions such as temperature and external light, and changes over time of the organic EL element itself. Also, the input / output characteristics vary due to variations in the characteristics of the drive transistors provided in the pixel circuit 16. Accordingly, it is necessary to correct the peak luminance of the organic EL element, the gradient data of the gamma correction, etc. for each pixel in consideration of the influence of the change in environmental conditions and the change with time. Data used to perform this correction is correction data in the present embodiment. The correction data is also a 4-bit binary number and has 16 levels including 0.
The correction data may be gradation data belonging to a specific gradation band. If such correction data is used, the luminance of the pixel can be adjusted for each gradation band.
The correction data may be stored in the image memory together with the gradation data.

The operation of the electro-optical device 100 having the above-described configuration is as follows. The DAC 31 uses the reference voltage generated by the reference voltage generation circuit 33 to generate the gradation current Idata1 corresponding to the gradation data. The DAC 32 generates the correction current Idata2 corresponding to the correction data using the reference voltage generated by the reference voltage generation circuit 34. Then, the gradation current Idata1 and the correction current Idata2 are added together at the terminal A to become a current Idata3.
The current Idata3 is supplied to the current-voltage conversion circuit 224. The current-voltage conversion circuit 224 generates a voltage Vout corresponding to the supplied current Idata3 and outputs the voltage Vout to the buffer circuit 225. The buffer circuit 225 outputs the voltage Vout to the data line 12 To each of the above. When the voltage Vout is applied to the data line 12, the current Iout corresponding to the voltage Vout is supplied to the organic EL element provided in the pixel circuit 16 by the above-described operation, and the organic current has a luminance corresponding to the current Iout. The EL element emits light.

  As described above, according to the present embodiment, the correction current is generated based on the correction data created for each pixel, and the luminance is adjusted for each pixel by adding the correction current to the gradation current. This makes it possible to perform uniform light emission with no variation over all the pixels.

Second Embodiment
Next, a second embodiment of the present invention will be described. FIG. 6 is a diagram illustrating the DAC 35. In the second embodiment, a DAC 35 is used in place of the DACs 31 and 32 in the first embodiment. In addition, the same code | symbol is attached | subjected about the component same as 1st Embodiment.
In FIG. 6, only the DAC 35, the reference voltage generation circuit 33, and the reference voltage generation circuit 36 corresponding to the data line 12 in the jth column are shown in order to avoid complication of the drawing.

  Next, the configuration of the DAC 35 will be described. The DAC 35 has a configuration obtained by partially modifying the DAC 31 in the first embodiment. Here, differences from the DAC 31 of the DAC 35 will be described. The DAC 35 includes a transistor 35 a in addition to the configuration of the DAC 31. The source of the transistor 35a is grounded, and its drain is connected to the terminal A. The reference voltage generation circuit 36 includes a current source 361 and a transistor 362. The current source 361 can adjust the generated current. The transistor 362 is an n-channel transistor, its drain is connected to the current source 361, and its source is grounded. Here, the drain and gate of the transistor 362 are short-circuited to form a diode connection. The gate of the transistor 362 and the gate of the transistor 35a are connected to form a current mirror circuit. As a result, a gate voltage having a magnitude equal to the gate voltage of the transistor 362 is applied to the gate of the transistor 35a, and a current corresponding to the gate voltage flows between the source and drain of the transistor 35a.

The operation of the electro-optical device 100 having the above-described configuration is as follows. The DAC 35 uses the reference voltage generated by the reference voltage generation circuit 33 to generate the gradation current Idata1 corresponding to the gradation data. The reference voltage generation circuit 36 generates the correction current Idata2 by the adjustable current source 361. Then, the gradation current Idata1 and the correction current Idata2 are added together at the terminal A to become a current Idata3.
The current Idata3 is supplied to the current-voltage conversion circuit 224. The current-voltage conversion circuit 224 generates a voltage Vout corresponding to the supplied current Idata3 and outputs the voltage Vout to the buffer circuit 225. The buffer circuit 225 outputs the voltage Vout to the data line 12 To each of the above. When the voltage Vout is applied to the data line 12, the current Iout corresponding to the voltage Vout is supplied to the organic EL element provided in the pixel circuit 16 by the above-described operation, and the organic current has a luminance corresponding to the current Iout. The EL element emits light.

  As described above, according to the present embodiment, it is possible to adjust the luminance for each pixel by generating a correction current for each pixel and adding the correction current to the gradation current. Thus, uniform light emission with no variation can be performed over all the pixels.

<Third Embodiment>
Next, a third embodiment of the present invention will be described. Hereinafter, the same components as those of the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.
First, the DAC 222 will be described. FIG. 7 is a diagram illustrating the configuration of the DAC 222 and the reference voltage generation circuit 223. The DAC 222 includes n DACs 41 and n DACs 42 corresponding to each of the data lines 12. The DAC 41 is a DAC for generating a gradation current based on the gradation data, and the DAC 42 is a DAC for generating a correction voltage based on the correction data and applying the correction voltage to the DAC 41.
The reference voltage generation circuit 223 includes n reference voltage generation circuits 44 corresponding to each of the DACs 42 and applies a reference voltage to each of the DACs 42.
In FIG. 7, only the DAC 41, the DAC 42, and the reference voltage generation circuit 44 corresponding to the data line 12 in the j-th column are shown in order to avoid complication of the drawing.

  Next, the configuration of the DAC 42 and the reference voltage generation circuit 44 will be described. The DAC 42 includes a transistor 42a, a transistor 42b, a transistor 42c, and a transistor 42d. The transistors 42a to 42d are all p-channel transistors, and their sources are connected to the power supply voltage on the higher side. The drains of the transistors 42a to 42d are connected to one ends of the switches 42e, 42f, 42g, and 42h, respectively. The transistor 42k is an n-channel transistor, and the other ends of the switches 42e to 42h are all connected to the drain of the transistor 42k. The source of the transistor 42k is grounded. The reference voltage generation circuit 44 includes a constant current source 441 and a transistor 442. The transistor 442 is a p-channel transistor, and its drain is connected to the constant current source 441 and its source is connected to the power supply voltage on the higher side. Here, the drain and gate of the transistor 442 are short-circuited to form a diode connection. Then, the gate of the transistor 442 and the gates of the transistors 42a to 42d are connected to form a current mirror circuit. As a result, a gate voltage equal to the gate voltage of the transistor 442 is applied to the gates of the transistors 42a to 42d, and a current (element current) corresponding to the gate voltage flows between the sources and drains of the transistors 42a to 42d. It becomes.

  Here, the channel size ratio of the transistors 42a to 42d will be described. The transistors 42a to 42d all have the same channel length L1, but have different channel widths. When the channel widths of the transistors 42a, 42b, 42c, and 42d are Wa, Wb, Wc, and Wd, respectively, the ratio is Wa: Wb: Wc: Wd = 1: 2: 4: 8. The gain coefficient β of the transistor is expressed as β = μCW / L. Here, μ is the carrier mobility, C is the gate capacity, W is the channel width, and L is the channel length. Therefore, the current flowing through the transistor is proportional to the channel width. Therefore, when the same gate voltage is applied, the ratio of the currents flowing through the transistors 42a, 42b, 42c, and 42d is 1: 2: 4: 8.

Here, the correction data will be described. The input / output characteristics of an organic EL element change due to the influence of environmental conditions such as temperature and external light, and changes over time of the organic EL element itself. Also, the input / output characteristics vary due to variations in the characteristics of the drive transistors provided in the pixel circuit 16. Accordingly, it is necessary to correct the peak luminance of the organic EL element, the gradient data of the gamma correction, etc. for each pixel in consideration of the influence of the change in environmental conditions and the change with time. Data used to perform this correction is correction data in the present embodiment.
The correction data may be stored in the image memory together with the gradation data.

  In the present embodiment, the correction data is a 4-bit binary number. When the correction data is supplied to the DAC 42 via the line memory 221, the switches 42e to 42h are turned on / off according to the correction data. Specifically, each bit corresponds to the switches 42e, 42f, 42g, and 42h in order from the least significant bit. For example, when the value of the least significant bit is 0, the switch 42e is turned off, and when it is 1, the switch 42e is turned on. In this manner, the switches 42e to 42h are turned on / off based on the gradation data, and a current flows through the transistor corresponding to the switch that is turned on. Therefore, the sum of these currents can have 16 levels of current values including 0, and the correction current Idata1 having a magnitude corresponding to the correction data is output. The correction current Idata1 is supplied to the drain of the transistor 42k, and a correction voltage Vdata1 corresponding to the magnitude of the correction current Idata1 is generated between the gate and source of the transistor 42k.

  Next, the DAC 41 will be described. The DAC 41 includes a transistor 41a, a transistor 41b, a transistor 41c, and a transistor 41d. The transistors 41a to 41d are all n-channel transistors, and their sources are grounded. The drains of the transistors 41a to 41d are connected to one ends of the switches 41e, 41f, 41g, and 41h, respectively. Here, the gate of the transistor 42k of the DAC 42 and the gates of the transistors 41a to 41d are connected to form a current mirror circuit. As a result, a gate voltage having the same magnitude as the gate voltage of the transistor 42k is applied to the gates of the transistors 41a to 41d, and a current corresponding to the gate voltage flows between the sources and drains of the transistors 41a to 41d.

  Similarly to the transistors 42a to 42d described above, the channel size ratios of the transistors 41a to 41d all have the same channel length L1, but have different channel widths. When the channel widths of the transistors 41a, 41b, 41c, and 41d are Wa, Wb, Wc, and Wd, respectively, the ratio is Wa: Wb: Wc: Wd = 1: 2: 4: 8. Thereby, when the same gate voltage is applied, the ratio of the currents flowing through the transistors 41a, 41b, 41c, and 41d is also 1: 2: 4: 8. The gradation data is also a 4-bit binary number and has 16 levels including 0.

  The operation of the electro-optical device 100 having the above-described configuration is as follows. The DAC 42 performs correction using the correction data on the reference voltage generated by the reference voltage generation circuit 44, and outputs a correction voltage Vdata1 (gate voltage of the transistor 42k). The DAC 42 generates a gradation current Idata2 corresponding to the gradation data. The voltage used when generating the gradation current Idata2 is the correction voltage Vdata1 output from the transistor 42k of the DAC 42. That is, the dynamic range of the gradation current can be adjusted by correcting the reference current when the gradation current Idata2 is generated. Then, the DAC 41 outputs the generated gradation current Idata2 to the current-voltage conversion circuit 224.

The current-voltage conversion circuit 224 generates a voltage Vout corresponding to the supplied current Idata2 and outputs the voltage Vout to the buffer circuit 225. The buffer circuit 225 applies the voltage Vout to each of the data lines 12. When the voltage Vout is applied to the data line 12, the current Iout corresponding to the voltage Vout is supplied to the organic EL element provided in the pixel circuit 16 by the above-described operation, and the organic current has a luminance corresponding to the current Iout. The EL element emits light.
In the present embodiment, the reference voltage generated by the reference voltage generation unit is corrected by the correction unit, and the gradation current generation unit generates the gradation current using the corrected reference voltage. The gradation current generating means may generate the gradation current using the reference current, and the gradation current may be corrected by the correction means.

  As described above, according to the present embodiment, the correction voltage is generated based on the correction data created for each pixel, and the gradation current corresponding to the gradation data is generated using the correction voltage. Thus, it is possible to adjust the dynamic range of luminance for each pixel. This makes it possible to perform uniform light emission without variation across all the pixels.

<Fourth embodiment>
Next, a fourth embodiment of the present invention will be described. FIG. 8 is a diagram illustrating the DAC 45. In the fourth embodiment, a DAC 45 is used in place of the DACs 41 and 42 in the third embodiment. In addition, the same code | symbol is attached | subjected about the component same as 3rd Embodiment.
In FIG. 8, only the DAC 45 and the reference voltage generation circuit 46 corresponding to the data line 12 in the j-th column are shown in order to avoid the complexity of the drawing.

  Next, the configuration of the DAC 45 will be described. The DAC 45 has the same configuration as the DAC 41 in the first embodiment. The reference voltage generation circuit 46 includes a constant current source 461 and a transistor 462. The transistor 462 is an n-channel transistor, its drain is connected to the current source 461, and its source is grounded. Here, the drain and gate of the transistor 462 are short-circuited to form a diode connection. A current mirror circuit is formed by connecting the gate of the transistor 462 and the gates of the transistors 45a to 45d. As a result, a gate voltage having a magnitude equal to the gate voltage of the transistor 462 is applied to the gates of the transistors 45a to 45d, and a current corresponding to the gate voltage flows between the sources and drains of the transistors 45a to 45d.

The operation of the electro-optical device 100 having the above-described configuration is as follows. The reference voltage generation circuit 46 outputs the correction voltage Vdata1 by the adjustable current source 461. The DAC 45 generates a gradation current Idata2 corresponding to the gradation data. The voltage used when generating the gradation current Idata2 is the correction voltage Vdata1 output from the transistor 462 of the reference voltage generation circuit 46. That is, the dynamic range of the gradation current can be adjusted by correcting the reference current when the gradation current Idata2 is generated. Then, the DAC 45 outputs the generated gradation current Idata2 to the current-voltage conversion circuit 224.
The current-voltage conversion circuit 224 generates a voltage Vout corresponding to the supplied current Idata2 and outputs the voltage Vout to the buffer circuit 225. The buffer circuit 225 applies the voltage Vout to each of the data lines 12. When the voltage Vout is applied to the data line 12, the current Iout corresponding to the voltage Vout is supplied to the organic EL element provided in the pixel circuit 16 by the above-described operation, and the organic current has a luminance corresponding to the current Iout. The EL element emits light.

  As described above, according to the present embodiment, the correction voltage is generated for each pixel, and the gradation current is generated according to the gradation data by using the correction voltage, whereby the luminance dynamics are calculated for each pixel. The range can be adjusted. This makes it possible to perform uniform light emission without variation across all pixels.

<Fifth Embodiment>
Next, a fifth embodiment of the present invention will be described. Hereinafter, the same components as those of the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.
First, the data line driving circuit 22 will be described. FIG. 9 is a diagram showing a configuration of the data line driving circuit 22. The line memory 221 receives supply of gradation data corresponding to the pixel located at the intersection of the scanning line 11 selected by the scanning line driving circuit 11 and each data line 12 from the image memory 50, and the supplied gradation Store the data. The reference voltage generation circuit 223 generates a reference voltage and applies it to the DAC 222. The DAC 222 receives supply of gradation data corresponding to each of the pixel circuits 16 from the line memory 221, generates a current corresponding to the supplied gradation data, and supplies the generated current to the current-voltage conversion circuit 224. . The current-voltage conversion circuit 224 generates a voltage (data signal) corresponding to the supplied current, and outputs this voltage to each of the data lines 12.

Next, the configuration of the DAC 222, the reference voltage generation circuit 223, and the current / voltage conversion circuit 224 will be described. FIG. 10 is a diagram illustrating configurations of the DAC 222, the reference voltage generation circuit 223, and the current-voltage conversion circuit 224. The DAC 222 includes n DACs 51 corresponding to the data lines 12. The DAC 51 is a DAC for generating gradation current based on gradation data.
The reference voltage generation circuit 223 includes n reference voltage generation circuits 53 corresponding to each of the DACs 51 and applies a reference voltage to each of the DACs 51.
The current-voltage conversion circuit 224 includes n current-voltage conversion circuits 55 corresponding to each of the DACs 51, generates a voltage corresponding to the grayscale current supplied from the DAC 51, and outputs the generated voltage to each of the data lines 12. Output to.
In FIG. 10, only the DAC 31, the reference voltage generation circuit 33, and the current-voltage conversion circuit 35 corresponding to the data line 12 in the j-th column are shown in order to avoid complication of the drawing. FIG. 10 also shows a pixel circuit 16 provided at the intersection of the i-th scanning line 11 and the j-th data line 12.

Next, the configuration of the DAC 51, the reference voltage generation circuit 53, and the current-voltage conversion path 55 will be described.
The DAC 51 includes a transistor 51a, a transistor 51b, a transistor 51c, and a transistor 51d. The transistors 51a to 51d are all n-channel transistors, and their sources are grounded. The drains of the transistors 51a to 51d are connected to one ends of the switches 51e, 51f, 51g, and 51h, respectively. The other ends of the switches 51e to 51h are connected in common to the drain of the transistor 551 provided in the current-voltage conversion circuit 55.

The reference voltage generation circuit 53 includes a current source 531 and a transistor 532. The current source 531 has a function of adjusting the amount of current to be output. The transistor 532 is an n-channel transistor, and its drain is connected to the current source 531 and its source is grounded. Here, the drain and gate of the transistor 532 are short-circuited to form a diode connection. The gate of the transistor 532 and the gates of the transistors 51a to 51d are connected to form a current mirror circuit. As a result, a gate voltage having the same magnitude as the gate voltage of the transistor 532 is applied to the gates of the transistors 51a to 51d, and a current corresponding to the gate voltage flows between the sources and drains of the transistors 51a to 51d. Instead of the reference voltage generation circuit 53, a voltage obtained by an external input voltage, a resistor, or the like can be used.
The source of the p-channel transistor 551 provided in the current-voltage conversion circuit 55 is connected to the higher power supply voltage Vdd, and the drain and gate are short-circuited to form a diode connection. Further, the gate of the transistor 551 is connected to the data line 12. That is, in the period when the i-th scanning line 11 is selected, the transistor 551 and the transistor 162 form a current mirror connection.

  Here, the channel size ratio of the transistors 51a to 51d will be described. The transistors 51a to 51d all have the same channel length L1, but have different channel widths. When the channel widths of the transistors 51a, 51b, 51c, and 51d are Wa, Wb, Wc, and Wd, respectively, the ratio is Wa: Wb: Wc: Wd = 1: 2: 4: 8. The gain coefficient β of the transistor is expressed as β = μCW / L. Here, μ is the carrier mobility, C is the gate capacity, W is the channel width, and L is the channel length. Therefore, the current flowing through the transistor is proportional to the channel width. Therefore, when the same gate voltage is applied, the ratio of the currents flowing through the transistors 51a, 51b, 51c, and 51d is 1: 2: 4: 8.

  In the present embodiment, the gradation data consists of a 4-bit binary number. When this gradation data is supplied to the DAC 51 via the line memory 221, the switches 51e to 51h are turned on / off according to this gradation data. Specifically, each bit corresponds to the switches 51e, 51f, 51g, and 51h in order from the least significant bit. For example, when the value of the least significant bit is 0, the switch 51e is turned off, and when it is 1, the switch 51e is turned on. In this manner, the switches 51e to 51h are turned on / off based on the gradation data, and a current flows through the transistor corresponding to the switch that is turned on. Therefore, the sum of these currents can have 16 levels of current values including 0, and the gradation current Idata having a magnitude corresponding to the gradation data is output.

  By the way, in general, a transistor used in a pixel circuit and a transistor used in a data line driving circuit have different manufacturing processes. In many cases, a TFT is used in the pixel circuit, and an IC composed of a MOSFET is used in the data line driving circuit. In transistors having different manufacturing processes, the gain coefficient β and the threshold voltage Vth shown in the equation (1) are different due to differences in manufacturing processes. The present embodiment is configured such that a desired current can be supplied to the organic EL element 168 even when the gain coefficient β and the threshold voltage Vth are different. Hereinafter, this configuration will be described.

First, the adjustment considering the difference in gain coefficient β will be described. As shown in equation (1), the current supplied by the transistor is proportional to the gain factor β. Assuming that the gain coefficient β of the transistor 162 of the pixel circuit 16 is twice the gain coefficient β of the transistor 551 of the current-voltage conversion circuit 55, the transistor 162 has the gradation current Idata supplied from the DAC 51 to the transistor 551. A current Iout that is twice as large is output. In the present embodiment, in consideration of this, the gradation current is adjusted so as to satisfy the following relationship. (Β of transistor 551): (β of transistor 162) = Idata: Iout (2)
The gradation current can be adjusted by adjusting the current supplied from the current source 531 of the reference voltage generation circuit 53. As a result, an output current Iout having a desired magnitude is output from the transistor 162.

  Next, adjustment taking account of the difference in threshold voltage will be described. As shown in equation (1), the current supplied by the transistor depends on the difference between the gate voltage Vgs and the threshold voltage Vth. If the threshold voltage of the transistor 551 of the current-voltage conversion circuit 55 is lower by V1 than the threshold voltage of the transistor 162 of the pixel circuit 16, the current supplied to the organic EL element is less than the desired current. Therefore, the amount corresponding to V1 is reduced. On the other hand, if the threshold voltage of the transistor 551 is higher than the threshold voltage of the transistor 162 by V1, the current supplied to the organic EL element is larger than the desired current by an amount corresponding to V1. End up. As a result, the organic EL element cannot emit light with a desired luminance. In order to avoid such a problem, in the present embodiment, a voltage that compensates for the difference in threshold voltage between the drive transistor 162 of the pixel circuit 16 and the transistor 551 of the current-voltage conversion circuit 55 is output to the pixel circuit 16. It is comprised so that. That is, when the threshold voltage of the transistor 551 is lower than the threshold voltage of the transistor 162 by V1, the power supply voltage Vdd on the higher side of the transistor 551 is lower than the power supply voltage Voel on the higher side of the transistor 162 by V1. Set to voltage. On the other hand, when the threshold voltage of the transistor 551 is higher than the threshold voltage of the transistor 162 by V1, the power supply voltage Vdd is set to a voltage higher by V1 than the power supply voltage Voel. As a result, even when there is a difference in threshold voltage between the driving transistor of the pixel circuit and the transistor of the current-voltage conversion circuit, a desired gradation current Iout is output.

The operation of the electro-optical device 100 having the above-described configuration is as follows.
First, when the i-th scanning line 11 is selected and the scanning signal Yi becomes H level, the transistor 164 is turned on. The DAC 51 uses the reference voltage generated by the reference voltage generation circuit 53 according to the gradation data corresponding to the pixel provided at the intersection of the scanning line 11 in the i-th row and the data line 12 in the j-th column. The gradation current Idata is generated.
The current Idata is supplied to the current-voltage conversion circuit 55, and the current-voltage conversion circuit 55 generates a voltage Vout corresponding to the supplied gradation current Idata and outputs it to each of the data lines 12. When the voltage Vout is output to the data line 12, the current Iout corresponding to the voltage Vout is supplied to the organic EL element 168 by the above-described operation of the pixel circuit 16, and the organic EL element 168 has luminance corresponding to the current Iout. Emits light.

As described above, according to the present embodiment, even when the driving transistor of the pixel circuit and the transistor of the driving circuit have different characteristics, the pixel can emit light with a desired luminance.
In the above description, attention is paid to the difference in the gain coefficient β and the threshold voltage Vth caused by the difference in the manufacturing process between the transistor of the pixel circuit and the transistor of the current-voltage converter circuit. In some cases, the gain coefficient β and the threshold voltage Vth are different. As described above, the transistor used in the pixel circuit 16 is usually a TFT. However, the TFT has a characteristic that the gain coefficient β and the threshold voltage Vth are likely to vary. As a result, there arises a problem that the luminance of the pixel varies from pixel to pixel. Even when such pixel-to-pixel variations exist, the adjustment method described above is effective. By adjusting using this method, it is possible to adjust the variation in luminance for each pixel, so that the pixel can emit light with a desired luminance.

<Sixth Embodiment>
Next, a sixth embodiment of the present invention will be described. FIG. 11 is a diagram illustrating the reference voltage generation circuit 56. In the sixth embodiment, a reference voltage generation circuit 56 is used instead of the reference voltage generation circuit 53 in the fifth embodiment. In addition, the same code | symbol is attached | subjected about the component same as 5th Embodiment. There are n reference voltage generation circuits 56 corresponding to each of the data lines 12.
In FIG. 11, only the reference voltage generation circuit 56 corresponding to the data line 12 in the j-th column is shown in order to avoid the complexity of the drawing.

Next, the configuration of the reference voltage generation circuit 56 will be described. The reference voltage generation circuit 56 includes a transistor 56a, a transistor 56b, a transistor 56c, and a transistor 56d. The transistors 56a to 56d are all p-channel transistors, and their sources are connected to the power supply voltage on the higher side. The drains of the transistors 56a to 56d are connected to one ends of the switches 56e, 56f, 56g, and 56h, respectively. The transistor 56k is an n-channel transistor, and the other ends of the switches 56e to h are all connected to the drain of the transistor 56k. The source of the transistor 56k is grounded. Further, the reference voltage generation circuit 56 includes a current source 561 and a transistor 562. The transistor 562 is a p-channel transistor, its drain is connected to the current source 561, and its source is connected to the power supply voltage on the higher side. Here, the drain and gate of the transistor 562 are short-circuited to form a diode connection. The gate of the transistor 562 and the gates of the transistors 56a to 56d are connected to form a current mirror circuit. Accordingly, a gate voltage having a magnitude equal to the gate voltage of the transistor 562 is applied to the gates of the transistors 56a to 56d, and a current corresponding to the gate voltage flows between the sources and drains of the transistors 56a to 56d.

The channel size ratio of the transistors 56a to 56d is the same as that of the transistors 51a to 51d in the first embodiment, whereby the ratio of the current flowing through the transistors 56a, 56b, 56c, and 56d is 1: 2: 4: 8. When adjustment data consisting of a 4-bit binary number is input, the switches 56e to 56h are turned on / off based on the adjustment data, and a current flows through a transistor corresponding to the switch that is turned on. Therefore, the sum of these currents can have 16 levels of current values including 0, and a reference current having a magnitude corresponding to the adjustment data is output. The reference current is supplied to the drain of the transistor 56k, and a reference voltage corresponding to the magnitude of the reference current is generated between the gate and the source of the transistor 56k.
As described above, according to the present embodiment, even when the driving transistor of the pixel circuit and the transistor of the driving circuit have different characteristics, the pixel can emit light with a desired luminance.

<Seventh embodiment>
Next, a seventh embodiment of the present invention will be described. FIG. 12 is a diagram illustrating the current-voltage conversion circuit 57. In the seventh embodiment, a current-voltage conversion circuit 57 is used instead of the current-voltage conversion circuit 55 in the fifth embodiment. In addition, the same code | symbol is attached | subjected about the component same as 5th Embodiment. N current-voltage conversion circuits 57 are provided corresponding to each of the data lines 12.
In FIG. 12, only the current-voltage conversion circuit 57 corresponding to the data line 12 in the j-th column is shown in order to avoid complication of the drawing.

  Next, the configuration of the current-voltage conversion circuit 57 will be described. The current-voltage conversion circuit 57 includes a transistor 57a, a transistor 57b, a transistor 57c, and a transistor 57d. Each of the transistors 57a to 57d is a p-channel transistor, and its source is connected to the power supply voltage on the higher side. The drains of the transistors 57a to 57d are connected to one ends of the switches 57e, 57f, 57g, and 57h, respectively. Further, the gates of the transistors 57a to 57d are connected in common, and when the switches 57e to 57h are turned on, the gates of the transistors 57a to 57d are short-circuited with the respective drains, thereby forming a diode connection. It is like that. Further, the gates of the transistors 57 a to 57 d are connected to the data line 12. That is, during the period when the i-th scanning line 11 is selected, the transistors 57a to 57d and the transistor 162 form a current mirror connection.

The channel size ratio of the transistors 57a to 57d is the same as that of the transistors 51a to 51d in the fifth embodiment. That is, the transistors 57a to 57d all have the same channel length L1, but have different channel widths. When the channel widths of the transistors 57a, 57b, 57c, and 57d are Wa, Wb, Wc, and Wd, respectively, the ratio is Wa: Wb: Wc: Wd = 1: 2: 4: 8. When adjustment data consisting of a 4-bit binary number is input, the switches 57e to 57h are turned on / off based on the adjustment data, and a current flows through a transistor corresponding to the switch that is turned on. At this time, if the total channel width of the transistors corresponding to the switches in the on state is Ws, the transistors 57a to 57d are equivalent to one transistor having the channel width Ws. In other words, the current-voltage conversion circuit 57 in this embodiment corresponds to a circuit in which the channel width of the transistor 55 in the fifth embodiment can be adjusted. Since the gain coefficient β of the transistor is proportional to the channel width, adjusting the channel width is equivalent to adjusting the gain coefficient β.
As described above, according to the present embodiment, even when the driving transistor of the pixel circuit and the transistor of the driving circuit have different characteristics, the pixel can emit light with a desired luminance.

<Eighth Embodiment>
Next, an eighth embodiment of the present invention will be described. FIG. 13 is a diagram showing a configuration in which the buffer circuit 58 is provided. In the eighth embodiment, the voltage output from the current-voltage conversion circuit 55 in the fifth embodiment is output to the data line 12 via the buffer circuit 58. The buffer circuit 58 is, for example, a voltage follower. In addition, the same code | symbol is attached | subjected about the component same as 5th Embodiment. N buffer circuits 58 are provided corresponding to each of the data lines 12.
In FIG. 13, only the buffer circuit 58 corresponding to the data line 12 in the j-th column is shown in order to avoid complication of the drawing.

Since the data line 12 has a parasitic capacitance, it is necessary to charge the parasitic capacitance (write data) before accumulating charges in the capacitor 166 of the pixel circuit 16. The time required to write data to the data line depends on the current value, and there is a problem that the time required for writing becomes long when the gradation is low.
In the present embodiment, a voltage is output to the data line 12 via the buffer circuit 58. According to this configuration, since the time required to write data to the data line 12 depends on the current capability of the output stage of the buffer circuit 58, the time required to write data is reduced even at a low gradation. be able to.

<Ninth Embodiment>
Next, a ninth embodiment of the present invention will be described. FIG. 14 is a diagram illustrating a configuration of the pixel circuit 17. In the ninth embodiment, a threshold voltage compensation type pixel circuit 17 is used instead of the pixel circuit 16 in the fifth embodiment or the sixth embodiment. Although only the pixel circuit 17 located at the intersection of the scanning line 11 in the i-th row and the data line 12 in the j-th column is shown in the figure, the other pixel circuits 17 have the same configuration. .

The transistors T1 and T2 are p-channel transistors, and the transistors T3, T4, and T5 are n-channel transistors. The transistor T4 functions as a driving transistor that drives the organic EL element E1, and the transistors T1, T2, T3, and T5 function as switching transistors. The gate of the transistor T3 is connected to the scanning line 11, the source is connected to the data line 12, and the drain is connected to the source of the transistor T5 and one end of the capacitive element C1. The other end of the capacitive element C1 is connected to the gate of the transistor T1 and the drain of the transistor T2. The gate of the transistor T5 is connected to the initialization control line 112, and the drain thereof is connected to the drain of the transistor T2, the drain of the transistor T1, and the drain of the transistor T4. The gate of the transistor T2 is connected to the lighting control line 114 and the drain of the transistor T4. The source of the transistor T4 is connected to the anode of the organic EL element E1, and the cathode of the organic EL element R1 is grounded. The source of the transistor T1 is connected to the power supply line 14 to which the higher power supply voltage VEL is applied.
The scanning line drive circuit 21 supplies the scanning signal GWRT to the scanning line 11, the control signal GINIT to the initialization control line 112, and the control signal GSET to the lighting control line 114.

Next, the operation of the pixel circuit 17 located at the intersection of the i-th scanning line 11 and the j-th data line 12 will be described. FIG. 15 is a diagram illustrating the operation of the pixel circuit 17. The operation of the pixel circuit 17 is divided into four periods. STEP1 to STEP4 in FIG. 15 correspond to periods (1) to (4), respectively.
First, in the period (1), the scanning line driving circuit 21 sets the control signal GSET to L level and the control signal GINIT to H level. Further, the data line driving circuit 22 sets the data signal supplied to all the data lines 12 as the initial voltage VS. Here, VS is a voltage lower than VEL by a certain value.
As shown in FIG. 15A, in the period (1), the transistor T2 is turned on, so that the driving transistor T1 functions as a diode, while the transistor T4 is turned off, so that the current path to the organic EL element E1 Is cut off. Further, when the control signal GINIT becomes H level, the transistor T5 is turned on, and when the scanning signal GWRT becomes H level, the transistor T3 is also turned on. Accordingly, the gate of the drive transistor T1 has the initial voltage VS substantially the same as that of the data line 12.

In the next period (2), the scanning line driving circuit 21 maintains the control signal GSET at the L level and returns the control signal GINIT to the L level. Further, the data line driving circuit 22 maintains a state in which the data signal is set to the initial VS.
As shown in FIG. 15B, in the period (2), the transistor T2 continues to be turned on so that the driving transistor T1 continues to function as a diode. However, when the control signal GINIT becomes L level, the transistor Since T5 is turned off, the current path from the power supply line 14 to the data line 12 is interrupted.
On the other hand, since the transistor T2 is kept on, the voltage at one end of the capacitor C1, that is, the node A is reduced from the high voltage VEL of the power source by the threshold voltage Vth of the driving transistor T1 (VEL−Vth). Try to change. However, since the other end of the capacitor C1 is kept constant at the initial voltage VS in the data line 12 by turning on the transistor T3, the voltage change at the node A is in the capacitor C1 (and the gate capacitance of the driving transistor T1). It progresses according to charging / discharging. However, since the charge of the capacitor C1 is already cleared by the short circuit in the period (1) and the voltage change of the node A from the period (1) is small, the voltage of the node A is (VEL−) in the period (2). It does not take a long time to reach Vth). Therefore, it can be considered that the voltage of the node A at the end timing of the period (2) is (VS− (VEL−Vth)).

Next, the data line driving circuit 22 switches the voltage of the data signal X from the initial voltage (VEL−Vth) to the voltage (VEL−Vth−ΔV) in the period (3). Here, ΔV is determined by image data corresponding to a pixel in i row and j column, and is a value that becomes closer to zero as the organic EL element E1 of the pixel is darkened. Therefore, the voltage (VEL−Vth−ΔV) means a gradation voltage corresponding to the amount of current to be passed through the organic EL element E1.
As shown in FIG. 15C, in the period (3), since the transistor T2 is off, one end (node A) of the capacitor C1 is only held by the gate capacitor of the driving transistor T1. Absent. For this reason, the voltage of the node A is decreased from the voltage (VEL−Vth) by the amount of ΔV, which is the voltage change at the other end of the capacitor C1, distributed by the capacitance ratio of the capacitor C1 and the gate capacitance of the driving transistor T1. become. Specifically, when the size of the capacitor C1 is Cprg and the gate capacitance of the driving transistor T1 is Ctp, the node A is reduced by {ΔV · Cprg / (Ctp + Cprg)} from the off voltage (VEL−Vth). Thus, the voltage {VEL−Vth−ΔV · Cprg / (Ctp + Cprg)} is written to the node A.
Then, a current corresponding to the voltage written in the node A flows through the organic EL element E1, and light emission is started. The voltage written to the node A at this time is a target voltage corresponding to the current to be passed through the organic EL element E1.

Next, in the period (4), the scanning line driving circuit 21 sets the scanning signal GWRT to L level and the control signal GSET to H level.
As shown in FIG. 15D, in the period (4), the transistor T3 is turned off, but the node A has a target voltage {VEL−Vth−ΔV depending on the gate capacitance (and the capacitance C1) of the driving transistor T1. • Cprg / (Ctp + Cprg)}. Therefore, in the period (4), the current corresponding to the target voltage continues to flow through the organic EL element E1, and thus the organic EL element E1 continues to emit light with the brightness specified by the image data.
When the period (4) ends and the control signal GSET becomes L level, the transistor T4 is turned off and the current path to the organic EL element E1 is cut off, so that the organic EL element E1 is turned off. Become.

  According to this embodiment, the target voltage corresponding to the current to be passed through the organic EL element can be written to the gate of the drive transistor, so that variations in the threshold voltage of the drive transistor can be compensated. Accordingly, variation in luminance caused by variation in threshold voltage of the driving transistor can be adjusted, so that the pixel can emit light with desired luminance.

<Modification>
The present invention is not limited to the form described above, and can be implemented in various forms. For example, the embodiment described above can be modified as follows.
In the first and second embodiments, the reference voltage output from the reference voltage generation circuit 33 may be a voltage obtained by an external input voltage, a resistor, or the like. Further, by making this voltage adjustable, it is possible to adjust the dynamic range of the grayscale current output from the DAC 31 or the DAC 35. As a result, the luminance dynamic range can be adjusted for each pixel.
Further, the correction current may be a current obtained by an externally input current or a resistor.
Further, the DAC 32 for generating the correction current may be shared by the plurality of data lines 12.

In the third embodiment, the reference voltage input to the DACs 31 and 32 may be a voltage obtained by an external input voltage, resistance, or the like. Further, by making this voltage adjustable, it is possible to adjust the dynamic range of the grayscale current output from the DAC 31. As a result, the luminance dynamic range can be adjusted for each pixel.
Further, the correction current may be a current obtained by an externally input current or a resistor.
Further, the DAC 32 for generating the correction current may be shared by the plurality of data lines 12.

In the embodiment described above, an example in which the present invention is applied to an organic EL display has been described. However, the present invention can also be applied to an electro-optical device other than an organic EL display. That is, the present invention can be applied to any device that displays an image using an electro-optical material that converts an electrical action such as supply of current or application of voltage into an optical action such as change in luminance or transmittance.
For example, an active matrix type electro-optical panel using TFD (thin film diode) as an active element, a passive matrix type electro-optical device in which liquid crystal is sandwiched by the intersection of strip electrodes, a colored liquid and white dispersed in the liquid Electrophoretic display device using microcapsules containing particles as an electro-optical material, twist ball display using a twist ball painted differently for each region of different polarity as an electro-optical material, and black toner as electricity The present invention is applied to various electro-optical devices such as a toner display used as an optical material or a plasma display panel (PDP) using a high-pressure gas such as helium or neon as an electro-optical material.

Next, an example of an electronic apparatus using the electro-optical device according to the invention will be described.
FIG. 16 is a diagram illustrating a personal computer 200 using the electro-optical device 100. In this figure, a personal computer 200 includes a main body 202 provided with a keyboard 201 and a display unit 203 using the electro-optical device 100 according to the present invention.
In addition to the personal computer described above, the electronic apparatus to which the electro-optical device according to the present invention can be used includes a mobile phone, a liquid crystal television, a viewfinder type / direct monitor type video tape recorder, a car navigation device, a pager. And various devices such as electronic notebooks, calculators, word processors, workstations, videophones, POS terminals, and digital still cameras.

1 is a diagram illustrating a configuration of an electro-optical device 100 according to a first embodiment. FIG. 6 is a diagram showing signals supplied from a scanning line driving circuit 21. 2 is a diagram illustrating an example of a configuration of a pixel circuit 16. FIG. 2 is a diagram showing a configuration of a data line driving circuit 22. FIG. FIG. 3 is a diagram illustrating configurations of a DAC 222 and a reference voltage generation circuit 223. It is a figure which shows DAC35. FIG. 3 is a diagram illustrating configurations of a DAC 222 and a reference voltage generation circuit 223. It is a figure which shows DAC45. 2 is a diagram showing a configuration of a data line driving circuit 22. FIG. 2 is a diagram illustrating the configuration of a DAC 222, a reference voltage generation circuit 223, and a current-voltage conversion circuit 224. 2 is a diagram illustrating a reference voltage generation circuit 56. FIG. 5 is a diagram showing a current-voltage conversion circuit 57. It is a figure which shows the structure in which the buffer circuit 58 was provided. 2 is a diagram illustrating a configuration of a pixel circuit 17. FIG. FIG. 6 is a diagram illustrating an operation of the pixel circuit 17. 1 is a diagram showing a personal computer using an electro-optical device 100. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Electro-optical apparatus, 10 ... Electro-optical panel, 11 ... Scan line, 12 ... Data line, 14 ... Power supply line, 16 ... Pixel circuit, 21 ... Scan line drive circuit, 22 ... Data line drive circuit, 60 ... Control apparatus , 70 ... power supply circuit, 80 ... image memory, 221 ... line memory, 222 ... DAC, 223 ... reference voltage generation circuit, 224 ... current-voltage conversion circuit, 225 ... buffer circuit, 31 ... DAC, 32 ... DAC, 33 ... reference Voltage generating circuit 34 ... Reference voltage generating circuit 35 ... DAC 36 ... Reference voltage generating circuit 41 ... DAC 42 ... DAC 44 ... Reference voltage generating circuit 45 ... DAC 46 46 ... Reference voltage generating circuit 51 ... DAC, 53... Reference voltage generation circuit, 55... Current voltage conversion circuit, 56... Reference voltage generation circuit, 57.

Claims (4)

A driving transistor that is provided at each intersection of a plurality of scanning lines and a plurality of data lines, generates a current in accordance with an applied voltage, and a driven element that is driven by the current supplied from the driving transistor A switching circuit having a gate connected to the scanning line, a source connected to the data line, and a drain connected to the gate of the driving transistor;
A data line driving circuit for driving the data lines of an electro-optical device, comprising: a scanning line driving circuit that sequentially selects each of the plurality of scanning lines and supplies a selection signal to the selected scanning line;
A gray-scale current generating circuit that generates gray-scale current based on gray-scale data representing the gray scale of a pixel provided on the scan line during a period in which a selection signal is supplied to the scan line;
A first transistor having a drain and a gate that are short-circuited and connected to the gate of the driving transistor via the data line and the switching transistor; A current-voltage conversion circuit that generates a voltage according to the gradation current by supplying a regulated current to the first transistor;
The current-voltage conversion circuit is
When the threshold voltage of the first transistor is lower than the threshold voltage of the driving transistor, the power supply voltage on the higher side of the first transistor is set to the power supply voltage on the higher side of the driving transistor. A voltage that is lower by a difference between threshold voltages of the first transistor and the driving transistor,
When the threshold voltage of the first transistor is higher than the threshold voltage of the drive transistor, the power supply voltage on the higher side of the first transistor is set to the power supply voltage on the higher side of the drive transistor. A data line driving circuit, wherein the voltage is set higher by a difference between threshold voltages of the first transistor and the driving transistor. A driving transistor that is provided at each intersection of a plurality of scanning lines and a plurality of data lines, generates a current in accordance with an applied voltage, and a driven element that is driven by the current supplied from the driving transistor A switching circuit having a gate connected to the scanning line, a source connected to the data line, and a drain connected to the gate of the driving transistor;
A data line driving circuit for driving the data lines of an electro-optical device, comprising: a scanning line driving circuit that sequentially selects each of the plurality of scanning lines and supplies a selection signal to the selected scanning line;
A gray-scale current generating circuit that generates gray-scale current based on gray-scale data representing the gray scale of a pixel provided on the scan line during a period in which a selection signal is supplied to the scan line;
A plurality of transistors whose gates are connected in common, and a switch that short-circuits each drain and gate of the plurality of transistors based on data created in advance and connects the drains in common, The gate is connected to the gate of the driving transistor through the data line and the switching transistor, and the gradation current generated by the gradation current generation circuit is supplied to the plurality of transistors to supply the gradation. have a current-voltage conversion circuit which generates a voltage corresponding to the current,
The current-voltage conversion circuit is
When the threshold voltage of the plurality of transistors is lower than the threshold voltage of the drive transistor, the power supply voltage on the higher side of the plurality of transistors is set to the power supply voltage on the higher side of the drive transistor. Set a voltage lower by a difference between threshold voltages of the plurality of transistors and the driving transistor,
When the threshold voltage of the plurality of transistors is higher than the threshold voltage of the drive transistor, the power supply voltage on the higher side of the plurality of transistors is set to the power supply voltage on the higher side of the drive transistor. A data line driving circuit , wherein the voltage is set higher by a difference between threshold voltages of the plurality of transistors and the driving transistor .   An electro-optical device comprising the data line driving circuit according to claim 1.   An electronic apparatus comprising the electro-optical device according to claim 3.

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