JP4797083B2 - Thin film solar cell module - Google Patents

Description

  The present invention relates to a thin film solar cell module.

In recent years, a thin film photoelectric conversion device formed by a plasma CVD method using a gas as a raw material has attracted attention. Examples of such thin film photoelectric conversion devices include silicon thin film photoelectric conversion devices made of silicon thin films, thin film photoelectric conversion devices made of CIS (CuInSe ₂ ) compounds, CIGS (Cu (In, Ga) Se ₂ ) compounds, and the like. Development is being promoted and production is being expanded. A major feature of these photoelectric conversion devices is that a semiconductor layer or a metal electrode film is stacked on a low-cost substrate with a large area by using a forming device such as a plasma CVD device or a sputtering device, and then manufactured on the same substrate. This is because the photoelectric conversion device can be reduced in cost and performance can be achieved by separating and connecting the photoelectric conversion device by laser patterning or the like.

  By the way, a thin film photoelectric conversion module having a series array configured by connecting a plurality of cells in series is known (see, for example, Patent Document 1). Patent Document 1 describes that cell destruction due to a hot spot phenomenon can be sufficiently prevented by designing a photoelectric conversion device so that a short-circuit current flowing in a series array under a predetermined condition is 600 mA or less. ing.

JP 2001-68713 A

  As a result of diligent research, the present inventors have found that the method described in Patent Document 1 cannot sufficiently suppress cell damage due to the hot spot phenomenon, or contact lines that electrically connect adjacent cells. It has been found that damage may not be sufficiently suppressed.

  This invention is made | formed in view of such a situation, and provides the thin film solar cell module which can suppress damage to a cell or a contact line.

The thin film solar cell module of the present invention includes a cell module including a plurality of cell strings bi-directionally connected in parallel to each other, and the cell string includes a plurality of cells connected in series to each other through a contact line. Includes a surface electrode, a photoelectric conversion layer, and a back electrode, which are stacked in this order, and the contact line electrically connects one surface electrode and the other back electrode of the two adjacent cells, : Xenon lamp, Irradiance: 100 mW / cm ² , AM: 1.5, Temperature: 25 ° C. The output of the cell module is P (W), the output of the cell string is Ps (W), When the area of the contact line is Sc (cm ² ), (P-Ps) / Sc is 10.7 (kW / cm ² ) or less, and Ps is 12 W or more. And P is 385 W or less.

  First, the present inventors consider that it is not the magnitude of the current flowing in the cell string but the output from the cell string that is related to cell damage, and the upper limit of the maximum output of the cell string should be specified. I thought that there was. As a result of many experiments, it was found that cell damage can be suppressed even under extremely disadvantageous conditions by setting the output of the cell string to 12 W or less.

In addition, when only one of the cell strings is shaded and the power generation is performed by other cell strings, the present inventors flow into the shaded cell strings. The inventors have conceived that a contact line connecting two adjacent cells in a cell string in series may be damaged. After many experiments, when P is 385 W or less, the contact line applied power density defined by (P-Ps) / Sc is set to 10.7 (kW / cm ² ) or less. As a result, it was found that damage to the contact line is suppressed, and the present invention has been completed.

Hereinafter, various embodiments of the present invention will be exemplified.
P may be 90 W or more. In this case, since the contact line is relatively easily damaged, the merit of applying the present invention is great.
The contact line may have a width of 40 μm or more and 200 μm or less.
The front electrode may be made of a transparent conductive film made of a material containing SnO ₂ , and the back electrode may have a laminated structure of the transparent conductive film and the metal film.
The various embodiments shown here can be combined with each other.

It is a top view which shows the structure of the thin film solar cell module of one Embodiment of this invention. It is II sectional drawing in FIG. (A) is an enlarged view of the region A in FIG. 1, and (b) is an extracted contact line in (a). (A)-(c) is a figure for demonstrating the term "bidirectionally mutually connected in parallel" in the thin film solar cell module of one Embodiment of this invention. It is a top view which shows the structure of the thin film solar cell module of another embodiment of this invention. It is a top view which shows the structure of the thin film solar cell module of another embodiment of this invention. It is sectional drawing which shows the structure of the plasma CVD apparatus used for manufacture of the thin film solar cell module of one Embodiment of this invention.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The contents shown in the drawings and the following description are examples, and the scope of the present invention is not limited to those shown in the drawings and the following description. Hereinafter, the description will be made by taking a thin film solar cell module having a superstrate type structure as an example, but the following description is basically applicable to a thin film solar cell module having a substrate type structure. However, in the case of the substrate type structure, the order of forming the front surface electrode, the photoelectric conversion layer, and the back surface electrode is reversed, and the back surface electrode, the photoelectric conversion layer, and the front surface electrode are formed on the substrate in this order.
In the case of the super straight type structure, the substrate side is the front side, and in the case of the substrate type structure, the substrate side is the back side.
Further, the description proceeds by taking as an example the case where the i-type semiconductor layers of the first and second photoelectric conversion layers are each an amorphous layer and the i-type semiconductor layer of the third photoelectric conversion layer is a microcrystalline layer. The description of is a thin film solar cell module having a configuration other than this, for example, a thin film solar cell module having a configuration in which the i-type semiconductor layers of the first to third photoelectric conversion layers are all amorphous layers or all crystalline layers, and Thin film solar cell module, second photoelectric conversion layer, wherein i-type semiconductor layer of first photoelectric conversion layer is amorphous layer, and i-type semiconductor layers of second and third photoelectric conversion layers are each microcrystalline layers And a thin film solar cell module having a configuration in which one or both of the third photoelectric conversion layer is omitted and a thin film solar cell module having a configuration further including another photoelectric conversion layer on the downstream side of the third photoelectric conversion layer. Is true.
Further, the description will be given by taking as an example the case where the pin junctions of the respective photoelectric conversion layers are arranged in the order of the p-type semiconductor layer, the i-type semiconductor layer, and the n-type semiconductor layer, but the following description is based on the pin of each photoelectric conversion layer. The same applies basically when the junctions are arranged in the order of an n-type semiconductor layer, an i-type semiconductor layer, and a p-type semiconductor layer.

1. Configuration of Thin Film Solar Cell Module A thin film solar cell module according to an embodiment of the present invention will be described with reference to FIGS. 1, 2, 3 (a), 3 (b) and FIGS. 4 (a) to 4 (c). 1 is a plan view showing the configuration of the thin-film solar cell module of the present embodiment, FIG. 2 is a cross-sectional view taken along the line II in FIG. 1, and FIG. 3A is a region A in FIG. FIG. 3B shows the contact line 17 extracted from FIG. 3A for dimension display. 4A to 4C are diagrams for explaining the term “bidirectionally connected in parallel to each other”.

The thin film solar cell module 1 of this embodiment includes a cell module 1 a on a substrate 2. The cell module 1a includes a plurality of cell strings 21 that are bidirectionally connected to each other in parallel. In this specification, “bidirectionally connected in parallel to each other” means a state in which a current generated in one cell string 21 can flow into the other cell string 21 and vice versa. When a plurality of cell strings 21 are connected in parallel without the blocking diode 31 as shown in FIG. 4A, for example, the current generated in the cell string A can flow into the cell string B, and the cell string The current generated in B can flow into the cell string A. Such a relationship is established by any two combinations of the cell strings A to D. Accordingly, the cell strings A to D are bidirectionally connected in parallel to each other. On the other hand, when a plurality of cell strings 21 are connected in parallel via the blocking diode 31 as shown in FIG. 4B, for example, the current generated in the cell string A is blocked by the blocking diode 31 and the cell string B The current generated in the cell string B cannot be flown into the cell string A due to the blocking diode 31 being blocked. Such a relationship is established by any two combinations of the cell strings A to D. Therefore, the cell strings A to D are not bi-directionally connected in parallel. Further, as shown in FIG. 4C, a set of cell strings A and B and a set of C and D are connected in parallel without passing through the blocking diode 31, and these two sets are connected through the blocking diode 31. Connected in parallel. In this case, the cell strings A and B are bidirectionally connected to each other in parallel, and the cell strings C and D are bidirectionally connected to each other in parallel. However, for example, the cell strings A and C are not bidirectionally connected in parallel.
As the substrate 2, a glass substrate having heat resistance and translucency in the plasma CVD forming process, a resin substrate such as polyimide, and the like can be used.

  The plurality of cell strings 21 are separated from each other by a parallel dividing line 25 and are electrically connected to each other in parallel through a common electrode 23. The interval between two adjacent parallel division lines 25 may or may not be constant. Accordingly, the outputs of the plurality of cell strings 21 may be the same or different from each other.

  The cell string 21 includes a plurality of cells 27 connected in series with each other through the contact line 17. The plurality of cells 27 are separated from each other by the front electrode division line 13 and the back electrode division line 29. Each cell 27 has a surface electrode 3, a photoelectric conversion layer (first to third photoelectric conversion layers 5, 7, 9) and a back electrode 11.

Surface electrodes, for example, a transparent conductive film, preferably made of a transparent conductive film made of a material containing SnO _2. The material containing SnO ₂ may be SnO ₂ itself or a mixture of SnO ₂ and another oxide (for example, ITO which is a mixture of SnO ₂ and In ₂ O ₃ ). The proportion of SnO ₂ in the material containing SnO ₂ is, for example, 3～100Wt%, specifically, for example, 3,5,10,20,30,40,50,60,70,80,90, 95, 99 or 100 wt%. This ratio may be within a range between any two of the numerical values exemplified here, or may be any one or more.

The first photoelectric conversion layer 5 includes a p-type semiconductor layer 5a, an i-type amorphous layer buffer layer 5b, an i-type amorphous layer 5c, and an n-type semiconductor layer 5d stacked in this order. The second photoelectric conversion layer 7 includes a p-type semiconductor layer 7a, an i-type amorphous layer buffer layer 7b, an i-type amorphous layer 7c, and an n-type semiconductor layer 7d in this order. The third photoelectric conversion layer 9 includes a p-type semiconductor layer 9a, an i-type microcrystalline layer 9b, and an n-type semiconductor layer 9c stacked in this order. The buffer layers 5b and 7b can be omitted. The p-type semiconductor layer is doped with p-type impurity atoms such as boron and aluminum, and the n-type semiconductor layer is doped with n-type impurity atoms such as phosphorus. The i-type semiconductor layer may be a completely non-doped semiconductor layer, or may be a weak p-type or weak n-type semiconductor layer that contains a small amount of impurities and has a sufficient photoelectric conversion function. In this specification, “semiconductor layer” means an amorphous or microcrystalline semiconductor layer, and “amorphous layer” and “microcrystalline layer” are amorphous and microcrystalline layers, respectively. It means a semiconductor layer.
Materials of the semiconductor layers forming the photoelectric conversion layer is not particularly limited, for example, made of silicon-based semiconductor, CIS (CuInSe ₂₎ compound semiconductor, CIGS (Cu (In, Ga ) Se 2) compound semiconductor or the like. Hereinafter, the description will be given by taking as an example the case where each semiconductor layer is made of a silicon-based semiconductor. “Silicon-based semiconductor” means amorphous or microcrystalline silicon, or a semiconductor in which carbon, germanium, or other impurities are added to amorphous or microcrystalline silicon (silicon carbide, silicon germanium, or the like). Further, “microcrystalline silicon” means silicon in a mixed phase state of crystalline silicon having a small crystal grain size (about several tens to thousands of thousands) and amorphous silicon. Microcrystalline silicon is formed, for example, when a crystalline silicon thin film is manufactured at a low temperature using a non-equilibrium process such as a plasma CVD method.

The configuration and material of the back electrode 11 are not particularly limited, but in one example, the back electrode 11 has a laminated structure of a transparent conductive film and a metal film. The transparent conductive film is made of SnO ₂ , ITO, ZnO or the like. The metal film is made of a metal such as silver or aluminum. The transparent conductive film and the metal film are formed by a method such as CVD, sputtering, or vapor deposition.

  The contact line 17 electrically connects one surface electrode 3 and the other back surface electrode 11 of the two adjacent cells 27. The contact line 17 is formed by filling a photoelectric conversion layer dividing line 15 with a conductor (for example, a material for a back electrode).

  The thin-film solar cell module 1 may include one cell module 1a on one substrate 2 as shown in FIG. 1, but a blocking diode 31 on one substrate 2 as shown in FIG. A plurality of cell modules 1a connected in parallel via each other may be provided. In this case, power from another cell module 1a does not flow into one cell module 1a. Therefore, the cell string 21 in one cell module 1a and the cell string 21 in another cell module 1a are not mutually connected in parallel bidirectionally.

  Moreover, the thin film solar cell module 1 may include a plurality of photoelectric conversion units 33 as shown in FIG. Each photoelectric conversion unit 33 has one or a plurality of cell strings on the substrate 2. Further, as shown in FIG. 6, a plurality of cell strings belonging to different photoelectric conversion units 33 (that is, on different substrates 2) are bidirectionally connected in parallel to each other. In this case, the cell module 1a is configured across a plurality of substrates 2.

The thin-film solar cell module 1 of the present embodiment has a light source: xenon lamp, irradiance: 100 mW / cm ² , AM: 1.5, temperature: 25 ° C. (hereinafter referred to as “standard conditions”). When the output of the cell module 1a is P (W), the output of the cell string 21 is Ps (W), and the area of the contact line 17 is Sc (cm ² ), the contact line applied power density (P-Ps) / Sc Is 10.7 (kW / cm ² ) or less, Ps is 12 W or less, and P is 385 W or less (these three conditions are collectively referred to as “basic conditions”). Hereinafter, “output” means output under standard conditions.

  Whether the basic conditions are satisfied is determined by the following method. First, when there are a plurality of cell modules 1a, an arbitrary cell module 1a is selected. Next, an arbitrary cell string 21 in the selected cell module 1a is selected. If there are a plurality of contact lines 17, any one contact line 17 in the selected cell string 21 is selected. Then, it is determined whether or not the basic condition is satisfied in the selected cell module 1a, cell string 21 and contact line 17.

The output P of the cell module 1a is not particularly limited as long as it is 385 W or less, but 90 W or more is preferable. If the output P of the cell module 1a is 385 W or less, damage to the contact line 17 is suppressed when the contact line applied power density (P-Ps) / Sc is 10.7 (kW / cm ² ) or less. . Further, when the output P of the cell module 1a is 90 W or more, the contact line 17 is easily damaged, so that the necessity of designing the thin-film solar cell module 1 to satisfy the basic condition is increased. Specifically, the output P of the cell module 1a is, for example, 50, 60, 70, 80, 90, 100, 110, 120, 130, 140, 150, 160, 170, 180, 190, 200, 210, 220. , 230, 240, 250, 260, 270, 280, 290, 300, 310, 320, 330, 340, 350, 360, 370, 380 or 385W. The output P of the cell module 1a may be any one or less of the numerical values exemplified here, or may be within a range between any two.

  The output Ps of the cell string 21 is preferably small from the viewpoint of suppressing cell damage (for example, film peeling between the surface electrode 3 and the first photoelectric conversion layer 5) due to a hot spot phenomenon. The upper limit of the output Ps of the cell string 21 was found by a cell hot spot resistance test described later, and was 12 W. The output Ps of the cell string 21 is not particularly limited as long as it is 12 W or less, and specifically, for example, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, or 12 W. . The output Ps of the cell string 21 may be any one or less of the numerical values exemplified here, or may be within a range between any two. The output Ps of the cell string 21 can be calculated by (output P of the cell module 1a / effective power generation area of the cell module 1a) × area of the cell string 21.

  When the output P of the cell module 1a is constant, the output Ps of the cell string 21 can be reduced by increasing the number of cell strings 21 included in the cell string 1a. In order to increase the number of cell strings 21, the number of parallel dividing lines 25 may be increased. In other words, the number of parallel division stages of the cell module 1a may be increased. The number of parallel division stages is the number of parallel division lines 25 + 1.

  If only the upper limit of the output Ps of the cell string 21 is considered, the larger the number of parallel division stages, the more advantageous. However, when the number of parallel division stages is increased, the contact line applied power density (P-Ps) / Sc increases for the following reasons, and the contact line 17 is easily damaged.

(1) Increase in applied power from other cell strings 21 When one cell string 21 is shaded, the power generated in all other cell strings 21 is applied to the shaded cell string 21 . The value of the power applied to the shadowed cell string 21 is (output P of the cell module 1a) − (output Ps of the shadowed cell string 21). Since the value of (P−Ps) increases as the Ps value of the cell string 21 decreases, if the number of parallel division stages is increased and the output Ps of each cell string 21 is decreased, the value is applied to the shadowed cell string 21. Power to increase.

(2) Reduction of the area of the contact line 17 When the number of parallel division stages is increased, the length L of the contact line 17 shown in FIG. 3B is reduced, and as a result, the area Sc of the contact line 17 is reduced.

(3) Increase in contact line applied power density As described above, when the number of parallel division stages is increased, the value of P-Ps increases and the area Sc of the contact line 17 decreases. Therefore, the contact line applied power density (P-Ps) / Sc increases and the contact line 17 is easily damaged.

In order to suppress damage to the contact line 17, it is necessary to make the contact line applied power density (P-Ps) / Sc equal to or less than the upper limit. The upper limit of the contact line applied power density (P-Ps) / Sc was determined by a reverse overcurrent resistance test described later, and was 10.7 (kW / cm ² ). The contact line applied power density (P-Ps) / Sc is not particularly limited as long as it is 10.7 (kW / cm ² ) or less. Specifically, for example, 1, 2, 3, 4, 5, 6 , 7, 8, 9, 10, 10.5 or 10.7 (kW / cm ² ). The contact line applied power density (P-Ps) / Sc may be any one or less of the numerical values exemplified here, or may be within a range between any two.

  Incidentally, the area Sc of the contact line 17 is obtained by the length L × width W of the contact line 17 as shown in FIG. The length L and the width W of the contact line 17 can be measured by observing from the cell light incident surface (substrate 2) side using an optical microscope.

  Although the width W of the contact line 17 is not specifically limited, For example, it is 20-300 micrometers, and 40-200 micrometers is preferable. When the width W of the contact line 17 is reduced, the area Sc is reduced and the contact line applied power density (P-Ps) / Sc is increased. When the width W of the contact line 17 is increased, the effective power generation area is reduced. If the width W is 40 to 200 μm, the contact line applied power density (P-Ps) / Sc does not become too large, and a wide effective power generation area can be secured. Specifically, the width W of the contact line 17 is, for example, 20, 30, 40, 50, 60, 70, 80, 90, 100, 110, 120, 130, 140, 150, 160, 170, 180, 190. , 200, 210, 220, 230, 240, 250, 260, 270, 280, 290 or 300 μm. The width W of the contact line 17 may be within a range between any two of the numerical values exemplified here.

2. Plasma CVD Apparatus Next, a plasma CVD apparatus for forming a semiconductor layer included in the above thin film solar cell module will be described with reference to FIG. FIG. 7 is a cross-sectional view showing a configuration of a plasma CVD apparatus used for manufacturing the thin film solar cell module of the present embodiment.

  The configuration illustrated in FIG. 7 is an exemplification, and the semiconductor layer may be formed using an apparatus having another configuration. Further, the semiconductor layer may be formed by a method other than plasma CVD. Here, the description will be given by taking a single chamber plasma CVD apparatus having one film forming chamber as an example, but the description also applies to a multi-chamber plasma CVD apparatus having a plurality of film forming chambers. The same applies.

  As shown in FIG. 7, the plasma CVD apparatus used in this embodiment includes a sealable film formation chamber 101 for forming a semiconductor layer therein, and a gas introduction for introducing a replacement gas into the film formation chamber 101. Unit 110 and a gas exhaust unit 116 for exhausting the replacement gas from the film formation chamber 101.

  More specifically, the plasma CVD apparatus in FIG. 7 has a parallel plate type electrode structure in which a cathode electrode 102 and an anode electrode 103 are installed in a film forming chamber 101 that can be sealed. The distance between the cathode electrode 102 and the anode electrode 103 is determined according to desired processing conditions, and is generally several mm to several tens mm. Outside the film forming chamber 101, a power supply unit 108 that supplies power to the cathode electrode 102 and an impedance matching circuit 105 that performs impedance matching between the power supply unit 108 and the cathode electrode 102 and the anode electrode 103 are installed. Yes.

  The power supply unit 108 is connected to one end of the power introduction line 106a. The other end of the power introduction line 106 a is connected to the impedance matching circuit 105. One end of the power introduction line 106 b is connected to the impedance matching circuit 105, and the other end of the power introduction line 106 b is connected to the cathode electrode 102. The power supply unit 108 may output either CW (continuous waveform) AC output or pulse-modulated (on / off control) AC output, or may be capable of switching these outputs.

  The frequency of AC power output from the power supply unit 108 is generally 13.56 MHz. However, the frequency is not limited to this, and frequencies from several kHz to the VHF band and further to the microwave band may be used. .

  On the other hand, the anode electrode 103 is electrically grounded, and a substrate 107 is installed on the anode electrode 103. The substrate 107 is, for example, the substrate 2 on which the surface electrode 3 is formed. The substrate 107 may be placed on the cathode electrode 102, but is generally placed on the anode electrode 103 in order to reduce film quality deterioration due to ion damage in the plasma.

  A gas introduction unit 110 is provided in the deposition chamber 101. A gas 118 such as a dilution gas, a material gas, or a doping gas is introduced from the gas introduction unit 110. Examples of the diluent gas include a gas containing hydrogen gas, and examples of the material gas include silane-based gas, methane gas, and germane gas. Examples of the doping gas include a p-type impurity doping gas such as diborane gas and an n-type impurity doping gas such as phosphine gas.

  In addition, a gas exhaust unit 116 and a pressure adjusting valve 117 are connected in series to the film forming chamber 101, so that the gas pressure in the film forming chamber 101 is kept substantially constant. When the gas pressure is measured in the vicinity of the gas inlet 110 and the gas exhaust port 119 in the film forming chamber, a slight error occurs. Therefore, it is desirable to measure the gas pressure at a position away from the gas inlet 110 and the gas exhaust port 119. By supplying power to the cathode electrode 102 in this state, plasma is generated between the cathode electrode 102 and the anode electrode 103, the gas 118 is decomposed, and a semiconductor layer can be formed on the substrate 107.

The gas exhaust unit 116 may be capable of high vacuum exhausting the gas pressure in the film forming chamber 101 to a pressure of about 1.0 × 10 ⁻⁴ Pa, but simplification of the apparatus, cost reduction, and throughput improvement. From this point of view, one having an exhaust capability of a pressure of about 0.1 Pa may be used. The volume of the film forming chamber 101 is increased as the substrate size of the semiconductor device is increased. When such a film forming chamber 101 is evacuated to a high vacuum, a high-performance gas evacuation unit 116 is necessary, which is not desirable from the viewpoint of simplification of the apparatus and cost reduction, and a simple gas evacuation unit 116 for low vacuum is provided. It is more desirable to use.

  Examples of the simple low vacuum gas exhaust unit 116 include a rotary pump, a mechanical booster pump, a sorption pump, and the like, and these are preferably used alone or in combination of two or more.

The film formation chamber 101 of the plasma CVD apparatus used in the present embodiment can have a size of about 1 m ³ , for example. As a typical gas exhaust unit 116, a mechanical booster pump and a rotary pump connected in series can be used.

3. Method for Manufacturing Thin Film Solar Cell Module Next, a method for manufacturing a thin film solar cell module according to an embodiment of the present invention will be described with reference to FIGS. 1, 2, 3 (a), 3 (b), and 7.

  Hereinafter, the description will be given by taking as an example the case where a semiconductor layer is formed using a single-chamber plasma CVD apparatus having one film forming chamber as shown in FIG. This is basically the case when a semiconductor layer is formed using a CVD apparatus. However, in a multi-chamber plasma CVD apparatus, p-type, i-type, and n-type semiconductor layers can be formed in separate film formation chambers, so that a gas replacement step described later can be omitted.

  In the manufacturing method of this embodiment, the 1st photoelectric converting layer 5, the 2nd photoelectric converting layer 7, and the 3rd photoelectric converting layer 9 are formed in the same film-forming chamber. Forming in the same film forming chamber means forming the first to third photoelectric conversion layers 5, 7, and 9 using the same or different electrodes in the same film forming chamber. It is desirable to form the first to third photoelectric conversion layers 5, 7, and 9 using the same electrode. In addition, it is desirable from the viewpoint of improving production efficiency that the first to third photoelectric conversion layers 5, 7, and 9 are continuously formed without being released to the atmosphere. Furthermore, it is desirable from the viewpoint of improving production efficiency that the substrate temperatures when forming the first to third photoelectric conversion layers 5, 7, 9 are the same.

  Hereinafter, the manufacturing method of the thin film solar cell module 1 is explained in full detail. The method shown below is an illustration, and the thin-film solar cell module 1 may be manufactured by a method other than the method shown below.

3-1. Surface Electrode Formation Step First, the surface electrode 3 is formed on the substrate 2.

  As the substrate 2, a glass substrate having heat resistance and translucency in the plasma CVD forming process, a resin substrate such as polyimide, and the like can be used.

As the surface electrode 3, a transparent conductive film made of a material containing SnO ₂ or the like can be used. These can be formed by methods such as CVD, sputtering, and vapor deposition.

3-2. Surface Electrode Split Line Formation Step Next, the surface electrode split line 13 extending in the X direction of FIG. 1 (in the long side direction of the substrate 2 and in the direction in which the plurality of cell strings 21 in the cell module 1a are arranged) is formed on the surface electrode 3 By forming, the surface electrode 3 is divided | segmented into a some strip | belt-shaped pattern. The surface electrode dividing line 13 can be formed, for example, by scribing the surface electrode 3 using a fundamental wave of a YAG laser.

3-3. First photoelectric conversion layer forming step Next, the first photoelectric conversion layer 5 is formed on the obtained substrate. As described above, since the first photoelectric conversion layer 5 includes the p-type semiconductor layer 5a, the buffer layer 5b, the i-type amorphous layer 5c, and the n-type semiconductor layer 5d, the respective semiconductor layers are sequentially formed.

  Before the p-type semiconductor layer 5a is formed (that is, before the first photoelectric conversion layer 5 is formed) and before the i-type amorphous layer 5c is formed, in order to reduce the concentration of impurities in the film formation chamber 101. Then, a gas replacement step of replacing the inside of the film forming chamber 101 with a replacement gas is performed. In the growth chamber 101, impurities introduced in the previous process and impurities mixed from the outside when the substrate is carried in remain, and if these impurities are taken into the semiconductor layer, the quality of the semiconductor layer deteriorates. The impurity concentration inside is reduced. In the gas replacement step, before the p-type semiconductor layer 7a is formed (that is, before the second photoelectric conversion layer 7 is formed), before the i-type amorphous layer 7c is formed, and before the p-type semiconductor layer 9a is formed (that is, , Before the formation of the third photoelectric conversion layer 9) and before the formation of the i-type microcrystalline layer 9b. In addition, each gas replacement process may be implemented on the same conditions, and may be implemented on mutually different conditions.

Note that when a multi-chamber plasma CVD apparatus is used, the impurity concentration in the deposition chamber can be reduced by changing the deposition chamber instead of performing the gas replacement step. In general, the p-type semiconductor layer 5a and the buffer layer 5b are formed in the first film formation chamber, the i-type amorphous layer 5c is formed in the second film formation chamber, and the n-type semiconductor layer 5d is formed in the third film formation chamber. It is formed. The p-type semiconductor layer 7a, the buffer layer 7b, and the p-type semiconductor layer 9a are formed in the first film formation chamber, and the i-type amorphous layer 7c and the i-type microcrystalline layer 9b are formed in the second film formation chamber. The n-type semiconductor layer 7d and the n-type semiconductor layer 9c are formed in the third film formation chamber. The p-type amorphous layer and the buffer layer may be formed in separate film formation chambers.
Hereinafter, the formation process of the 1st photoelectric converting layer 5 is explained in full detail.

3-3 (1) Gas Replacement Step The substrate 2 on which the surface electrode 3 is formed is placed in the film formation chamber 101, and then the gas replacement step of replacing the film formation chamber 101 with a replacement gas is performed. This gas replacement step is performed in order to reduce the concentration of impurities mixed from outside the deposition chamber 101 when the substrate on which the semiconductor layer is formed is carried into the deposition chamber 101. Further, when the thin film solar cell module is repeatedly manufactured, the first to third photoelectric conversion layers are repeatedly formed. Therefore, the n-type semiconductor layer 9c of the third photoelectric conversion layer 9 formed previously is formed in the film formation chamber 101. Since it is attached to the inner wall and the electrode, the impurities emitted from the n-type semiconductor layer 9c of the third photoelectric conversion layer 9, particularly the conductivity type of the n-type semiconductor layer 9c of the third photoelectric conversion layer 9 are determined. The mixing of impurities into the p-type semiconductor layer 5a of the first photoelectric conversion layer 5 becomes a problem. Therefore, a gas replacement step is performed before forming the p-type semiconductor layer 5a to reduce the amount of n-type impurities mixed into the p-type semiconductor layer 5a.

Thereby, a high-quality semiconductor layer can be formed as the p-type semiconductor layer 5 a of the first photoelectric conversion layer 5. Here, since the p-type semiconductor layer 5a usually contains about 1 × 10 ²⁰ cm ^{−3 of} p-conductivity type impurities, the concentration of mixed n-conductivity type impurities is about 2 × 10 ¹⁸ cm ⁻³ or less, which is two orders of magnitude less. If so, good photoelectric conversion characteristics can be obtained.

  In the gas replacement step, for example, hydrogen gas is introduced as a replacement gas into the film formation chamber 101 (replacement gas introduction step), and the pressure in the film formation chamber 101 reaches a predetermined pressure (for example, about 100 Pa to 1000 Pa). Sometimes, introduction of hydrogen gas is stopped, and further, exhaustion (exhaust process) is performed until the pressure in the film forming chamber 101 reaches a predetermined pressure (for example, about 1 Pa to 10 Pa). This cycle may be repeated multiple times.

  The time required for one cycle can be about several seconds to several tens of seconds. Specifically, the replacement gas introduction step can be performed for 1 to 5 seconds and the exhaust step can be performed for 30 to 60 seconds. Even in such a short time, the impurity concentration in the deposition chamber can be reduced by repeating a plurality of times. Therefore, the manufacturing method of the thin film solar cell module of this embodiment is practical even when applied to a mass production apparatus.

  In the present embodiment, the pressure after introducing the replacement gas and the pressure after exhausting the replacement gas in the film forming chamber 101 are set in advance, and the exhaust from the film forming chamber 101 is stopped in the replacement gas introducing step. When the internal pressure of the gas becomes equal to or higher than the pressure after the introduction of the replacement gas, the introduction of the replacement gas is stopped to end the replacement gas introduction process, and the introduction of the replacement gas is stopped in the exhaust process. When the internal pressure becomes equal to or lower than the pressure after exhausting the replacement gas, it is preferable to stop the exhaust and terminate the exhaust process.

  By increasing the number of repetitions of the cycle, and by reducing the ratio (M / m) of the pressure m after introducing the replacement gas to the pressure M after exhausting the replacement gas, the concentration of impurities present in the film forming chamber 101 is reduced. It can be further reduced.

  In this embodiment, the case where hydrogen gas is used as the replacement gas is described as an example. However, in another embodiment, a gas used for forming an i-type layer such as silane gas as the replacement gas. Either of these may be used. The gas used for forming the i-type layer is used for forming any of the p-type, i-type, and n-type semiconductor layers. Therefore, it is preferable to use a gas used for forming the i-type layer as a replacement gas because impurities are not mixed into the semiconductor layer from this gas.

  In another embodiment, an inert gas or the like that does not affect the film quality of the semiconductor layer may be used as a replacement gas. In particular, a gas having a large atomic weight tends to remain in the deposition chamber 101 when the deposition chamber 101 is exhausted, and is suitable as a replacement gas. Examples of the inert gas include argon gas, neon gas, xenon gas, and the like.

  The replacement gas may be a mixed gas of any one or more gases used for forming the i-type layer and one or more inert gases.

3-3 (2) Step of forming p-type semiconductor layer Next, the p-type semiconductor layer 5a is formed. Hereinafter, the formation process of the p-type semiconductor layer 5a will be described.

  First, the film formation chamber 101 can be evacuated to 0.001 Pa, and the substrate temperature can be set to 200 ° C. or lower. Thereafter, the p-type semiconductor layer 5a is formed. A mixed gas is introduced into the film forming chamber 101, and the pressure in the film forming chamber 101 is kept substantially constant by a pressure adjusting valve 117 provided in the exhaust system. The pressure in the film formation chamber 101 is, for example, 200 Pa or more and 3600 Pa or less. As the mixed gas introduced into the film forming chamber 101, for example, a gas containing silane gas, hydrogen gas, and diborane gas can be used, and a gas containing carbon atoms (for example, methane gas) is included in order to reduce the amount of light absorption. Can do. The flow rate of the hydrogen gas with respect to the silane gas can be 5 to 300 times, preferably 5 to 30 times when forming the p-type amorphous layer, and when forming the p-type microcrystalline layer. Is preferably about 30 to 300 times.

After the pressure in the film formation chamber 101 is stabilized, AC power of several kHz to 80 MHz is input to the cathode electrode 102 to generate plasma between the cathode electrode 102 and the anode electrode 103, so that amorphous or microcrystalline A p-type semiconductor layer 5a is formed. The power density per unit area of cathode electrode 102 is preferably in a 0.01 W / cm ² or more 0.3 W / cm ² or less in the case of forming a p-type amorphous layer, a p-type microcrystalline layer when forming is preferable to be 0.02 W / cm ² or more 0.5 W / cm ² or less.

  After the p-type semiconductor layer 5a having a desired thickness is formed as described above, input of AC power is stopped and the film formation chamber 101 is evacuated.

  The thickness of the p-type semiconductor layer 5a is preferably 2 nm or more, and more preferably 5 nm or more in that a sufficient internal electric field is applied to the i-type amorphous layer 5c. Further, the thickness of the p-type semiconductor layer 5a is preferably 50 nm or less, and more preferably 30 nm or less, from the viewpoint that it is necessary to suppress the amount of light absorption on the incident side of the inactive layer.

3-3 (3) Buffer Layer Formation Step Next, an i-type amorphous layer is formed as the buffer layer 5b. First, the background pressure in the film formation chamber 101 is evacuated to about 0.001 Pa. The substrate temperature can be set to 200 ° C. or lower. Next, a mixed gas is introduced into the film forming chamber 101, and the pressure in the film forming chamber 101 is kept substantially constant by the pressure adjusting valve 117. The pressure in the film formation chamber 101 is, for example, 200 Pa or more and 3000 Pa or less. As the mixed gas introduced into the film formation chamber 101, for example, a gas containing silane gas and hydrogen gas can be used, and a gas containing carbon atoms (for example, methane gas) is included to reduce the amount of light absorption. be able to. The flow rate of hydrogen gas relative to silane gas is preferably about several to several tens of times.

After the pressure in the film formation chamber 101 is stabilized, AC power of several kHz to 80 MHz is input to the cathode electrode 102 to generate plasma between the cathode electrode 102 and the anode electrode 103, and the i-type buffer layer 5b is formed. An amorphous layer is formed. The power density per unit area of cathode electrode 102 can be a 0.01 W / cm ² or more 0.3 W / cm ² or less.

  As described above, after an i-type amorphous layer having a desired thickness is formed as the buffer layer 5b, the application of AC power is stopped and the film formation chamber 101 is evacuated.

  By forming the i-type amorphous layer, which is the buffer layer 5b, the boron atom concentration in the atmosphere in the film formation chamber 101 is lowered, and boron atoms in the i-type amorphous layer 5c to be formed next Mixing can be reduced.

  The thickness of the i-type amorphous layer that is the buffer layer 5b is desirably 2 nm or more in order to suppress the diffusion of boron atoms from the p-type semiconductor layer 5a to the i-type amorphous layer 5c. On the other hand, in order to suppress the amount of light absorption and increase the light reaching the i-type amorphous layer 5c, it is desirable to be as thin as possible. The thickness of the buffer layer 5b is normally 50 nm or less.

3-3 (4) Gas Replacement Step Next, a gas replacement step is performed by the same method as in “3-3 (1) Gas replacement step”.

  Since the p-type semiconductor layer 5a formed in the previous step is attached to the inner wall and the electrode in the film formation chamber 101, impurities emitted from the p-type semiconductor layer 5a, in particular, the conductivity type of the p-type semiconductor layer 5a. Although mixing of impurities to be determined into the i-type amorphous layer 5c becomes a problem, by performing a gas replacement step before forming the i-type amorphous layer 5c, the i-type amorphous layer 5c is subjected to the above-described process. The amount of impurities mixed in can be reduced. Thereby, a good-quality semiconductor layer can be formed as the i-type amorphous layer 5c.

3-3 (5) i-type Amorphous Layer Formation Step Next, the i-type amorphous layer 5c is formed. First, the background pressure in the film formation chamber 101 is evacuated to about 0.001 Pa. The substrate temperature can be set to 200 ° C. or lower. Next, a mixed gas is introduced into the film forming chamber 101, and the pressure in the film forming chamber 101 is kept substantially constant by the pressure adjusting valve 117. The pressure in the film formation chamber 101 is, for example, 200 Pa or more and 3000 Pa or less. As the mixed gas introduced into the film formation chamber 101, for example, a gas containing silane gas and hydrogen gas can be used. The flow rate of the hydrogen gas with respect to the silane gas is preferably several times to several tens of times, more preferably 5 times to 30 times, and the i-type amorphous layer 5c having good film quality can be formed.

After the pressure in the film formation chamber 101 is stabilized, AC power of several kHz to 80 MHz is supplied to the cathode electrode 102, plasma is generated between the cathode electrode 102 and the anode electrode 103, and the i-type amorphous layer 5c. Form. The power density per unit area of cathode electrode 102 can be 0.01 W / cm ² or more 0.3 W / cm ² or less.

  After the i-type amorphous layer 5c having a desired thickness is formed as described above, the AC power supply is stopped and the film formation chamber 101 is evacuated.

  The thickness of the i-type amorphous layer 5c is preferably set to a value of 0.05 μm to 0.25 μm in consideration of light absorption and a decrease in photoelectric conversion characteristics due to light deterioration.

3-3 (6) Step of forming n-type semiconductor layer Next, the n-type semiconductor layer 5d is formed. First, the background pressure in the film formation chamber 101 is evacuated to about 0.001 Pa. The substrate temperature can be set to 200 ° C. or lower, for example, 150 ° C. Next, a mixed gas is introduced into the film forming chamber 101, and the pressure in the film forming chamber 101 is kept substantially constant by the pressure adjusting valve 117. The pressure in the film formation chamber 101 is, for example, 200 Pa or more and 3600 Pa or less. As a mixed gas introduced into the deposition chamber 101, a gas containing silane gas, hydrogen gas, and phosphine gas can be used. The flow rate of the hydrogen gas with respect to the silane gas can be 5 to 300 times, preferably 5 to 30 times when forming the n-type amorphous layer, and when forming the n-type microcrystalline layer. Is preferably about 30 to 300 times.

After the pressure in the film formation chamber 101 is stabilized, AC power of several kHz to 80 MHz is input to the cathode electrode 102 to generate plasma between the cathode electrode 102 and the anode electrode 103, so that amorphous or microcrystalline An n-type semiconductor layer 5d is formed. The power density per unit area of cathode electrode 102 is preferably in a 0.01 W / cm ² or more 0.3 W / cm ² or less in the case of forming the n-type amorphous layer, an n-type microcrystalline layer when forming is preferable to be 0.02 W / cm ² or more 0.5 W / cm ² or less.

  The thickness of the n-type semiconductor layer 5d is preferably 2 nm or more in order to give a sufficient internal electric field to the i-type amorphous layer 5c. On the other hand, in order to suppress the light absorption amount of the n-type semiconductor layer 5d which is an inactive layer, it is preferably as thin as possible, and is usually 50 nm or less.

  Thus, the first photoelectric conversion layer 5 including the i-type amorphous layer 5c can be formed.

3-4. Second photoelectric conversion layer formation step Next, the second photoelectric conversion layer 7 is formed on the obtained substrate. As described above, since the second photoelectric conversion layer 7 includes the p-type semiconductor layer 7a, the buffer layer 7b, the i-type amorphous layer 7c, and the n-type semiconductor layer 7d, the respective semiconductor layers are sequentially formed.
Hereinafter, the formation process of the 2nd photoelectric converting layer 7 is explained in full detail.

3-4 (1) Gas Replacement Step Next, a gas replacement step is performed by the same method as in “3-3 (1) Gas replacement step”. By carrying out this gas replacement step, impurities released from the n-type semiconductor layer attached to the inner wall and electrodes in the film formation chamber 101 when the n-type semiconductor layer 5d is formed, particularly the conductivity type of the n-type semiconductor layer 5d, are reduced. It is possible to reduce the amount of impurities to be determined mixed into the p-type semiconductor layer 7a. Thereby, a high-quality semiconductor layer can be formed as the p-type semiconductor layer 7a. Here, since the p-type semiconductor layer 7a contains p-conductivity type impurities of about 1 × 10 ²⁰ cm ⁻³ , the mixed n-conductivity type impurity concentration is less than about 1 × 10 ¹⁸ cm ⁻³ by two orders of magnitude. If so, good photoelectric conversion characteristics can be obtained.

3-4 (2) Step of forming p-type semiconductor layer Next, the p-type semiconductor layer 7a is formed. The p-type semiconductor layer 7a can be formed by the same method as the p-type semiconductor layer 5a of the first photoelectric conversion layer 5.

3-4 (3) Buffer Layer Formation Step Next, the buffer layer 7b is formed by the same method as the buffer layer 5b of the first photoelectric conversion layer 5.

3-4 (4) Gas Replacement Step Next, a gas replacement step is performed by the same method as in “3-3 (1) Gas replacement step”. This gas replacement step can achieve the same effect as the gas replacement step performed before forming the i-type amorphous layer 5c of the first photoelectric conversion layer 5.

3-4 (5) i-type Amorphous Layer Formation Step Next, the i-type amorphous layer 7c is formed.

  The thickness of the i-type amorphous layer 7c is preferably set to a value of 0.1 μm to 0.7 μm in consideration of light absorption and a decrease in photoelectric conversion characteristics due to light deterioration.

  The forbidden band width of the i-type amorphous layer 7 c of the second photoelectric conversion layer 7 is desirably narrower than the forbidden band width of the i-type amorphous layer 5 c of the first photoelectric conversion layer 5. By setting such a forbidden band width, light in a wavelength band that could not be absorbed by the first photoelectric conversion layer 5 can be absorbed by the second photoelectric conversion layer 7, and incident light can be used effectively. Because.

  In order to narrow the forbidden band width of the i-type amorphous layer 7c, the substrate temperature during film formation can be set high. By increasing the substrate temperature, the concentration of hydrogen atoms contained in the film can be reduced, and the i-type amorphous layer 7c having a narrow forbidden band can be formed. That is, the substrate temperature when the i-type amorphous layer 7 c of the second photoelectric conversion layer 7 is formed may be higher than the substrate temperature when the i-type amorphous layer 5 c of the first photoelectric conversion layer 5 is formed. Thereby, the hydrogen atom concentration in the i-type amorphous layer 5 c of the first photoelectric conversion layer 5 can be made higher than the hydrogen atom concentration in the i-type amorphous layer 7 c of the second photoelectric conversion layer 7. A laminated thin-film solar cell module is manufactured in which the forbidden band width of the i-type amorphous layer 5c of the first photoelectric conversion layer 5 is larger than the forbidden band width of the i-type amorphous layer 7c of the second photoelectric conversion layer 7. be able to.

  Further, by reducing the hydrogen gas / silane gas flow ratio of the mixed gas introduced into the film formation chamber 101 when forming the i-type amorphous layer 7c, the concentration of hydrogen atoms contained in the i-type amorphous layer 7c is reduced. Thus, the i-type amorphous layer 7c having a narrow forbidden band width can be formed. That is, if the hydrogen gas / silane gas flow rate ratio of the mixed gas at the time of forming the i-type amorphous layer 7 c of the second photoelectric conversion layer 7 is made smaller than that at the time of forming the i-type amorphous layer 5 c of the first photoelectric conversion layer 5. good. Thereby, the hydrogen atom concentration in the i-type amorphous layer 5 c of the first photoelectric conversion layer 5 can be made higher than the hydrogen atom concentration in the i-type amorphous layer 7 c of the second photoelectric conversion layer 7. A laminated thin-film solar cell module is manufactured in which the forbidden band width of the i-type amorphous layer 5c of the first photoelectric conversion layer 5 is larger than the forbidden band width of the i-type amorphous layer 7c of the second photoelectric conversion layer 7. be able to.

  Further, the forbidden band width of the i-type amorphous layer can be adjusted depending on whether the i-type amorphous layer is formed by continuous discharge plasma or pulse discharge plasma. When the i-type amorphous layer is formed by continuous discharge plasma, the concentration of hydrogen atoms contained in the formed i-type amorphous layer can be increased as compared with the case where the i-type amorphous layer is formed by pulse discharge plasma.

  Therefore, plasma generation is performed so that the i-type amorphous layer 5c of the first photoelectric conversion layer 5 can be formed by continuous discharge plasma and the i-type amorphous layer 7c of the second photoelectric conversion layer 7 can be formed by pulse discharge plasma. The forbidden band width of the i-type amorphous layer 5c of the first photoelectric conversion layer 5 is larger than the forbidden band width of the i-type amorphous layer 7c of the second photoelectric conversion layer 7 by switching the power supply for use. Type thin film solar cell module can be manufactured.

  Setting of substrate temperature, setting of hydrogen gas / silane gas flow rate ratio and continuous discharge / when forming i-type amorphous layer 5c of first photoelectric conversion layer 5 and i-type amorphous layer 7c of second photoelectric conversion layer 7 The switching of the pulse discharge may be set separately, or each setting may be used in combination. In particular, when the substrate temperature at the time of forming the i-type amorphous layer 5c of the first photoelectric conversion layer 5 and the i-type amorphous layer 7c of the second photoelectric conversion layer 7 is the same, the hydrogen gas / silane gas flow ratio is set. In addition, the combined use of switching between continuous discharge and pulse discharge is desirable because it can greatly change the concentration of hydrogen atoms contained in the i-type amorphous layer.

3-4 (6) Step of forming n-type semiconductor layer Next, the n-type semiconductor layer 7d is formed. The n-type semiconductor layer 7d can be formed by the same method as the n-type semiconductor layer 5d of the first photoelectric conversion layer 5.

3-5. Third photoelectric conversion layer forming step Next, the third photoelectric conversion layer 9 is formed on the obtained substrate. As described above, since the third photoelectric conversion layer 9 includes the p-type semiconductor layer 9a, the i-type microcrystalline layer 9b, and the n-type semiconductor layer 9c, the respective semiconductor layers are sequentially formed.
Hereinafter, the formation process of the 3rd photoelectric converting layer 9 is explained in full detail.

3-5 (1) Gas Replacement Step First, a gas replacement step is performed by the same method as in “3-3 (1) Gas replacement step”. This gas replacement step has the same effect as the gas replacement step performed before the formation of the second photoelectric conversion layer 7.

3-5 (2) Step of forming p-type semiconductor layer Next, the p-type semiconductor layer 9a is formed. The p-type semiconductor layer 9a can be formed by the same method as the p-type semiconductor layer 5a of the first photoelectric conversion layer 5.

3-5 (3) Gas Replacement Step Next, a gas replacement step is performed in the same manner as in “3-3 (1) Gas replacement step”. This gas replacement step has the same effect as the gas replacement step performed before forming the i-type amorphous layer 5c of the first photoelectric conversion layer 5 and the i-type amorphous layer 7c of the second photoelectric conversion layer 7. Have.

3-5 (4) Step of forming i-type microcrystalline layer Next, the i-type microcrystalline layer 9a is formed. The i-type microcrystalline layer 9b can be formed, for example, under the following formation conditions. The substrate temperature is desirably 200 ° C. or lower. The pressure in the film formation chamber 101 at the time of formation is preferably 240 Pa or more and 3600 Pa or less. The power density per unit area of cathode electrode 102 is desirably set at 0.02 W / cm ² or more 0.5 W / cm ² or less.

  As the mixed gas introduced into the film forming chamber 101, for example, a gas containing silane gas and hydrogen gas can be used. The flow rate of the hydrogen gas relative to the silane gas is preferably about 30 to several hundred times, and more preferably about 30 to 300 times.

  The thickness of the i-type microcrystalline layer 9b is preferably 0.5 μm or more and more preferably 1 μm or more in order to ensure a sufficient amount of light absorption. On the other hand, the thickness of the i-type microcrystalline layer 9b is preferably 20 μm or less, more preferably 15 μm or less, from the viewpoint of ensuring good productivity.

Thus, the i-type microcrystalline layer having a good crystallization ratio in which the peak intensity ratio I520 / I480 of the peak at 520 nm ^{−1 with} respect to the peak at 480 nm ⁻¹ measured by Raman spectroscopy is 3 or more and 10 or less 9b can be formed.

3-5 (5) Step of forming n-type semiconductor layer Next, the n-type semiconductor layer 9c is formed. The n-type semiconductor layer 9c can be formed by the same method as the n-type semiconductor layer 5d of the first photoelectric conversion layer 5.

3-6. Photoelectric Conversion Layer Dividing Line Formation Step Next, photoelectric conversion layer dividing lines 15 are formed on the first to third photoelectric conversion layers 5, 7, 9 at positions that extend in the X direction of FIG. By doing so, the 1st-3rd photoelectric converting layers 5, 7, and 9 are divided | segmented into a some strip | belt-shaped pattern. The photoelectric conversion layer dividing line 15 can be formed, for example, by scribing the first to third photoelectric conversion layers 5, 7, and 9 using the second harmonic of a YAG laser.

  Since the contact line 17 is formed by filling the photoelectric conversion layer dividing line 15 with a conductor (for example, a material for the back electrode), the width of the photoelectric conversion layer dividing line 15 matches the width of the contact line 17. .

3-7. Back Electrode Formation Step Next, the back electrode 11 is formed on the third photoelectric conversion layer 9. Since the back electrode 11 has a transparent conductive film and a metal film in order from the third photoelectric conversion layer 9 side, these are formed sequentially.

The transparent conductive film is made of SnO ₂ , ITO, ZnO or the like. The metal film is made of a metal such as silver or aluminum. The transparent conductive film and the metal film are formed by a method such as CVD, sputtering, or vapor deposition. The transparent conductive film can be omitted.

  When the back electrode 11 is formed, the material of the back electrode 11 enters the photoelectric conversion layer dividing line 15 to form the contact line 17.

3-8. Back Electrode Split Line Formation Step Next, the back electrode 11 and the first back electrode 11 are formed by forming the back electrode split line 29 extending in the X direction in FIG. 1 on the back electrode 11 and the first to third photoelectric conversion layers 5, 7, 9. The third photoelectric conversion layers 5, 7, 9 are divided into a plurality of strip patterns. The back electrode dividing line 29 is formed so that the three lines 13, 15, 29 are arranged in the order of the front electrode dividing line 13, the photoelectric conversion layer dividing line 15, and the back electrode dividing line 29.

  The back electrode division line 29 can be formed by scribing the back electrode 11 and the first to third photoelectric conversion layers 5, 7, 9 using, for example, the second harmonic of a YAG laser.

  Through the steps so far, a band-shaped cell string 21 having a plurality of cells 27 connected in series to each other is obtained.

3-9. Next, a parallel dividing line 25 extending in the Y direction of FIG. 1 (in the short side direction of the substrate 2 in the direction in which a plurality of cells 27 in the cell string 21 are arranged) is formed in the band-shaped cell string 21. By doing so, the band-shaped cell string 21 is divided into a plurality of cell strings 21.

  The parallel dividing line 25 scribes the back electrode 11 and the first to third photoelectric conversion layers 5, 7, 9 using, for example, the second harmonic of a YAG laser, and further uses the fundamental wave of the YAG laser to surface electrode 3. Can be formed by scribing.

3-10. Next, the common electrode 23 is attached so that the plurality of cell strings 21 are connected in parallel to each other, thereby completing the production of the thin-film solar cell module 1 of the present embodiment.

4). Cell Hot Spot Resistance Test A cell hot spot resistance test was performed by the following method.
First, a sample having the same configuration as the thin film solar cell module of the above-described embodiment described with reference to FIGS. 1, 2, 3A, and 3B (however, there is no parallel dividing line 25 and common electrode 23) ) Were made of the materials shown in Table 1. The number of serial stages of each sample was 30.

  Measurement of the RB current (current when a voltage of 5V to 8V is applied in the reverse direction. The applied voltage was changed as appropriate so that the RB current becomes the value shown in Table 2) for each of the prepared samples. And IV measurements were made.

  Next, samples having different RB currents were extracted from the samples. By dividing the extracted sample in parallel, the output of the cell string 21 to be evaluated was set to 5 to 50W.

Next, a hot spot resistance test was performed on the cell 27 having the smallest area in the cell string 21, and a pass / fail judgment was made with a peeled area of less than 5% as an acceptable line. The hot spot resistance test was performed by a method based on IEC61646 1stEDITION. The passing line of IEC61646 1stEDITION is 10%, but the passing line was tightened from the viewpoint of improving the appearance.
The peeled area was obtained by photographing the sample surface from the substrate 2 side, increasing the contrast of the obtained image to obtain a black and white image, and calculating the ratio of the area of the white portion in this image. Since the brightness of the portion where film peeling has occurred is usually high, the ratio of the area of the white portion obtained by the above method corresponds to the ratio of the area (peeling area) of the portion where film peeling has occurred.

  The obtained results are shown in Table 2. Table 2 shows the results of measurement of the peeled area for 54 types of samples having different output or RB current of the cell string 21.

Referring to Table 2, even if the output of the cell string 21 is the same, the film is used in both cases where the RB current is very small (0.019 mA / cm ² ) and very large (6.44 mA / cm ² ). It was found that peeling did not occur easily, and film peeling was likely to occur when the RB current was moderate (0.31 to 2.06 mA / cm ² ).

  Further, it was found that when the output of the cell string is 12 W or less, the peeled area can be suppressed to 5% or less regardless of the value of the RB current.

5. Reverse Overcurrent Resistance Test Next, a reverse overcurrent resistance test was performed by the following method.
First, a sample having the same configuration as that of the thin film solar cell module of the above-described embodiment described with reference to FIGS. 1, 2, 3 (a) and 3 (b) was manufactured using the materials shown in Table 1. The number of serial stages of each sample was 30.
Next, overcurrent is applied to the prepared sample in the reverse direction (the reverse direction here means that the direction in which the solar cell receives light and the current flows reversely), and the solar cell when light is not irradiated is a diode. The reverse overcurrent resistance test was conducted by examining whether or not the contact line 17 was damaged when flowing in the forward direction.

  The current value to flow here must flow 1.35 times the overcurrent resistance specification value in accordance with the IEC61730 standard. This time, 5.5A was applied at 70V.

  Here, when current is applied to one cell module under the above conditions, it is easy to think that evenly divided current flows to each parallel cell string. A current may flow concentrated on the cell string. This state is assumed to be the worst case, and it should be ensured that there is no problem when 70V × 5.5A = 385W is applied to one cell string. Therefore, a test was performed by applying a power of 70 V × 5.5 A = 385 W to one cell string 21.

  The test was performed by preparing 20 types of samples having different lengths L or widths W of the contact lines 17. Whether or not the contact line 17 was damaged was visually determined. When discoloration or peeling of the back electrode 11 occurred in a semi-elliptical shape along the contact line 21, it was determined that the contact line 17 was damaged. The obtained results are shown in Table 3.

According to Table 3, when the width W of the contact line 17 is 20 μm and 40 μm, damage to the contact line 17 can be prevented by setting the length L of the contact line 17 to 18 cm or more and 9 cm or more, respectively. I understood. In other words, it was found that the area Sc of the contact line 17 should be 20 μm × 18 cm or 40 μm × 9 cm = 0.036 cm ² or more.

Furthermore, since the power applied to the cell string 21 is 385 W, (power applied to the cell string 21) / (area Sc of the contact line 17) ≈10.7 kW / cm ² and applied to the contact line 21. It has been found that the contact line 17 can be prevented from being damaged when the power density is 10.7 kW / cm ² or less.

1: Thin-film solar cell module 1a: Cell module 2: Substrate 3: Front electrode 5: First photoelectric conversion layer 7: Second photoelectric conversion layer 9: Third photoelectric conversion layer 11: Back electrode 5a: p-type semiconductor layer 5b: Buffer layer 5c: i-type amorphous layer 5d: n-type semiconductor layer 7a: p-type semiconductor layer 7b: buffer layer 7c: i-type amorphous layer 7d: n-type semiconductor layer 9a: p-type semiconductor layer 9b: i-type Microcrystalline layer 9d: n-type semiconductor layer 13: surface electrode dividing line 15: photoelectric conversion layer dividing line 17: contact line 21: cell string 23: common electrode 25: parallel dividing line 27: cell 29: back electrode dividing line 31: Blocking diode 33: photoelectric conversion unit 101: film forming chamber 102: cathode electrode 103: anode electrode 105: impedance matching circuit 106a: power introduction line 10 b: power introduction line 107: substrate 108: power supply unit 110: gas introducing portion 116: gas exhausting portion 117: pressure regulating valve 118: gas 119: gas exhaust port

Claims (3)

A cell module including a plurality of cell strings, wherein the cell string includes a plurality of cells connected in series with each other through a contact line, and the cell includes a surface electrode, a plurality of photoelectric conversion layers, and a back electrode stacked in this order. The contact line electrically connects one surface electrode and the other back surface electrode of the two adjacent cells, and the cell strings can flow currents generated in the cell strings into each other. Electrically connected as
At least one of the plurality of photoelectric conversion layers has an i-type microcrystalline layer,
Light source: xenon lamp, irradiance: 100 mW / cm ² , AM: 1.5, temperature: 25 ° C. The output of the cell module is P (W), the output of the cell string is Ps (W), When the area of the contact line is Sc (cm ² ), (P-Ps) / Sc is 1 or more and 10.7 (kW / cm ² ) or less, Ps is greater than 12 W and 30 W or less, and P The thin film solar cell module is characterized in that is 90 W or more and 160 W or less.   The thin film solar cell module according to claim 1, wherein the contact line has a width of 40 μm to 200 μm. The surface electrode is made of a transparent conductive film made of a material containing SnO ₂ ,
The thin film solar cell module according to claim 1, wherein the back electrode has a laminated structure of a transparent conductive film and a metal film.

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