JP4791250B2 - Microcomputer and its software falsification prevention method - Google Patents

Description

  The present invention relates to a microcomputer that performs some information processing based on an arbitrary software code, and more particularly to a boot program used when starting an information processing apparatus equipped with a microcomputer, and a software tampering prevention method called a loader program. It is related to effective technology.

  Recently, the importance of information security technology in the use of digital data has been pointed out, and among these, data / code falsification prevention technology handled on various information processing platforms and information processing devices has attracted attention. Such anti-tampering technology guarantees the “validity of data processing” to be executed. For example, in certain situations where reliable processing such as the use of valuable value content and accounting for it is expected. It becomes extremely important.

  An information processing platform to which such a technology is applied is called a secure platform, etc., ranging from a general-purpose information processing device such as a PC to a digital appliance such as a music player or a mobile phone called an embedded device. Regardless, it is a necessary platform technology for operating applications that require validity guarantee such as billing.

  For PCs, secure platform technologies such as NGSCB and LaGrande have been proposed, but they are large and expensive platforms that are generally difficult to apply directly to embedded devices with large processing resources and cost constraints. It is. There is a certain need for an inexpensive secure platform for embedded devices, and a solution to this requirement is needed.

  In a general information processing platform consisting of memories such as a microcomputer, ROM, and RAM, data in the ROM can be read statically, and data exchanged between the microcomputer and memory during normal operation can be performed from outside the platform. It is important to be able to observe and analyze directly, and it is important to prevent them. However, as a major threat that leads to dynamic analysis of the operation status, any analysis function on the platform can be used. Execution of the provided code.

  Therefore, in secure platform technology that guarantees the correctness of data processing, in order to prevent attacks such as data / code observation, analysis, and falsification, the execution of malicious arbitrary code on the platform should be prevented. Is the main technology.

  This can be accomplished by authenticating the code being executed each time and allowing only those that have been proved to be valid. The root of the reliability guarantee lies in the legitimacy of software code called a boot program or loader program that activates the platform.

  As one of techniques for preventing such a boot program from being falsified, there is a safe boot loader for protecting the security of a digital device disclosed in Japanese Patent Laid-Open No. 2003-108257 (Patent Document 1).

  The technology of Patent Document 1 stores a boot loader on a nonvolatile memory provided on the same semiconductor chip as a microcomputer, and the boot loader is software such as an operating system stored in a nonvolatile memory connected outside the processor. It has a function to authenticate the validity of the code. This boot loader transfers control to the software code only when the validity of the software code to be authenticated is confirmed, and completes the operation when authentication fails.

In other words, in an information processing apparatus equipped with this boot loader, if authentication fails, control by the software code is not performed at all, and the operation is completed without starting the information processing apparatus. In a music player or the like, a function that does not require a legitimacy guarantee such as normal music playback becomes unusable, and the function originally expected as an information processing apparatus is not realized at all.
Japanese Patent Laid-Open No. 2003-108257

  According to the safe boot loader for protecting the security of the conventional digital device described above, the non-volatile memory storing the boot loader is provided on the same semiconductor chip as the microcomputer, so that it has tamper resistance, By authenticating the next loaded operating system, it is possible to guarantee the correctness of the code being executed.

  However, in the technique of Patent Document 1, the operation is simply completed when the code is not authenticated, and there is a problem in the availability of the system by the user. Also, the nonvolatile memory that stores the boot loader is supposed to be tamper-resistant, but as long as it is executed by the processor, it will be the target of analysis by the debug tool, and even if countermeasures against debuggers are taken, attacks that deficient in implementation It is impossible to deny the possibility of.

  Therefore, an object of the present invention is referred to as a boot program or a loader program that achieves both the guarantee of the correctness of the code to be executed and the availability of the system by the user and has resistance to attacks by the debugging tools on the microcomputer. The object is to provide a software code falsification prevention method.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  A microcomputer according to the present invention includes a central processing unit and a sequence processing unit that operates independently of the central processing unit, and prior to execution of the first program in the central processing unit, The first program is authenticated, a predetermined function is set to invalid based on the authentication result, and the process shifts to control by the central processing unit.

  The microcomputer according to the present invention includes a central processing unit and a sequence processing unit that operates independently of the central processing unit, and performs sequence processing prior to execution of the first program in the central processing unit. The first program is authenticated by the apparatus, and the second program is executed by the central processing unit based on the authentication result.

  A microcomputer software tampering prevention method according to the present invention is a microcomputer software tampering prevention method comprising a central processing unit and a sequence processing unit that operates independently of the central processing unit, Prior to execution of the first program in the processing device, the sequence processing device authenticates the first program, and on the basis of the authentication result, the predetermined function is disabled and the central processing unit performs Transition to control.

  A microcomputer software tampering prevention method according to the present invention is a microcomputer software tampering prevention method comprising a central processing unit and a sequence processing unit that operates independently of the central processing unit, Prior to the execution of the first program in the processing device, the sequence processing device authenticates the first program, and based on the authentication result, the central processing unit passes the network connected to the microcomputer. The second program received is executed.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  According to the present invention, in the information processing apparatus, there is no security problem without excessively restricting the use of the information processing apparatus by the user while maintaining necessary security performance such as guaranteeing the validity of the code to be executed. Flexible processing such as permitting continuation of use is possible, and in a copyright management system or the like, it is possible to achieve both the rights holding of the content holder and user convenience.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

(Embodiment 1)
<Configuration of information processing device equipped with microcomputer>
With reference to FIG. 1, the configuration of an information processing apparatus equipped with a microcomputer according to Embodiment 1 of the present invention will be described. FIG. 1 is a block diagram showing the configuration of an information processing apparatus equipped with a microcomputer according to Embodiment 1 of the present invention.

  In FIG. 1, an information processing apparatus 101 includes a microcomputer 102 and includes a volatile storage device 107 and a nonvolatile storage device 108. Information processing of the microcomputer 102, the volatile storage device 107, the nonvolatile storage device 108, and the like. Each functional block constituting the apparatus 101 is connected by an instruction / data bus line (hereinafter referred to as a data bus) 111 for exchanging instructions and data between the functional blocks.

  Note that FIG. 1 shows the minimum functional configuration required to configure the information processing apparatus 101, and other functional blocks may be included.

  A microcomputer 102 mounted on the information processing apparatus 101 is an LSI sealed in a semiconductor package, and includes a central processing unit (hereinafter referred to as CPU) 103, a cryptographic processing unit 104, a hash function processing unit 105, and sequence processing. The secret information 106 is held including the functional block of the authentication sequencer device 112 which is a device.

  The CPU 103 reads the software code and executes a predetermined process.

  The cryptographic processing device 104 performs processing based on a predetermined cryptographic algorithm on the input cryptographic key and processing target data, and outputs processing result data. The cryptographic processing device 104 operates in accordance with a processing command from the CPU 103 and does not have a function of directly exchanging data with the outside of the microcomputer 102.

  The operation of the cryptographic processing device 104 is a black box as seen from the CPU 103, and an intermediate state of the cryptographic processing is not observed. Further, since it is a functional block in the LSI and does not exchange data directly with the outside of the microcomputer 102, similarly, an intermediate state of encryption processing or the like is not observed from the outside of the microcomputer 102. The selection of the encryption algorithm is arbitrary.

  The hash function processing device 105 performs processing based on a predetermined hash function algorithm on the input processing target data, and outputs processing result data. Similar to the cryptographic processing device 104, the operation of the hash function processing device 105 is a black box as viewed from the CPU 103, and an intermediate state of the hash function processing is not observed from the outside of the microcomputer.

  Although the selection of the hash function algorithm is arbitrary, the hash function processing apparatus 105 simultaneously authenticates the sharing of secret information and the integrity of the processing target data, called a keyed hash function, in addition to the normal hash function algorithm. It is also possible to process algorithms that can.

  The secret information 106 is information secretly held in the microcomputer 102 and is arbitrary secret information required by an application realized by the information processing apparatus 101. The secret information 106 is stored in the cryptographic processing apparatus 104 and the hash function processing apparatus 105. Or an encryption key used for a certain process, an ID required for some processing, a constant value, or the like.

  The secret information 106 is kept secretly in the microcomputer 102 by providing a non-rewritable non-volatile memory such as a ROM, storing a rewritable non-volatile memory such as an EEPROM or flash memory, and a flip-flop. Arbitrary methods such as storage as an initial value of a hardware register by an element may be used.

  The volatile storage device 107 is a volatile storage device such as an SDRAM used as a work area when the microcomputer 102 performs arithmetic processing.

  The non-volatile storage device 108 is a non-volatile storage device such as a flash memory or a hard disk for storing an OS, applications, and data necessary for the microcomputer 102 to perform processing.

  The nonvolatile storage device 108 is read by the CPU 103 when the information processing apparatus 101 is started, and is read by the CPU 103, which is a boot loader program (hereinafter referred to as a boot loader) 109, which is a first program for designating software to be executed thereafter. An operating system program (hereinafter referred to as OS) 110 to be processed is stored.

  The OS 110 is designated to be read by the boot loader 109. Depending on the application of the information processing apparatus 101, there is a system in which only an application program is installed without installing the OS 110. In this embodiment, such an OS-less system can be similarly considered by replacing the OS 110 with an application program.

  The authentication sequencer device 112 operates when the information processing apparatus 101 is activated, and has a function of authenticating the validity of the boot loader 109. This authentication sequencer device 112 operates independently of the CPU 103, issues a necessary instruction to the encryption processing device 104 and the hash function processing device 105, and inputs an output result value. It has the function to do. Further, it has a function of accessing the nonvolatile memory device 108 and inputting a predetermined program, data, and the like.

  Note that the microcomputer 102, the CPU 103, the cryptographic processing device 104, the hash function processing device 105, the secret information 106, the volatile storage device 107, the nonvolatile storage device 108, and the authentication sequencer device 112, which are components of the information processing apparatus 101, are logical. It does not necessarily need to be physically the same as the figure. For example, the secret information 106 may be physically stored in the cryptographic processing device 104 or the hash function processing device 105. Further, the processing functions such as the cryptographic processing device 104 and the hash function processing device 105 may be implemented by dedicated hardware, or may be implemented by an independent CPU and a program stored in a memory. It doesn't matter how.

<Operation of information processing device equipped with microcomputer>
Next, the operation of the information processing apparatus equipped with the microcomputer according to the first embodiment of the present invention will be described with reference to FIGS. 2 to 5 are flowcharts showing the operation of the information processing apparatus equipped with the microcomputer according to the first embodiment of the present invention.

  First, as shown in FIG. 2, when the power is turned on, the information processing apparatus 101 initializes each functional module required when the power is turned on, and confirms whether each functional module operates normally (step). 201).

  Next, after the initialization of each functional module is completed, according to the instruction of the authentication sequencer device 112, it is authenticated whether the boot loader 109 has been falsified and has integrity (step 202).

  An example of a specific procedure is shown below. First, two preconditions are shown. The boot loader 109 includes a boot loader body and a keyed hash value of the boot loader body that is obtained using a predetermined secret key. A predetermined secret key is stored in the secret information 106 in advance.

  Next, an operation procedure will be described. The authentication sequencer device 112 accesses the nonvolatile storage device 108 and reads the boot loader body from the boot loader 109 area. Next, the authentication sequencer device 112 retrieves a predetermined secret key stored in the secret information 106, inputs the boot loader body and the predetermined secret key to the hash function processing device 105, and inputs the above two inputs. The keyed hash value is obtained from the value.

  Next, the authentication sequencer device 112 accesses the non-volatile storage device 108, reads the keyed hash value of the boot loader body from the boot loader 109 area, and compares it with the previously obtained keyed hash value. If the two keyed hash values match, the integrity of the boot loader body is proved, and it is also proved that the boot loader 109 is generated by a subject sharing a predetermined secret key with the information processing apparatus 101. .

  Further, the following procedure may be used as the integrity verification procedure.

  First, two preconditions are shown. The boot loader 109 is composed of a boot loader main body and a hash value of the boot loader main body, and is further encrypted data obtained by encrypting these two data with a predetermined encryption key.

  A predetermined encryption key is stored in the secret information 106 in advance.

  Next, an operation procedure will be described. The authentication sequencer device 112 accesses the nonvolatile storage device 108 and reads the encrypted boot loader body and the hash value of the boot loader body from the boot loader 109 area.

  Next, the authentication sequencer device 112 takes out a predetermined encryption key stored in the secret information 106, and uses the encrypted boot loader body, the hash value of the boot loader body, and the predetermined encryption key as the encryption processing device. The boot loader body and the hash value of the boot loader body are obtained from the two input values.

  Next, the authentication sequencer device 112 inputs the obtained boot loader body to the hash function processing device 105, and obtains the hash value of the boot loader body.

  Next, the authentication sequencer device 112 compares the previously encrypted boot loader body and the hash value obtained from the hash value of the boot loader body with the hash value obtained as the output of the hash function processing device 105. Do. If the two hash values match, the integrity of the boot loader body is proved, and it is also proved that the boot loader 109 has been generated by a subject sharing a predetermined encryption key with the information processing apparatus 101.

  If the common key algorithm is used as the encryption algorithm, the encryption key stored in the secret information 106 is the same key used for encrypting the boot loader body and the hash value of the boot loader body, and the public key is used as the encryption algorithm. If an algorithm is used, it is one of the key pairs. Needless to say, it is generally more advantageous to select a common key encryption algorithm from the viewpoint of processing speed.

  Based on the result of the authentication process in step 202, the process proceeds to step 204 if the authentication is successful, and to step 205 if the authentication fails (step 203).

  When the authentication is successful in the process of step 202, a specific function in the microcomputer 102 is enabled by an instruction from the authentication sequencer device 112 (step 204). The types of functions that are effective here are arbitrary, but may be as follows, for example.

  When the main application of the information processing apparatus 101 greatly depends on the security processing function and performance, security-related processing functions such as the cryptographic processing apparatus 104 and the hash function processing apparatus 105 that play an important role in realizing the function, and secret information The access function to the shared information necessary for some kind of authentication processing stored in 106 becomes effective.

  The following method may be used as a method for switching between valid and invalid of the function. The storage entity that stores the cryptographic processing device 104, the hash function processing device 105, and the secret information 106 includes a setting register that sets whether access to the CPU 103 from the CPU 103 is valid or invalid. Only changed by instruction.

  As a result, the devices can be functionally connected and separated when viewed from the CPU 103. Further, as a specific function, a register indicating a boot loader authentication success / failure result not shown in FIG. 1 may be provided, and a value corresponding to the processing result may be set in the register.

  Next, a function other than a specific function in the microcomputer 102 is enabled by the transition from step 203 or step 204 (step 205). In this process, as in the setting register shown in step 204, the validity or invalidity of the functions of other devices may be explicitly set. In particular, no setting registers are provided and there is no invalidation process. As a result, the functions of the devices may be effective.

  When the processing up to step 205 is completed, the authentication sequencer device 112 transfers control to the CPU 103. The CPU 103 reads the boot loader 109 from the nonvolatile storage device 108 and performs boot processing (step 206).

  In the description of step 202, the case where the boot loader 109 is encrypted and stored is shown. In such a case, the microcomputer 102 is provided with a small-capacity RAM not shown in FIG. The boot loader decrypted in step 202 may be stored in the RAM, and the CPU 103 may perform a process of reading the boot loader 109 from the RAM instead of the nonvolatile storage device 108.

  Further, the CPU 103 proceeds with processing according to the instruction indicated by the boot loader 109, loads the OS 110, and executes other necessary applications for the information processing apparatus 101 (step 207).

  Although not shown in FIG. 2, similar to the authentication process performed by the authentication sequencer device 112 for the boot loader 109 in step 202, the CPU 103 instructs the OS 110 in response to an instruction from the boot loader 109 in step 206. In step 207, the CPU 103 performs authentication processing on an arbitrary application in accordance with an instruction from the OS 110, whereby it is possible to check whether or not the program executed after the information processing apparatus 101 is activated is executed. It is possible to realize an information processing apparatus that can guarantee the completeness of a program.

  Further, when the register indicating the boot loader authentication success / failure result shown in step 204 is provided, it is possible to add a function such that the OS or application directly refers to the register value to select the execution contents.

  Here, as a specific example, consider a case where the information processing apparatus 101 equipped with the microcomputer 102 according to the present embodiment is applied to a content reproduction device that handles valuable value content managed by the copyright protection function.

  In such an application, the non-volatile storage device 108 stores the encrypted valuable value content, a reproduction program for reproducing the valuable value content, and the secret information 106 decrypts the encrypted valuable value content. An encrypted valuable value content for storing the encrypted key content is decrypted by the functions of the CPU 103 and the cryptographic processing device 104, and is reproduced by a display device and an audio reproduction device not shown in FIG. Is a common format.

  If the boot loader 109 in the information processing apparatus 101 is falsified for any reason regardless of whether it is malicious or not and authentication fails in the process of step 203, the OS and applications are executed. Function is disabled.

  In this case, the invalidation of the valuable value content becomes impossible by using an access function to the encryption key necessary for reproducing the valuable value content stored in the secret information 106. It is determined that the detection of the possibility of attack on the copyright protection function leads to unauthorized use of the valuable value content, and the function as the content reproduction device is limited.

  However, in step 205, other functions of the information processing apparatus 101 that are not directly related to the reproduction of the valuable value content are enabled, and it is not hindered to provide the user with a function other than the reproduction of the valuable value content. As described above, it is possible to realize an information processing apparatus that realizes important functions such as copyright protection while not excessively limiting user convenience.

  In such an application, the microcomputer 102 used in the information processing apparatus 101 is necessarily provided with functions related to security processing such as the cryptographic processing apparatus 104, the hash function processing apparatus 105, and the secret information 106. . Therefore, the authentication sequencer device 112 is the only device that needs to be added to authenticate the boot loader 109, and the boot loader authentication function that is the basis of the application authentication to be executed can be realized at a small additional cost.

  Further, since the authentication sequencer device 112 operates independently of the CPU 103 and does not have a function of detecting the internal operation from the CPU 103, the operation of the authentication sequencer device 112 is analyzed using a CPU debugger or the like. It is impossible.

  In addition, when each of the cryptographic processing device 104, the hash function processing device 105, and the authentication sequencer device 112 is configured with dedicated hardware circuits, high-speed processing can be expected as compared with software processing in a general CPU. An effect on usability such as a reduction in the startup time of 101 can be expected.

  The operation of the information processing apparatus 101 equipped with the microcomputer 102 according to this embodiment has been described above. However, the operation may be as shown in FIG.

  3, step 301 is substantially the same as step 201 to step 308 shown in FIG. 2, and step 201 shown in FIG. However, the transition destination steps in step 304 are step 305 and step 306.

  In step 302, after the initialization of each functional module is completed, the microcomputer 102 determines whether authentication of the boot loader 109 is necessary. If necessary, the microcomputer 102 proceeds to step 303. If not necessary, the microcomputer 102 proceeds to step 306. (Step 302).

  The above procedure is a step of determining whether the authentication sequencer device 112 or the CPU 103 accesses the boot loader 109 stored in the nonvolatile storage device 108 after the initialization of the functional module after the power is turned on. is there.

  If the former, authentication processing (step 303) of the boot loader 109, which is a feature of the present embodiment, is executed, and if the latter, startup processing in a general information processing apparatus is executed.

  By adopting the operation shown in FIG. 3, even if the microcomputer 102 has a function of authenticating the boot loader, it is possible to realize a general information processing apparatus startup process by the information processing apparatus equipped with the microcomputer 102. The effect of improving the versatility of the microcomputer can be obtained.

  Further, as a method for determining whether the microcomputer 102 needs to authenticate the boot loader 109, a function pin not shown in FIG. 1 is provided in the microcomputer 102, and the function pin is logically input when the power is turned on. Alternatively, a method of switching functions may be used.

  Similarly, the operation of the information processing apparatus according to the present embodiment may be as shown in FIG.

  In FIG. 4, steps 601 to 607 are substantially the same operations as steps 201 to 207 shown in FIG. 2, and detailed description thereof will be omitted. However, the transition destination steps of step 603 are step 604 and step 608.

  In step 608, the information processing apparatus 101 transmits a message regarding that the authentication process has failed and the specific function is not valid to the user through the display apparatus and the audio output apparatus not shown in FIG.

  The above functions are effective in improving system convenience by transmitting the function state of the information processing apparatus 101 to the user.

  Further, the operation of the information processing apparatus according to the present embodiment may be an operation as shown in FIG.

  In FIG. 5, steps 701 to 707 are substantially the same operations as steps 201 to 207 shown in FIG. 2, and detailed description thereof is omitted. However, the transition destination step of Step 707 is Step 708.

  In step 708, the information processing apparatus 101 transmits a message regarding the failure of the authentication process and the specific function not being effective to the user through the display apparatus and the audio output apparatus not shown in FIG.

  Similar to the operation of FIG. 4, the above function is effective in improving system convenience by transmitting the function state of the information processing apparatus 101 to the user.

  Further, in step 708, it is possible to transmit a message to the user using the functions of the information processing apparatus 101 such as the OS and peripheral devices, so that the processing cost is lower than the processing in step 608. There are advantages.

  As described above, according to the present embodiment, an information processing apparatus equipped with a microcomputer that has a robust and inexpensive boot loader authentication function and does not place excessive restrictions on the use of the information processing apparatus by a user is realized. Is possible.

(Embodiment 2)
<Configuration of information processing device equipped with microcomputer>
With reference to FIG. 6, the configuration of the information processing apparatus including the microcomputer according to the second embodiment of the present invention will be described. FIG. 6 is a block diagram showing a configuration of an information processing apparatus equipped with a microcomputer according to Embodiment 2 of the present invention.

  In FIG. 6, the information processing apparatus 401 is obtained by adding a network apparatus 402 to the information processing apparatus 101 shown in FIG. 1 of the first embodiment and adding a function for exchanging information with the server apparatus 403 via the network 404. The other configuration is the same as that shown in FIG. 1 of the first embodiment, and a detailed description thereof is omitted.

  Note that FIG. 6 shows the minimum functional configuration required to configure the information processing apparatus 401, and other functional blocks may be included.

  The network apparatus 402 is provided in the information processing apparatus 401 and exchanges with other information processing apparatuses via the network 404 connected to the outside of the information processing apparatus 401 in accordance with instructions from the CPU 101.

  The server device 403 is an information processing device that is connected to the information processing device 401 via the network 404 and performs some kind of exchange.

  The network 404 is a network to which the network device 402, the server device 403, the network device 402 and the server device 403, and other network compatible information processing devices are connected.

  The network functions supported by the network device 402, the server device 403, and the network 404 are arbitrary. For example, the physical medium may be a wired medium or a wireless medium, or information may be actually stored on the medium. The type of communication protocol for exchanging data is also arbitrary.

<Operation of information processing device equipped with microcomputer>
Next, the operation of the information processing apparatus including the microcomputer according to the second embodiment of the present invention will be described with reference to FIG. FIG. 7 is a flowchart showing the operation of the information processing apparatus equipped with the microcomputer according to the second embodiment of the present invention.

  In FIG. 7, steps 501 to 507 are substantially the same as steps 201 to 207 shown in FIG. 2, and a detailed description thereof will be omitted. However, the transition destination steps of step 503 are step 504 and step 508.

  In step 508, the authentication sequencer apparatus 112 moves the process to the CPU 103, and the CPU 103 executes a specific application and ends.

  Since there is no transition from step 504 to step 507, the specific function of the information processing apparatus 401 is not validated (step 504), and the OS or application program that should be originally activated may be activated. No (step 507).

  As the application executed in step 508, the following may be executed.

  The information processing apparatus 401 is connected to the server apparatus 403 via the network apparatus 402, and receives predetermined information, for example, information such as the activation log information of the information processing apparatus 401 and device-specific ID, to the server apparatus 403. Send. In response to this, the server device 403 analyzes the content of the trouble, transmits a normal boot loader to the information processing device 401 via the network 404, and performs so-called hotfix processing for rewriting the content of the nonvolatile storage device 108.

  Alternatively, a message relating to a troubleshooting method is transmitted to the user through a display device and an audio output device not shown in FIG. The above function is effective in reducing the maintenance cost of the information processing apparatus 401 as a system.

  With the above processing, it is possible to provide a function for correcting a problem automatically or semi-automatically via a network when the boot loader 109 of the information processing apparatus 401 has a problem not intended by the user. An effect of improving the system availability of the user can be obtained.

  On the other hand, if the transition to step 508 is caused by malicious alteration of the boot loader 109, the content of the specific application executed in step 508 is also altered, and the originally expected defect correction via the network is corrected. There is a risk that the function will not execute properly. However, even in that case, since there is no path for transition to step 504, functions important for security are not illegally activated, and security performance does not deteriorate.

  As described above, according to the present embodiment, it is possible to improve the usability of the information processing apparatus by the user, such as having a robust and inexpensive boot loader authentication function and automatically performing correction processing on the information device when a failure occurs. It is possible to realize an information processing apparatus characterized by the above.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  The present invention relates to a microcomputer that performs some information processing based on an arbitrary software code, and in particular, to prevent falsification of a software code called a boot program or a loader program used when starting an information processing apparatus equipped with the microcomputer. The present invention can be applied to an information processing apparatus to be performed.

It is a block diagram which shows the structure of the information processing apparatus carrying the microcomputer which concerns on Embodiment 1 of this invention. It is a flowchart which shows operation | movement of the information processing apparatus carrying the microcomputer based on Embodiment 1 of this invention. It is a flowchart which shows operation | movement of the information processing apparatus carrying the microcomputer based on Embodiment 1 of this invention. It is a flowchart which shows operation | movement of the information processing apparatus carrying the microcomputer based on Embodiment 1 of this invention. It is a flowchart which shows operation | movement of the information processing apparatus carrying the microcomputer based on Embodiment 1 of this invention. It is a block diagram which shows the structure of the information processing apparatus carrying the microcomputer which concerns on Embodiment 2 of this invention. It is a flowchart which shows operation | movement of the information processing apparatus carrying the microcomputer which concerns on Embodiment 2 of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 101 ... Information processing apparatus, 102 ... Microcomputer, 103 ... CPU, 104 ... Cryptographic processing apparatus, 105 ... Hash function processing apparatus, 106 ... Secret information, 107 ... Volatile storage device, 108 ... Nonvolatile storage device, 109 ... Boot loader 110 ... OS, 111 ... data bus, 112 ... authentication sequencer device, 401 ... information processing device, 402 ... network device, 403 ... server device, 404 ... network.

Claims (2)

A central processing unit;
A sequence processor that operates independently of the central processing unit;
Prior to execution of the first program in the central processing unit, the sequence processing device authenticates the first program, and based on the authentication result, the cryptographic processing function or hash by the cryptographic processing device A microcomputer characterized by setting the validity or invalidity of a hash function processing function by a function processing device and shifting to control by the central processing unit. A microcomputer software tampering prevention method comprising a central processing unit and a sequence processing unit that operates independently of the central processing unit,
Prior to execution of the first program in the central processing unit, the sequence processing device authenticates the first program, and based on the authentication result, the cryptographic processing function or hash by the cryptographic processing device A method for preventing falsification of microcomputer software, comprising setting whether the function of the hash function processing function by the function processing device is valid or invalid and shifting to control by the central processing unit.

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