JP4763586B2 - Data processing apparatus, data processing method, and program - Google Patents

Description

  The present invention relates to a technique for comparing image images, and more particularly to a data processing apparatus, a data processing method, and a program for aligning a three-dimensional image.

  The image registration method (Image Registration) is an image processing method in which two three-dimensional images (CT, MRI, etc.) for the same object are input and their alignment is performed. Since image processing for this purpose requires long-time calculations, it is required to speed up the image registration method particularly in the medical field.

  In the image registration method, for the two input images F (Fixed Image) and M (Target Image: Moving Image), an image obtained by performing linear transformation (rotation and translation) on the reference image and the target image. Linear transformation parameters that maximize the mutual information between them are obtained as sequential optimization problems (Non-Patent Document 1). In the image registration method, if calculation is performed for all pixels (Pixels) of an input image, it takes enormous calculation time. Therefore, pixel data included in an image image is randomly sampled to calculate mutual information. For this reason, in the conventional image registration method, a sparse memory access pattern to the main memory is generated in units of pixels.

  In general, an access unit that can be processed efficiently by the main memory is a cache line size, and sparse access in units of pixels is one factor that impedes improvement in processing speed. In numerical computation including sparse access, a compression method for compressing sparse data in a main memory is well known. In general, the access pattern of sparse data is determined by an application algorithm and input data. For this reason, the existing compression method compresses data by predicting a sparse access pattern.

  Therefore, in order for the existing compression method for predicting the sparse access pattern to be effective, the access pattern needs to be able to be predicted sufficiently before the actual data access. On the other hand, when the access pattern cannot be predicted until just before the actual data access, there is a disadvantage that sufficient processing efficiency cannot be obtained. This inconvenience is expected to occur more frequently when the processing algorithm speeds up and the time allowance for the immediately preceding prediction is limited. This is to improve the processing speed of the image registration method. On the other hand, it is also conceivable that the access pattern gives a result of hindering the processing speed improvement of the image registration method.

In addition, systems for matching medical images have been known so far. For example, Japanese Patent Laying-Open No. 2006-55432 (Patent Document 1) discloses a system for performing an X-ray CT examination on the same subject. Japanese Patent Laying-Open No. 2006-20937 (Patent Document 2) discloses a method and apparatus for accurately aligning medical images measured at different times.
P. Thevenazand M. Unser, “Optimization of Mutual Information for Multiresolution ImageRegistration”, IEEE Transactions on Image Processing, 9 (12) December 2000. JP 2006-55432 A JP 2006-20937 A

  An object of the present invention is to provide a data processing apparatus, a data processing method, and a program that improve the processing speed of the image registration method.

  The present invention has been made in view of the above-mentioned disadvantages of the prior art. The image registration method has a degree of freedom in a data access pattern to pixel data at the time of execution.

  The three-dimensional image has a structure in which a plurality of two-dimensional images (hereinafter referred to as slices) are positioned with respect to each other in a direction orthogonal to the plane of the two-dimensional image. Blocks are allocated to slices that are two-dimensional images, and three-dimensional images are processed in units of blocks having an appropriate data size. The pixel data assigned to the block is registered in the main memory as pixel data to be processed for mutual information calculation. When pixel data is registered, the image data to be processed is stored as a format having a data size and structure that can be accessed in units of transfer between the local memory and the main memory. Thereafter, the pixel data to be processed is fetched from the main memory to the local memory by continuous access. The pixel data fetched to the local memory is sampled at random and temporarily stored in the main memory as block data that can be continuously accessed.

  The block data stored in the main memory is fetched to the local memory for mutual information calculation. Further, pixel data to be accessed for mutual calculation with respect to the target image, which is an object of registration, is fetched in units of blocks into a local memory and provided for mutual information calculation.

  As described above, the reference image can be continuously fetched by implementing the data processing device to divide and sample the reference image so as to increase the fetch efficiency of the target image (use continuous memory access). However, the target image can improve the conventional inconvenience in which sparse memory access is required, and can eliminate sparse data access to the main memory during mutual information calculation. As a result, the data processing apparatus of the present invention can achieve highly efficient memory access and improve the speed of the registration process.

  The mutual information calculation is performed on block-unit pixel data stored in the local memory. In the first aspect, the pixel data used for the mutual information calculation uses the obtained linear transformation parameters. Then, the bounding box of the target image is determined, and the pixel data included in the bounding box is fetched into the local memory and executed. Further, in the present invention, the block group is configured so that the number of pixels of the reference image block group and the target image bounding box is maximum and fits in the local memory so that the efficiency of memory access is maximized. The size of can be determined. In addition, after the accuracy of the linear transformation parameter is improved, in the second aspect, even when the pixel data of the target data used for the calculation of the mutual information amount is not fetched to the local memory, Without access, it is obtained as an extrapolated value using neighboring pixel data.

  Further, in the present invention, the image image to be processed, that is, the reference image and the target image are reduced in resolution so that the resolution sequentially decreases, and processing is started from the low-resolution image image. Is set as an initial setting parameter for processing a higher-resolution image at the next stage. In the registration process in the next stage, the linear conversion parameter optimized for the low resolution image is used as an initial value. Therefore, the registration accuracy of the linear conversion parameter can be improved by the registration process in the next stage.

  Furthermore, in the present invention, when the sampling rate of the processing target image is lower than the set value, the mutual information calculation processing is switched, and the calculation of the mutual information is executed by speculatively predicting the target image. The pixel data of the target image predicted speculatively is fetched into the main memory in advance and the mutual information amount is calculated. Also, in this aspect, when speculative prediction is unsuccessful, pixel data to be used for mutual calculation is obtained by extrapolation processing using pixel data in the vicinity of pixel data fetched in advance. Provide for the calculation of mutual information.

  As described above, in the present invention, the mutual information calculation can be executed in a state where the pixel data used for the mutual information calculation is fetched into the local memory while eliminating sparse access to the main memory. it can. As a result, it is possible to improve the parallel processing performance in the calculation of mutual information, and further improve the registration processing efficiency.

  Further, the present invention can be applied even when the access pattern for the pixel data of the target image cannot be accurately predicted until just before it is actually accessed. As a result, in order to improve the processing efficiency of the mutual information calculation so far, It is possible to improve the trade-off problem that the processing of sampling pixels to the sparse used limits the efficiency of mutual information calculation.

  The present invention will be described below with reference to specific embodiments shown in the drawings, but the present invention is not limited to the embodiments shown in the drawings.

  FIG. 1 shows an embodiment of a data processing apparatus 10. The data processing apparatus 10 shown in FIG. 1 is generally configured as a computer apparatus such as a personal computer or a workstation. The data processing apparatus 10 shown in FIG. 1 includes a central processing unit (CPU) 12 and a main memory 14 that stores data used by the CPU 12. The main memory 14 is formed of a solid-state memory element such as a DRAM, and reads and stores data used for processing by the data processing device 10 from a storage device 34, which will be described later, and provides it to the CPU 12. In this embodiment, It has a capacity of 512 MB.

  That is, the CPU 12 can use the main memory 14 having a total of 1 GB with two units of the main memory 14. Further, in this embodiment, the CPU 12 is configured as a symmetric multi-core processor, and unit processors 16 configured as multi-core processors are connected by a high-speed bus and can perform parallel processing. The unit processor 16 further includes a general-purpose processor core and a plurality of SPEs (Synergistic Processing Elements) suitable for image processing. In the present embodiment, the unit processor 16 includes eight SPEs. The SPE of each unit processor 16 manages the 256 KB local memory 18 to improve parallel processing. The local memory 18 can be replaced with a cache memory such as a general processor L2. Further, each SPE includes a DMA (Direct Memory Access) 20 and enables high-speed access to data stored in the main memory 14.

  The CUP 12 is connected via a system bus 22 to other devices or drivers of the data processing apparatus 10, for example, a graphics driver 24 and a network device (NIC) 26. The graphics driver 24 is connected to the display device 28 via a bus, and displays the processing result by the CPU 12 on the display screen. The network device 26 connects the data processing apparatus 10 to a network that uses an appropriate communication protocol such as TCP / IP.

  An I / O bus bridge 30 is further connected to the system bus 22. On the downstream side of the I / O bus bridge 30, an I / O bus 32 such as PCI or USB and an interface such as IDE, ATA, ATAPI, serial ATA, SCSI, etc. are connected to a hard disk, CD-ROM, CD- A storage device 34 such as RW, DVD, or MO is connected. In addition, an input / output device 36 such as a keyboard and a mouse is connected to the I / O bus 32 via a bus such as a USB to enable input of registration condition settings and various commands to the data processing device 10. Yes.

  More specifically, the CPU 12 of the data processing apparatus 10 includes, for example, Cell BE Processor (registered trademark) (clock rate 3.2 GHz, main memory = 512 MB, 8 SPE, local memory 256 KB of each SPE). Can do. In addition, CISC or RISC chips such as PENTIUM (registered trademark) to PENTIUM (registered trademark) IV, PENTIUM (registered trademark) compatible CPU, POWER PC (registered trademark), and the like can be given.

  As an operating system (OS) to be used, MacOS (trademark), Windows (registered trademark), Windows (registered trademark) 200X Server, UNIX (registered trademark), AIX (registered trademark), LINUX (registered trademark) or Other suitable OS can be mentioned. Further, the data processing apparatus 10 is described in a legacy programming language or an object-oriented programming language such as an assembler, C, C ++, Visual C ++, Visual Basic, Java (registered trademark), Perl, or Ruby that operates on the OS described above. The application program is stored and executed to enable data processing.

  FIG. 2 shows an embodiment of the functional blocks of the data processing apparatus 10 shown in FIG. 1 and the data flow between the functional blocks. As shown in FIG. 2, a reference image (Fixed Image) and a target image (Moving Image) are input to the data processing apparatus 10, respectively. The reference image 40 is an image serving as a reference to be aligned by an image registration method, and can be, for example, an X-ray photograph, an X-ray CT image, an MRI image, or the like acquired in the past of a predetermined patient. The target image 42 is defined as an image to be registered with respect to the reference image 40. The target image 42 can be, for example, an X-ray photograph, an X-ray CT image, an MRI image, or the like taken or recorded after obtaining the reference image 40. In the present invention, the type and attribute of the image for alignment are not particularly limited.

  The reference image 40 and the target image 42 are created as a three-dimensional image in which a plurality of slices give a cross section having a specific depth, with the two-dimensional image image as a unit slice. The reference image 40 and the target image 42 are stored in a storage device 30 such as a hard disk device, a CD-ROM, a CR-RW, a DVD, or an MO, read out to the main memory 14 in response to a processing request, and the data processing device 10. Used for processing by

  The data processing apparatus 10 includes a plurality of down-sample processing units. The down-sample processing units 44 to 48 and the down-sample processing units 58 to 62 extract pixels of an image to be processed. It functions as a down sample processing means that lowers the resolution in terms of software. Each down-sample processing unit executes down-sampling at the same resolution ratio for the same processing stage so as to give corresponding low-resolution image images for both the reference image 40 and the target image 42.

  Since the down-size processing unit in each processing stage performs the same processing as described above, the down-sample processing units 44 to 48 for downsizing the reference image 40 will be described below. As illustrated in FIG. 2, it is assumed that the reference image 40 having the original resolution has X × Y pixels. The down-sample processing unit 44 creates a reference image in which the number of original pixels is 1/4. The down sample processing unit 46 generates a reference image obtained by compressing the low resolution image generated by the down sample processing unit 44 to 1/16 of the original resolution. Further, the down-sample processing unit 48 creates a reference image obtained by compressing the low-resolution image created by the down-sample processing unit 46 to 1/64 of the original resolution.

  As a result, in the illustrated embodiment, the data processing apparatus 10 creates an image with a reduced resolution in a resolution column of 1 (original resolution) → 1/4 → 1/16 → 1/64. The pixel data of these image images is once written in the main memory 14. Each pixel data written in the main memory 14 is read into each registrator described below and used for registration processing. In the present invention, the number of down-sample processing units to be mounted is not particularly limited. Similarly, the same or the same down-sample processing units 58 to 62 are applied to the target image 42 to create low-resolution images at the same resolution ratio as the reference image 40 and store them in the main memory 14. To do. When the down sample processing units 58 to 62 are mounted separately from the down sample processing units 44 to 48, the downsizing processing of the reference image 40 and the target image 42 can be executed as parallel processing. preferable.

  In this embodiment, the sampling number of pixel data is 1/100 of the total number of pixels of the original resolution. For this reason, when the resolution is reduced to 1/4, 1/16, or 1/64, the sampling rate is set to 4/100, 16/100, or 64/100 for each resolution image. The processing is executed at a higher sampling rate so as to hold That is, for low-resolution image images, the sampling rate is increased, and for high-resolution image images, the sampling rate is decreased to hold the number of pixels to be processed and execute processing. Note that the number of samplings can be appropriately changed at each processing stage according to processing efficiency and a specific application. The data processing apparatus 10 sequentially starts the image registration process from the low-resolution image image with respect to the generated series of the reduced-resolution image images. The data processing apparatus 10 applies different sampling processes and further applies different mutual information calculation methods according to the sampling ratio of the image to be processed.

  Further, the data processing apparatus 10 sets the linear conversion parameter obtained by the registration process one stage lower as the initial setting parameter except for the first stage for each processing stage of the registration process. For this reason, the registration accuracy of linear transformation parameters such as affine transformation parameters is improved sequentially. For this reason, an efficient registration method is applied to the processing of an image image with a reduced resolution. In addition, the data processing apparatus 10 can use a registration method that speculatively compresses the pixels of the target image for which the mutual information amount is calculated at a processing stage having a predetermined sampling rate with improved parameter accuracy. At this stage, even if the pixel data is speculatively acquired and compressed, the registration accuracy of the linear transformation parameter is improved, so that the mishit of the data in the local memory 18 can be kept low. In addition, even if a miss-hit occurs, it can be handled by extrapolating from the pixel data of the compressed target image. In this embodiment, another speculative prediction can be performed to eliminate sparse access. Furthermore, in this embodiment, an error regulation value is set for the predicted value, and when the error exceeds the error regulation value, the main memory 14 can be accessed with emphasis on accuracy. For the first stage, an initial setting value can be acquired from a value stored in the input / output device 36 or the storage device 34.

Further, the data processing apparatus 10 shown in FIG. 2 will be described. The data processing apparatus 10 includes registrars 50 to 56 that function as positioning means corresponding to the resolution of an image. Further, the registrars 50 to 56 are ordered as R _{0 to} R ₃ so as to correspond to the respective processing stages. The registrars 50 to 56 function as registrar means configured as software. In the specific implementation shown in FIG. 2, among the registrars 50-56, the registrar 50 and the registrar 52 are each configured as a low-resolution registrar that applies block sampling to a low-resolution image image, First registrar means is provided.

  The registrar 54 and the registrar 56 each provide a second registrar unit as a high-resolution registrar that processes a high-resolution image. High resolution registrars 54 and 56 perform registration processing using random sampling and speculative techniques. In addition, linear conversion parameters determined by the registrar one stage below are sequentially set as initial setting parameters from the registrar 52 to the registrar 54. In addition, the final stage registration device 56 outputs a linear conversion parameter 64 for the data processing apparatus 10 to finally use for registration.

  In the present invention, the number and combination of the low-resolution and high-resolution registrars are not particularly limited, and can be appropriately increased or decreased according to a specific application, and the combination thereof can also be set as appropriate.

  FIG. 3 shows a flowchart of an embodiment of processing executed by the data processing apparatus 10. The process shown in FIG. 3 starts from step S100, and in step S101, the reference image and the target image are input to the down-sample processing unit, and a plurality of image images having different resolutions are created and written into the main memory 14. . In step S102, the lowest-resolution image is used, and the lowest-stage register 50 is activated to calculate a rough approximation value of the linear conversion parameter. In step S103, the mutual information amount of the image image is calculated by using the rough approximate value of the parameter as the initial setting value of the registrator that executes processing with a high one-stage resolution, and the linear conversion parameter is determined.

  Further, in step S104, the mutual information is sequentially calculated using the linear transformation parameters calculated in the previous stage for the high-resolution image, and the linear transformation parameters are further updated to improve the registration accuracy of the linear transformation parameters. . In step S105, it is determined whether the sampling rate of the image to be processed next is equal to or greater than a set value. If it is determined in step S105 that the sampling rate is greater than or equal to the set value (yes), parameter updating using only block sampling is continued in step S107. Also, if it is determined that the sampling rate does not reach the set value (no), in step S106, in a specific embodiment of the present invention, registration using random sampling and speculative fetching of pixel data. Execute the process.

  In step S108, it is determined whether or not an original resolution image has been processed. If it is determined in step S108 that the original resolution image has been processed (yes), the parameters at that time are registered as output parameters. If it is determined in step S108 that the original resolution image has not yet been processed (no), the process branches to step S105 and the process is continued. In addition, about the judgment that the image image of the original resolution has been processed, the number of pixels of the image image to be processed and the number of processing stages of the high-resolution registerer are counted, and when the final stage count is exceeded, It can be determined that the process has ended.

  Note that the setting value used for the determination in step S105 in FIG. 3 may vary depending on the specific implementation, but in a specific embodiment, the sampling rate is 16/100 (in terms of resolution, 1/100). 16). In the described implementation, image images with a sampling rate lower than 16/100 (ie, corresponding to processing of high resolution image images) are more random than registration processing using block sampling. This is because the registration process using sampling and speculative fetch has a higher processing efficiency. However, the setting value of this embodiment can be set so as to be optimized as appropriate according to a specific mounting format or the like.

  FIG. 4 shows an embodiment of functional blocks in the low-resolution registrar 50 used in this embodiment. The low-resolution registrar 50 includes a block / sample unit 70, a mutual information amount calculation unit 72, and an optimization processing unit 74. The block sample unit 70 assigns blocks to a plurality of slices of the image image, and fetches the entire pixel data included in the selected block from the main memory 14 to the local memory 18. Thereafter, the block sample unit 70 samples the pixel data assigned to the block at random and registers it in the main memory 14. Further, the block sample unit 70 obtains the three-dimensional coordinates of the corner pixels (eight samples in the specific embodiment) occupying the corners of the block and combines them with the randomly sampled pixel data as the block data. Store in the memory 14.

  The stored block data is fetched again into the local memory 18 for use in processing of the mutual information amount calculation unit 72. The mutual information calculation unit 72 fetches block data to the local memory 18 continuously in units of main memory transfer. At this time, a block group can be formed from a plurality of adjacent blocks, and all sample pixels in the block group can be fetched. Further, the mutual information calculation unit 72 determines the three-dimensional coordinates of the corner pixels corresponding to the block (or block group) in the target image having the same resolution by using the value of the linear transformation parameter, Determine the box. Software means for executing this process constitutes a bounding box acquisition means. Thereafter, the mutual information calculation unit 72 continuously fetches the pixel data of the target image included in the bounding box from the main memory 14 to the local memory 18. In the present invention, the data size of a block (or block group) is optimized so as not to cause sparse memory access to the main memory during execution of mutual information calculation for the block. When a block group is used, its memory size can be dynamically optimized in units of blocks as appropriate depending on the size of the local memory 18 to be used and the value of the linear transformation parameter being calculated.

  The mutual information amount calculation unit 72 calculates the mutual information amount using the pixel data included in the block (or block group) and the pixel data of the target image included in the bounding box. The optimization processing unit 74 corrects the linear transformation parameter using the calculated mutual information for each block, and passes the corrected parameter to the mutual information calculation unit 72 so as to maximize the mutual information. Perform mutual information calculation iteratively. The optimization processing unit 74 ends the processing when the mutual information amount is maximized by the relationship between the block specified at that time and the bounding box, or when a predetermined number of iterations is reached, The linear transformation parameter 76 is passed to the next stage registrator and set as the initial parameter for the mutual information calculation of the next stage.

  In the present embodiment, for the definition formulas and parameter settings used for the mutual information amount calculation unit 72 and the optimization processing unit 74, the setting of the linear transformation parameter to be initialized is changed according to the disclosure of Non-Patent Document 1. Can be implemented as is. In brief, the mutual information calculation unit 72 calculates the probability density function p (x) as a so-called Parzen prediction value, and calculates a Parzen histogram using a linear conversion parameter such as affine transformation. The Parzen probability or frequency is calculated from this histogram, and the mutual information amount S (μ) is given by the following equation (1).

なお、上記式中、ｌおよびκは、離散変数であり、Ｌ_ＴおよびＬ_Ｒは、対象イメージおよび基準イメージの深さデータ（濃度階調のビット数に対応する。）である。μは、線形変換パラメータを示し、ｐが、Ｐａｒｚｅｎ確率を示し、ｐ_Ｔ、ｐ_Ｒは、対象イメージおよび基準イメージの離散Ｐａｒｚｅｎ確率を示す。

In the formula, the l and kappa, a discrete variable, L _T and L _R is the depth data of the target image and the reference image (corresponding to the number of bits of the gray scale.). μ represents a linear transformation parameter, p represents a Parzen probability, and p _T and p _R represent discrete Parzen probabilities of the target image and the reference image.

  Refer to Non-Patent Document 1 for more details. In the present invention, the value of the linear transformation parameter μ is sequentially optimized so as to maximize the mutual information S (μ) expressed by the above formula (1). The optimization processing unit 74 performs the Taylor expansion on the mutual information described above, and determines a linear transformation parameter that maximizes S (μ) as a linear transformation parameter to be output.

  FIG. 5 is a flowchart of an embodiment of processing executed by the low-resolution registrar 50 shown in FIG. The process shown in FIG. 5 starts from step S200, and the pixel data of the block data of the reference image is fetched from the main memory 14 to the local memory 18 in step S201. In step S202, the pixel data fetched into the local memory 18 is randomly sampled to obtain pixel data depth data (for example, 16-bit black and white gradation level value) and position data.

  In step S203, the acquired depth data and position data of the pixel and the three-dimensional coordinate data of the corner pixel of the block are written as block data in the main memory 14 for calculation of the mutual information amount. In step S204, it is determined whether or not the processing has been completed for all the blocks of the reference image having the resolution being processed. If the processing has not been completed (no), the processing returns to step S201. If all blocks have been completed (yes), the process branches to step S205, the local memory 18 is cleared, and the block data written to the main memory 14 is calculated for mutual information. Fetch into local memory 18. In the specific embodiment of the present invention, from the viewpoint of the processing efficiency of the image being processed, the calculation of mutual information can be performed using a single block data, or a plurality of adjacent information can be calculated. It is also possible to form a block group from the block data to be processed and to fetch all the block data in the block group to the local memory 18.

  In step S206, linear transformation is performed on the corner pixels of the block data, and the pixel corresponding to the corner of the reference image is identified by the linear transformation from the pixel data of the target image and defined as a bounding box. Thereafter, the pixel data of the target image included in the bounding box is fetched from the main memory 14 to the local memory 18 in step S207. That is, the low-resolution registrar 50 fetches the pixel data to be processed of the target image into the local memory 18 without using speculative prediction at all.

  In step S208, the mutual information is calculated using the block data in the local memory 18 and the pixel data in the bounding box. In the process of step S208, since the pixel data stored in the local memory 18 can be continuously accessed instead of the pixel unit stored in the main memory 14 when the mutual information is calculated, the processing efficiency of the CPU 12 is improved. To do. The mutual information calculated for the block is stored in the main memory 14 and integrated.

  After that, it is determined whether or not the processing has been completed for all block data in step S209. If the process has not ended (no), the process branches to step S205, and the process for the next block data is repeatedly executed. If the processing is completed for all the block data in step S209 (yes), the optimization processing unit 74 is activated in step S210 to correct the linear transformation parameter so that the mutual information is maximized. In S211, it is determined whether the mutual information amount has been maximized or the set number of iterations has been reached. If the mutual information amount has been maximized or the set number of iterations has been reached (yes), the process is branched to step S212 and the process is terminated. If the mutual information amount is maximized or the set number of iterations has not been reached (no), the process branches to step S205 to recalculate a new bounding box using the updated linear transformation parameters. To repeat the calculation.

  This is because, since the accuracy of the linear parameter is not yet high at low resolution, it is preferable to use the updated value to correct the bounding box. In the high-resolution registrator described later, since the linear conversion parameter with high accuracy is given by the above-described processing by the low-resolution registrator, it is possible to use the “initial value” as a predicted value of the latest value. The linear conversion parameter determined by the low-resolution registrar 50 shown in FIG. 5 is passed as the initial value of the linear conversion parameter of the low-resolution registrar 52 that executes the processing of the next stage.

  FIG. 6 shows an embodiment of the data structure of a three-dimensional image used in the present invention. The data structure of the three-dimensional image shown in FIG. 6 has the same configuration for the reference image and the target image. As shown in FIG. 6, the three-dimensional image 80 is given as a data structure in which slices 82 in which an affected part is registered as a two-dimensional image are positioned in a plurality of XY directions in the depth direction of the affected part. In the present embodiment, a block 84 is allocated to each slice whose resolution is reduced by the down-sample processing unit. The block 84 includes a plurality of pixel data. In FIG. 6, only the block 84 is shown hatched as a representative.

  In this embodiment, when processing the block 84, the pixel data of all the pixels included in the block 84 are fetched into the local memory 18. For this reason, the CPU 12 can efficiently access the pixel data used for processing, and the correlation information can be calculated efficiently. Thereafter, the pixel data in the block 84 is sampled. The sampling rate at this time is a sampling rate corresponding to the resolution, and a high sampling rate is applied to the low-resolution reference image. Also, the corner pixels occupying the corners of the block are sampled in addition to random sampling and used to define the bounding box. In addition, the block data size is determined by sampling at a predetermined sampling rate in the local memory 18 during calculation of mutual information for block data or block group data and target image data. Optimized for continuous access.

  FIG. 7 illustrates an embodiment in which the pixel data registered in block 84 is fetched into a specific page of local memory 18. As shown in FIG. 7, all the pixel data in the block 84 once written in the main memory 14 is fetched into the local memory 18. As with the cache memory, the local memory 18 is optimized for fetching from the main memory 14 in units of lines, and enables data transfer in units of lines. Further, the block sample unit 70 randomly samples the pixel data fetched into the local memory 18, adds the three-dimensional coordinates of the corner pixels 86 of the pixels occupying the corner to the randomly sampled pixel data, The data is compressed and created as block data so that continuous access is possible, and is written in the main memory 14 again.

  Thereafter, the mutual information calculation unit 72 fetches block data including the three-dimensional coordinates of the corner pixel 86 from the main memory 14 into the area 88 of the local memory 18. Further, the mutual information calculation unit 72 reads the pixel data included in the bounding box of the target image into the area 90 of the local memory 18, and does not cause sparse access to the pixel data. Let the quantity calculation be performed. Note that a block group consisting of a plurality of adjacent blocks can be fetched into the local memory 18, and the number of blocks in the block group is dynamically optimized according to the size of the local memory and the value of the linear transformation parameter. To do.

  FIG. 8 is a diagram showing a linear transformation relationship between a block group composed of two reference image blocks 84 and a bounding box 92. The reference image block 84 includes a plurality of pixel data. Further, the value of the corner pixel 86 in the block 84 is sampled separately from the pixel data 96 extracted by random sampling, and is once written in the main memory 14 as block data. The value of the linear transformation parameter is applied to the three-dimensional coordinates of the corner pixel 86 by the mutual information calculation unit 72, and the corresponding three-dimensional coordinates of the corner pixel 94 to be supported in the target image are given. Define box 92. In FIG. 8, two blocks 84 are shown, and a linear mapping from each corner pixel 86 to the target image is indicated by a symbol P. The bounding box 92 is defined by eight corner pixels 86 in a block group consisting of two adjacent blocks, as shown in FIG. In FIG. 8, the X, Y, and Z directions in the 3D image of the block 84 belonging to the reference image 40 are set as the orientation shown in FIG.

  The bounding box 92 is a rectangular body defined by the following processing. (1) The corner pixels 86 of the reference image are subjected to linear transformation P to specify the corresponding eight corner pixels 94 of the target image. (2) Thereafter, the maximum value and the minimum value of each coordinate value are selected from the eight values (Mx, My, Mz) of the corner pixel 94 of the target image, and (Mxmax, Mymax, Mzmax) and (Mxmim) are selected. , Mymin, Mzmin) are defined as diagonal lines. (3) A rectangular space formed by defining a side parallel to the coordinate axes Bx, By and Bz defining the target image and having the diagonal line. The bounding box 92 defined as described above is also referred to as an Axis-aligned bounding box. The reason why the bounding box 92 is generated as a rectangular body having sides parallel to the coordinate axes Bx, By, Bz is to enable the calculation of the addresses of the pixels included in the bounding box 92 at high speed. .

  Thereafter, the mutual information calculation unit 72 further identifies the pixel data 98 included in the bounding box 92 and fetches the identified pixel data from the main memory 14 to the local memory 18. Thereafter, the mutual information amount calculation unit 72 calculates the mutual information amount for the pixel data of the block and the bounding box without performing sparse access to the main memory 14. Run with data access only. When a block group is formed from a plurality of blocks, the block memory is designed so that the fetch efficiency from the main memory is maximized and the sample pixels of the block group and the bounding box of the reference image are stored in the local memory. The group size can be determined dynamically.

  After the processing by the low-resolution registrars 50 and 52 is completed, in this embodiment, registration by the high-resolution registrars 54 and 56 that function as the second registrar is executed. FIG. 9 shows an embodiment of functional blocks of the high resolution registerer 54. Since the high resolution registration device 54 uses the same configuration as the high resolution registration device 56, the configuration of the high resolution registration device 54 will be described in detail. The high-resolution registrar 54 includes a random sample unit 100 and a target image prediction unit 102. The random sample unit 100 samples the pixels of the designated reference image so as to have the designated sampling rate, assigns blocks to the sampled data, and compresses them into the main memory 14 to enable continuous access. Write as follows.

  The target image prediction unit 102 uses the initial value of the linear transformation parameter for a randomly sampled block of pixel data to predict and determine pixel data of the target image that requires data access. Further, the target image predicting unit 102 assigns a block corresponding to the reference image to the pixel data of the determined target image, and executes writing to the main memory 14 so as to enable continuous access after compression. At this stage, the target image prediction unit 102 performs sparse access to the pixel data stored in the main memory 14.

  The high resolution registrar 54 further includes a mutual information amount calculation unit 104 and an optimization processing unit 106. The mutual information calculation unit 104 fetches the pixel data compressed and written in the main memory 14 by the random sample unit 100 and the target image prediction unit 102, respectively, into the local memory 18. Thereafter, the mutual information amount calculation unit 104 can execute the mutual information amount calculation of the designated block only by data access to the local memory 18. In this regard, the mutual information amount calculation unit 104 and the optimization processing unit 106 of the present embodiment can perform efficient data access without performing sparse access. Note that the mutual information calculation unit 104 and the optimization processing unit 106 are configured in the same manner as the low-resolution registrars 50 and 52.

  In addition, when the mutual information calculation unit 104 determines that it is necessary to calculate pixel data that has not been fetched in advance for the linear transformation parameter, when the prediction error is small, the mutual information calculation unit 104 accesses the pixel data to the main memory. Instead of fetching again, extrapolation is performed from pixel data in the vicinity of the target data, and the value is calculated. The high-resolution registrator uses a linear transformation parameter that has already been improved in accuracy by the low-resolution registrator, and thus does not cause an error that significantly affects the mutual information amount. After that, when the processing of the predetermined information block is completed, the mutual information amount calculation processing unit 104 executes the processing of the next block and calculates the mutual information amount for each block.

  The optimization processing unit 106 corrects the linear conversion parameter for the result calculated by the mutual information calculation unit 104 using the linear conversion parameter, and returns the corrected linear conversion parameter to the mutual information calculation unit 104. Then, the mutual information is calculated again. The optimization processing unit 106 sums up the mutual information amount calculated for each block, and determines and outputs the linear transformation parameter 108 so that the sum of the mutual information amount is maximized.

  Thereafter, if there is a further high-resolution registrar of the next stage, the determined linear conversion parameter is set as an initial value of the linear conversion parameter of the high-resolution registrar of the next stage, and the process ends.

  FIG. 10 shows a flowchart of an embodiment of a process performed by the high resolution registerer 54. The process shown in FIG. 10 starts from step S300, and pixel data of the reference image is randomly sampled in step S301. In step S302, a block is allocated to the sampled pixel data, compressed, and written to the main memory 14. In step S303, the pixel data of the target image that needs to be accessed from the initial value of the linear transformation parameter is acquired and compressed, and the data is formed into a block corresponding to the block of the reference image and written into the main memory.

  In step S304, the designated reference image block and the corresponding target image block are fetched from the main memory 14 to the local memory, respectively. Subsequently, in step S305, it is determined whether or not new pixel data is necessary for the target image. If it is determined in step S305 that new pixel data is necessary (yes), it is determined whether or not the prediction error is smaller than the set error regulation value in step S306. As a result of the determination in step S306, when it is determined that the prediction error is small (yes), the process is branched to step S308. In step S308, the pixel data of the target image that has already been fetched is extrapolated to calculate approximate values such as position data and depth data that the pixel data should have, the pixel data to be used in the calculation is predicted, The process moves from A to the process shown in FIG. If it is determined in step S306 that the prediction error is not small (no), the process branches to step S307, and the corresponding data of the target image is fetched from the main memory 14 to the local memory 18 to obtain a point. From A, the process moves to the process shown in FIG.

  FIG. 11 shows another embodiment when the prediction error is determined in units of pixels. As shown in FIG. 11, the pixel data 96 of the block 84 of the reference image 40 is predicted to be linearly mapped into a 2 × 2 × 2 pixel area having the pixel data 98 of the target image 42 as one corner. And When the linear mapping P calculated by applying the current linear transformation parameter to the pixel data 96 is sufficiently close to the predicted 2 × 2 × 2 pixel region (near miss), a speculative prediction value is used. Thus, the determination in step S308 in FIG. 10 is executed.

  On the other hand, if the linear map P is not sufficiently close to the 2 × 2 × 2 pixel region (far miss), the process of step S307 for newly fetching pixel data from the main memory 14 is executed. In the present embodiment, by determining near miss / hit / far miss for each pixel to be processed, more local prediction consistency can be reflected in the fetch. On the other hand, if it is determined in step S305 that new pixel data is not required (no), the process branches from point A to the process shown in FIG.

  FIG. 12 is a flowchart showing processing after point A of the processing of FIG. The high-resolution registrar enters the process of FIG. 12 from point A, and calculates the mutual information amount using the pixel data in step S309. Thereafter, in step S310, it is determined whether or not the calculation has been completed for all the samples in the block. If it is determined in step S310 that calculation has not been completed for all samples in the block (no), the process branches from point B to step S305 in FIG. It is determined whether or not pixel data is necessary.

  If it is determined in step S310 that calculation has been completed for all samples in the block (yes), the process branches to step S311. In step S311, it is determined whether or not calculation has been completed for all blocks. If it is determined that calculation has been completed for all blocks (yes), linear transformation parameters are set so as to maximize the mutual information in step S312. To decide. If it is determined in step S311 that there are still blocks to be calculated (no), the process branches from point C to step S304, and the process is repeated.

  In step S313, it is determined whether the mutual information amount has been maximized or the number of iterations has reached a set value. If it is determined in step S313 that the mutual information amount has been maximized or the number of iterations has reached the set value (yes), the process is branched to step S314 and the process is terminated. If it is determined in step S313 that the mutual information amount has been maximized or the number of iterations has not reached the set value (no), the process branches from point C to step S304, and the mutual information amount is determined. Or until the iteration counter reaches a set number of iterations.

  Using the above configuration, the performance comparison between the registrator of the present invention and the registrator using the conventional process was examined with a simulator using a spread seed. Predictive performance is implemented in Blade Center (registered trademark) QS20 manufactured by International Business Machines Corporation using CELL BE Processor (3.2 GHz, main memory = 1 GB, local memory of each SPE = 256 KB). It was assumed that 8 SPEs were used, and the calculation time required per pixel was simulated using a spreadsheet.

  For comparison, a conventional sequential sequential optimization method (Non-Patent Document 1) with a sampling ratio of 1/100 is used, and a processing data set in units of blocks that can be fetched into a local memory for mutual information calculation. We also simulated a conventional sequential optimization method in which calculations were performed while sparse access to the main memory was performed. The results are shown in FIG. 13 and FIG. The target 3D image was 256 × 256 pixels per slice.

  The simulations are simulations ((a) to (d)) for low-resolution registrars for sampling ratios 64/100, 16/100, 4/100, and 1/100, and simulations (e) for high-resolution registrars. . Moreover, about the comparative example (f), the conventional method (nonpatent literature 1) was used and it was set as simulation (f). In the simulation, the clock time required for the mutual information calculation of the mutual information amount per pixel is simulated assuming that each registrator executes one stage of processing.

  As shown in FIG. 13, in a low-resolution registrator that performs block sampling, the higher the sampling rate (corresponding to the lower resolution), the shorter the execution time, and the lower the sampling rate ( Corresponding to higher resolution), execution time increased.

  The reason for this is that when the sampling rate (the rate at which the data used for calculation is sampled) is low, unnecessary pixel data is fetched to the local memory 18 as a block, and the effect of block sampling is small. It is to become. For this reason, the first registrar using the block sampling method is used at the low resolution, and the speculative prediction using the linear transformation parameter with increased accuracy is used at the high resolution together with the second registrar. It has been shown that it is preferable to implement using random dumpling.

  Further, as shown in FIG. 13, each registrar of the present invention shows that the calculation time of the mutual information amount is sufficiently improved as compared with the conventional method.

  FIG. 14 compares the efficiency of the present invention by comparing the total execution time of the registrator using the conventional sequential optimization method and the total execution time of the registrator according to the present invention by using the reciprocal of the respective calculation times as a ratio. As a result of the comparison by simulation, the calculation time is about three times by using the method of the present invention compared to the conventional method, corresponding to the improvement of the sparse access to the main memory by the present invention. It was shown to be shortened.

  Further, instead of the block sampling of the present invention, the same effect can be obtained by generating a random number sequence without dividing the block, sampling all pixel data using the sorted random number sequence, and processing each block. It is also possible to obtain. In the case of this embodiment, it is necessary to add a module that executes sort processing as a software resource. Further, in the present embodiment, when image processing is executed using parallel processing, inter-process communication is necessary with the addition of sort processing. In a preferred embodiment of the present invention, inter-process communication is not required, and parallel processing can be further improved. In addition, in order to obtain the same effect as when the block group described above is configured and its size is dynamically optimized, a sort process is required every time the linear transformation parameter is recalculated. There is a time overhead.

  The above-described functions of the present invention can be realized by a device-executable program written in a legacy programming language such as assembler, C, C ++, or an object-oriented programming language, and is stored in a device-readable recording medium and distributed. be able to.

  Although the present invention has been described with the embodiments shown in the drawings, the present invention is not limited to the embodiments shown in the drawings, and those skilled in the art have conceived other embodiments, additions, modifications, deletions, and the like. It can be changed within the range that can be performed, and any embodiment is included in the scope of the present invention as long as the operation and effect of the present invention are exhibited.

The figure which showed embodiment of the hardware constitutions of a data processor. The figure which showed embodiment of the functional block of a data processor. The flowchart of embodiment of the process which a data processor performs. The figure which showed embodiment of the functional block of a low-resolution registrar. 10 is a flowchart of an embodiment of a process of a low resolution registrar. The figure which showed embodiment of the data structure of a three-dimensional image. The figure which showed embodiment of the mapping of the pixel data in a local memory. The figure which showed embodiment of the linear transformation which matches the pixel data in a block with a bounding box. The figure which showed embodiment of the functional block of a high resolution registration device. 6 is a flowchart of an embodiment of processing of a high-resolution registrar. The figure which showed other embodiment in the case of determining a prediction error per pixel. 11 is a flowchart of processing after point A of the processing in FIG. The figure which showed the performance comparison result of the registrar of this invention and the registrar which uses a conventional process. The figure which showed the performance comparison result of the registrar of this invention and the registrar which uses a conventional process.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Data processing unit, 12 ... Central processing unit (CPU), 14 ... Main memory, 16 ... Unit processor, 18 ... Local memory, 20 ... DMA, 22 ... System bus, 24 ... Graphics driver, 26 ... Network device (NIC), 28 ... Display device, 30 ... I / O bus bridge, 32 ... I / O bus, 34 ... Storage device, 36 ... I / O device, 40 ... Reference image, 42 ... Target image , 44 to 48 ... down sample processing unit, 50 to 56 ... registrar, 58 to 62 ... down sample processing unit, 64 ... linear transformation parameter, 70 ... block sample unit, 72 ... mutual information amount calculation unit, 74 ... optimization processing unit, 76 ... linear transformation parameter, 80 ... three-dimensional image, 82 ... slice, 84 ... block, 86 ... corner image , 88 ... area, 90 ... area, 92 ... bounding box, 94 ... corner pixel, 96 ... pixel data, 98 ... pixel data, 100 ... random sample part, 102 ... target image prediction part, 104 ... mutual information amount calculation , 106: Optimization processing unit, 108: Linear transformation parameter, P: Linear mapping

Claims (12)

A data processing device that performs alignment using mutual information indicating correlation between a reference image of a three-dimensional image and a target image of the three-dimensional image, the data processing device comprising:
Down-sample means for sequentially reducing the resolution of the reference image;
Registration between the reference image reduced in resolution by the down-sample means and the target image reduced in resolution in the same manner as the reference image reduced in resolution, and linear conversion parameters for registration are set. To calculate and output the linear transformation parameters, assign a block to the reduced resolution reference image, fetch all pixel data contained in the block into a local memory, sample the pixel data randomly, First registering means including block sample means for adding three-dimensional coordinates of corner pixels occupying the corners of the block to create block data and writing to main memory ;
Using the linear transformation parameter output from the first registration unit as an initial value, registering the reduced resolution reference image and the reduced resolution target image each having a higher resolution by one stage. In order to calculate a linear conversion parameter and update the linear conversion parameter output from the first registr means , the pixel data of the reduced-resolution reference image is randomly sampled, and a block is allocated to the main memory. Second registrar means including random sample means for writing ;
When the sampling rate of the low-resolution reference image is equal to or higher than a preset setting value, the first registration unit is used, and when the sampling rate does not reach the setting value, Means for performing registration using the second registrar means ;
The first and second registrator means can continuously access the pixel data of the reference image and the pixel data of the target image used for calculation of the mutual information in block units. The data processing device stores the data in the main memory, fetches the data into the local memory in units of blocks, and calculates the mutual information. The first registrar means includes:
The block data generated by the block sample means is fetched into the local memory, the block data is used, and the linear transformation parameter is applied to the corner pixel three-dimensional coordinates of the block data. A bounding box obtaining means for obtaining a bounding box of the target image;
The pixel data included in the bounding box is fetched into the local memory, and the Parzen histogram is calculated using the block data on the local memory and the pixel data included in the bounding box and the linear transformation parameter. A mutual information calculating means for calculating a mutual information given by calculating a Parzen probability or frequency in the Parzen histogram;
The data processing apparatus according to claim 1, further comprising: an optimization processing unit that receives a mutual information amount that is a calculation result of the mutual information amount calculation unit and calculates the linear transformation parameter that maximizes the mutual information amount. The second registrar means includes
Applying an initial value of the linear transformation parameter to the randomly sampled pixel data, determining pixel data of the target image to be accessed, assigning a corresponding block, and writing to the main memory Means,
Fetching each pixel data of the reference image and the target image from the main memory to the local memory, and using the pixel data of the reference image and the target image and the linear transformation parameter, A mutual information calculating means for calculating a mutual information given by calculating a Parzen histogram and calculating a Parzen probability or frequency in the Parzen histogram;
The data processing apparatus according to claim 1, further comprising: an optimization processing unit that receives a mutual information amount that is a calculation result of the mutual information amount calculating unit and calculates the linear transformation parameter that maximizes the mutual information amount. The bounding box acquisition means creates a block group by combining the spatially adjacent block data, and creates a bounding box corresponding to the block group,
3. A data processing apparatus according to claim 2, comprising means for determining the number of blocks in the block group such that the block group and the bounding box fit in a local memory and the number of pixels is maximized. A data processing method for causing a data processing device to perform alignment using mutual information indicating a correlation between a reference image of a 3D image and a target image of the 3D image, the data processing method comprising:
Sequentially reducing the resolution of the reference image by down-sampling means;
A linear conversion parameter for registration is performed between the reference image reduced in resolution by the down-sample means and the target image reduced in resolution in the same manner as the reference image reduced in resolution. Calculating the linear transformation parameters; and
Determining whether the sampling rate of the low-resolution reference image is equal to or less than a preset setting value;
If the sampling rate is greater than or equal to the set value , assign a block to the reduced-resolution reference image, fetch all of the pixel data contained in the block to a local memory, sample the pixel data randomly, First registering means for executing a step of creating block data by adding the three-dimensional coordinates of corner pixels occupying the corners of the block and writing them to the main memory , wherein the sampling rate is set to the set value If not, use the second registrar means for randomly sampling pixel data of the reduced resolution reference image, allocating blocks and writing to the main memory, using the mutual information Pixel data of the reference image and the target image The raw data set is stored in the main memory so that it can be continuously accessed in units of blocks, fetched in units of blocks into the local memory, and the target image that has been reduced in resolution is the same as the reference image that has been reduced in resolution. Performing the registration between the data processing device, and
The second registrar means performs registration of the reduced resolution reference image and the reduced resolution target image using the linear conversion parameter output from the first registrar means as an initial value. A data processing method for calculating a linear transformation parameter and updating the linear transformation parameter output by the first registrant means. The first registrar means includes:
Fetching the block data into the local memory, using the block data, and applying the linear transformation parameters to the corner pixel 3D coordinates of the block data to bound the box of the target image A step of defining
The pixel data included in the bounding box is fetched into the local memory, and the Parzen histogram is calculated using the block data on the local memory and the pixel data included in the bounding box and the linear transformation parameter. Calculating the mutual information given by calculating the Parzen probability or frequency in the Parzen histogram;
The data processing method according to claim 5, further comprising: receiving a mutual information amount that is a calculation result of the mutual information amount, and determining the linear transformation parameter that maximizes the mutual information amount. The second registrar means includes
Applying an initial value of the linear transformation parameter to the randomly sampled pixel data, determining pixel data of the target image to be accessed, assigning a corresponding block, and predicting and assigning to the main memory When,
Fetching each pixel data of the reference image and the target image from the main memory to the local memory, and using the pixel data of the reference image and the target image and the linear transformation parameter, Performing a calculation of mutual information given by calculating a Parzen histogram and calculating a Parzen probability or frequency in said Parzen histogram;
The data processing method according to claim 5, further comprising: receiving a mutual information amount that is a calculation result of the mutual information amount, and determining the linear transformation parameter that maximizes the mutual information amount. Defining the bounding box comprises combining the spatially adjacent block data to create a block group and forming a bounding box corresponding to the block group;
7. The data processing method according to claim 6, further comprising the step of determining the number of blocks in the block group such that the block group and the bounding box fit in a local memory and the number of pixels is maximized. A computer-executable program for executing a data processing method for causing a data processing apparatus to perform alignment using mutual information indicating a correlation between a reference image of a 3D image and a target image of the 3D image. The program is
Sequentially reducing the resolution of the reference image by down-sampling means;
A linear conversion parameter for registration is performed between the reference image reduced in resolution by the down-sample means and the target image reduced in resolution in the same manner as the reference image reduced in resolution. Calculating the linear transformation parameters; and
Determining whether the sampling rate of the low-resolution reference image is equal to or less than a preset setting value;
When the sampling rate is equal to or higher than a set value , a block is assigned to the reference image with the reduced resolution, the entire pixel data included in the block is fetched into a local memory, the pixel data is randomly sampled, The first registration means for executing the step of creating the block data by adding the three-dimensional coordinates of the corner pixels occupying the corner of the block and writing it into the main memory, and the sampling rate reaches the set value If not, use the second registrant means for randomly sampling pixel data of the reduced resolution reference image, allocating blocks and writing to the main memory, using the mutual information amount Pixel data of the reference image and pixels of the target image used for calculation of The data set is stored in the main memory so that it can be continuously accessed in block units, fetched in block units into the local memory, and the target image reduced in resolution is the same as the reference image reduced in resolution. Performing the registration between the data processing device, and
The second registrar means performs registration of the reduced resolution reference image and the reduced resolution target image using the linear conversion parameter output from the first registrar means as an initial value. A computer-executable program for calculating a linear transformation parameter and updating the linear transformation parameter output by the first registrant means. The first registrar means includes:
Fetching the block data into the local memory, using the block data, applying the linear transformation parameters to the three-dimensional coordinates of the corner pixels of the block data, Defining a box;
The pixel data included in the bounding box is fetched into the local memory, and the Parzen histogram is calculated using the block data on the local memory and the pixel data included in the bounding box and the linear transformation parameter. Calculating the mutual information given by calculating the Parzen probability or frequency in the Parzen histogram;
The program according to claim 9, comprising: receiving a mutual information amount that is a calculation result of the mutual information amount, and determining the linear transformation parameter that maximizes the mutual information amount. The second registrar means includes
Applying an initial value of the linear transformation parameter to the randomly sampled pixel data, determining pixel data of the target image to be accessed, assigning a corresponding block, and predicting and assigning to the main memory When,
Fetching each pixel data of the reference image and the target image from the main memory to the local memory, and using the pixel data of the reference image and the target image and the linear transformation parameter, Performing a calculation of mutual information given by calculating a Parzen histogram and calculating a Parzen probability or frequency in said Parzen histogram;
The program according to claim 9, comprising: receiving a mutual information amount that is a calculation result of the mutual information amount, and determining the linear transformation parameter that maximizes the mutual information amount. Defining the bounding box comprises combining the spatially adjacent block data to create a block group and forming a bounding box corresponding to the block group;
11. The program according to claim 10, comprising determining the number of blocks in the block group such that the block group and the bounding box fit in local memory and the number of pixels is maximized.

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