JP4722517B2 - Image display device, image display monitor, and television receiver - Google Patents

Description

  The present invention relates to an image display apparatus using a hold-type display element such as a liquid crystal display element or an EL (Electro Luminescence) display element.

  In recent years, in addition to CRT (cathode ray tube) display devices, various displays such as liquid crystal display devices, plasma display devices, and organic EL display devices have been developed and commercialized.

  Here, in a display device such as a CRT display device that performs impulse-type display (display in which only the light emission period is displayed), pixels in the non-selection period are displayed in black. On the other hand, in a hold-type display (display that continues to hold the image of the previous frame until a new image is written) such as a liquid crystal display device or an organic EL display device, it was previously written in the pixels in the non-selection period. The display content is maintained (normal display in the hold type display device).

  In the normal display of such a hold-type display device, there is a problem of moving image blur when displaying moving images. The above-mentioned motion blur problem is caused by the display content being held in the non-selection period in the pixel of the hold-type display device, and cannot be solved even if the response speed of the pixel is improved. Absent. In a hold-type display device, there are a method for preventing moving image blur by performing time-division driving as pseudo impulse driving and performing n-times interpolation driving.

  Note that time-division driving as pseudo impulse driving is a driving method in which one vertical period (one frame) is divided into a plurality of subframes, and each subframe is displayed with different display luminances. That is, even in the hold-type display device, if a low-brightness display (display close to black display) is performed in at least one of the subframes by performing time-division driving, a pseudo-impulse display can be displayed. This is effective in preventing motion blur. As an example of disclosing time-division driving in a liquid crystal display device, Patent Literature 1 is cited, for example.

  The n-times interpolation driving means that one frame period is divided into a plurality of subframe periods, and a display image corresponding to the input image signal is displayed in the first subframe within one frame period. A method of detecting a moving image portion from a display image of a continuous frame of the input image signal in a sub-frame, and generating and displaying a new display image in which the moving position of the moving image portion is corrected by image processing at an intermediate time It is.

  For example, as shown in FIG. 15, when there are two consecutive frame images in the input image signal, that is, (N-1) frame and (N) frame images, in the double speed interpolation drive, these frames are temporally changed. An intermediate (N-0.5) frame image is generated. In the example of FIG. 15, in order to generate an image of (N−0.5) frames, first, an image of “car” is detected as a moving image part from the images of (N−1) frames and (N) frames. . Then, the position of the moving image portion of “car” detected as the moving image portion in the (N-0.5) frame image is obtained, and the movement position correction of the moving image portion is performed by image processing (N-0.5). ) Generate a frame.

In the image display process for the display screen, the (N-0.5) frame generated as described above is interpolated and displayed between the (N-1) frame and the (N) frame. In such n-times interpolation driving, the number of display frames increases depending on the interpolated frame, and therefore the frame frequency is increased. For example, Patent Documents 4 to 6 disclose n-times interpolation driving.
JP 2001-296841 A (publication date: October 26, 2001) JP 2001-184034 A (publication date: July 6, 2001) JP 2003-262846 A (publication date; September 19, 2003) JP-A-4-302289 (Publication Date: October 26, 1992) Japanese Laid-Open Patent Publication No. 4-167688 (Release Date; June 15, 1992) JP 2002-199400 A (publication date: July 12, 2003)

  Although the pseudo impulse driving provides an effect of preventing image blur, it also causes a problem that flicker easily occurs at the same time. On the other hand, such a flicker problem does not occur in the n-times speed interpolation drive. However, in the n-times speed interpolation drive, since it is difficult to detect the motion of the moving image part, there is a problem that the moving position may not be completely corrected and the moving image part may be disturbed.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to effectively obtain a moving-image blur suppression effect and to reduce a problem such as a flicker problem and a moving-image portion disorder. It is to realize a display device.

  In order to solve the above problem, an image display device according to the present invention time-divides one frame period of an input image signal into a plurality of subframes, and the time integral value of the display luminance of each subframe is converted into the input image signal. Based on the first display mode in which display luminance is distributed to each sub-frame and image display is performed so as to reproduce the gradation luminance within one frame period based on the original frame in the input image signal. A second display mode for displaying an image by time-division into a sub-frame for displaying a frame image and a sub-frame for displaying an interpolated frame image generated from an original frame image in an input image signal; When image display is performed in the first display mode, first signal generation means for generating a display image signal for each subframe, and image display in the second display mode At the time, the output of the second signal generating means for generating the display image signal for each sub-frame, the output of the first signal generating means and the second signal generating means is switched to display the display image signal. And switching means for outputting to the unit.

  According to the above configuration, the image display device has a first display mode and a second display mode. The first display mode is a display mode by pseudo impulse driving, in which one frame period is time-divided into a plurality of subframes, and the time integral value of the display luminance of each subframe is within one frame period based on the input image signal. Image display is performed by allocating display luminance to each sub-frame so as to reproduce gradation luminance. The second display mode is a display mode by n-times interpolation driving, and a subframe for displaying an original frame image in the input image signal and an interpolation frame generated from the original frame image in the input image signal for one frame period. The image is displayed in a time-divided manner with subframes for displaying the image.

  The image display device includes a first signal generating unit that generates a display image signal when performing image display in the first display mode, and a display when performing image display in the second display mode. The second signal generating means for generating the image signal for use can be switched and used by the switching means. That is, the switching means switches between the first display mode based on pseudo impulse driving and the second display mode based on n-times speed interpolation driving.

  Both the first and second display modes have an effect of suppressing moving image blur, but there is a problem that flicker is likely to occur in the first display mode based on pseudo impulse drive, and the second display mode based on n-times speed interpolation drive. In the display mode, there is a problem of video disturbance.

  For this reason, an input image for which the occurrence of flicker is to be suppressed is displayed in the second display mode by n-times interpolation driving, and the moving image portion may be disturbed when n-times interpolation driving is used. An input image having a large number can be displayed in the first display mode by pseudo impulse driving. As a result, it is possible to effectively obtain a moving image blur suppression effect and to reduce flicker and moving image blurring problems.

  In the image display device, the switching unit may be configured to be able to switch the outputs of the first signal generating unit and the second signal generating unit by an external input operation.

  According to the above configuration, it is possible for the user himself to perform a display mode switching operation, and it is possible to obtain a display image in which moving image blur and flicker or moving image blur are adjusted according to the user's preference.

  Further, the image display device includes a determination unit that determines the content of the input image based on the input image signal, and the switching unit includes the first signal generation unit and the first signal generation unit based on the determination result of the determination unit. The output of the second signal generating means can be switched.

  According to the above configuration, since the switching of the display mode is performed based on the content determination result of the input image by the determination unit, it is possible to appropriately switch the display mode without requiring complicated work for the user. Done.

  In the image display device, the determination unit may be a luminance measurement unit that measures the average luminance of the input image. At this time, when it is determined that the average luminance of the input image is low, the switching unit outputs the output of the first signal generation unit as a display image signal to the display unit, and the average luminance of the input image is high. If it is determined that the output of the second signal generation means is output to the display unit as a display image signal.

  According to said structure, the said brightness | luminance measurement means measures the average brightness | luminance of an input image, and selects a suitable display mode according to the result. That is, when the brightness of the display image is low, the problem of flicker is small, so that the display is performed in the first display mode that does not cause the disturbance of the moving image. When the brightness of the display image is high, suppression of flicker is considered. Display in the second display mode.

  In the image display device, the determination unit may be a frame frequency measurement unit that measures a frame frequency of an input image. At this time, when it is determined that the frame frequency of the input image is high, the switching unit outputs the output of the first signal generation unit to the display unit as a display image signal, and the frame frequency of the input image is low. If it is determined that the output of the second signal generation means is output to the display unit as a display image signal.

  According to said structure, the said frame frequency measurement means measures the frame frequency of an input image, and selects a suitable display mode according to the result. That is, when the frame frequency of the display image is low, display is performed in the second display mode in which flicker is unlikely to occur, and when the frame frequency of the display image is high, the first is taken into consideration to prevent the disturbance of moving image blur. The display can be performed in the display mode.

  Further, in the image display device, the switching unit is between 50 Hz and 60 Hz as a threshold of a frame frequency serving as a reference for switching the outputs of the first signal generating unit and the second signal generating unit. Preferably it has a set threshold.

  According to the above configuration, the display mode can be switched between a frame frequency of 50 Hz (PAL system) generally used as a TV image signal and a frame frequency of 60 Hz (NTSC system). .

  In the image display device, the determination unit determines the content of the input image for each pixel based on the input image signal, and the switching unit determines the first signal based on the determination result of the determination unit. The output of the generation means and the second signal generation means can be switched for each pixel.

  Further, in the image display device, the determination unit is a luminance measurement unit that measures the luminance of the input image for each pixel, and the switching unit is provided for pixels determined to have a low average luminance of the input image. The output of the first signal generation unit is output to the display unit as a display image signal, and the output of the second signal generation unit is displayed for a pixel determined to have a high average luminance of the input image. The image signal can be output to the display unit.

  According to the above configuration, for example, an area where the luminance of the display image is high (high luminance area) and an area where the luminance of the display image is low (low luminance area) in the input image are determined by the luminance measuring unit. It is possible to perform display control in which display is performed in the second display mode in consideration of flicker suppression and display is performed in the first display mode in which there is no risk of moving image disturbance in the low luminance region.

  In the image display device, the determination unit determines the content of the input image for each of the divided areas based on the input image signal, and the switching unit is based on the determination result of the determination unit. It can be set as the structure which switches the output of a said 1st signal generation means and a said 2nd signal generation means for every area | region.

  In the image display device, the determination unit is a luminance measurement unit that measures the luminance of the input image for each of the divided areas, and the switching unit is determined to have a low average luminance of the input image. For the area, the output of the first signal generation means is output as a display image signal to the display unit, and for the area where the average luminance of the input image is determined to be high, the second signal generation is performed. The output of the means can be output to the display unit as a display image signal.

  Further, in the image display device, one frame period is divided into a plurality of subframe periods, and image display is performed by distributing the luminance to each subframe so as to reproduce the luminance within one frame period based on the input image signal. The first display mode and one frame period are divided into a plurality of subframe periods, one subframe of the plurality of subframes displays an original frame image, and the other subframe is generated from the original frame image. A second display mode for displaying the interpolated frame image, and the image display can be performed by switching between the first display mode and the second display mode.

  Further, the image display device can be configured to switch between the first display mode and the second display mode by an input operation from the outside.

  The image display device may be configured to switch between the first display mode and the second display mode based on the content of the input image.

  The image display device may be configured to switch between the first display mode and the second display mode based on the average luminance of the input image.

  The image display device is configured to display in the first display mode when the average luminance of the input image is low, and to display in the second display mode when the average luminance of the input image is high. be able to.

  The image display device may be configured to switch between the first display mode and the second display mode based on the frame frequency of the input image.

  The image display device is configured to display in the first display mode when the frame frequency of the input image is high, and to display in the second display mode when the frame frequency of the input image is low. be able to.

  In the image display device, the threshold of the frame frequency serving as a reference for switching between the first display mode and the second display mode is set between 50 Hz and 60 Hz. can do.

  Further, the image display device is configured to determine the content of the input image for each pixel based on the input image signal, and to switch between the first display mode and the second display mode based on the determination result. be able to.

  The image display device determines the content of the input image for each of the divided areas based on the input image signal, and based on the determination result, the first display mode and the second display mode. It can be set as the structure which switches.

  Further, the image display device can be configured to switch between the first display mode and the second display mode for each region.

  Further, the image display device displays the first display mode for an area where the average luminance of the input image is low, and the second display mode for the area where the average luminance of the input image is high. It can be set as the structure displayed by.

  In addition, a liquid crystal monitor used in a personal computer or the like can be configured by combining the image display device and a signal input unit for transmitting an image signal input from the outside to the image display device. is there.

  In addition, a liquid crystal television receiver can be configured by combining the image display device and the tuner unit.

  As described above, the image display device according to the present invention time-divides one frame period of the input image signal into a plurality of subframes, and the time integral value of the display luminance of each subframe is one frame based on the input image signal. The first display mode in which the display luminance is distributed to each sub-frame so as to reproduce the gradation luminance within the period and the image display is performed, and one frame period of the input image signal, the original frame image in the input image signal A second display mode for displaying an image in a time-divided manner into a sub-frame to be displayed and a sub-frame for displaying an interpolated frame image generated from an original frame image in the input image signal. When displaying an image in the display mode, the first signal generating means for generating an image signal for display in each subframe, and when displaying the image in the second display mode, The output of the display signal is output to the display unit by switching the output of the second signal generating means for generating the display image signal to the frame, the output of the first signal generating means and the second signal generating means. And a switching means.

  Therefore, the image display device includes a first signal generating unit that generates a display image signal when performing image display in the first display mode, and a time when performing image display in the second display mode. The second signal generating means for generating the display image signal can be used by being switched by the switching means.

  For this reason, an input image for which the occurrence of flicker is to be suppressed is displayed in the second display mode by n-times interpolation driving, and the moving image portion may be disturbed when n-times interpolation driving is used. An input image having a large number can be displayed in the first display mode by pseudo impulse driving. As a result, the effect of suppressing the motion blur can be effectively obtained, and the problem of flicker and motion blur can be reduced.

[Embodiment 1]
An embodiment of the present invention will be described below with reference to FIGS. First, a schematic configuration of the image display apparatus according to the first embodiment will be described below with reference to FIG. In FIG. 2, the image display device 1 includes a display panel 10, a frame memory 20, a control LSI 30, and a mode switch 50.

  The display panel 10 constitutes image display means, and includes a display element array 11, a TFT substrate 12, source drivers 13a to 13d, and gate drivers 14a to 14d. In the display element array 11, a plurality of display elements 11a (pixel portions) using a liquid crystal material or an organic EL member are arranged in a matrix.

  In the display area of the TFT substrate 12, pixel electrodes 12a for driving these display elements 11a and TFTs 12b as switching elements for turning on / off the charge supply (display voltage) to the pixel electrodes 12a are provided in each display element 11a. Correspondingly, they are arranged in a matrix. In the periphery of the display area of the display element array 11 and the TFT substrate 12, a source driver and a gate driver for driving the pixel electrode 12a and the display element 11a through the TFTs 12b are arranged. Regarding the source driver, a configuration in which the first to fourth source drivers 13a to 13d are cascade-connected is illustrated, and for the gate driver, a configuration in which the first to fourth gate drivers 14a to 14d are cascade-connected is illustrated. Yes.

  In the display region of the TFT substrate 12, a plurality of source voltage lines connected to the source driver and supplied with a source voltage (display voltage), and a plurality of source voltage lines connected to the gate driver and supplied with a gate voltage (scanning signal voltage). Gate voltage lines are provided so as to cross each other. A pixel electrode 12a and a TFT 12b are provided in the vicinity of the intersection.

  The gate electrode of the TFT 12b is connected to the corresponding gate voltage line (the gate voltage line at the intersection), and the source electrode of the TFT 12b is connected to the corresponding source voltage line (the source voltage line at the intersection). The drain electrode is connected to the pixel electrode 12a.

  The frame memory 20 stores image signals displayed on the display panel 10 for one frame. The control LSI 30 is display control means for controlling each unit. The mode switch 50 outputs a mode switching signal to the control LSI 30 by a user operation so that the display mode can be switched by a user instruction.

  In the image display device 1 having the above-described configuration, a basic image display method will be described as follows.

  First, a panel image signal (display image signal) displayed on each pixel portion for one horizontal line is sequentially transferred from the control LSI 30 to the first source driver 13a in synchronization with the clock signal. Since the first to fourth source drivers 13a to 13d are cascade-connected as shown in FIG. 2, one horizontal pixel is supplied to the first to fourth source drivers 13a to 13d by the pulse of the clock signal for one horizontal pixel. The panel image signal for several minutes is once held. In this state, when a latch pulse signal is output from the control LSI 30 to the first to fourth source drivers 13a to 13d, the display voltage level corresponding to the image signal of each pixel unit is set to one horizontal pixel from each source driver 13a to 13d. It is output to the source voltage line for several minutes.

  The control LSI 30 outputs an enable signal, a start pulse signal, and a vertical shift clock signal as control signals to the gate drivers 14a to 14d. While the enable signal is at a low level, the gate voltage line is turned off. When the enable signal is at a high level and the start pulse signal is input, the first gate voltage line of the corresponding gate driver is turned on at the rising edge timing of the vertical shift clock signal. When the enable signal is high level and the start pulse signal is not input, the gate voltage line next to the gate voltage line that was previously turned on is turned on at the rising edge timing of the vertical shift clock signal. It becomes.

  During the period when the display voltage for one horizontal pixel is output to the source voltage line, one gate voltage line is turned on, so that one horizontal pixel for the number of horizontal pixels connected to the gate voltage line. Each TFT 12b is turned on. As a result, charges (display voltages) from the respective source voltage lines are supplied to the respective pixel electrodes 12a corresponding to the number of horizontal pixels, thereby changing the state of the display element 11a and performing image display. By repeating the display control as described above for each horizontal line, an image is displayed on the entire display screen.

  The image display device 1 according to the first embodiment is intended to effectively obtain a moving image blur suppression effect and to reduce problems such as a flicker problem and a moving image portion disorder. In order to achieve this object, the display mode is switched according to the contents of the display image. Hereinafter, this feature point will be described in detail.

  In the image display device 1, a configuration in which the display mode is switched based on a user instruction input by the mode switch 50 is illustrated. That is, when the user operates the mode switch 50 to switch the display mode, a mode switch signal is input from the mode switch 50 to the control LSI 30, and display mode switching control is performed in the control LSI 30.

  The image display device 1 has a first display mode in which pseudo impulse driving is performed and a second display mode in which n-times interpolation driving is performed as display modes for suppressing moving image blur.

  In the pseudo impulse drive in the first display mode, the display luminance is distributed to each subframe so that the time integral value of the display luminance of each subframe reproduces the gradation luminance characteristics within one frame period based on the input image signal. Is done. In this display mode, the distribution of display luminance to each sub-frame generates pseudo-impulse display by generating sub-frames with higher and lower luminance than the input image signal gradation level. It is effective for blurring. However, in the first display mode, a high-luminance subframe and a low-luminance subframe are alternately generated, which causes a problem that flicker is likely to occur.

  On the other hand, in the n-times speed interpolation driving by the second display method, a moving image is generated by generating and interpolating a new frame image subjected to moving image position correction processing between two consecutive frame images in the input image signal. Reduce blur. In the second display mode, the change in luminance between subframes is small, so that the problem of flicker does not occur. However, it is difficult to detect the motion of the moving image portion, and the moving image portion may be disturbed because the motion position correction cannot be performed completely.

  Therefore, in the image display device 1, it is preferable to display the input image in which the occurrence of flicker is to be suppressed in the second display mode by n-times speed interpolation driving. In addition, it is preferable to perform display in the first display mode by pseudo impulse driving for an input image that may cause a disturbance in a moving image portion when n-times speed interpolation driving is used.

  An example of luminance distribution in the first display mode and the second display mode is shown below. In the following description, it is assumed that the subframe is divided into the first half subframe and the second half subframe, and that the time ratio of the subframe is 1: 1 (that is, n-times interpolation driving). Then it will be double speed). First, an example of luminance distribution in the first display mode is shown in Table 1 below. Furthermore, the luminance distribution based on Table 1 is illustrated in FIG.

  FIG. 3 shows a first display mode by pseudo impulse driving, where the gradation level of the input image signal is 0% (frame luminance 0%), 53.3% (frame luminance 25%), 73.0. The luminance distribution of the subframes is illustrated by taking the case of% (frame luminance 50%), 87.7% (frame luminance 75%), and 100% (frame luminance 100%) as an example. The relationship between the frame luminance and the gradation level of the input image signal satisfies the following expression (1). Further, in the equation (1), it is known that a characteristic close to an actual display can be obtained when γ (gamma characteristic) = 2.2.

  In the first display mode shown in Table 1 and FIG. 3, when the frame luminance is in the range of 0 to 50%, the luminance of one subframe (the first half subframe in this example) is set to the minimum luminance (0%). The brightness of the other subframe (the second half subframe in this example) is changed. In addition, in the range where the frame luminance is 50 to 100%, the luminance of one subframe (in this example, the second half subframe) is fixed to the maximum luminance (100%), and the other subframe (in this example, the first half subframe). ) Is changed.

  Note that the luminance division ratios shown in Table 1 and FIG. 3 are division ratios that maximize the luminance difference between subframes at each gradation level, and the luminance that has the highest effect of preventing motion blur when performing pseudo impulse driving. The division ratio. However, in the first display mode, the luminance distribution ratio to each subframe is not particularly limited. For example, in order to suppress the extent of occurrence of flicker, a division ratio that suppresses a luminance difference between subframes as shown in Table 2 below may be used.

  FIG. 4 shows a second display mode by n-times speed interpolation driving, where the gradation level of the input image signal is 0% (frame luminance 0%), 53.3% (frame luminance 25%), 73. FIG. The luminance distribution of subframes is illustrated by taking the case of 0% (frame luminance 50%), 87.7% (frame luminance 75%), and 100% (frame luminance 100%) as examples.

  In the second display mode shown in FIG. 4, the original frame image in the input image signal is displayed in the first half subframe, and the new frame image subjected to the moving image position correction process is interpolated and displayed in the second half subframe. . In this display, since the interpolated image displayed in the latter half subframe cannot give a large luminance change to the previous and subsequent frames, the first half subframe and the second half subframe have substantially the same luminance.

  Next, the configuration of the control LSI 30 for performing the switching control between the first and second display modes will be described with reference to FIG.

  As shown in FIG. 1, the control LSI 30 includes a line buffer 31, a timing controller 32, a frame memory data selector 33, a first gradation conversion circuit 34, a second gradation conversion circuit 35, an output data selector 36, and a motion position correction. An image processing circuit 37 is provided.

  In the line buffer 31, the inputted input image signal is received and held once for each horizontal line. The line buffer 31 includes a reception port and a transmission port independently, and can receive and transmit an input image signal simultaneously.

  The timing controller 32 controls the frame memory data selector 33 by alternately switching the timings of data transfer to the frame memory 20 and data reading from the frame memory 20. Further, the timing controller 32 alternately selects and controls the output timings from the first gradation conversion circuit 34 and the second gradation conversion circuit 35 with respect to the output data selector 36. That is, the timing controller 32 switches the output data selector 36 between the first half subframe period and the second half subframe period. Further, the timing controller 32 outputs a clock signal, a latch pulse signal, an enable signal, a start pulse signal, and a vertical shift clock signal generated based on the input synchronization signal at a predetermined timing.

  The frame memory data selector 33 is controlled by the timing controller 32 and operates to transfer the input image signal held in the line buffer 31 to the frame memory 20 one horizontal line at a time, and to the frame memory 20 input one frame before. The operation of alternately reading out the image signal stored in each horizontal line is selected. Further, the frame memory data selector 33 transfers the image data read from the frame memory 20 to the second gradation conversion circuit 35 and the motion position correction image processing circuit 37.

  The first gradation conversion circuit 34 and the second gradation conversion circuit 35 are means for performing pseudo impulse driving in the first display mode. The first gradation conversion circuit 34 receives the input image signal from the line buffer 31, converts the gradation level of the input image signal into the gradation level of the first half subframe, and outputs it. The second gradation conversion circuit 35 receives the input image signal from the frame memory 20 via the frame memory data selector 33, converts the gradation level of the input image signal to the gradation level of the second half subframe, and outputs it. To do.

  The first gradation conversion circuit 34 refers to a look-up table (LUT) that stores the gradation level of the input image signal and the gradation level of the first subframe in association with each other, and determines the gradation level of the input image signal. Then, it is converted to the gradation level of the first half sub-frame for performing the luminance division display and output. In FIG. 1, it is assumed that this LUT is stored in the first gradation conversion circuit 34.

  Similarly, the second gradation conversion circuit 35 refers to an LUT (Look-Up Table) that stores the gradation level of the input image signal and the gradation level of the second half subframe in association with each other, and refers to the level of the input image signal. The tone level is converted into the tone level of the second half sub-frame for performing luminance division display and output. In FIG. 1, it is assumed that this LUT is stored in the second gradation conversion circuit 35.

  The first gradation conversion circuit 34 and the second gradation conversion circuit 35 perform gradation level conversion by reading out the gradation level of each subframe corresponding to the gradation level of the input image signal from the LUT. It is not limited to. For example, the first gradation conversion circuit 34 and the second gradation conversion circuit 35 may be obtained by calculating the gradation level of each subframe corresponding to the gradation level of the input image signal from a calculation formula. good.

  The motion position corrected image processing circuit 37 is means for performing n-times interpolation driving in the second display mode. The motion position corrected image processing circuit 37 is supplied with the latest frame image (N frame image) in the input image signal from the line buffer 31, and one frame before in the input image signal from the frame memory 20 via the frame memory data selector 33. Frame image ((N-1) frame image). Then, the motion position corrected image processing circuit 37 generates, from the two frame images continuous in the input image signal, a frame image (N−0.5) that is temporally intermediate between these frame images by moving image position correction. .

  As the image processing method for correcting the moving image position in the motion position corrected image processing circuit 37, various known methods that have been proposed in the past can be used. Therefore, detailed description thereof is omitted here. In the motion position corrected image processing circuit 37, for example, the moving image position correcting method disclosed in Patent Documents 4 to 6 described above can be used.

  The output data selector 36 receives the mode switching signal and switches the mode between the first display mode and the second display mode. That is, in the first display mode, the output data selector 36 outputs the output from the first gradation conversion circuit 34 or the second gradation conversion circuit 35 to the source driver 13 as a panel image signal. In the second display mode, the output data selector 36 uses the input image signal input via the line buffer 31 or the interpolated frame image signal input from the motion position correction image processing circuit 37 as a panel image signal as a source driver. 13 to output. Further, in the output data selector 36, the timing controller 32 controls switching between the first half subframe and the second half subframe.

  Here, the operation of the image display apparatus 1 using the control LSI 30 having the above configuration will be described with reference to FIGS. FIG. 5 is a diagram showing the flow of the image signal for each horizontal period in the first display mode of the image display device, that is, in the pseudo impulse drive. FIG. 6 is a diagram showing the flow of the image signal for each horizontal period in the second display mode of the image display device, that is, n-times interpolation driving.

  In FIGS. 5 and 6, the parentheses [] indicate image signal transfer periods for one horizontal line. For example, [N, 1] indicates that the input image signal input to the horizontal first line of the Nth frame is transferred. The M-th line indicates an intermediate line of the screen, and in the first embodiment, the M-th line is a horizontal line driven by the first gate voltage line of the third gate driver 14c.

  In FIG. 5, C1 indicates that the image signal converted by the first gradation conversion circuit 34 is transferred using the input image signal of the frame and horizontal line shown in [] thereafter as a source. C2 indicates that the image signal converted by the second gradation conversion circuit 35 is transferred using the input image signal of the frame and the horizontal line shown in [] thereafter as a source. Further, in FIG. 6, Px indicates that the interpolated frame image signal generated by the motion position corrected image processing circuit 37 is transferred.

  First, the operation of the image display apparatus 1 in the first display mode will be described with reference to FIG. FIG. 5 shows a period during which the image input signals of the first to third lines of the Nth frame are input.

  As indicated by an arrow D1 in FIG. 5, the input input image signal is received by the line buffer 31. Next, as indicated by an arrow D2, from the middle of receiving an image signal for one line, writing from the line buffer 31 to the frame memory 20 via the frame memory data selector 33 and the first from the line buffer 31 are performed. Transfer to the gradation conversion circuit 34 is performed. The converted image signal is output from the first gradation conversion circuit 34 as a panel image signal.

  Further, as indicated by an arrow D3, the image signal of the horizontal line that is past half a frame from the line of the image signal to be written is read from the frame memory 20 line by line alternately with the writing to the frame memory 20. The image signal read from the frame memory 20 is transferred to the second gradation conversion circuit 35 via the frame memory data selector 33, and the converted image signal from the second gradation conversion circuit 35 is used as a panel image signal. Is output.

  Further, when the panel image signal for one horizontal line output from the control LSI 30 is transferred to the first to fourth source drivers by the clock signal and then a latch pulse signal is applied, each source voltage line is connected to each pixel unit. A display voltage is output corresponding to the display brightness. At this time, a vertical shift clock signal or a gate start pulse signal is supplied to the gate driver corresponding to the line on which an image is to be displayed by supplying the charge (display voltage) on the source voltage line, as appropriate. The scanning signal of the gate voltage line is turned on. On the other hand, in the gate driver that does not display an image, the enable signal is set to the low level, and the scanning signal of the gate voltage line is turned off.

  In the example of FIG. 5, as indicated by an arrow D4, after the image signal for one horizontal line of the Mth line of the (N−1) th frame is transferred to the source driver, the control LSI 30 sends the image signal as indicated by an arrow D5. The enable signal to the third gate driver 14c is set to the high level, and the start pulse signal and the vertical shift clock signal to the third gate driver 14c are supplied as indicated by arrows D6 and D7. As a result, as indicated by an arrow D8, the TFT 12b connected to the first gate voltage line of the third gate driver 14c whose display position corresponds to the Mth line on the screen is turned on, and an image is displayed. At this time, the enable signals to the first, second and fourth gate drivers 14a, 14b and 14c not corresponding to the display position are set to the low level, and the TFT 12b connected to the gate voltage lines of these gate drivers is turned off. It is in a state.

  Next, as shown by the arrow D9, after the image signal for one horizontal line of the first line of the Nth frame is transferred to the source driver, the control LSI 30 sends the first gate driver 14a as shown by the arrow D10. As shown by arrows D11 and D12, a start pulse signal and a vertical shift clock signal are supplied to the first gate driver 14a. As a result, as indicated by an arrow D13, the TFT 12b connected to the first gate voltage line of the first gate driver 14a whose display position corresponds to the first line of the screen is turned on, and an image is displayed. At this time, the enable signal to the second to fourth gate drivers 14b to 14c not corresponding to the display position is set to a low level, and the TFT 12b connected to the gate voltage lines of these gate drivers is turned off.

  Note that the operation described above based on FIG. 5 is merely an example for performing the pseudo impulse drive in the image display apparatus 1, and does not limit the present invention.

  For example, although the case where the number of divisions into two sub-frames is illustrated in the above description, the number of frame divisions is not limited to this, and the frame may be divided into three or more sub-frames. Also, the subframe division ratio does not have to be equal division such as 1: 1, and frame division can be performed at an arbitrary division ratio (for example, 2: 1 or 3: 2). The same applies to Embodiments 2 to 4 described later.

  Next, the operation of the image display device 1 in the second display mode will be described with reference to FIG. FIG. 6 also shows a period during which the image input signals of the first to third lines of the Nth frame are input.

  As indicated by an arrow D21 in FIG. 6, the input input image signal is received by the line buffer 31. Next, as indicated by an arrow D22, the writing from the line buffer 31 to the frame memory 20 via the frame memory data selector 33 and the output data from the line buffer 31 are started while the image signal for one line is being received. The input image signal is transferred to the selector 36, and the input image signal is output from the output data selector 36 as a panel image signal.

  Also, as indicated by an arrow D23, the frame image signal of the previous frame ((N−1)) from the frame memory 20 via the frame memory data selector 33 alternately with the output of the input image signal as a panel image signal. The motion position correction image processing circuit 37 generates an image signal ((N−0.5) frame image) of the interpolation frame from the frame image) and the latest frame image signal (N frame image) from the line buffer 31, and this interpolation The frame image signal is output as a panel image signal via the output data selector 36.

  Note that, in the operation in the second display mode, the operations of the source driver and the gate driver are the same as those in the first display mode, and thus detailed description thereof is omitted.

  In the image display apparatus 1 according to the first embodiment, the display mode is switched by a user instruction input from the mode switch 50. However, the image display device according to the present invention may be configured such that the device itself recognizes the content of the display image and an appropriate display mode is automatically selected according to the recognition result. The image display apparatus having such a configuration will be described in the following second and third embodiments.

[Embodiment 2]
The image display apparatus according to the second embodiment is as shown in FIG. The image display device 2 shown in FIG. 7 is different from the image display device 1 shown in FIG. 2 in that the mode switch 50 is not provided and a control LSI 60 is provided instead of the control LSI 30. Since the other configuration is the same as that of the image display device 1, members having the same configuration and operation as those of the image display device 1 are denoted by the same member numbers as those in FIG. 2, and detailed description thereof is omitted.

  In the image display device 2, the control LSI 60 measures (calculates) the average luminance of the input image signal, and selects an appropriate display mode according to the result. That is, in the image display device of the present invention, when image display is performed in the first display mode by pseudo impulse driving, flicker is likely to occur when displaying a high-luminance image. Therefore, since the problem of flicker is small when the brightness of the display image is low, display is performed in the first display mode by the pseudo impulse drive that does not cause the disturbance of the moving image, and when the brightness of the display image is high, the flicker is It is preferable to perform display in the second display mode by n-times interpolation driving in consideration of suppression of the above.

  The configuration of the control LSI 60 that performs such a display mode switching operation will be described with reference to FIG. The control LSI 60 further includes a luminance measurement circuit 61 in addition to the control LSI 30 shown in FIG. In addition, members having the same configuration and operation as those of the control LSI 30 are denoted by the same member numbers as in FIG. 1, and detailed description thereof is omitted.

  As shown in FIG. 8, the luminance measurement circuit 61 receives the input image signal and the input synchronization signal, measures (calculates) the average luminance of the display image based on these signals, and switches the mode based on the result. Output a signal. The mode switching signal output from the luminance measurement circuit 61 is input to the timing controller 32 and the output data selector 36. In calculating the average luminance, the gradation value data in the input image signal is actually used.

  Here, as a luminance measurement method in the luminance measurement circuit 61, for example, a method of calculating an average value of luminance data (that is, average luminance) of a plurality of pixels in a frame can be considered. The average luminance may be calculated for a single frame or for a plurality of consecutive frames. The average luminance may be calculated using all the pixels in the frame, or may be calculated using some pixels extracted from the frame. Note that the luminance measurement method is a technique that has already been applied to, for example, processing in the case where the backlight of a liquid crystal display device is controlled according to the luminance of a display image, and any known method may be used for the luminance measurement method. Can also be used. For this reason, in the present invention, the specific method for measuring the luminance is not particularly limited.

[Embodiment 3]
The image display device according to the third embodiment has substantially the same configuration as that of the image display device 2 shown in FIG. 7, but has a configuration including a control LSI 70 shown in FIG. 9 instead of the control LSI 60. The control LSI 70 includes a frame frequency measurement circuit 71 in place of the luminance measurement circuit 61 with respect to the control LSI 60 shown in FIG.

  In the image display device according to the third embodiment, the control LSI 70 measures the frame frequency of the input image signal and selects an appropriate display mode according to the result. That is, in the first display mode by pseudo impulse driving in the image display apparatus of the present invention, flicker is generally not easily recognized when the frame frequency is high, and flicker is easily recognized when the frame frequency is low. Therefore, when the luminance frame frequency of the display image is high, the display is performed in the first display mode in which the moving image is not easily disturbed. When the frame frequency of the display image is low, the moving image blur is considered in consideration of flicker suppression. It is preferable to perform display in the second display mode in which the effect is reduced.

  As a more specific example, when the frame frequency is determined to be approximately 60 Hz, display is performed in the first display mode, and when the frame frequency is determined to be approximately 50 Hz, display is performed in the second display mode. Preferably it is done. In such a case, the threshold of the frame frequency serving as a reference for switching the display mode may be set between 50 Hz and 60 Hz. Note that it is preferable to set the frame frequency threshold value between 50 Hz and 60 Hz. The TV image signal of 50 Hz (PAL system) and 60 Hz (NTSC system) are generally used. It is because it has been.

  As shown in FIG. 9, the frame frequency measuring circuit 71 receives the input synchronization signal, measures the frame frequency of the display image based on the input synchronization signal, and outputs the mode switching signal based on the result. The mode switching signal output from the frame frequency measurement circuit 81 is input to the timing controller 32 and the output data selector 36.

  Here, as a frame frequency method in the frame frequency measurement circuit 71, for example, a synchronous counter that operates with a clock (for example, an output of a crystal oscillator) with a fixed frequency is provided in the frame frequency measurement circuit 71, A method of extracting a frame frequency from the input synchronization signal by counting the vertical period of the input synchronization signal can be considered, but in the present invention, a specific method for measuring the frame frequency is not particularly limited. .

  In addition, each structure demonstrated in the said Embodiment 2 and 3 can also be used combining both structures in the image display apparatus which concerns on this invention. Moreover, it is also possible to use these in combination with the configuration of the mode changeover switch 50 described in the first embodiment.

  Further, the luminance measurement processing in the second embodiment and the frame frequency measurement processing in the third embodiment can be continuously performed during the input period of the image signal. However, in order to reduce the burden on the processing in the luminance measurement circuit 61 or the frame frequency measurement circuit 71, for example, a configuration in which determination or measurement is intermittently performed every elapse of a certain period may be employed.

[Embodiment 4]
In the image display device according to the fourth embodiment, as in the image display device according to the second embodiment described above, the device itself measures the brightness of the display image, and an appropriate display mode is automatically selected according to the measurement result. It is the structure selected automatically. However, in the image display device according to the second embodiment, the display mode is switched for the entire frame image, whereas in the image display device according to the fourth embodiment, the display mode is switched. The determination is performed for each pixel of the frame image, and the display mode is switched for each determined pixel.

  For example, in the image display device according to the fourth embodiment, a pixel that displays a high-luminance image and a pixel that displays a low-luminance image are determined in the input image, and flicker is unlikely to occur in the high-luminance pixels. Display control is performed such that display is performed in the second display mode (n-times interpolation driving), and display is performed in the first display mode (pseudo-impulse driving) so as not to cause video disturbance in low luminance pixels. it can.

  An image display apparatus that performs such display control can basically be realized with the same configuration as the image display apparatus in the second embodiment. That is, in the second embodiment, the luminance measurement circuit 61 in the control LSI 60 measures the average luminance of the entire frame image. In the fourth embodiment, the luminance measurement circuit 61 measures the luminance for each pixel. And the mode switching signal may be switched and output for each pixel for which the luminance has been measured.

[Embodiment 5]
In the image display device according to the fifth embodiment, as in the image display device according to the second embodiment described above, the device itself measures the brightness of the display image, and an appropriate display mode is automatically set according to the measurement result. It is the structure selected automatically. However, in the image display device according to the second embodiment, the display mode is switched for the entire frame image, whereas in the image display device according to the fourth embodiment, the display mode is switched. The region determination is performed on the frame image, and the display mode is switched for each determined region.

  For example, in the image display device according to the fifth embodiment, an area where a high brightness image is displayed (high brightness area) and an area where a low brightness image is displayed (low brightness area) are determined in the input image. In the high luminance area, display is performed in the second display mode (n-times interpolation driving) in which flicker is unlikely to occur, and in the low luminance area, the first display mode (pseudo impulse driving) is used so as not to disturb the moving image. Display control such as display can be performed.

  The image display apparatus according to the seventh embodiment has substantially the same configuration as that of the image display apparatus 2 shown in FIG. 7, but has a configuration including a control LSI 90 shown in FIG. The control LSI 90 is configured to further include an area discrimination circuit 91 and a delay buffer 92 in addition to the control LSI 30 shown in FIG.

  The input image signal and the input synchronization signal are input to the discrimination circuit 91 for each region, and the discrimination circuit 91 for each region determines the content of the input image signal for each predetermined block region based on these input signals, and the determination A mode switching signal based on the result is output. For example, as shown in FIG. 11, the area discrimination circuit 91 divides the display screen into a plurality of block areas, and executes content determination of the input image and switching of the mode switching signal for each block area. In the example, the display screen is divided into Y × X block areas in units of 8 × 8 pixels.

  In addition, since the area determination circuit 91 collects all the information of all the pixels in the block area and derives the content determination result of the block area, a delay time is generated until the mode switching signal is output. In consideration of this delay time, the delay buffer 92 is placed in front of the line buffer 31 in order to synchronize the time timing between the mode switching signal output from the area discrimination circuit 91 and the video signal output as the panel image signal. Has been introduced.

  Here, a configuration example of the area discrimination circuit 91 will be described with reference to FIG. This area discrimination circuit 91 includes a luminance measurement circuit 911, a pixel position calculation circuit 912, a discrimination information recording circuit 913, and an in-area mode determination circuit 914.

  The luminance measurement circuit 911 has basically the same function as the luminance measurement circuit 61 described in the second embodiment, and determines whether the luminance is high or low for each pixel based on the input image signal. Can do. For example, the luminance measurement circuit 911 outputs 1 to the determination information recording circuit 913 when it is determined that the luminance is low and 0 when it is determined that the luminance is high.

  The pixel position calculation circuit 912 calculates the screen position of the input pixel and the screen position of the output pixel based on the input synchronization signal.

  The discrimination information recording circuit 913 records the discrimination result in the luminance measurement circuit 911 based on the screen position of the input pixel input from the pixel position calculation circuit 912. That is, the determination information recording circuit 913 uses the input pixel position output from the pixel position calculation circuit 912 (the position of the currently input pixel on the screen) as an address, and the determination result (1 or 0) in the luminance measurement circuit 911. ) In order. For example, in the case of a display resolution of vertical 480 × horizontal 640 pixels, assuming that the position of the currently input pixel is vertical 50 and horizontal 100, the low luminance / high luminance determination result 1 is used as the address (50, 100). Record the bit (1 or 0).

Based on the screen position of the output pixel input from the pixel position calculation circuit 912, the intra-area mode determination circuit 914 reads out the determination result in the block area to which the output pixel belongs from the determination information recording circuit 913, and calculates them. The in-area mode determination circuit 914 determines the mode in the block area and outputs the mode switching signal. The pixel position calculation circuit 913 determines the output pixel position (the position on the screen of the pixel from which the mode switching signal is to be output) from the pixel position calculation circuit 913. When input, it is calculated to which block area the pixel is included. Taking the case where the pixel P in FIG. 11 has a sparse output as an example, the pixel P is required to be included in the block area Area (j, i). This calculation formula depends on the size of the block area. That is, when the display screen is divided into blocks of M × N pixels (M and N are integers), the Y coordinate (vertical coordinate) on the screen of the pixel P is Py, and the X coordinate (horizontal coordinate) is Px. Then, the block area Area (j, i) including the pixel P is derived by the following equation.

j = int (Py ÷ M)
i = int (Px ÷ N)
Here, int () is a function that converts a numerical value in () to an integer by rounding down the decimal point.

For example, when an area is divided by an 8 × 8 pixel block, if the output pixel position is 50 (Py) long and 100 (Px) wide,
i = int (50 ÷ 8) = int (6.25) = 6
j = int (100 ÷ 8) = int (12.5) = 12
Thus, it can be calculated that the pixel P is included in the block area of Area (6, 12) in FIG.

  Next, the in-region mode determination circuit 914 simultaneously reads out the determination results for all the pixels in the block calculated from the output pixel position from the determination information recording circuit 913, and which of the low luminance pixels and the high luminance pixels is more frequent? (That is, determine which one of 1 and 0 has the larger number of counts). The result shows that the count number of the high and low luminance pixels (0) is 20 pixels and the count number of the low luminance pixels (1) is 44 pixels. In this case, since the count number of the low luminance pixel (1) is larger in this block area, the intra-area mode determination circuit 914 determines that this block area is a low luminance area, and a video disturbance occurs. A mode switching signal is output so that the display of the first display mode is performed so that there is not.

  In the example of FIG. 13B, since the number of high-luminance pixels is larger, the intra-area mode determination circuit 914 determines that this block area is a high-luminance area and suppresses flicker. A mode switching signal is output so as to display the second display mode.

  Further, the method for determining the contents of the block area is not limited to the method for determining whether there are more low-luminance pixels or high-luminance pixels as described above. Depending on other methods, a method of simplifying the circuit or reducing the capacity for recording the determination result may be considered.

  Another example of the block region content determination method will be described with reference to FIG.

  In the procedure (i) of FIG. 14, the judgment information recording circuit 913 adds all the judgment results (1 or 0) of the low luminance pixels or the high luminance pixels in advance in units of one row in the block area, as shown in the procedure (ii) The added value for each line is recorded in. In FIG. 14, the added value of the number of low luminance pixels in the example shown in FIG. 13A is recorded. By doing so, the information recorded by the judgment information recording circuit 913 is in the form of row 8 bits × column 8 bits in one block area in the above-described method (method of determining whether there are more low-luminance pixels or high-luminance pixels). Although 64 bits are necessary, by adding the determination result in advance in units of one row of blocks, one row of one block becomes 4 bits, and the recording information of one block area can be half of 32 bits.

  Further, when the in-area mode determination circuit 914 reads out the record information from the determination information recording circuit 913, the 4-bit data can be obtained as shown in steps (ii) to (iii) without counting the number of 1s and 0s in the block. Are read out and added, and the number of low luminance pixels in the block area can be obtained. By comparing the obtained number of low-luminance pixels in the block area with 32 which is 50% of all the pixels in the block area, it is possible to determine whether the block area is a low-luminance area or a high-luminance area.

  Since the method for switching the signal generating means to the panel image signal based on the mode switching signal is the same as that in each of the above embodiments, detailed description thereof is omitted here.

  In the above description, an example in which a display image is divided into block areas for each 8 × 8 pixel block has been described. However, the size of the divided block area is not limited to the 8 × 8 pixel size, and is arbitrary. N × M pixels (N and M are integers) can be divided.

  Further, the area into which the display image is divided does not have to be for each rectangular block as in the above example, and can be divided in an arbitrary shape. Furthermore, the areas into which the display image is divided may not all be the same size area, and the size of the divided area may be changed according to the input image signal. For example, if the segment of the input image is fine, the divided region is made smaller, and if the image is smooth, the divided region is made larger.

  In the above example, the mode determination in the divided area is determined by majority decision of the number of pixels occupying the area. However, this determination line may be reduced to 30% instead of 50%. It may be as large as 70%. If this determination line is made variable by an external operation, the moving image quality can be adjusted to the user's preference.

  The image display devices in the above first to fifth embodiments can function as an image display monitor such as a liquid crystal monitor, and can also function as a television receiver.

  When the image display device functions as an image display monitor, it can be realized by providing a signal input unit (for example, an input port) for inputting an image signal input from the outside to the control LSI. On the other hand, when the image display device functions as a television receiver, the image display device can be realized by including a tuner unit. This tuner unit selects a channel of a television broadcast signal, and inputs the television image signal of the selected channel to the control LSI as an input image signal.

  In an image display device that performs time-division driving to suppress moving image blur, it is possible to obtain the effect of suppressing moving image blur and to reduce the problem of flicker and moving image disturbance, and to hold types such as liquid crystal display elements and EL display elements. The present invention can be applied to an image display device using a display element.

1, showing an embodiment of the present invention, is a block diagram showing a schematic configuration of a control LSI in Embodiment 1. FIG. 1 is a block diagram illustrating a schematic configuration of an image display device according to a first embodiment. It is a figure which shows the luminance distribution in the 1st display mode in the said image display apparatus. It is a figure which shows the luminance distribution in the 2nd display mode in the said image display apparatus. It is a figure which shows the operation | movement in the 1st display mode in the said image display apparatus. It is a figure which shows the operation | movement in the 2nd display mode in the said image display apparatus. 5 is a block diagram illustrating a schematic configuration of an image display device according to Embodiment 2. FIG. 6 is a block diagram showing a schematic configuration of a control LSI in a second embodiment. FIG. FIG. 10 is a block diagram showing a schematic configuration of a control LSI in a third embodiment. FIG. 10 is a block diagram showing a schematic configuration of a control LSI in a fifth embodiment. It is a figure which shows the example which divided | segmented the display screen into several block area | regions. FIG. 10 is a block diagram showing a schematic configuration of an area discrimination circuit in a fifth embodiment. FIG. 13A is a diagram illustrating an example of a block region determined as a low luminance region, and FIG. 13B is a diagram illustrating an example of a block region determined as a high luminance region. It is a figure which shows the modification of the discrimination method of a low-intensity area | region and a high-intensity area | region. It is a figure which shows the operation | movement principle of n-times-speed interpolation drive.

Explanation of symbols

1, 2 Image display device 10 Display panel (display unit)
20 frame memory (first signal generating means, second signal generating means)
30, 60, 70, 90
Control LSI (first signal generating means, second signal generating means)
31 Line buffer 32 Timing controller 33 Frame memory data selector (first signal generating means, second signal generating means)
34 First gradation conversion circuit (first signal generating means)
35 Second gradation conversion circuit (first signal generating means)
36 Output data selector (switching means)
37 Motion position corrected image processing circuit (second signal generating means)
50 Mode selector switch (switching means)
61 Luminance measurement circuit (determination means, luminance measurement means, switching means)
71 Frame frequency measurement circuit (determination means, frame frequency measurement means, switching means)
91 Discrimination circuit for each region (determination means, luminance measurement means, switching means)

Claims (13)

A first display mode in which one frame period is divided into a plurality of subframe periods, and the luminance is distributed to each subframe so as to reproduce the luminance within one frame period based on the input image signal;
One frame period is divided into a plurality of subframe periods, one subframe of the plurality of subframes displays an original frame image, and the other subframe displays an interpolated frame image generated from the original frame image. 2 display modes,
First image generating means for generating a display image signal for each sub-frame when performing image display in the first display mode;
A second signal generating means for generating a display image signal for each sub-frame when performing image display in the second display mode;
Determining means for determining the content of the input image based on the input image signal;
Switching means for switching the output of the first signal generation means and the second signal generation means based on the determination result of the determination means, and outputting the display image signal to the display unit ,
The determination unit is a luminance measurement unit that measures the average luminance of the input image,
The switching means is
When it is determined that the average luminance of the input image is low, the output of the first signal generation means is output as a display image signal to the display unit,
An image display device , wherein when it is determined that the average luminance of an input image is high, the output of the second signal generating means is output to a display unit as a display image signal .   A first display mode in which one frame period is divided into a plurality of subframe periods, and the luminance is distributed to each subframe so as to reproduce the luminance within one frame period based on the input image signal;
  One frame period is divided into a plurality of subframe periods, one subframe of the plurality of subframes displays an original frame image, and the other subframe displays an interpolated frame image generated from the original frame image. 2 display modes,
  First image generating means for generating a display image signal for each sub-frame when performing image display in the first display mode;
  A second signal generating means for generating a display image signal for each sub-frame when performing image display in the second display mode;
  Determining means for determining the content of the input image based on the input image signal;
  Switching means for switching the output of the first signal generation means and the second signal generation means based on the determination result of the determination means, and outputting the display image signal to the display unit,
  The determination means is a frame frequency measurement means for measuring the frame frequency of the input image,
  The switching means is
  When it is determined that the frame frequency of the input image is high, the output of the first signal generation unit is output to the display unit as a display image signal,
  An image display device, wherein when it is determined that the frame frequency of an input image is low, the output of the second signal generation means is output to a display unit as a display image signal. The switching means has a threshold set between 50 Hz and 60 Hz as a threshold of a frame frequency serving as a reference for switching the outputs of the first signal generating means and the second signal generating means. The image display device according to claim 2 . The determination means measures the luminance of the input image for each pixel ,
The switching unit outputs the output of the first signal generation unit to the display unit as a display image signal for a pixel determined to have a low luminance of the input image, and determines that the luminance of the input image is high. 2. The image display device according to claim 1 , wherein the output of the second signal generation unit is output to the display unit as a display image signal for the pixel that has been processed. The determination means measures the luminance of the input image for each of the divided areas ,
The switching means outputs the output of the first signal generating means to the display unit as a display image signal for an area where the average brightness of the input image is determined to be low, and the average brightness of the input image is high. 2. The image display device according to claim 1 , wherein the output of the second signal generation unit is output to the display unit as a display image signal for the area determined as “2”. A first display mode in which one frame period is divided into a plurality of subframe periods, and the luminance is distributed to each subframe so as to reproduce the luminance within one frame period based on the input image signal;
One frame period is divided into a plurality of subframe periods, one subframe of the plurality of subframes displays an original frame image, and the other subframe displays an interpolated frame image generated from the original frame image. 2 display modes,
The first display mode and the second display mode are displayed so that the first display mode is displayed when the average luminance of the input image is low, and the second display mode is displayed when the average luminance of the input image is high . An image display apparatus that displays an image by switching between display modes.   A first display mode in which one frame period is divided into a plurality of subframe periods, and the luminance is distributed to each subframe so as to reproduce the luminance within one frame period based on the input image signal;
  One frame period is divided into a plurality of subframe periods, one subframe of the plurality of subframes displays an original frame image, and the other subframe displays an interpolated frame image generated from the original frame image. 2 display modes,
  The first display mode and the second display mode are displayed so that the first display mode is displayed when the frame frequency of the input image is high, and the second display mode is displayed when the frame frequency of the input image is low. An image display apparatus that displays an image by switching between display modes. The switching criteria become threshold frame frequency for performing the first display mode and the second display mode is set forth in claim 7, characterized in that set between the 50Hz or more and 60Hz Image display device. The contents of the input image is determined for each pixel based on an input image signal, according to claim 6, wherein the switching between the first display mode and said second display mode based on the determination result Image display device. The content of the input image is determined for each of the divided areas based on the input image signal, and the first display mode and the second display mode are switched based on the determination result. The image display device according to claim 6 . The image display device according to claim 10 , wherein switching between the first display mode and the second display mode is performed for each region. An image display device according to any one of claims 1 to 11 ,
An image display monitor comprising: a signal input unit for transmitting an image signal input from the outside to the image display device. Television receiver, characterized in that it comprises an image display device according to any one of claims 1 to 11.

Images