JP4706575B2 - Network communication apparatus and reception buffer control method - Google Patents

Network communication apparatus and reception buffer control method Download PDF

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JP4706575B2
JP4706575B2 JP2006181532A JP2006181532A JP4706575B2 JP 4706575 B2 JP4706575 B2 JP 4706575B2 JP 2006181532 A JP2006181532 A JP 2006181532A JP 2006181532 A JP2006181532 A JP 2006181532A JP 4706575 B2 JP4706575 B2 JP 4706575B2
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雅彦 川北
文男 小泉
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Fujifilm Business Innovation Corp
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Fuji Xerox Co Ltd
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Description

本発明は、ネットワーク通信装置および受信バッファ制御方法に関し、特に、音声をIPネットワーク上で伝送するVoIP機能を有するネットワーク通信装置および受信バッファ制御方法に関する。   The present invention relates to a network communication device and a reception buffer control method, and more particularly to a network communication device having a VoIP function for transmitting voice over an IP network and a reception buffer control method.

近年、インターネット等で利用される標準プロトコルであるUDP[User Datagram Protocol]/RTP[Real-time Transport Protocol]の手順によるFAX通信(見做しFAX通信)において、送信側と受信側との同期をとる様々な技術が開示されている。   In recent years, in the FAX communication (look-in FAX communication) by the procedure of UDP [User Datagram Protocol] / RTP [Real-time Transport Protocol] which is a standard protocol used in the Internet or the like, the transmission side and the reception side are synchronized. Various techniques are disclosed.

例えば、パケット内に予め計算しておいた到達時間と実際にパケットを得た時間との差でネットワーク遅延を計算することによって、バッファの深さを調節するネットワークエッジにおける揺らぎ吸収バッファ制御方法およびシステム並びに記録媒体がある(例えば、特許文献1参照。)。
特開2002−26969号公報
For example, a fluctuation absorbing buffer control method and system at a network edge for adjusting the buffer depth by calculating the network delay by the difference between the arrival time calculated in advance in the packet and the time when the packet is actually obtained In addition, there is a recording medium (see, for example, Patent Document 1).
JP 2002-26969 A

送信側データのA/D変換用のクロック(以後、fTと称する)と、受信側のD/A変換用のクロック(以後、fRと称する)との誤差によって、受信側の受信蓄積メモリに問題が発生する。fR>fTの場合、受信蓄積メモリにアンダーランが発生する可能性があり、fR<fTの場合、受信蓄積メモリにオーバーフローが発生する可能性がある。このような問題を防止するために受信蓄積メモリに冗長なメモリを用いていた。   Due to an error between the A / D conversion clock (hereinafter referred to as fT) of the transmission side data and the D / A conversion clock (hereinafter referred to as fR) on the reception side, there is a problem in the reception storage memory on the reception side. Will occur. When fR> fT, an underrun may occur in the reception / storage memory, and when fR <fT, an overflow may occur in the reception / storage memory. In order to prevent such a problem, a redundant memory is used as the reception storage memory.

しかし、あまり受信蓄積メモリを大きくすると、送信側のコマンド/ステータスの送信時から受信側でそのコマンドを受信するまでに時間がかかり、タイムアウトになってしまう可能性がある。   However, if the reception storage memory is made too large, it may take time from the time of transmission of the command / status on the transmission side until the reception of the command on the reception side, which may result in timeout.

そこで、本発明は、クロック誤差によるデータのアンダーラン、オーバーフローを発生させずに、データ欠落を防止することができるネットワーク通信装置および受信バッファ制御方法を提供することを目的とする。   Therefore, an object of the present invention is to provide a network communication apparatus and a reception buffer control method capable of preventing data loss without causing data underrun or overflow due to clock error.

上記目的を達成するため、請求項1の発明は、ネットワークを介してデータ通信を行うネットワーク通信装置において、前記ネットワークを介して受信した送信端末からのデータを一時蓄積する蓄積手段と、前記蓄積手段から前記データを順次取り出して所定の処理を行う処理手段と、前記処理手段が前記処理を行う際に、前記蓄積手段に一時蓄積されているデータ量に基づいて該処理手段の動作周波数を制御する周波数制御手段とを具備し、前記周波数制御手段は、前記蓄積手段に一時蓄積されているデータ量が予め設定された第1の上限値を上回ったとき、前記処理手段で動作中の動作周波数を該動作周波数より高くし、前記蓄積手段に一時蓄積されているデータ量が前記第1の上限値と前記蓄積手段が満杯となる値との間で予め設定された第2の上限値を上回ったとき、前記処理手段で動作中の動作周波数を該動作周波数よりさらに高くし、前記蓄積手段に一時蓄積されているデータ量が予め設定された第1の下限値を下回ったとき、前記処理手段で動作中の動作周波数を該動作周波数より低くし、前記蓄積手段に一時蓄積されているデータ量が前記第1の下限値と前記蓄積手段が空となる値との間で予め設定された第2の下限値を下回ったとき、前記処理手段で動作中の動作周波数を該動作周波数よりさらに低くし、前記第1の上限値と前記第1の下限値との差が、前記第1の上限値と前記蓄積手段が満杯となる値との差または前記第1の下限値と前記蓄積手段が空となる値との差よりも大きいことを特徴とする。 In order to achieve the above object, a first aspect of the present invention is a network communication apparatus for performing data communication via a network, a storage means for temporarily storing data from a transmission terminal received via the network, and the storage means. Processing means for sequentially taking out the data from the memory and performing predetermined processing, and when the processing means performs the processing, the operating frequency of the processing means is controlled based on the amount of data temporarily stored in the storage means Frequency control means, and when the amount of data temporarily stored in the storage means exceeds a preset first upper limit value, the frequency control means determines the operating frequency being operated by the processing means. The amount of data temporarily stored in the storage means is set in advance between the first upper limit value and a value at which the storage means is full. When the second upper limit value is exceeded, the operating frequency during the operation of the processing means is made higher than the operating frequency, and the amount of data temporarily stored in the storage means is set to a first lower limit value set in advance. When the operating frequency of the processing means is lower than the operating frequency, the amount of data temporarily stored in the storage means is the first lower limit value and the value at which the storage means is empty. Between the first upper limit value and the first lower limit value, when the operating frequency of the processing means is lower than the operating frequency. The difference is larger than a difference between the first upper limit value and a value at which the storage means becomes full or a difference between the first lower limit value and a value at which the storage means becomes empty .

また、請求項2の発明は、請求項1の発明において、前記データは、音声データデジタル信号であり、前記処理手段は、前記音声データデジタル信号を音声データアナログ信号に変換する処理を行うことを特徴とする。 According to a second aspect of the invention, in the first aspect of the invention, the data is an audio data digital signal, and the processing means performs a process of converting the audio data digital signal into an audio data analog signal. Features.

また、請求項3の発明は、ネットワークを介してデータ通信を行うネットワーク通信装置の受信バッファ制御方法において、前記ネットワークを介して受信した送信端末からのデータを蓄積手段に一時蓄積し、処理手段が前記蓄積手段から前記データを順次取り出して所定の処理を行い、周波数制御手段が前記蓄積手段に一時蓄積されているデータ量に基づいて該処理手段の動作周波数を制御し、前記周波数制御手段は、前記蓄積手段に一時蓄積されているデータ量が予め設定された第1の上限値を上回ったとき、前記処理手段で動作中の動作周波数を該動作周波数より高くし、前記蓄積手段に一時蓄積されているデータ量が前記第1の上限値と前記蓄積手段が満杯となる値との間で予め設定された第2の上限値を上回ったとき、前記処理手段で動作中の動作周波数を該動作周波数よりさらに高くし、前記蓄積手段に一時蓄積されているデータ量が予め設定された第1の下限値を下回ったとき、前記処理手段で動作中の動作周波数を該動作周波数より低くし、前記蓄積手段に一時蓄積されているデータ量が前記第1の下限値と前記蓄積手段が空となる値との間で予め設定された第2の下限値を下回ったとき、前記処理手段で動作中の動作周波数を該動作周波数よりさらに低くし、前記第1の上限値と前記第1の下限値との差が、前記第1の上限値と前記蓄積手段が満杯となる値との差または前記第1の下限値と前記蓄積手段が空となる値との差よりも大きいことを特徴とする。 According to a third aspect of the present invention, in the reception buffer control method for a network communication apparatus that performs data communication via a network, the data from the transmission terminal received via the network is temporarily stored in the storage means. The data is sequentially extracted from the storage means and subjected to predetermined processing, and the frequency control means controls the operating frequency of the processing means based on the amount of data temporarily stored in the storage means. When the amount of data temporarily stored in the storage means exceeds a preset first upper limit value, the operating frequency being operated by the processing means is made higher than the operating frequency, and temporarily stored in the storage means When the data amount exceeds the second upper limit value set in advance between the first upper limit value and the value at which the storage means becomes full, the processing procedure The operating frequency at which the processing means is operating when the operating frequency is further increased from the operating frequency and the amount of data temporarily stored in the storage means falls below a preset first lower limit value. Is lower than the operating frequency, and the amount of data temporarily stored in the storage means falls below a second lower limit value set in advance between the first lower limit value and the value at which the storage means becomes empty. When the processing means is operating, the operating frequency is made lower than the operating frequency, and the difference between the first upper limit value and the first lower limit value is the difference between the first upper limit value and the storage means. It is characterized by being larger than the difference between the full value or the difference between the first lower limit value and the value at which the storage means is empty .

また、請求項4の発明は、請求項3の発明において、前記データは、音声データデジタル信号であり、前記処理手段は、前記音声データデジタル信号を音声データアナログ信号に変換する処理を行うことを特徴とする。 According to a fourth aspect of the invention, in the third aspect of the invention, the data is an audio data digital signal, and the processing means performs a process of converting the audio data digital signal into an audio data analog signal. Features.

本発明によれば、クロック誤差によるデータのアンダーラン、オーバーフローを発生させずに、データ欠落を防止することが可能になるという効果を奏する。   According to the present invention, it is possible to prevent data loss without causing data underrun or overflow due to a clock error.

以下、本発明に係るネットワーク通信装置および受信バッファ制御方法の実施の形態について添付図面を参照して詳細に説明する。   Embodiments of a network communication apparatus and a reception buffer control method according to the present invention will be described below in detail with reference to the accompanying drawings.

図1は、本発明を適用したFAX通信システム1のシステム構成の一例を示す図である。   FIG. 1 is a diagram showing an example of a system configuration of a FAX communication system 1 to which the present invention is applied.

図1に示すように、送信側のFAX装置(以後、送信側と略称する)21と受信側のFAX装置(以後、受信側と略称する)22とがIP網3を介して接続している。以下、送信側21から受信側22に見做しFAX通信でFAXデータを送信する処理について説明する。   As shown in FIG. 1, a transmission-side FAX apparatus (hereinafter abbreviated as a transmission side) 21 and a reception-side FAX apparatus (hereinafter abbreviated as a reception side) 22 are connected via an IP network 3. . Hereinafter, a process for transmitting FAX data by FAX communication from the transmission side 21 to the reception side 22 will be described.

送信側21はモデム等で生成したFAXアナログ信号4をA/D変換部5でFAXデジタル信号6に変換する。詳細には、FAXアナログ信号4は一時的に送信蓄積メモリ7に蓄積され、A/D変換部5はFAXアナログ信号4を送信蓄積メモリ7から順次取り出してA/D変換処理(A/D変換周波数fT(=f0+Δ1))を行い、FAXデジタル信号6をIP網3を介して受信側22に送信する。   The transmission side 21 converts a FAX analog signal 4 generated by a modem or the like into a FAX digital signal 6 by an A / D conversion unit 5. Specifically, the FAX analog signal 4 is temporarily stored in the transmission / storage memory 7, and the A / D converter 5 sequentially extracts the FAX analog signal 4 from the transmission / storage memory 7 and performs A / D conversion processing (A / D conversion). The frequency fT (= f0 + Δ1)) is performed, and the FAX digital signal 6 is transmitted to the receiving side 22 via the IP network 3.

受信側22は送信側21から送信されたFAXデジタル信号6をIP網3を介して受信すると、受信したFAXデジタル信号6をD/A変換部8でFAXアナログ信号4に変換する。詳細には、FAXデジタル信号6は一時的に受信蓄積メモリ9に蓄積され、D/A変換部8はFAXデジタル信号6を受信蓄積メモリ9から順次取り出してD/A変換処理(D/A変換周波数fR(=f0+Δ2))を行い、FAXアナログ信号4をモデム等に出力する。   When the reception side 22 receives the FAX digital signal 6 transmitted from the transmission side 21 via the IP network 3, the reception side 22 converts the received FAX digital signal 6 into a FAX analog signal 4 by the D / A conversion unit 8. Specifically, the FAX digital signal 6 is temporarily stored in the reception / storage memory 9, and the D / A conversion unit 8 sequentially extracts the FAX digital signal 6 from the reception / storage memory 9 and performs D / A conversion processing (D / A conversion). The frequency fR (= f0 + Δ2)) is performed, and the FAX analog signal 4 is output to a modem or the like.

ここで、A/D変換周波数fTとD/A変換周波数fTとが同期していない場合、受信蓄積メモリ9にアンダーランまたはオーバーフローが発生する可能性がある。   Here, when the A / D conversion frequency fT and the D / A conversion frequency fT are not synchronized, an underrun or overflow may occur in the reception accumulation memory 9.

そこで、本発明では、受信側22の周波数制御部10が受信蓄積メモリ9に蓄積されたFAXデジタル信号6のデータ量に基づき、D/A変換周波数fRを加減することで、D/A変換処理の速度を加減し、受信蓄積メモリ9のデータ量を制御する。   Therefore, in the present invention, the frequency control unit 10 on the receiving side 22 adjusts the D / A conversion frequency fR based on the data amount of the FAX digital signal 6 stored in the reception storage memory 9, thereby performing the D / A conversion processing. The amount of data stored in the reception storage memory 9 is controlled.

図2は、周波数制御部10が行うD/A変換周波数fRの制御について説明する図である。   FIG. 2 is a diagram illustrating the control of the D / A conversion frequency fR performed by the frequency control unit 10.

図2に示すように、受信蓄積メモリ9にデータが蓄積されていない状態をEmptyとし、受信蓄積メモリ9の容量一杯にデータが蓄積されている状態をFullとする。そして、受信蓄積メモリ9へのFAXデジタル信号6の蓄積が開始し、受信蓄積メモリ9のデータ量が増加していき、データ量がD/A変換開始量に到達すると、D/A変換部8はFAXデジタル信号6のD/A変換処理を開始する。これは、受信蓄積メモリ9へのFAXデジタル信号6の蓄積開始時にD/A変換処理を開始すると、アンダーランが発生してしまう可能性があるからである。   As shown in FIG. 2, a state in which no data is stored in the reception storage memory 9 is Empty, and a state in which the data is stored to the full capacity of the reception storage memory 9 is Full. Then, accumulation of the FAX digital signal 6 in the reception / storage memory 9 starts, the data amount in the reception / storage memory 9 increases, and when the data amount reaches the D / A conversion start amount, the D / A conversion unit 8 Starts D / A conversion processing of the FAX digital signal 6. This is because if the D / A conversion process is started when the FAX digital signal 6 starts to be stored in the reception storage memory 9, an underrun may occur.

そして、受信蓄積メモリ9へのFAXデジタル信号6の蓄積と、D/A変換部8によるFAXデジタル信号6のD/A変換処理とが並行して行われる。   Then, the accumulation of the FAX digital signal 6 in the reception accumulation memory 9 and the D / A conversion process of the FAX digital signal 6 by the D / A conversion unit 8 are performed in parallel.

ここで、受信蓄積メモリ9のデータ量がUpper Limitに到達した場合、周波数制御部10はオーバーフローの発生を考慮して、D/A変換周波数fRを上限の周波数内で高く(Δ2>0)する(なお、周波数の範囲Δは−100ppm<Δ<100ppm)。これにより、D/A変換部8が行うD/A変換処理の速度が速くなり、受信蓄積メモリ9のデータ量が減少することになり、オーバーフローの発生を防止することができる。   Here, when the data amount of the reception storage memory 9 reaches the Upper Limit, the frequency control unit 10 increases the D / A conversion frequency fR within the upper limit frequency (Δ2> 0) in consideration of the occurrence of overflow. (The frequency range Δ is −100 ppm <Δ <100 ppm). As a result, the speed of the D / A conversion process performed by the D / A converter 8 is increased, the amount of data in the reception storage memory 9 is reduced, and the occurrence of overflow can be prevented.

また、受信蓄積メモリ9のデータ量がLower Limitに到達した場合、周波数制御部10はアンダーランの発生を考慮して、D/A変換周波数fRを下限の周波数内で低く(Δ2<0)する(なお、周波数の範囲Δは−100ppm<Δ<100ppm)。これにより、D/A変換部8が行うD/A変換処理の速度が遅くなり、受信蓄積メモリ9のデータ量が増加することになり、アンダーランの発生を防止することができる。   Further, when the data amount of the reception accumulation memory 9 reaches the Lower Limit, the frequency control unit 10 considers the occurrence of underrun and lowers the D / A conversion frequency fR within the lower limit frequency (Δ2 <0). (The frequency range Δ is −100 ppm <Δ <100 ppm). As a result, the speed of the D / A conversion process performed by the D / A converter 8 is reduced, the amount of data in the reception storage memory 9 is increased, and the occurrence of underrun can be prevented.

また、上述したUpper Limit、Lower Limitを段階的に複数用意し、D/A変換周波数fRを段階的に制御することもできる。   It is also possible to prepare a plurality of the upper limit and lower limit described above in stages, and to control the D / A conversion frequency fR in stages.

図3は、周波数制御部10が行う段階的なD/A変換周波数fRの制御について説明する図である。   FIG. 3 is a diagram illustrating the stepwise D / A conversion frequency fR control performed by the frequency control unit 10.

図3(a)に示すように、Upper LimitとFullの間にUp/2を設定し、Lower LimitとEmptyの間にLow/2を用意する。   As shown in FIG. 3A, Up / 2 is set between Upper Limit and Full, and Low / 2 is prepared between Lower Limit and Empty.

そして、図3(b)に示すように、「Full>データ量X>Up/2」の範囲に対応するD/A変換周波数fRを「fR_Upper_Limit」に設定し、「Up/2>X>Upper Limit」の範囲に対応するfRを「fR_Upper」に設定し、「Upper Limit>X>Lower Limit」の範囲に対応するfRを「fR」に設定し、「Lower Limit>X>Low/2」の範囲に対応するfRを「fR_Lower」に設定し、「Low/2>X>Empty」の範囲に対応するfRを「fR_Lower_Limit」に設定することで、段階的なD/A変換周波数fRの制御を行うことができる。   Then, as shown in FIG. 3B, the D / A conversion frequency fR corresponding to the range of “Full> data amount X> Up / 2” is set to “fR_Upper_Limit”, and “Up / 2> X> Upper”. FR corresponding to the range of “Limit” is set to “fR_Upper”, fR corresponding to the range of “Upper Limit> X> Lower Limit” is set to “fR”, and “Low Limit> X> Low / 2” is set. By setting the fR corresponding to the range to “fR_Lower” and setting the fR corresponding to the range of “Low / 2> X> Empty” to “fR_Lower_Limit”, the step-by-step control of the D / A conversion frequency fR is performed. It can be carried out.

次に、ネットワーク通信装置で行われるD/A変換周波数fRの制御処理の手順について図4に示すフローチャートを参照して説明する。   Next, the procedure of the D / A conversion frequency fR control process performed in the network communication apparatus will be described with reference to the flowchart shown in FIG.

送信側から見做しFAXデータを受信し(ステップS401)、受信した見做しFAXデータを受信蓄積メモリに蓄積し(ステップS402)、受信蓄積メモリのデータ量がD/A変換開始量に到達すると(ステップS403でYES)、D/A変換部が見做しFAXデータのD/A変換処理を実行する(ステップS404)。   The FAX data is received from the transmission side (step S401), the received FAX data is stored in the reception storage memory (step S402), and the data amount of the reception storage memory reaches the D / A conversion start amount. Then (YES in step S403), the D / A conversion unit considers and executes D / A conversion processing of FAX data (step S404).

D/A変換処理中に受信蓄積メモリのデータ量がUpper Limitを上回った場合(ステップS405でYES)、周波数制御部がD/A変換周波数fRを高くし(ステップS406)、ステップS404に戻る。なお、データ量に応じたD/A変換周波数fRの制御を行うこともできる。   If the data amount in the reception storage memory exceeds the upper limit during the D / A conversion process (YES in step S405), the frequency control unit increases the D / A conversion frequency fR (step S406), and the process returns to step S404. The D / A conversion frequency fR can be controlled according to the data amount.

また、D/A変換処理中に受信蓄積メモリのデータ量がUpper Limitを上回らず(ステップS405でNO)、Lower Limitを下回った場合(ステップS407でYES)、周波数制御部がD/A変換周波数fRを低くし(ステップS408)、ステップS404に戻る。なお、データ量に応じたD/A変換周波数fRの制御を行うこともできる。   In addition, when the data amount of the reception storage memory does not exceed the Upper Limit during the D / A conversion process (NO in Step S405) and falls below the Lower Limit (YES in Step S407), the frequency control unit performs the D / A conversion frequency. fR is lowered (step S408), and the process returns to step S404. The D / A conversion frequency fR can be controlled according to the data amount.

そして、D/A変換処理中に受信蓄積メモリのデータ量がLower Limitを下回らず(ステップS407でNO)、見做しFAXデータの受信が終了すると(ステップS409でYES)、制御処理の手順を終了する。   Then, if the amount of data in the reception / storage memory does not fall below the Lower Limit during the D / A conversion process (NO in step S407) and the reception of the FAX data is completed (YES in step S409), the control processing procedure is performed. finish.

本発明は、上記し、且つ図面に示した実施例に限定することなく、その要旨を変更しない範囲内で適宜変形して実施できるものである。   The present invention is not limited to the embodiments described above and shown in the drawings, and can be implemented with appropriate modifications within a range not changing the gist thereof.

本発明を適用したFAX通信システムのシステム構成の一例を示す図である。It is a figure which shows an example of the system configuration | structure of the FAX communication system to which this invention is applied. 周波数制御部が行うD/A変換周波数fRの制御について説明する図である。It is a figure explaining control of D / A conversion frequency fR which a frequency control part performs. 周波数制御部が行う段階的なD/A変換周波数fRの制御について説明する図である。It is a figure explaining control of the stepwise D / A conversion frequency fR which a frequency control part performs. ネットワーク通信装置で行われるD/A変換周波数fRの制御処理の手順を示すフローチャートである。It is a flowchart which shows the procedure of the control processing of D / A conversion frequency fR performed with a network communication apparatus.

符号の説明Explanation of symbols

1 FAX通信システム
21 送信側のFAX装置
22 受信側のFAX装置
3 IP網
4 FAXアナログ信号
5 A/D変換部
6 FAXデジタル信号
7 送信蓄積メモリ
8 D/A変換部
9 受信蓄積メモリ
10 周波数制御部
DESCRIPTION OF SYMBOLS 1 FAX communication system 21 FAX apparatus of transmission side 22 FAX apparatus of reception side 3 IP network 4 FAX analog signal 5 A / D conversion part 6 FAX digital signal 7 Transmission accumulation memory 8 D / A conversion part 9 Reception accumulation memory 10 Frequency control Part

Claims (4)

ネットワークを介してデータ通信を行うネットワーク通信装置において、
前記ネットワークを介して受信した送信端末からのデータを一時蓄積する蓄積手段と、
前記蓄積手段から前記データを順次取り出して所定の処理を行う処理手段と、
前記処理手段が前記処理を行う際に、前記蓄積手段に一時蓄積されているデータ量に基づいて該処理手段の動作周波数を制御する周波数制御手段と
を具備し、
前記周波数制御手段は、
前記蓄積手段に一時蓄積されているデータ量が予め設定された第1の上限値を上回ったとき、前記処理手段で動作中の動作周波数を該動作周波数より高くし、前記蓄積手段に一時蓄積されているデータ量が前記第1の上限値と前記蓄積手段が満杯となる値との間で予め設定された第2の上限値を上回ったとき、前記処理手段で動作中の動作周波数を該動作周波数よりさらに高くし、
前記蓄積手段に一時蓄積されているデータ量が予め設定された第1の下限値を下回ったとき、前記処理手段で動作中の動作周波数を該動作周波数より低くし、前記蓄積手段に一時蓄積されているデータ量が前記第1の下限値と前記蓄積手段が空となる値との間で予め設定された第2の下限値を下回ったとき、前記処理手段で動作中の動作周波数を該動作周波数よりさらに低くし、
前記第1の上限値と前記第1の下限値との差が、前記第1の上限値と前記蓄積手段が満杯となる値との差または前記第1の下限値と前記蓄積手段が空となる値との差よりも大きい
ことを特徴とするネットワーク通信装置。
In a network communication device that performs data communication via a network,
Storage means for temporarily storing data from a transmission terminal received via the network;
Processing means for sequentially extracting the data from the storage means and performing predetermined processing;
A frequency control means for controlling the operating frequency of the processing means based on the amount of data temporarily stored in the storage means when the processing means performs the processing ;
The frequency control means includes
When the amount of data temporarily stored in the storage means exceeds a preset first upper limit value, the operating frequency being operated by the processing means is made higher than the operating frequency, and temporarily stored in the storage means When the data amount exceeds the second upper limit value set in advance between the first upper limit value and the value at which the storage means is full, the operating frequency at which the processing means is operating is Higher than the frequency,
When the amount of data temporarily stored in the storage means falls below a first lower limit value set in advance, the operating frequency being operated by the processing means is made lower than the operating frequency and temporarily stored in the storage means. When the data amount falls below a second lower limit value set in advance between the first lower limit value and the value at which the storage means becomes empty, the operating frequency at which the processing means is operating is Lower than the frequency,
The difference between the first upper limit value and the first lower limit value is the difference between the first upper limit value and a value at which the storage means is full, or the first lower limit value and the storage means are empty. A network communication device characterized by being larger than a difference from
前記データは、
音声データデジタル信号であり、
前記処理手段は、
前記音声データデジタル信号を音声データアナログ信号に変換する処理を行う
ことを特徴とする請求項1記載のネットワーク通信装置。
The data is
Audio data digital signal,
The processing means includes
The network communication apparatus according to claim 1, wherein a process of converting the audio data digital signal into an audio data analog signal is performed.
ネットワークを介してデータ通信を行うネットワーク通信装置の受信バッファ制御方法において、
前記ネットワークを介して受信した送信端末からのデータを蓄積手段に一時蓄積し、
処理手段が前記蓄積手段から前記データを順次取り出して所定の処理を行い、
周波数制御手段が前記蓄積手段に一時蓄積されているデータ量に基づいて該処理手段の動作周波数を制御し、
前記周波数制御手段は、
前記蓄積手段に一時蓄積されているデータ量が予め設定された第1の上限値を上回ったとき、前記処理手段で動作中の動作周波数を該動作周波数より高くし、前記蓄積手段に一時蓄積されているデータ量が前記第1の上限値と前記蓄積手段が満杯となる値との間で予め設定された第2の上限値を上回ったとき、前記処理手段で動作中の動作周波数を該動作周波数よりさらに高くし、
前記蓄積手段に一時蓄積されているデータ量が予め設定された第1の下限値を下回ったとき、前記処理手段で動作中の動作周波数を該動作周波数より低くし、前記蓄積手段に一時蓄積されているデータ量が前記第1の下限値と前記蓄積手段が空となる値との間で予め設定された第2の下限値を下回ったとき、前記処理手段で動作中の動作周波数を該動作周波数よりさらに低くし、
前記第1の上限値と前記第1の下限値との差が、前記第1の上限値と前記蓄積手段が満杯となる値との差または前記第1の下限値と前記蓄積手段が空となる値との差よりも大きい
ことを特徴とするネットワーク通信装置の受信バッファ制御方法。
In a reception buffer control method for a network communication device that performs data communication via a network,
Temporarily storing data from the transmission terminal received via the network in the storage means;
Processing means sequentially takes out the data from the storage means and performs predetermined processing,
The frequency control means controls the operating frequency of the processing means based on the amount of data temporarily stored in the storage means ,
The frequency control means includes
When the amount of data temporarily stored in the storage means exceeds a preset first upper limit value, the operating frequency being operated by the processing means is made higher than the operating frequency, and temporarily stored in the storage means When the data amount exceeds the second upper limit value set in advance between the first upper limit value and the value at which the storage means is full, the operating frequency at which the processing means is operating is Higher than the frequency,
When the amount of data temporarily stored in the storage means falls below a first lower limit value set in advance, the operating frequency being operated by the processing means is made lower than the operating frequency and temporarily stored in the storage means. When the data amount falls below a second lower limit value set in advance between the first lower limit value and the value at which the storage means becomes empty, the operating frequency at which the processing means is operating is Lower than the frequency,
The difference between the first upper limit value and the first lower limit value is the difference between the first upper limit value and a value at which the storage means is full, or the first lower limit value and the storage means are empty. A reception buffer control method for a network communication apparatus, wherein the difference is greater than
前記データは、
音声データデジタル信号であり、
前記処理手段は、
前記音声データデジタル信号を音声データアナログ信号に変換する処理を行う
ことを特徴とする請求項記載のネットワーク通信装置の受信バッファ制御方法。
The data is
Audio data digital signal,
The processing means includes
The reception buffer control method for a network communication device according to claim 3, wherein processing for converting the audio data digital signal into an audio data analog signal is performed.
JP2006181532A 2006-06-30 2006-06-30 Network communication apparatus and reception buffer control method Expired - Fee Related JP4706575B2 (en)

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JPH09261613A (en) * 1996-03-26 1997-10-03 Mitsubishi Electric Corp Data reception/reproducing device
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09261613A (en) * 1996-03-26 1997-10-03 Mitsubishi Electric Corp Data reception/reproducing device
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