JP4680148B2 - Communication device - Google Patents

Description

  The present invention relates to a communication device that performs processing such as encryption processing and authentication processing on a received packet by a plurality of processing units, and more particularly to a load distribution technique for distributing processing to a plurality of processing units in units of packets.

  When performing heavy processing such as encryption processing on packets received from a broadband transmission path, to ensure the throughput of the entire device by distributing the processing to multiple processing units in units of packets, and to preserve the packet transfer order It is necessary to devise. Therefore, various load distribution methods are used inside the communication apparatus.

  In the conventional communication apparatus, the inside of the apparatus is composed of one load distribution unit, each of which has a plurality of packet processing units having the same internal configuration, and one output control unit, and the load distribution unit, a plurality of packet processing units, The packet processing unit and the output control unit are connected in parallel. The load distribution unit sequentially transmits packets received from the broadband transmission path outside the apparatus to a plurality of packet processing units, and the output control unit sequentially receives packets that have been subjected to processing such as encryption processing by the packet processing unit. The packet transfer order when transmitting / receiving data to / from a plurality of packet processing units is such that the load distribution unit assigns a sequence No indicating the packet transfer order for each packet, and the output control unit uses the sequence No to generate a plurality of packet processing units. It was maintained by receiving packets in order (for example, Patent Document 1 and Patent Document 2).

JP-T 2005-522924, page 25, Fig. 6 Special Table 2005-507614, page 22, page 1

  Conventionally, the load distribution unit and the output control unit are both a centralized control method in which packets are directly transmitted / received to / from a plurality of packet processing units. When the parallelism of the packet processing units is N, each of the plurality of packet processing units is A one-to-N connection configuration is used. When such a form is mounted on hardware such as a printed wiring board, wiring resources on the board are consumed greatly. This also complicates the electrical design and makes high-speed transmission difficult. In addition, when the parallelism of the packet processing unit is changed for reasons such as performance improvement or logical scale reduction, there is a problem that the load distribution unit and the output control unit are also changed.

  The present invention has been made to solve the above-described problems. The apparatus has one header generation unit, a plurality of transfer control units and packet processing units each having the same internal configuration, and one header deletion. A mechanism for maintaining the packet transfer order, comprising a plurality of sets of header generation units, transfer control units and packet processing units, and header deletion units arranged in series in order to connect them one to one It is characterized by having. In this way, when mounting on hardware such as a printed circuit board, wiring resources are reduced and a circuit that can easily perform high-speed transmission is configured, and the parallelism between the transfer control unit and the packet processing unit is changed. The purpose of the present invention is to configure a circuit that does not change the header generation unit and the header deletion unit even when the header generation unit is used.

The communication device according to the present invention is:
There are a plurality of sets in which the transfer control unit and the packet processing unit are connected, and the transfer control units constituting this set are sequentially connected in series, and the header addition unit is connected to the last stage of the transfer control unit, and the header addition unit is connected to the last stage. A header deletion unit is connected in series after the transfer control unit, and the header addition unit displays a sequence number indicating the packet arrival order in the received packet from the outside and a processing flag indicating whether or not the processing on the packet has been performed. Add it to the beginning and send it to the transfer controller at the front,
Whether the transfer control unit is a packet processing unit connected to itself from the processing flag of the input packet and the operating state of the packet processing unit connected to itself, or the next processing means of the transfer control unit or the header deletion unit. In the case of a processed input packet, it is forwarded to the next-stage processing means according to the receiving order of the original packet, and received in the case of an unprocessed input packet. Transfer without depending on the transfer status of the processed input packet,
The header deletion unit is configured to delete the sequence number and the processing flag added to the head part of the packet from the transfer control unit at the last stage and transmit the same to the outside.

  According to the present invention, a plurality of sets of header generation unit, transfer control and packet processing unit, and header deletion unit are arranged in series in order and connected one to one, thereby maintaining the packet transfer order and printing. When mounted on hardware such as a wiring board, wiring resources can be suppressed and a circuit capable of easily performing high-speed transmission can be configured. In addition, even when the parallelism of the transfer control unit and the packet processing unit is changed, a circuit that does not change the header generation unit and header deletion unit can be configured, and it can flexibly respond to changes in system performance requirements. be able to.

Embodiment 1 FIG.
1 is a block diagram showing a communication apparatus according to Embodiment 1 of the present invention. 101 is a header addition for adding a sequence number indicating the arrival order of packets to a packet received from the outside and a flag (processing flag) indicating whether or not the packet processing such as encryption or authentication has been performed to the head part of the packet The unit 102 transfers the received unprocessed packet to the packet processing unit 103 and performs processing on the packet, or receives the processed packet or the received unprocessed packet in the subsequent transfer control unit or header. A transfer control unit for determining whether to transfer to the deletion unit 104; 103, a packet processing unit that performs predetermined processing such as encryption or authentication on the packet; and 104, a sequence number added to the beginning of the packet by the header addition unit 101 And a header deletion unit that deletes the processing flag and transmits it to the outside.

  In FIG. 1, the transfer control unit 102 and the packet processing unit 103 are connected to form a set, and a plurality of N sets are connected in parallel. Further, it is assumed that all N packet processing units 103 provide the same function as the contents of processing for received packets. Therefore, there is a single packet processing unit that receives a packet and executes the predetermined process while the apparatus performs the predetermined process on the received specific packet and transmits it again. A specific packet is not transferred to a plurality of different packet processing units and processed by each.

  FIG. 2 is a block diagram showing the transfer control unit 102 according to the first embodiment of the present invention. In the figure, 201 distributes the packet received from the header adding unit 101 to the packet processing unit 103, the processed relay packet FIFO 221 or the unprocessed relay packet FIFO 231 based on the processing flag and the processing state of the packet processing unit 103. It is a processing state determination unit that duplicates the sequence number of the packet and distributes it to the processed SNFIFO 212, the processed relay SNFIFO 222, or the unprocessed relay SNFIFO 232.

  211 denotes a processed packet FIFO having a FIFO (First-In-First-Out) structure for storing a packet that has been subjected to predetermined processing by the packet processing unit 103, and 212 denotes a sequence of packets stored in the processed packet FIFO 211. A processed SN FIFO 213 having a FIFO structure for storing No, a processed SN register update unit 214 for updating the processed SN register 214 based on the states of the processed SN FIFO 212 and the processed SN flag 215, A processed SN register 215 that indicates the sequence number of the packet that is stored in the packet FIFO 211 and is located at the top, and 215 is a processed SN flag that indicates whether the value indicated by the processed SN register 214 is valid or invalid.

  Reference numeral 221 denotes a processed relay packet FIFO having a FIFO structure for storing a packet for which predetermined processing has already been performed by the packet processing unit 103 in the preceding stage, and 222 denotes a sequence number of a packet stored in the processed relay packet FIFO 221. The processed relay SN FIFO 223 having the FIFO structure to be processed is a processed relay SN register update unit 224 that updates the processed relay SN register 224 based on the status of the processed relay SN FIFO 222 and the processed relay SN flag 225. The processed relay SN register 225 that indicates the sequence number of the packet that is stored in the processed relay packet FIFO 221 and is located at the head, 225 is a processed relay SN flag that indicates whether the value indicated by the processed relay SN register 224 is valid or invalid It is.

Reference numeral 231 denotes an unprocessed relay packet FIFO having a FIFO structure in which a packet to be processed by the subsequent packet processing unit 103 is stored without performing predetermined processing in the previous stage and the packet processing unit 103 concerned.
232 is an unprocessed relay SNFIFO having a FIFO structure for storing a sequence number of a packet stored in the unprocessed relay packet FIFO 231, 233 is not processed based on the status of the unprocessed relay SNFIFO 232 and the unprocessed relay SN flag 235 An unprocessed relay SN register update unit 234 that updates the relay SN register 234, an unprocessed relay SN register 235 that indicates a history of sequence numbers of packets transferred via the unprocessed relay packet FIFO 231, This is an unprocessed relay SN flag indicating whether the value indicated by the relay SN register 234 is valid or invalid.

202 selects a processed packet FIFO 211 or a processed relay packet FIFO 221 based on the state of each SN register 214, 224, 234, and each SN flag 215, 225, 235, reads the packet, and It is a preceding transmission order control unit that transmits to the subsequent transmission order control unit 204.
203 is a relay counter indicating the sequence number of the latest processed packet or the latest processed relay packet transmitted by the transfer control unit 102 to the subsequent transfer control unit 102 or the header deletion unit 104, and 204 is a preceding transmission. This is a subsequent transmission order control unit that selects either the packet received from the order control unit 202 or the packet stored in the unprocessed relay packet FIFO 231 and transmits it to the subsequent transfer control unit 102 or the header deletion unit 104.

  Next, the operation of the communication apparatus in this embodiment will be described.

  When the header addition unit 101 receives a packet from the outside, the header addition unit 101 sequentially adds a sequence number indicating the reception order of the packet from 1 to the header part. Similarly, a processing flag used by the transfer control unit 102 in the subsequent stage to determine whether or not processing of the packet such as encryption or authentication has been performed on the packet is added to the header portion with the processing unexecuted state. To do. After adding the sequence number and the processing flag to the header, the sequence number and the processing flag are transmitted to the transfer control unit 102 at the subsequent stage (frontmost stage).

  Next, the transfer control unit 102 performs the control described in the following paragraph numbers [0021] to [0032] according to the processing flag of the received packet and its own state.

  In the first case, the processing state determination unit 201 indicates that the processing flag of the packet has not been executed, and there is no packet being processed in the connected packet processing unit 103, and a new packet is received and processed. Can be implemented, the packet is transmitted to the connected packet processing unit 103. In parallel with this, the sequence number is duplicated from the packet and transmitted to the processed SNFIFO 212.

  As a second case, the processing state determination unit 201 transmits the packet to the processed relay packet FIFO 221 when the processing flag of the packet indicates execution. In parallel with this, the sequence No is copied from the packet and transmitted to the processed relay SNFIFO 222.

  In the third case, the processing status determination unit 201 indicates that the processing flag of the packet indicates that the packet is not yet executed, and there is a packet being processed in the packet processing unit 103, and a new packet is received and processing cannot be performed. The packet is transmitted to the unprocessed relay packet FIFO 231. In parallel with this, the sequence No is duplicated from the packet and transmitted to the unprocessed relay SNFIFO 232.

  When the packet processing unit 103 newly receives a packet in the process of the paragraph number [0021], the packet processing unit 103 executes a predetermined process for the packet such as encryption or authentication. A packet for which processing has been completed is overwritten with the processing flag to “completed” and transmitted to the processed packet FIFO 211.

When the corresponding processed SNFIFO 212 is not empty and the corresponding processed SN flag 215 is invalid, the processed SN register update unit 213 reads one entry of the sequence number from the processed SNFIFO 212 and stores it in the corresponding processed SN register 214. Write the value. Next, the processed SN flag 215 is effectively rewritten. If the processed SN FIFO 212 is empty or the processed SN flag 215 is valid, the processed SN register update unit 213 waits until they are not empty and become invalid.
FIG. 5 shows an operation flow of the processed SN register update unit 213 described above.

  The processed relay SN register updating unit 223 performs the same processing as that described in paragraph [0025] on the processed relay SNFIFO 222 and the processed relay SN register 224. That is, when the processed relay SN FIFO 222 is not empty and the corresponding processed relay SN flag 225 is invalid, one entry of the sequence number is read from the processed relay SN FIFO 222 and the value is written in the corresponding processed relay SN register 224. Next, the processed relay SN flag 225 is effectively rewritten. If the processed relay SN FIFO 222 is empty or the processed relay SN flag 225 is valid, the processed relay SN register update unit 223 waits until they are not empty and become invalid.

  Similarly, the unprocessed relay SN register update unit 233 performs the same processing as that described in paragraph [0025] on the unprocessed relay SNFIFO 232 and the unprocessed relay SN register 234.

  The upstream transmission order control unit 202 has the corresponding SN flag valid from the processed SN register 214, processed relay SN register 224, and unprocessed relay SN register 234, and the corresponding SN register value is set to 1 in the relay counter 203. The register which is a value obtained by adding is searched. The processing described in the following paragraph numbers [0028] to [0031] is performed according to the search result.

  When the corresponding register is the processed SN register 214 as the first case, the upstream transmission order control unit 202 reads one packet from the processed packet FIFO 211 and transmits it to the downstream transmission order control unit 204. Subsequently, the upstream transmission order control unit 202 rewrites the processed SN flag 215 to be invalid.

  If the corresponding register is the processed relay SN register 224 as the second case, the upstream transmission order control unit 202 reads one packet from the processed relay packet FIFO 221 and transmits it to the downstream transmission order control unit 204. Subsequently, the upstream transmission order control unit 202 rewrites the processed relay SN flag 225 to be invalid.

  When the corresponding register is the unprocessed relay SN register 234 as the third case, the upstream transmission order control unit 202 rewrites the unprocessed relay SN flag 235 to be invalid. Note that the upstream transmission order control unit 202 does not control to read one packet from the processed relay packet FIFO 231.

If there is no corresponding register as the fourth case, the upstream transmission order control unit 202 continues the search until the corresponding register is found.
FIG. 6 shows each operation flow from the first case to the fourth case by the preceding transmission order control unit 202 described above.

  The subsequent transmission order control unit 204 transfers the packet received from the previous transmission order control unit 202 to the header deletion unit 104. Similarly, the packet stored in the unprocessed relay packet FIFO 231 is read and transferred to the header deletion unit 104. If transfer of both packets overlaps at a certain point in time, the packets are appropriately distributed and read alternately and transmitted by a round robin algorithm or the like.

  Finally, the header deletion unit 104 deletes the sequence number and the processing flag from the header part, and transmits the packet to the outside.

  FIG. 3 is a timing chart showing an operation example 1 of the communication apparatus according to Embodiment 1 of the present invention.

  In TIME1, the transfer control unit # 1 determines that the packet processing unit # 1 can newly process a packet, and transmits the packet # 1 to the packet processing unit # 1. The packet processing unit # 1 starts processing the packet # 1.

  In TIME2, the transfer control unit # 1 determines that the packet processing unit # 1 is processing the packet # 1, and transmits the packet # 2 to the transfer control unit # 2 without processing. The transfer control unit # 2 determines that the packet processing unit # 2 can newly process a packet, and transmits the packet # 2 to the packet processing unit # 2. The packet processing unit # 2 starts processing the packet # 2.

  In TIME3, the packet processing unit # 1 completes the processing for the packet # 1, and transmits the packet # 1 to the transfer control unit # 1. The transfer control unit # 1 determines from the relay counter 203 of itself that the processed packet or the processed relay packet to be transferred next is the packet # 1, and transmits the packet # 1 to the transfer control unit # 2. The transfer control unit # 1 adds 1 to its relay counter 203 after transferring the packet # 1. At this point, the relay counter 203 indicates that the processed packet or processed relay packet to be transferred next is packet # 2. Further, the transfer control unit # 1 determines that the packet # 2 has already been transferred unprocessed to the subsequent transfer control unit from its own unprocessed relay SN register 234 and unprocessed relay SN flag 235, 1 is further added to the relay counter 203. As a result, the relay counter of the transfer control unit # 1 indicates the packet # 3.

  In TIME4, the transfer control unit # 2 and the transfer control unit # 3 determine that the packet # 1 has been processed, and that the processed packet or the processed relay packet to be transferred next from its relay counter is the packet # 1. It is determined that there is a packet and packet # 1 is transmitted in order. At this time, since the transfer control unit # 2 and the transfer control unit # 3 have already processed the packet # 1, the transfer control unit or the header deletion unit in the subsequent stage is not transmitted to the packet processing unit # 2 and the packet processing unit # 3. Just forward to.

  FIG. 4 is a timing chart showing an operation example 2 of the communication apparatus according to Embodiment 1 of the present invention.

  In the TIME 11, the transfer control unit # 1 determines that the packet processing unit # 1 can newly process a packet, and transmits the packet # 1 to the packet processing unit # 1. The packet processing unit # 1 starts processing for the packet # 1. Here, the packet # 1 has a longer packet length than the packet # 2, the packet # 3, and the packet # 4 that are sequentially transferred later, and the packet processing in the packet processing unit requires a longer time than other packets. Is assumed.

  In the TIME 12, the transfer control unit # 1 determines that the packet processing unit # 1 is processing the packet # 1, and transmits the packet # 3 to the transfer control unit # 2 without processing. Similarly, the transfer control unit # 2 transmits the packet # 3 to the transfer control unit # 3 without processing. The transfer control unit # 3 determines that the packet processing unit # 3 can newly process a packet, and transmits the packet # 3 to the packet processing unit # 3. The packet processing unit # 3 starts processing the packet # 3.

  In the TIME 13, the packet processing unit # 2 completes the processing for the packet # 2, and transmits the packet # 2 to the transfer control unit # 2. The transfer control unit # 2 determines from the relay counter of itself that the processed packet or the processed relay packet to be transferred next is the packet # 1 and holds the packet # 2 in the processed packet FIFO 211 without transferring the packet # 2. To do.

  In the TIME 14, the packet processing unit # 1 completes the processing for the packet # 1, and transmits the packet # 1 to the transfer control unit # 1. The transfer control unit # 1 determines from the relay counter 203 that the processed packet or the processed relay packet to be transferred next is the packet # 1, and transmits the packet # 1 to the transfer control unit # 2.

  In TIME 15, the transfer control unit # 2 determines that the packet # 1 has been processed, and determines from the relay counter 203 that the processed packet or the processed relay packet to be transferred next is the packet # 1. # 1 is transmitted to the transfer control unit # 3. Here, the transfer control unit # 2 adds 1 to its own relay counter 203 after transmitting the packet # 1.

  In TIME 16, the transfer control unit # 2 determines from the relay counter 203 that the processed packet or the processed relay packet to be transferred next is the packet # 2, and the packet held in the processed packet FIFO 211. # 2 is read and transmitted to the transfer control unit # 3.

  The present invention is applied to an information communication system in which processing such as encryption processing and authentication processing on a packet is distributed to a plurality of processing units in units of packets, suppresses wiring resources while maintaining the packet transfer order, and enables high-speed transmission. Possible circuits can be constructed.

It is a block diagram which shows the communication apparatus by Embodiment 1 of this invention. It is a block diagram which shows the transfer control part by Embodiment 1 of this invention. It is the timing chart which showed the operation example 1 of the communication apparatus in Embodiment 1 of this invention. It is the timing chart which showed the operation example 2 of the communication apparatus in Embodiment 1 of this invention. It is a flowchart which shows operation | movement of the processed SN register update part. It is a flowchart which shows operation | movement of a front | former stage transmission order control part.

Explanation of symbols

  101; Header addition unit, 102; Transfer control unit, 103; Packet processing unit, 104; Header deletion unit, 201; Processing state determination unit, 202; Pre-transmission order control unit, 203; Relay counter, 204; , 211; processed packet FIFO, 212; processed SN FIFO, 213; processed SN register update unit, 214; processed SN register, 215; processed SN flag, 221; processed relay packet FIFO, 222; Relay SNFIFO, 223; processed relay SN register update unit, 224; processed relay SN register, 225; processed relay SN flag, 231; unprocessed relay packet FIFO, 232; unprocessed relay SNFIFO, 233; unprocessed relay SN Register update unit, 234; unprocessed relay SN register, 235; unprocessed relay SN Lag.

Claims (1)

A plurality of sets including a connected transfer control unit and a packet processing unit, a sequence number indicating the packet arrival order and a processing flag indicating whether or not the processing on the packet has been performed on the packet received from the outside packet Transfer control comprising each processing means of a header addition unit to be added to the head portion of the packet and a header deletion unit to delete the sequence number and processing flag added to the head portion of the input packet. Units are sequentially connected in series, a header addition unit is connected in front of the front transfer control unit, a header deletion unit is connected in series after the last transfer control unit,
The header addition unit adds the sequence number and processing flag to the received packet and transmits it to the transfer control unit at the front stage,
The transfer control unit distributes the input packet from the processing flag of the input packet and the operation state of the packet processing unit connected to itself to the packet processing unit connected to itself or to the next-stage processing means. In the case of a processed input packet, the transmission to the processing means follows the original packet reception order, and in the case of an unprocessed input packet, transfers it without depending on the transfer state of the received processed input packet,
The header deletion unit is configured to delete the sequence number and the processing flag from the packet from the transfer control unit at the last stage and transmit the packet to the outside.

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