JP4661344B2 - Analog to digital converter - Google Patents

Description

The present invention relates to a serial-parallel type analog-digital converter (serial-parallel type A / D converter).

  An A / D converter is used to convert an analog signal into a digital value. This A / D converter has a convertible range (dynamic range) and decomposition performance. If a large dynamic range is taken, the input conversion resolution is lowered.

  Conventionally, in order to eliminate the above point, the input signal and the D / A converter output are added to limit the signal range input to the A / D converter, and the required A / D converter resolution can be obtained. The method of obtaining is a serial-parallel A / D converter (sub-ranging A / D converter) (see, for example, Patent Document 1).

  As shown in FIG. 1, this type of serial / parallel A / D converter includes an upper A / D converter 1 that receives an input signal as an input, and a conversion value of the upper A / D converter 1 as an analog signal. A D / A converter 2 to be converted and an adder that receives the input signal and the output of the D / A converter 2 and performs analog addition (subtracts an analog value corresponding to the conversion result of the higher-order A / D converter 1 from the input signal) 3, the lower A / D converter 4 that receives the output of the adder 3 and converts it into a digital value, and the signals of the upper A / D converter 1, the D / A converter 2, and the lower A / D converter 4 A control circuit 5 for capturing and controlling is provided as a hardware configuration.

  In this series-parallel A / D converter, the upper A / D converter 1 having a sufficient dynamic range with respect to the input signal is rough and the A / D conversion is roughly performed to control the upper bits of the input signal. Captured by the circuit 5. On the other hand, the control circuit 5 obtains a code so that the output of the adder 3 falls within the dynamic range of the lower A / D converter 4 based on the acquired conversion result of the higher A / D converter 1, and D The code is set in the / A converter 2. The D / A converter 2 inputs an analog signal corresponding to the set code to the adder 3, and the adder 3 adds the output to the lower A / D converter 4. The lower A / D converter 4 obtains the lower bits of the input signal by digital conversion and supplies the lower bits to the control circuit 5. The control circuit 5 calculates the conversion results of the upper A / D converter 1 and the lower A / D converter 4 and obtains a digital conversion value of the input signal.

In this type of serial / parallel A / D converter, the dynamic range of the lower A / D converter is set to be larger than the LSB of the upper A / D converter (the corresponding D / A conversion result value). Thus, the overall accuracy is determined by the accuracy of the lower A / D converter.
JP-A-2-216916

  In the conventional series-parallel A / D converter, for example, as shown in FIG. 2, the input signal; the dynamic range DR1 of the lower A / D converter when D / A = 1 in the output code characteristics, and D / A = An overlap range is provided for the dynamic range DR2 of the lower A / D converter at 2. Therefore, at the overlap portion, there are at least two kinds of codes given to the D / A converter: a larger value and a smaller value.

  If the D / A converter outputs an analog signal that is ideally proportional to the input code, the dynamic range of the lower A / D converter when D / A = 1 as shown in FIG. Since DR1 and the dynamic range DR2 of the lower A / D converter when D / A = 2 are overlapped and the output code for the input signal is uniquely determined, there is no problem, but the actual D Since the non-linearity error exists in the / A converter, two output codes exist for the same input signal as shown in FIG. In FIG. 2, when the input signal changes across the overlap portion, there is a possibility that a motion (distortion) different from the input signal due to discontinuity may occur somewhere in the overlap portion.

  The present invention has been made paying attention to the above-mentioned problems, and provides a series-parallel A / D converter that reduces the nonlinear distortion due to the inherent nonlinear distortion of the D / A converter, change with time, etc. For the purpose.

The series-parallel A / D converter according to the present invention includes a first A / D converter (upper A / D converter) having a sufficient dynamic range with respect to an input signal, and the first A / D converter. Based on the output of the second A / D converter (lower A / D converter) having a smaller dynamic range than the first A / D converter and the output of the first A / D converter, the output of the adder described later is the second A / D converter. A D / A converter that outputs an analog signal so as to be within the dynamic range of the A / D converter, an output of the D / A converter and the input signal are added, and the result is added to the second A An analog / digital converter comprising: an adder that inputs to a / D converter; and a control circuit that controls the first A / D converter, the second A / D converter, and the D / A converter;
The control circuit includes:
A function to capture the output of the first A / D converter;
A function of obtaining a code to be given to the D / A converter so that the output of the adder falls within the dynamic range of the second A / D converter based on the fetched output, and setting the code in the D / A converter When,
A function of determining whether the output of the second A / D converter is in an overlapping range with the adjacent dynamic range;
In response to entering the overlap range, the A / D conversion value in the current dynamic range of the second A / D converter is stored, the code given to the D / A converter is changed, and the second A / D conversion value in the dynamic range next to the A / D converter of the second A / D converter is stored, and the current dynamic range of the second A / D converter and the A / D conversion value and D / A conversion in the adjacent dynamic range are stored. A function for calculating a correction coefficient when shifting to the dynamic range adjacent to the second A / D converter from the amount of change in the code given to the device;
If the input signal changes after calculating the correction coefficient and can be handled only by the dynamic range adjacent to the second A / D converter, the correction of the calculation is performed from the A / D conversion value of the second A / D converter. A function to correct by reducing the coefficient,
It is characterized by having.

According to the present invention, since it is configured as described above , conversion can be performed without being affected by inherent errors including changes with time such as temperature drift.

  In addition, when performing FFT analysis, it is a well-known fact that if there is a discontinuity in the signal, the analysis result will be greatly affected. However, if the correction of the present invention is performed, a large dynamic range and resolution will be compatible. Thus, it is possible to eliminate signal distortion occurring between the ranges inherent to the series-parallel A / D converter.

  Hereinafter, the present invention will be described in more detail with reference to embodiments. The hardware configuration of an analog / digital converter according to an embodiment of the present invention is basically the same as the circuit shown in FIG. The circuit of this embodiment uses a CPU as the control circuit 5. The analog-to-digital converter according to this embodiment is characterized in that in the process of A / D conversion processing of an input signal, the control circuit 5 takes in the conversion output of the higher-order A / D converter 1 and takes in the higher-order A / D conversion. A function for obtaining a code so that the output of the adder 3 falls within the dynamic range of the lower A / D converter 4 based on the conversion result of the converter 1 and setting the code in the D / A converter 2; A / D conversion in the next lower A / D conversion dynamic range range by operating the A / D conversion result in the output signal of the current D / A converter 2 and the D / A converter 2 A function for calculating the difference between the results, and storing the difference value as a correction coefficient (correction value). When the input signal changes and shifts to the adjacent lower A / D conversion dynamic range range, an A / D Machine to correct D conversion result It is that it includes a.

  The conversion processing operation of this embodiment serial-parallel type analog-digital converter will be described with reference to the flowchart shown in FIG. When the processing is started, first, in step ST1, when an input signal is input, the host A / D converter 1 converts the input signal into a digital signal Di, and a rough rough input signal is taken into the control circuit 5. Subsequently, the process proceeds to step ST2.

  In step ST2, using the acquired conversion result value Di of the upper A / D converter 1, the output of the adder 3, that is, the addition output of the input signal Ai and the output of the D / A converter 2, is converted into the lower A / D. The code Dc given to the D / A converter 2 is calculated so as to be within the dynamic range of the D converter 4. Next, the process proceeds to step ST3, where the calculated code Dc is set in the D / A converter. Subsequently, the process proceeds to step ST4.

  In step ST4, it is determined whether or not the input signal Ai has changed and the conversion result of the lower A / D converter 4 has entered an overlap range with the adjacent lower conversion dynamic range. As an example, as shown in FIG. 2, when the code set in the D / A converter 2 is Dc1, the dynamic range of the low-order A / D converter 4 is DR1, and the D / A converter 2 is set. The dynamic range of the lower A / D converter 4 when the code is Dc2 is assumed to be DR2. It is assumed that the dynamic range of the low-order A / D converter 4 is DR1, and in this state, the input signal Ai changes to become the input signal A1. This input signal A1 is in the dynamic range DR1 and also in the dynamic range DR2. In other words, the overlap range has been entered. If it is determined in step ST4 that the overlap has been entered, the process proceeds to step ST5.

  In step ST5, the A / D conversion value D1 in the dynamic range DR1 of the current low-order A / D converter 4 is acquired and stored. Next, the process proceeds to step ST6. In step ST6, the code given to the D / A converter 2 is converted into C2. Then, the process proceeds to step ST7. In step ST7, the A / D conversion value D2 in the dynamic range DR2 adjacent to the lower A / D converter 4 is acquired and stored. Subsequently, the process proceeds to step ST8.

  In step ST8, from the current dynamic range DR1 and the conversion outputs D1, D2 of the lower A / D converter 4 in the adjacent dynamic range DR2 and the code change amount C1-C2 given to the D / A converter 2, the next A correction coefficient is calculated when the lower A / D converter 4 shifts to the dynamic range DR2.

  Specifically, the correction coefficient is obtained as follows.

Since the input signal strength A1 is the same, the change amount of the D / A error in the adjacent dynamic range DR2 with respect to the current D / A conversion state is
Input signal = current D / A output value + current lower A / D conversion value
= Current D / A setting code + current lower A / D conversion value = (D / A setting code in the adjacent range + D / A conversion amount error) + Lower A / D conversion value in the adjacent range. Therefore,
D / A error change amount = current D / A setting code + current lower A / D conversion value
-D / A setting code in adjacent range-Lower A / D conversion value in adjacent range This D / A error change amount is stored as a correction coefficient (correction value). Next, the process proceeds to step ST9.
In step ST9, A / D conversion processing of the input signal after calculating the correction coefficient is executed.
That is, when the correction coefficient is calculated and stored, if the input signal further changes and can be handled only by the adjacent dynamic range DR2, the correction coefficient is subtracted from the obtained lower A / D conversion value for correction. I do.

By this method, although the D / A error in the initial range remains, the distortion that occurs when the dynamic range of the lower A / D converter is switched can be eliminated.

FIG. 5 is a block diagram showing a hardware configuration of a series-parallel A / D converter according to another embodiment of the present invention. In the circuit of FIG. 1, the upper A / D converter 1 is provided on the input side and the lower A / D converter is provided on the output side.
The converter 4 and two A / D converters in hardware are used. Here, one A / D converter is used, and first, the input signal is sent from the multiplexer 16 to the A / D converter 11. In addition to
The upper A / D conversion is performed, and the upper A / D conversion value is converted into an analog value by the D / A converter 12,
In addition to one end of the input of the adder 13, the input signal is added and the multiplexer 16 is switched from only the input signal to the adder 13 side and input to the A / D converter 11, and this A / D converter 11
Then, the lower A / D conversion is performed.

Also in the serial-parallel A / D converter of this embodiment, calculation and correction processing of the correction coefficient are performed in the same manner as in FIG.

It is a block diagram which shows the hardware constitutions of the serial / parallel type A / D converter with which this invention is implemented. It is a figure explaining generation | occurrence | production of the characteristic distortion by the difference in the range of the low-order A / D converter of a serial parallel type A / D converter. It is a figure which shows the ideal characteristic which can eliminate the same characteristic distortion by the difference in the range of the low-order A / D converter of a serial parallel type A / D converter. It is a flowchart explaining the conversion process of the serial-parallel type A / D converter of embodiment of this invention. It is a block diagram which shows the circuit structure of the other embodiment serial-parallel A / D converter of this invention.

Explanation of symbols

1 Upper A / D converter 2, 12 D / A converter 3, 13 Adder 4 Lower A / D converter
5, 15 Control circuit (CPU)
11 A / D converter 16 Multiplexer

Claims (1)

A first A / D converter having a sufficient dynamic range with respect to an input signal; a second A / D converter having a smaller dynamic range than the first A / D converter; A D / A converter that outputs an analog signal based on the output of the A / D converter, so that the output of the adder described later falls within the dynamic range of the second A / D converter, and the D / A An adder that adds the output of the converter and the input signal and inputs the result to the second A / D converter, and the first and second A / D converters and D / A converters In an analog / digital converter comprising a control circuit for controlling
The control circuit includes:
A function to capture the output of the first A / D converter;
A function for obtaining a code to be given to the D / A converter so that the output of the adder falls within the dynamic range of the second A / D converter based on the fetched output, and setting the code in the D / A converter When,
A function of determining whether the output of the second A / D converter is in an overlapping range with the adjacent dynamic range;
In response to entering the overlap range, the A / D conversion value in the current dynamic range of the second A / D converter is stored, the code given to the D / A converter is changed, and the second A / D conversion value in the dynamic range next to the A / D converter of the second A / D converter is stored, and the current dynamic range of the second A / D converter and the A / D conversion value and D / A conversion in the adjacent dynamic range are stored. A function for calculating a correction coefficient when shifting to the dynamic range adjacent to the second A / D converter from the amount of change in the code given to the device;
If the input signal changes after calculating the correction coefficient and can be handled only by the dynamic range adjacent to the second A / D converter, the correction of the calculation is performed from the A / D conversion value of the second A / D converter. A function to correct by reducing the coefficient,
An analog-digital converter characterized by comprising:

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