JP4580623B2 - Compound semiconductor device and semiconductor module using the same - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a compound semiconductor element, in particular, a compound semiconductor element having a stack of a compound semiconductor layer containing Al and a compound semiconductor layer containing As and P, and a semiconductor module using the compound semiconductor element.
[0002]
[Prior art]
Due to the explosive growth of the Internet population in recent years, there is an increasing demand for an increase in information processing capacity. In a communication network having a relatively short transmission distance such as a LAN, it is predicted that a transmission rate of Gb / s level, which is a transmission rate of a trunk communication network, will be required after 5 to 10 years. The optical communication module used here is provided at a low cost in consideration of the fact that it is used by a large number of general users in addition to the performance requirement that high-speed modulation is possible as described above. This is also an essential requirement. Therefore, it is considered that a semiconductor laser having a small characteristic deterioration at a high temperature is suitable as the light source.
[0003]
Conventionally, GaInAsP formed on an InP substrate has been used in optical communication devices such as semiconductor lasers and modulators. This material is a quaternary material composed of four main constituent elements, and has a high degree of freedom in designing the band gap and lattice constant. Therefore, it is easy to introduce a desired lattice strain into the quantum well active layer in the wavelength composition of 1.3 μm and 1.55 μm bands suitable for optical communication, thereby achieving high performance of the device. It was. On the other hand, due to the material properties, the energy difference (ΔEc) between the well layer and the barrier layer in the quantum well active layer is small, so that the confinement of electrons is small and the characteristic deterioration at high temperature is remarkable. For the same reason, the gain of the active layer is small and the relaxation oscillation frequency is small. From the above, it is predicted that it will be difficult for a semiconductor laser using GaInAsP to meet future demands for higher speed and lower cost.
[0004]
On the other hand, in recent years, AlGaInAs formed on an InP substrate has been developed as a material that can drastically improve the characteristics of a semiconductor laser for communication. The quantum well active layer formed of this material has a large ΔEc compared with GaInAsP, and the characteristic deterioration at high temperature is small. Moreover, since the gain of the active layer is large, the relaxation oscillation frequency can be increased. Therefore, development of semiconductor lasers using this material has been promoted in various places. Since both GaInAsP and AlGaInAs are materials formed on an InP substrate, by introducing a flexible crystal layer configuration in which GaInAsP, which is a conventional material, is mixed into AlGaInAs, the element design flexibility is expanded, and AlGaInAs-based light It is considered that the device characteristics can be further improved.
[0005]
As an example of the technology, there is an AlGaInAs semiconductor laser structure described in FIG. 4 of JP-A-5-41562 (Patent Document 1). This structure is a structure in which a diffraction grating structure made of GaInAsP is stacked on an AlGaInAs active layer. By selecting an appropriate composition condition, the energy difference (ΔEv) in the valence band between AlGaInAs and GaInAsP can be made almost zero, so that the resistance component against holes near the diffraction grating structure is reduced, thereby reducing the low voltage Expected to work with
[0006]
Another example of the technology is a semiconductor laser using GaInNAs formed on a GaAs substrate as an active layer. GaInNAs is also a semiconductor material that has been developed in recent years, but it can be expected to be a very promising material in further increasing the speed of the semiconductor laser because it can achieve a larger ΔEc in the active layer compared to AlGaInAs. On the other hand, since this material has a problem that the light emission characteristics are lowered as the N composition increases, the In composition is increased in order to adapt the oscillation wavelength to the 1.3 μm band. As a result, a GaInNAs layer having a compressive strain as high as 2% is used for the quantum well layer of the present laser. Since this large lattice strain may affect the performance and long-term reliability of the device, an attempt to compensate for the lattice strain of the entire device by introducing a material containing P having tensile strain as the light guide layer Is made. For example, in the example described on page 33 of the 2002 International Semiconductor Laser Conference proceeding, a tensile strained layer made of GaAsP is introduced between a GaAs barrier layer and an AlGaAs cladding layer to realize laser oscillation at a low threshold. (Non-Patent Document 1). That is, a laminated structure of AlGaAs and GaAsP is used, thereby improving device performance.
[0007]
As described above, it is expected that the performance of the conventional element can be improved by the laminated structure in which the compound semiconductor layer containing Al and the compound semiconductor layer containing As and P are combined, and two examples are given. It goes without saying that such a laminated structure can be applied to many other devices not described here and contribute to improvement of characteristics. Further, although only a semiconductor laser has been described as an element, the present invention is not limited to this as long as the present laminated structure is applied.
[0008]
[Patent Document 1]
Japanese Patent Laid-Open No. 5-41562 (FIG. 4)
[Non-Patent Document 1]
2002 International Semiconductor Laser Conference Proceedings (page 33)
[0009]
[Problems to be solved by the invention]
The present invention is to obtain a high-quality stacked structure of a compound semiconductor layer containing at least Al and a compound semiconductor layer containing at least As and P. Furthermore, an object of the present invention is to provide a high-performance compound semiconductor device that exceeds the conventional device by the obtained high-quality laminated structure. As one example of the device application, a semiconductor laser capable of high-speed operation is to be provided.
[0010]
Still another object of the present invention is to provide a semiconductor module equipped with a semiconductor element that can operate at a lower voltage.
[0011]
In order to cope with such problems, technically, it is necessary to solve the following problems in a stacked structure of a compound semiconductor layer containing at least Al and a compound semiconductor layer containing at least As and P. Since the compound semiconductor layer containing Al has high activity, it is necessary to increase the growth temperature (˜700 ° C.) in order to avoid mixing impurities such as oxygen and to obtain a high-quality film. On the other hand, in the compound semiconductor layer containing As and P, since P is more easily detached from the film surface than As, in particular, it is easier to obtain a high quality film in terms of composition control and surface morphology by relatively low temperature growth. (~ 600 ° C). Due to such differences in material properties, it has not been easy to produce a high-quality multilayer structure of a compound semiconductor layer containing Al and a compound semiconductor layer containing As and P. Conventionally, the growth was interrupted in order to grow each layer at the optimum temperature. The interruption of growth may deteriorate the crystal quality and surface state of the laminated structure. The reason is described below. In the case where the compound semiconductor layer containing As and P is stacked on the compound semiconductor layer containing Al, the growth was interrupted between the two layers and the temperature was lowered from 700 ° C. to 600 ° C. At that time, impurities and the like are attached and mixed in the surface and film of the compound semiconductor layer containing active Al, resulting in deterioration of the surface state and crystal quality. Conversely, when a compound semiconductor layer containing Al is stacked on a compound semiconductor layer containing As and P, the growth is interrupted between the two layers and the temperature is raised from 600 ° C. to 700 ° C. At that time, P atoms were desorbed from the surface of the compound semiconductor layer containing As and P, resulting in deterioration of the surface state and deterioration of crystal quality due to composition change. Therefore, it is not easy to obtain a high-quality laminated structure by using a conventional method using growth interruption.
[0012]
[Means for Solving the Problems]
The basic configuration of the present invention is as follows. That is, a semiconductor element comprising a semiconductor substrate and a semiconductor multilayer structure formed on the semiconductor substrate, wherein the semiconductor multilayer structure is a first semiconductor, a second semiconductor, and a third semiconductor located in the middle thereof. The semiconductor multilayer structure includes at least one set of semiconductor layer stacks composed of layers and includes a semiconductor layer stack region that constitutes an active region of the semiconductor element. In other words, a predetermined stack of the semiconductor multilayer structures serves as an active region of the semiconductor element. The first semiconductor layer is a compound semiconductor layer containing at least Al as an essential constituent element. The second semiconductor layer is a compound semiconductor layer containing at least As and P as essential constituent elements. The third semiconductor layer is a compound semiconductor layer that contains at least Al and P in a part or all of the third semiconductor layer and the mixed crystal composition changes in a gradient or stepwise manner. The mixed crystal composition of the third semiconductor layer is generally graded or stepped in consideration of the energy band change between the first semiconductor layer and the second semiconductor layer existing between this layer and the lattice constant. Change.
[0013]
As the semiconductor substrate, a substrate used for a compound semiconductor element is sufficient. A typical example is an InP substrate or a GaAs substrate.
[0014]
A typical example of the first semiconductor layer is a group selected from the group consisting of III-V compound semiconductor materials, particularly AlGaInAs, AlInAs, AlGaAs, and AlAs.
[0015]
A typical example of the second semiconductor layer is a group selected from the group of III-V compound semiconductor materials, particularly GaInAsP, GaAsP, and InAsP.
[0016]
A representative example of the third semiconductor layer is a group III-V compound semiconductor material, particularly (Al_xGa_1-x)_yIn_1-yAs_zP_1-zIt is a compound semiconductor material layer represented by (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, where x + y + z ≠ 0).
[0017]
A specific composition is selected according to the requirement for using the semiconductor multilayer laminate applied to the present invention as an electronic device or an optical device. The semiconductor multilayer stack is set in consideration of securing device characteristics while securing lattice matching conditions.
[0018]
Furthermore, it is useful from the practical viewpoint of ensuring crystallinity of each layer that the degree of mismatch of the lattice constants of the first, second, and third semiconductor layers is less than 0.5%. .
[0019]
In the AlGaInAs distributed feedback laser shown in FIG. 1, the present invention is applied at 107 to 109. At this time, the energy at the top of the valence band in each of the first, second, and third semiconductor layers. It is useful from the viewpoint of securing the device characteristics that the difference is 10 meV or less.
[0020]
In another example, as shown in FIG. 5, GaInNAs semiconductor laser elements 403 to 405 and 407 to 409 are applied. Here, the first and second semiconductor layers are each a type I band. It has a structure. At that time, it is desirable that the energy of the conduction band and the valence band of the third semiconductor layer is decreased from the layer having the larger band gap to the layer having the smaller band gap among the first and second semiconductor layers. Thus, an energy band structure that smoothly connects the energy difference between the conductor and the valence band between the first and second semiconductor layers is achieved. Thus, the characteristics of the compound semiconductor device according to the present invention can be improved. For example, in a semiconductor laser, device characteristics such as threshold current, device resistance, and device life can be improved.
[0021]
Thus, the various compound semiconductor devices can be operated at a low voltage and can be driven by a 3.3 V power source which is a usual power source standard. Thereby, a practical semiconductor module with low power consumption can be provided.
[0022]
DETAILED DESCRIPTION OF THE INVENTION
Prior to describing specific embodiments, details of the basic idea of the present invention will be additionally described.
[0023]
In order to obtain a high-quality stacked structure of a compound semiconductor layer containing at least Al and a compound semiconductor layer containing at least As and P, it is necessary to eliminate the growth interruption due to the difference in growth temperature between the two layers. For this purpose, it is effective to introduce an intermediate layer for changing the growth temperature between the two layers.
[0024]
In the intermediate layer, the Al composition and the P composition are changed gradually or stepwise. For example, by performing an appropriate composition change as described in a specific example in the section of the following embodiment, deterioration of crystal quality due to growth of a layer containing Al at a low temperature, and As and P are included. It is possible to greatly suppress adverse effects on crystal quality deterioration and composition control due to the growth of the layer at a high temperature.
[0025]
Furthermore, in order to avoid deterioration of device characteristics, it is also a necessary requirement as an intermediate layer that there is a degree of freedom in design on the crystal growth surface and energy band structure surface.
[0026]
As the intermediate layer that achieves this object, a compound semiconductor layer in which at least part of or all of Al and P is used and the mixed crystal composition changes in a gradient or stepwise manner may be used. I found a thing. For example, if an AlGaInAsP layer, which is a ternary material, is used as the intermediate layer material, an energy band structure that does not deteriorate the device characteristics while maintaining the lattice matching condition even if the composition is changed in a graded or stepwise manner is realized. It becomes possible to do. Here, “part of the intermediate layer” means a part of the thickness region in the crystal growth direction.
[0027]
Hereinafter, specific embodiments of the present invention will be described.
[0028]
<Embodiment 1>
As a first embodiment of the invention, a low resistance AlGaInAs distributed feedback laser according to the present invention will be specifically described. A cross-sectional view of the distributed feedback laser element in a plane parallel to the traveling direction of the laser beam is shown in FIG. This example is an example having one set of semiconductor stacks 1 of the first, third, and second semiconductor layers of the present invention. FIG. 2 is a cross-sectional view according to the manufacturing process, and is a cross-sectional view taken along a plane perpendicular to the traveling direction of the laser beam.
[0029]
Here, the growth method is a metal organic chemical vapor deposition (MOCVD) method. In the MOCVD method, triethylgallium (TEG), trimethylindium (TMI), and trimethylaluminum (TMAl) are used as a group III element supply source, and arsine (AsH) is used as a group V element supply source.₃) And phosphine (PH₃) Was used. Also, disilane (Si₂H₆), Dimethyl zinc (DMZn) was used as an introduction gas for p-type impurities. However, since the effects of the present invention can be obtained if a similar structure can be formed, the growth method and raw materials are not limited to those described here. For example, PH₃Since the decomposition efficiency is easily affected by the growth temperature, the use of an organic group V raw material (for example, tert-butylphosphine) that is not easily affected by the growth temperature is more dependent on the composition gradient layer of the present invention. It is valid.
[0030]
The semiconductor substrate is an n-type InP (100) substrate 101 (n-type doping concentration = 1 × 10¹⁸cm^{- 3}) Was used. PH₃After raising the temperature of the substrate in the atmosphere, the n-type InP cladding layer 102 (n-type impurity concentration = 1 × 10 5) having a thickness of 500 nm is used as the first crystal growth step at a substrate temperature of 600 ° C.¹⁸cm^{- 3}) Started growing. Thereafter, an n-type AlInAs cladding layer 103 having a thickness of 50 nm (n-type impurity concentration = 1 × 10¹⁸cm^{- 3}) Grew up. Further, an n-type AlGaInAs light guide layer 104 having a thickness of 50 nm (n-type doping concentration = 1 × 10 6¹⁸cm^{- 3}), A multiple quantum well layer 105 (period number: 10) composed of a non-doped AlGaInAs barrier layer having a thickness of 10 nm and a non-doped AlGaInAs well layer having a thickness of 6 nm, a p-type AlGaInAs light guide layer 106 having a thickness of 50 nm (p-type doping concentration = 1 × 10¹⁷cm^{- 3}), P-type AlInAs cladding layer 107 having a thickness of 50 nm (p-type impurity concentration = 1 × 10¹⁸cm^{- 3}) Grew sequentially. The substrate temperature reached 700 ° C. in the first n-type InP cladding layer 102, and then maintained at 700 ° C. in the Al-containing layer. Subsequently, a p-type AlGaInAsP composition gradient layer 108 having a thickness of 20 nm (p-type impurity concentration = 1 × 10 6), which is the most important layer according to the present invention.¹⁸cm^{- 3}), During which the growth temperature was lowered from 700 ° C. to 600 ° C. Therefore, growth interruption was unnecessary. Details of the composition change will be described later. Subsequently, the p-type GaInAsP diffraction grating layer 109 (p-type impurity concentration = 1 × 10¹⁸cm^{- 3}), P-type InP cap layer (p-type impurity concentration = 1 × 10¹⁸cm^{- 3}) 115 is formed, and the first crystal growth step is completed (FIG. 2A).
[0031]
In this example, the p-type AlInAs cladding layer 107, the p-type AlGaInAsP composition gradient layer 108, and the p-type GaInAsP diffraction grating layer 109 are respectively the first semiconductor layer, the third semiconductor layer in the general description, It corresponds to the second semiconductor layer and constitutes the semiconductor stack 1 of the present invention. In this example, the second semiconductor layer is a layer that forms a diffraction grating, but needless to say, it is not necessarily a layer that forms a layer that forms a diffraction grating.
[0032]
Here, the details of the composition change in the p-type AlGaInAsP composition gradient layer 108 will be described. In order to suppress the influence of the crystallinity reduction due to the growth temperature change, the Al composition gradually decreases and the P composition gradually increases from the p-type AlInAs cladding layer 107 side toward the p-type GaInAsP diffraction grating layer 109 side. Is desirable. That is, Al contained in the first semiconductor layer is decreased gradually or stepwise toward the second semiconductor layer not containing the Al. Furthermore, P which the first semiconductor layer does not contain is gradually or stepwise increased toward the second semiconductor layer containing the P.
[0033]
Further, as described in the prior art, the reason why low voltage operation is expected in this laser structure is that ΔEv between the p-type AlInAs cladding layer 107 and the p-type GaInAsP diffraction grating layer 109 is almost zero. is doing. Therefore, also in the p-type AlGaInAsP composition gradient layer 108 to be introduced, it is necessary to maintain the condition that ΔEv between the layers on both sides is almost 0 from the viewpoint of the energy band structure. Furthermore, as described above, when the difference in lattice constant between the layers on both sides is increased, a large number of lattice mismatch dislocations are generated and the crystallinity is deteriorated. Therefore, it is a necessary requirement that the degree of lattice mismatch is small.
[0034]
In particular, the AlGaInAsP layer, which is a ternary material, can simultaneously satisfy the above two conditions. The composition change of the p-type AlInAs cladding layer 107 and the p-type AlGaInAsP composition gradient layer 108 is shown in FIG. Here, the p-type AlGaInAsP composition graded layer 108 is an example in which ΔEv with the p-type GaInAsP diffraction grating layer 109 is ± 10 meV or less and the degree of lattice mismatch is ± 0.1% or less. As a result, the composition change is such that the elemental compositions of the layers on both sides of the composition gradient layer 108 are connected by a substantially straight line, and control is easy.
[0035]
Since the Al composition is gradually reduced from the p-type AlInAs cladding layer 107 side toward the p-type GaInAsP diffraction grating layer 109 side, the quality deterioration of the crystal containing Al due to the lowering of the growth temperature can be largely suppressed. . On the other hand, since the P composition is gradually increased, the effects of significant P atom desorption and composition shift on the high temperature side can be greatly suppressed. Therefore, it is possible to realize a semiconductor multilayer structure including a high-quality compound semiconductor layer containing Al and a compound semiconductor layer containing As and P that does not deteriorate the device characteristics in terms of crystal growth and energy band structure. It was.
[0036]
Subsequently, the p-type InP cap layer 115 provided for protecting the crystal layer was removed.
The multilayer growth wafer thus prepared was subjected to a process step for producing a diffraction grating. A diffraction grating pattern was formed by the interference exposure method, and etching was performed using the pattern as a mask to form a diffraction grating.
[0037]
Thereafter, the second crystal growth process was started. PH₃After raising the temperature of the substrate in the atmosphere, the p-type InP cladding layer 110 having a thickness of 1500 nm (p-type impurity concentration = 1 × 10¹⁸cm^{- 3}), P-type GaInAs cladding layer 111 having a thickness of 100 nm (p-type impurity concentration = 1 × 10¹⁹cm^{- 3}) Grew in the order. Finally, a p-type InP cap layer with a thickness of 100 nm for protecting the contact layer (p-type doping concentration = 1 × 10¹⁸cm^{- 3}) 116 is formed, and the second crystal growth step is completed (FIG. 2B).
[0038]
A plurality of semiconductor element portions are formed on the aforementioned semiconductor wafer (substrate). The p-type InP cap layer 116 provided for protecting the crystal layer is removed from such a semiconductor wafer, and then a usual stripe structure manufacturing process (FIG. 2C), and a process and electrode for embedding the stripe structure The device was completed through the manufacturing process (FIG. 2D). In FIG. 2, reference numeral 120 denotes a buried layer, 112 denotes an insulating film, 113 denotes an upper electrode, and 114 denotes a lower (substrate side) electrode. It goes without saying that various techniques of a conventional distributed feedback semiconductor laser device can be used, such as providing a pn junction or the like in the buried layer 120 to take a leakage current blocking structure, or using a passivation film for protecting an end face.
[0039]
The fabricated device oscillated at a threshold current of 18 mA and exhibited good laser oscillation characteristics up to a high temperature of 85 ° C. Further, the resistance of the element is 8 ohms, and the resistance can be greatly reduced as compared with the conventional element. As a result, low voltage operation was possible during high-speed modulation of 10 Gb / s by direct modulation. Further, the heat generation of the element was small and the life was long.
[0040]
An optical transmission module was manufactured using the compound semiconductor element thus prepared. FIG. 4 shows an example of the circuit configuration. Here, 301 is a laser diode according to the present invention, 302 is a driver IC, and 303 is a bias circuit. Since this laser diode had low element resistance and could reduce the operating voltage, it could be driven with a power supply voltage (Vcc) of 3.3V. Compared with a conventional optical transmission module operating with a 5V power supply, low power consumption was possible. In addition, this module was able to ensure a long life like the device.
[0041]
<Embodiment 2>
This example is an example in which the semiconductor stack of the first, second, and third semiconductor layers of the present invention has two sets (reference numerals 2, 3).
[0042]
The GaInNAs semiconductor laser device according to the present invention will be specifically described. The element structure is shown in FIG. Here, an example is shown in which a GaInAsP layer is introduced instead of the GaAsP layer described in the prior art. The purpose is to introduce a layer having a tensile strain to compensate for the strain of the entire device. When GaInNAs is used for the active layer, a growth method in a non-equilibrium state is advantageous in introducing N. Therefore, in addition to the MOCVD method, a molecular beam epitaxy (MBE) method or the like is suitable as a growth method. Here, the growth method was a solid source MBE (SS-MBE) method. Since the steps such as the creation of the stripe structure for the laser device are the same as those in the first embodiment, detailed description thereof is omitted.
[0043]
In the SS-MBE method, gallium (Ga) and indium (In) were used as the group III element supply source, and metal As was used as the group V element supply source for arsenic (As). Further, silicon (Si) is used as an n-type impurity, and carbon tetrabromide (CBr) is used as an impurity material that can be p-type doped at high concentration.₄)Using. If a similar doping concentration can be achieved, beryllium (Be) or zinc (Zn) may be used as the p-type impurity. N for nitrogen (N)₂N radicals in which the gas was RF plasma excited were used. The excitation of nitrogen plasma can also be performed using ECR (Electron Cyclotron Resonance) plasma. Of course, if a similar structure can be formed as an element structure, the effects of the present invention can be obtained, and the growth method and raw materials are not limited to those described here.
[0044]
The semiconductor substrate is an n-type GaAs substrate 401 whose main surface is the (100) plane (n-type doping concentration = 2 × 10¹⁸cm^{- 3}) Was used. After raising the temperature of the substrate in an As atmosphere, the n-type GaAs buffer layer 402 (n-type impurity concentration = 1 × 10 5) having a thickness of 500 nm at a substrate temperature of 600 ° C.¹⁸cm^{- 3}) Started growing. Thereafter, an n-type AlGaAs cladding layer 403 having a thickness of 1300 nm (n-type impurity concentration = 1 × 10¹⁸cm^{- 3}) Grew up. The substrate temperature reached 700 ° C. in the first n-type GaAs buffer layer 402 and then kept at 700 ° C. in the n-type AlGaAs cladding layer 403.
[0045]
Subsequently, the n-type AlGaInAsP composition gradient layer 404 (n-type impurity concentration = 1 × 10 4) having a thickness of 100 nm, which is one of the most important layers according to the present invention.¹⁸cm^{- 3}), During which the growth temperature was lowered from 700 ° C. to 500 ° C. Therefore, growth interruption was unnecessary. Details of the composition change will be described later.
[0046]
Further, an n-type GaInAsP light guide layer 405 having a thickness of 50 nm (n-type doping concentration = 1 × 10¹⁸cm^{- 3}), A multi-quantum well layer 406 (period number: 3) composed of a non-doped GaAs barrier layer having a thickness of 10 nm and a non-doped GaInNAs well layer having a thickness of 6 nm, a p-type GaInAsP light guide layer 407 having a thickness of 50 nm (p-type doping concentration = 1 × 10¹⁷cm^{- 3}) Was formed.
[0047]
Subsequently, a p-type AlGaInAsP composition gradient layer 408 (p-type impurity concentration = 1 × 10 4) having a thickness of 100 nm, which is one of the most important layers according to the present invention.¹⁸cm^{- 3}) And the growth temperature was raised from 500 ° C. to 700 ° C. during this period. Therefore, the growth interruption was not necessary here either.
[0048]
Subsequently, a p-type AlGaAs cladding layer 409 (p-type impurity concentration = 1 × 10¹⁸cm^{- 3}), P-type GaAs contact layer 410 (p-type impurity concentration = 1 × 10¹⁹cm^{- 3}) To complete the crystal growth process.
[0049]
As described above, this example is an example in which the semiconductor stack of the first, third, and second semiconductor layers of the present invention in the general description has two sets. The cladding layer 403, the composition gradient layer 404, and the light guide layer 405 are first, third, and second semiconductor layers, respectively, and constitute a set of semiconductor stacks 2. Furthermore, in another set of semiconductor stacks 3, the light guide layer 407, the composition gradient layer 408, and the clad layer 409 are first, third, and second semiconductor layers, respectively. The active region of the GaInNAs semiconductor laser element of this example is a multiple quantum well layer 406, and the regions of the two semiconductor stacks correspond to the regions of the cladding layer and the light guide layer of the laser device. Thus, the present invention relates to the stacking of semiconductor layers.
[0050]
Next, details of the composition change in the n-type AlGaInAsP composition gradient layer 404 and the p-type AlGaInAsP composition gradient layer 408 will be described.
[0051]
In order to suppress the influence of the decrease in crystallinity due to the growth temperature change, it is desirable that the Al composition gradually decrease and the P composition gradually increase from the AlGaAs cladding layer side toward the GaInAsP light guide layer side.
[0052]
In addition, since AlGaAs and InGaAsP effectively confine carriers in the active layer, both the conduction band and valence band energy of AlGaAs form a so-called type I heterostructure that is larger than InGaAsP. The graded layer is desired to have an energy band structure that smoothly connects the energy difference between the conductor and the valence band from AlGaAs having a large band gap toward the InGaAsP side having a small band gap.
Furthermore, when the lattice constant difference between the AlGaInAsP composition gradient layer and the AlGaAs cladding layer or the GaInAsP light guide layer increases, a large number of lattice mismatch dislocations occur and the crystallinity deteriorates. Therefore, a small difference in lattice constant between the AlGaInAsP composition gradient layer and the layers on both sides is also a necessary requirement.
[0053]
In the AlGaInAsP layer which is a ternary material, the above two conditions can be satisfied simultaneously. An AlGaInAsP composition graded layer that smoothly connects the conductor between the AlGaAs cladding layer and the GaInAsP light guide layer and the energy difference between the valence bands and satisfies the condition that the degree of lattice mismatch between the two layers is ± 0.1% or less. The composition change is shown in FIG. As a result, the composition changes so that the elemental compositions of the layers on both sides are connected by a substantially straight line, and control is easy. Since the Al composition is gradually lowered from the AlGaAs cladding layer side toward the GaInAsP light guide layer side, the quality deterioration of the crystal containing Al due to the growth temperature being lowered during this period can be largely suppressed. On the other hand, the P composition is gradually increased, and the effects of significant P atom desorption and composition shift on the high temperature side can be greatly suppressed. Thus, a high-quality compound semiconductor layer containing Al and a compound semiconductor layer containing As and P that do not deteriorate device characteristics from the point of crystal growth and energy band structure can be realized.
[0054]
A plurality of semiconductor element portions are formed on the aforementioned semiconductor wafer (substrate). Such a semiconductor wafer was completed as a Fabry-Perot type semiconductor laser device through a conventional stripe structure manufacturing process, a process of embedding this stripe structure, and an electrode manufacturing process. Since the basic process of the embedded structure is the same as that shown in the first embodiment, detailed description is omitted.
[0055]
The fabricated Fabry-Perot type semiconductor laser device oscillated at a threshold current of 10 mA, and showed good laser oscillation characteristics up to a high temperature of 85 ° C. Moreover, the high-speed modulation characteristic exceeding 10 Gb / s was shown. Moreover, the long-term reliability was also excellent by reducing the average strain amount of the entire layer.
[0056]
As described above, various examples of the laminated structure of the compound semiconductor layer containing high-quality Al and the compound semiconductor layer containing As and P according to the present invention have been described. It goes without saying that the laminated structure according to the present invention can be applied to many other semiconductor elements not exemplified here. Further, only the semiconductor laser element is mentioned as the compound semiconductor element of the present invention. However, the compound semiconductor element is not limited to this as long as it is formed by applying the present laminated structure. For example, the present invention can also be applied to compound semiconductor electronic devices such as high mobility transistors and heterobipolar transistors. Then, it is possible to provide a semiconductor module with high performance, low power consumption, and long life by using it.
[0057]
According to the present invention, as an intermediate layer between a compound semiconductor layer containing Al and a compound semiconductor layer containing As and P, at least part of or all of Al and P is used, and the mixed crystal composition is inclined. By providing a compound semiconductor layer that changes in a stepwise or stepwise manner, a high-quality stacked structure can be obtained. Thereby, excellent device characteristics can be realized. As specific examples, an example in which a low-resistance element is realized in a distributed feedback semiconductor laser element using AlGaInAs and an example in which the lattice distortion of the entire element is reduced in a GaInAs semiconductor laser element have been described in detail. By using this semiconductor laser element, an optical transmission module that operates at a low voltage can be provided. Furthermore, the semiconductor laser device according to the present invention can be provided at low cost.
[0058]
【The invention's effect】
The present invention can provide a high-quality stacked structure of a compound semiconductor layer containing at least Al and a compound semiconductor layer containing at least As and P. Furthermore, a high-performance compound semiconductor device that exceeds the conventional device can be provided by the obtained high-quality laminated structure. One example of the element application is a low-cost semiconductor laser device capable of high-speed operation.
[0059]
Furthermore, the present invention can provide a semiconductor module equipped with a compound semiconductor element that can operate at a lower voltage.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a main part of an AlGaInAs distributed feedback laser apparatus according to the present invention on a plane parallel to the traveling direction of laser light.
2 is a cross-sectional view of the apparatus shown in the order of steps for manufacturing the distributed feedback laser apparatus of FIG. 1 on a plane orthogonal to the traveling direction of laser light.
FIG. 3 is a view showing a composition change in a composition gradient layer in the element of FIG. 1;
FIG. 4 is a diagram illustrating a circuit configuration example of a semiconductor module.
FIG. 5 is a cross-sectional view of a main part of a GaInNAs semiconductor laser device according to the present invention on a plane parallel to the traveling direction of laser light.
6 is a view showing a composition change in a composition gradient layer in the element of FIG. 5; FIG.
[Explanation of symbols]
1, 2: 3, semiconductor stack having first, third, and second semiconductor layers, 101: n-type InP (100) substrate, 102: n-type InP clad layer, 103: n-type AlInAs clad layer, 104: n-type AlGaInAs light guide layer, 105: AlGaInAs multiple quantum well layer, 106: p-type AlGaInAs light guide layer, 107: p-type AlInAs cladding layer, 108: p-type AlGaInAsP composition gradient layer, 109: p-type GaInAsP diffraction grating layer, 110: p-type InP clad layer, 111: p-type GaInAs clad layer, 112: insulating film, 113: upper electrode, 114: lower electrode, 120: buried layer, 301: laser diode, 302: driver IC, 303: bias circuit 401: n-type GaAs substrate 402: n-type GaAs buffer: layer 403: Type AlGaAs cladding layer, 404: n-type AlGaInAsP composition gradient layer, 405: n-type GaInAsP light guide layer, 406: GaInNAs / GaAs multiple quantum well layer, 407: p-type GaInAsP light guide layer, 408: p-type AlGaInAsP composition gradient layer 409: p-type AlGaAs cladding layer, 410: p-type GaAs contact layer.

Claims (14)

A semiconductor substrate and a semiconductor multilayer structure formed on the substrate;
The semiconductor multilayer structure has at least one semiconductor layer stack composed of a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer positioned between them, and constitutes an active region of the compound semiconductor element. Including areas,
The first semiconductor layer is a compound semiconductor layer that does not contain P and contains Al,
The second semiconductor layer is a compound semiconductor layer that does not contain Al and contains As and P;
The third semiconductor layer is a compound semiconductor layer containing Al and P in a part or all of the third semiconductor layer and the mixed crystal composition changing in a gradient or stepwise manner. Semiconductor element. The first semiconductor layer is one selected from the group of AlGaInAs, AlInAs, AlGaAs, and AlAs, and the second semiconductor layer is one selected from the group of GaInAsP, GaAsP, and InAsP; in 3 of the semiconductor layer _{(Al x Ga 1-x)} y in 1-y As z P 1-z (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ z ≦ 1, however, x + y + z ≠ 0 ) The compound semiconductor device according to claim 1, wherein the compound semiconductor material layer is represented.   2. The compound semiconductor device according to claim 1, wherein the lattice constant mismatch degree of the first, second, and third semiconductor layers is less than 0.5%.   3. The compound semiconductor device according to claim 2, wherein a degree of mismatch of lattice constants of the first, second, and third semiconductor layers is less than 0.5%.   3. The compound semiconductor device according to claim 2, wherein the energy difference at the top of the valence band in the first, second, and third semiconductor layers is 10 meV or less.   4. The compound semiconductor device according to claim 3, wherein an energy difference at the top of the valence band in each of the first, second, and third semiconductor layers is 10 meV or less.   The first and second semiconductor layers have a type I band structure, and the conduction band and valence band energy of the third semiconductor layer has a band gap of the first and second semiconductor layers. The compound semiconductor element according to claim 2, wherein the compound semiconductor element decreases from a large layer toward a small layer.   The first and second semiconductor layers have a type I band structure, and the conduction band and valence band energy of the third semiconductor layer has a band gap of the first and second semiconductor layers. The compound semiconductor element according to claim 3, wherein the compound semiconductor element decreases from a large layer toward a small layer.   2. The compound semiconductor device according to claim 1, comprising a plurality of semiconductor layer stacks composed of the first, second, and third semiconductor layers located in the middle thereof. The semiconductor multilayer structure has a multiple quantum well layer, a first cladding region on the substrate side of the multiple quantum well layer, and a second cladding region on the opposite side of the substrate of the multiple quantum well layer. ,
The semiconductor layer stack composed of the first, second, and third semiconductor layers located between them constitutes a part of the second cladding region;
2. The compound semiconductor device according to claim 1, wherein the second semiconductor layer has a light feedback means and can emit semiconductor light. The semiconductor multilayer structure has a multiple quantum well layer, a first cladding region on the substrate side of the multiple quantum well layer, and a second cladding region on the opposite side of the substrate of the multiple quantum well layer. ,
The first cladding region has a first semiconductor layer stack composed of at least a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer located between them,
2. The semiconductor device according to claim 1, wherein the second cladding region has a second semiconductor layer stack including at least a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer located between the first semiconductor layer and the third semiconductor layer. 2. The compound semiconductor device according to 1. The first semiconductor layer of the first semiconductor layer stack is a clad layer on the substrate side, the second semiconductor layer of the first semiconductor layer stack is a light guide layer on the substrate side, and the second The first semiconductor layer of the semiconductor layer stack is a cladding layer opposite to the substrate with respect to the multiple quantum well layer, and the second semiconductor layer of the second semiconductor layer stack is the multiple quantum well layer. The compound semiconductor device according to claim 11, wherein the compound semiconductor device is a light guide layer opposite to the substrate. A semiconductor substrate and a semiconductor multilayer structure formed on the substrate;
The semiconductor multilayer structure has at least one semiconductor layer stack composed of a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer positioned between them, and constitutes an active region of the compound semiconductor element. Including areas,
The first semiconductor layer is a compound semiconductor layer that does not contain P and contains Al,
The second semiconductor layer is a compound semiconductor layer that does not contain Al and contains As and P;
The third semiconductor layer has a compound semiconductor element that is a compound semiconductor layer that contains Al and P in part or all of the third semiconductor layer and the mixed crystal composition changes in a gradient or stepwise manner. A semiconductor module characterized in that the compound semiconductor element can be driven by a 3.3 V power source. The first semiconductor layer is one selected from the group of AlGaInAs, AlInAs, AlGaAs, and AlAs, and the second semiconductor layer is one selected from the group of GaInAsP, GaAsP, and InAsP; Table 3 of the semiconductor layer _{(Al x Ga 1-x)} y in 1-y As z P 1-z (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ z ≦ 1 , however, x + y + z ≠ 0 ) The semiconductor module according to claim 13, wherein the semiconductor module is a compound semiconductor material layer.

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