JP4550709B2 - Pulse counter - Google Patents

Description

  The present invention relates to a pulse counter that counts pulses indirectly output from another device, for example, a watt hour meter, and digitizes an integrated power amount.

  The integrated power amount can be displayed by a watt-hour meter. However, in this display, for example, the remote monitoring of the integrated power amount cannot be performed. In addition, the amount of power used cannot be controlled by monitoring the integrated power amount. Therefore, in order to digitize the integrated electric energy, a pulse counter that counts pulses indirectly output from the watt-hour meter is used. Therefore, when performing remote monitoring of the integrated electric energy and controlling the used electric energy, the output corresponding to the integrated electric energy from the pulse counter should be transmitted to the target monitoring or control target location. That's fine.

  By the way, the watt-hour meter is provided with a non-voltage contact, for example, an open collector transistor, so that the pulse output from the collector which is one end of the output terminal is input, The input terminal provided in the counter is connected by a cable, and the pulse counter is connected between one end of the input terminal and the control power supply, and is provided with a load circuit composed of a resistor in order to flow current to the collector. ing. That is, when a pulse signal is input to the base of the transistor, a current flows from the control power source to the collector through the load circuit and the cable during the ON period of this pulse. A pulse counter to which a pulse output from an open collector is input as described above is disclosed in Patent Document 1, for example. The no-voltage contact is a contact that is connected and operates as described above.

  Therefore, when a pulse counter is newly provided, the configuration is as shown in FIG. 3A, and the output terminal PMo of the watt-hour meter PM and the input terminal PCi ′ of the pulse counter PC ′ are connected by a cable CB. .

  In addition, when a pulse counter is added, for example, when the amount of power used is controlled in addition to the remote monitoring of the integrated power amount, the configuration is as shown in FIG. In this case, since the input terminal PC1i 'of the first pulse counter PC1' already provided and the output terminal PMo of the watt hour meter PM are connected, the current transformer CT for detecting the current flowing through the cable CB1 is provided. Will be provided. In order to cope with this, both ends of the input terminal PC2i 'and the output terminal CTo of the current transformer CT are connected to the second pulse counter PC2' by the cable CB2 and both ends of the input terminal PC2i '. A resistor R2 'connected to is provided as a burden on the current transformer CT. That is, when a pulse signal is input to the base of the open collector transistor Tro provided in the watt-hour meter PM, the control power source (not shown) of the first pulse counter PC1 ' A current flows through the collector via the resistor R1 ′, which is a load circuit, and the cable CB1, and since no current flows through the collector during the OFF period, a pulse voltage is generated at the collector. In addition, a pulse voltage is generated in a resistor R2 ′ provided as a burden on the current transformer CT.

The first and second pulse counters PC1 'and PC2' are provided with counter circuits CN1 'and CN2', respectively.
JP-A-4-160490 (FIGS. 3 to 5)

  Conventionally, if a pulse counter is to be added, a pulse counter that uses an input method different from that of an existing pulse counter is required, and the manufacturer of the pulse counter must prepare two types of pulse counters with different input methods. The problem of not becoming. Moreover, since the input method of the added pulse counter is a current transformer, the pulse width of the pulse current detected by the current transformer is small, that is, the pulse width of the pulse voltage generated at the load of the current transformer is small. Thus, there is a problem that such pulses are not counted.

  An object of the present invention is to provide a pulse counter in which different pulse input methods are used in common.

  1st invention is output from the non-voltage contact provided in the cable connected to the output terminal of the other apparatus from which the pulse is output from the non-voltage contact provided in the other apparatus, or another apparatus A common input terminal that is connected via a cable connected to the output terminal of an external current transformer so that pulses can be detected, and an output from another device that is connected to the common input terminal Alternatively, the common input circuit adapted to correspond to any of the outputs from the current transformer, the comparator circuit to which the output of the common input circuit and the set reference voltage are input, and the H level of the output of the comparator circuit Hold circuit, a reset circuit for resetting the output of the comparator circuit held by the hold circuit, and an output of the comparator circuit held by the hold circuit. A level determination unit that determines a level, a reset signal generation unit that outputs a reset signal to the reset circuit when an H level determination signal is output from the level determination unit, and a count unit that counts the H level determination signal It is a thing.

  According to a second aspect of the present invention, in the common input circuit, when the output terminal of another device is connected to the common input terminal via a cable, the reference voltage for setting the voltage generated at the common input terminal at the falling edge of the pulse is set. If the output terminal of an external current transformer is connected to the common input terminal via a cable, the voltage generated at the common input terminal is set at the rising edge of the pulse. The output is made so as to be equal to or higher than the reference voltage.

  As described above, according to the first aspect of the invention, since the input methods with different pulses are made common, it is possible to prevent complication of manufacturing. Further, it is possible to eliminate the need to confirm the installation status for the user.

  According to the second invention, since the input pulse is pulse-formed to increase the pulse width, the pulse can be normally counted even if the input method is a current transformer.

  FIG. 1 is a block diagram showing an embodiment of a pulse counter of the present invention. FIG. 2 is a connection diagram when a pulse counter is added by applying the pulse counter of the present invention. As shown in the figure, the output terminal PMo of the other device, for example, the watt hour meter PM and the common input terminal T of the first pulse counter PC1 are connected by the cable CB1, and the output terminal CTo of the current transformer CT and the second pulse are connected. The common input terminal T of the counter PC2 is connected by a cable CB2.

  The pulse counters PC1 and PC2 are the same, the common input terminal T, the common input circuit 1, the comparator circuit 2, the hold circuit 3, the reset circuit 4, the predetermined length pulse forming unit 5a, and the reset signal generating unit. 5b and a pulse signal processing unit 5 having functions of a counting unit 5c.

  The common input terminal T is output from the cable CB1 connected to the output terminal PMo of the watt-hour meter PM or the watt-hour meter PM to which a pulse is output from a non-voltage contact provided in the watt-hour meter PM. It is connected via a cable CB2 connected to an output terminal CTo of a current transformer CT provided outside so that a pulse to be detected can be detected.

  As shown in FIG. 1, the common input circuit 1 includes resistors R1, R2, and R3 and a capacitor C1 so as to correspond to either the output from the watt-hour meter PM or the output from the current transformer CT. Has been. The resistor R1 is connected between the input terminal 1a of the common input circuit 1 and the control power source S. A series circuit of the resistor R2 and the resistor R3 is connected to the control power source S, and the resistor R2 and the resistor R3 are connected to each other. A capacitor C1 for cutting a DC component is connected between the connection point and the input terminal 1a, and the connection point between the resistor R2 and the resistor R3 is the output terminal 1b of the common input circuit 1. Note that the input terminal 1a of the common input circuit 1 serves as a common input terminal T of the pulse counter. The resistor R1 serves as a load circuit for the transistor Tro when the output terminal PMo of the watt hour meter PM provided with a non-voltage contact, for example, an open collector transistor Tro is connected to the common input terminal T. Further, the resistors R1, R2, and R3 become a burden on the current transformer CT when the output terminal CTo of the current transformer CT provided outside is connected to the common input terminal T.

  The comparator circuit 2 is composed of resistors R4 and R5 and an operational amplifier OP. The operational amplifier OP is a reference in which a divided voltage by a series circuit of a resistor R4 and a resistor R5 connected to the control power source S is set in the operational amplifier OP. While being input as the voltage Vr, the output from the output terminal 1b of the common input circuit 1 is input. At a constant time, a divided voltage V2 by a series circuit of a resistor R2 and a resistor R3 connected to the control power source S is input.

  The hold circuit 3 includes a diode D and a capacitor C2, and when the output of the comparator circuit 2 becomes H level, the H level voltage is charged to the capacitor C2 via the diode D and is held. A resistor may be connected to both ends of the capacitor C2.

  The reset circuit 4 is composed of a transistor Tr, and the collector and emitter of the transistor Tr are connected to both ends of a capacitor C2 constituting the hold circuit 3.

  The pulse signal processing unit 5 includes a central processing unit (CPU) 5, and includes a level determination unit 5 a that determines the output level of the comparator circuit 2 held by the hold circuit 3, and a reset circuit when an H level determination signal is output. 4 includes a reset signal generator 5b that outputs a reset signal and a count unit 5c that counts an H level determination signal.

  In such a configuration, for example, the control voltage Vs of the control power source S is 5 [V], the reference voltage Vr is 3 [V], and the divided voltage V2 is V2 (= Vs / 2 = 2.5 [V]) < Vr.

  When the output terminal PMo of the watt hour meter PM is connected to the common input terminal T, the voltage V1 of the input terminal 1a of the common input circuit 1 is the control voltage during a period when no pulse is generated from the watt hour meter (pulse off period). Since Vs (= 5 [V]) and the divided voltage V2 (= 2.5 [V]) is input to the comparator circuit 2, the output of the comparator circuit 2 is at the L level.

  Further, during a period in which a pulse is generated from the watt hour meter (pulse ON period), the voltage V1 of the input terminal 1a is 0 [V], and the divided voltage V2 (= 2.5 [V]) is the comparator circuit 2. Therefore, the output of the comparator circuit 2 is L level.

  Further, when the pulse from the watt hour meter falls (from the pulse ON period to the pulse OFF period), the voltage V1 generated at the input terminal 1a is Vs (= 5 [V]) + the divided voltage V2 (= 2.5). [V]), and this is superimposed on the divided voltage V2 (= 2.5 [V]) and input to the comparator circuit 2, so that the output of the comparator circuit 2 becomes H level.

  When the output terminal CTo of the current transformer CT provided outside is connected to the common input terminal T, the voltage V1 of the input terminal 1a becomes 0 [V] during the period in which no pulse is generated (pulse OFF period), and the voltage is divided. Since the voltage V2 (= 2.5 [V]) is input to the comparator circuit 2, the output of the comparator circuit 2 is at the L level.

  Further, at the rising edge of the pulse (from the pulse OFF period to the pulse ON period), the voltage V1 (> Vr) generated at the input terminal 1a becomes an instantaneous pulse, which is input to the comparator circuit 2, so that the output of the comparator circuit 2 is Becomes H level. In this case, V1 = I · R (where I is the rated current of the current transformer CT and R is 1 / R = 1 / R1 + 1 / R2 + 1 / R3) so that the voltage V1 satisfies V1> Vr. Select I, R1, R2, and R3. In order to set V1 to 5 [V], for example, I: 0.0125 [mA], R1: 2 [MΩ], R2: 1 [MΩ], and R3: 1 [MΩ] may be used.

  When the output of the comparator circuit 2 becomes H level, the hold circuit 3 holds this H level voltage.

  In the level determination unit 5a of the pulse signal processing unit 5, the output from the comparator circuit 2 is always sampled at, for example, 20 [ms], and nothing is output if it is at the L level at the time of sampling. If it is H level, an H level determination signal is output. Thus, since the output from the comparator circuit 2 is determined, a pulse can be normally detected even if the pulse width of the pulse voltage generated at the load of the current transformer CT is small.

  When the H level determination signal is output from the level determination unit 5a, the reset signal generation unit 5b uses the base of the transistor Tr constituting the reset circuit 4 to process the next pulse output from the watt-hour meter PM. Output a reset signal. When the reset signal is output, the collector and emitter of the transistor Tr are short-circuited, and the capacitor C2 constituting the hold circuit 3 is discharged. Further, since the H level determination signal is the same as the number of pulses output from the watt hour meter PM, it is input to the counting unit 5c and counted as an integrated power amount.

  In the pulse signal processing unit 5, the integrated power amount counted by the counting unit 5 c is output in pulses. Therefore, when performing remote monitoring of the integrated power amount and controlling the used power amount, a transmission device is connected to the pulse counter. And an output corresponding to the integrated power amount may be transmitted to a monitoring or control target location.

It is a block diagram which shows one Embodiment of the pulse counter of this invention. It is a connection diagram in the case of adding a pulse counter by applying the pulse counter of the present invention. (A) is a connection diagram when a conventional pulse counter is newly provided, and (B) is a connection diagram when a conventional pulse counter is additionally provided.

Explanation of symbols

PMo Output terminal of other device CB1, CB2 Cable CT Current transformer CTo Output terminal T Common input terminal Vr Reference voltage 1 Common input circuit 2 Comparator circuit 3 Hold circuit 4 Reset circuit 5 Pulse signal processing unit 5a Pulse forming unit 5b Reset signal Generation part 5c Count part

Claims (2)

A pulse output from a non-voltage contact provided in the other device is detected from a cable connected to an output terminal of the other device or a non-voltage contact provided in the other device. A common input terminal designed to be connected via a cable connected to the output terminal of a current transformer provided outside,
A common input circuit connected to the common input terminal so as to correspond to either the output from the other device or the output from the current transformer;
A comparator circuit to which the output of the common input circuit and a set reference voltage are input; a hold circuit for holding the H level of the output of the comparator circuit;
A reset circuit for resetting the output of the comparator circuit held in the hold circuit;
A level determination unit that determines an output level of the comparator circuit held by the hold circuit; a reset signal generation unit that outputs a reset signal to the reset circuit when an H level determination signal is output from the level determination unit; A pulse counter comprising a count unit that counts an H level determination signal. The common input circuit is:
When the output terminal of the other device is connected to the common input terminal via a cable, the voltage generated at the common input terminal is set to be equal to or higher than the set reference voltage when the pulse falls. Output
When the output terminal of the current transformer provided outside is connected to the common input terminal via a cable, the voltage generated at the common input terminal at the rising edge of the pulse is equal to or higher than the set reference voltage. The pulse counter according to claim 1, wherein the pulse counter is output in such a manner.

Images