JP4545161B2 - Modulator / demodulator, demodulation method thereof, program and recording medium thereof - Google Patents

Description

  The present invention relates to a modulation / demodulation device that modulates / demodulates a signal transmitted / received between a communication line and a terminal device at the end of the communication line such as an analog telephone line, and more particularly to a frequency shift keying (FSK) method. More particularly, the present invention relates to a modulation / demodulation apparatus and a frequency shift keying demodulation method capable of obtaining the same effect as that of a normalization process with a simple process, and a program and a recording medium thereof.

Conventionally, the FSK (Frequency Shift Keying) communication method has been widely used in telephone line modems, etc., and the V series recommendation of the International Telegraph and Telephone Consultative Committee (CCITT), which has become the standard, is V. 21, V.R. There are FSK telephone line modem standards such as 23.
Of these, V. No. 21 is recommended that two frequencies, 1080 Hz and 1750 Hz, be center frequencies, and a frequency of ± 100 Hz is a characteristic frequency.
V. 23 has been recommended that the center frequency is 1500 Hz or 1700 Hz and the characteristic frequency is ± 200 Hz or ± 400 Hz (V.23 includes a backward frequency having a center frequency of 420 Hz and a characteristic frequency of ± 30 Hz. Channel exists).

The following three are typical examples of FSK conventional techniques.
1) A method of reproducing data by directly counting the zero-crossing interval between two carrier frequencies (F1, F2). That is, this counts the number of times that the waveform of the carrier frequency (F1, F2) crosses the zero line, discriminates “F1” or “F2” by the number, and reproduces the data.
2) A method of providing two narrow bandpass filters for extracting two carrier frequency components and comparing the output signal levels of both when an FSK signal is input. That is, this allows the carrier frequency components to pass through a narrow band pass filter of only F1 and a narrow band pass filter of only F2, and discriminates F1 and F2 by their output levels.
3) A method of generating a center frequency for two carrier frequencies and extracting a shift frequency component between the input frequency and the center frequency. That is, a center frequency F0 of F1 and F2 is generated, and it is determined whether the input frequency is + α or −α from F0, and F1 and F2 are extracted.

In the methods 1) and 2), the demodulation process is simple, but there is a problem in that it is easily affected by noise on the line and the possibility of erroneous signal discrimination increases.
On the other hand, although the method 3) is a relatively complicated process, a stable and highly accurate demodulator can be realized.

In general, the frequency characteristics on the line do not show ideal characteristics (flat frequency characteristics), and the amount of attenuation varies depending on the frequency.
Therefore, in the method 3), it is necessary to normalize the reception level (amplitude value) when calculating the frequency shift component.
In the case of a line having an ideal frequency characteristic, this normalization process can be omitted, and if the standard is specified so that the two frequencies are relatively close to each other, the frequency characteristic Can be considered flat.

However, since the attenuation amounts of the two frequencies corresponding to the binary values are actually different as described above, the normalization process cannot be omitted. V. When the two frequencies are separated by as much as 800 Hz as in the case of 23 data channels, the attenuation amount on the high frequency side generally increases. In a poor quality line, an attenuation difference of 10 dB may occur.
When communication is performed on such a line, unless the reception level normalization process is performed, the performance under high noise (S / N 10 dB or less) is affected, and sufficient communication performance cannot be obtained.
However, since this normalization processing requires a large amount of processing, it is desirable to omit it if possible. For example, when the processing is realized by an arithmetic processing device such as a DSP (Digital Signal Processor), if the normalization process is omitted, the amount of processing can be reduced and the current consumption can be kept low.

As automatic control of the reception level, there is an automatic gain control (AGC) function. In general, the AGC function functions to converge at a very slow speed so as to perform a steady and stable operation of the reception level.
When the bit rate is increased in the FSK communication system, it is necessary to switch the bit (frequency) for 1 to 2 wavelengths of the sine wave of the carrier frequency, and it is necessary to determine this, but in adaptive processing such as AGC, 1 to Since the convergence speed cannot be increased as gain control is performed in units of two wavelengths, it does not function to correct the frequency characteristics of the line. A function to adjust the gain more instantaneously is necessary. However, if such an adaptive process is performed, the amount of processing increases as in the normalization process.

(the purpose)
Therefore, an object of the present invention is to solve such a conventional problem, obtain the same effect as normalization processing with a small amount of processing, correct the frequency characteristics of the line, and provide a highly accurate modulation / demodulation device and frequency It is an object of the present invention to provide a demodulation method of shift modulation, a program thereof, and a recording medium.
The modem according to the present invention employs a method of reducing the amount of processing when the method 3), which is considered to be resistant to noise from the above three methods, is employed.

  In order to achieve the above object, the modem device of the present invention selectively changes the band-limiting filter (BPF) in the previous stage of the demodulator based on the ratio of the reception levels of the two frequencies, thereby changing the two frequencies f1, The same effect as that of the normalization process can be obtained while omitting the process of normalizing the reception level between f2.

  The modulation / demodulation apparatus of the present invention is a modulation / demodulation apparatus (modem) in frequency shift keying (FSK) communication in which two frequencies having different frequencies correspond to each value of a binary signal for communication. I / F unit (DAA (Direct Access Arrangement) circuit unit), an A / D conversion unit that converts an analog signal from a line or the like through the DAA circuit unit into a digital signal, and a filter coefficient in a memory such as a register Means for calculating a reception level ratio of two frequencies corresponding to a binary signal in an FSK demodulator having a band limiting filter (BPF) configured by a digital filter capable of changing an arbitrary filter coefficient stored in Reception level from reception level ratio calculation means with multiple BPF coefficient tables A BPF coefficient selection unit that selects an appropriate coefficient for correcting the reception level ratio from a plurality of BPF coefficient tables based on the (correction amount), and the BPF coefficient selected by the coefficient selection unit is Replace with the band-limiting filter coefficient.

  The reception level ratio calculating means generates a center frequency for two frequencies (binary signal), and generates a complex vector by multiplying the input signal by an in-phase component and a quadrature component of the center frequency. A means for extracting a complex vector related to a difference frequency from the center frequency by a band limiting filter from a complex vector, a means for calculating a complex vector length (amplitude value) of a difference frequency at a bit determination timing, and receiving each time at each bit determination timing Means for calculating the level ratio, means for storing the calculated reception level ratio (correction amount) in a storage device such as a register, and reception level calculated every time data is output from the A / D converter Means for comparing the absolute value of the ratio with the absolute value of the reception level ratio stored in the storage device, and a higher reception level from the comparison result Means for updating the storage contents of the storage device, the updated correction amount of the storage device in the case of the first correction, and the first correction amount and the current correction in the case of the second and subsequent corrections. On the condition that the added value of the amount is larger than the first correction amount, a value obtained by adding the first correction amount and the current correction amount is sent to the BPF coefficient selection unit.

According to the present invention, when demodulating an FSK signal input via a line having frequency characteristics, two frequencies f1. A large-scale hardware or software with a large amount of processing for normalizing the reception level between f2 is not required, and a band limiting filter (BPF) in front of the demodulator is used based on the ratio of the reception levels of the two frequencies. Since the frequency characteristic of the line is corrected by selectively changing, the same effect as the normalization process can be obtained with a small amount of processing.
In addition, since the gain is corrected before the processing, it is possible to obtain an advantageous effect that it is advantageous for the calculation accuracy of the subsequent stage.

Embodiments of the present invention will be described below in detail with reference to the drawings.
FIG. 12 is a schematic block diagram of a modem device (modem) to which the present invention is applied.
The modem 1 includes a controller 2 connected to the CPU side, and a modem 3 composed of a modulator 4 and a demodulator 5. The controller 2 is a means for controlling the sequence as a modem, and the modulation unit 4 of the modulation / demodulation unit 3 performs frequency shift modulation on the bit string input from the controller, performs D / A conversion, and performs an analog signal (FSK modulation). ) Is sent to the transmission line, and the demodulator 5 performs A / D conversion on the analog signal (FSK modulation) input from the transmission line, passes through the band limiting filter, and performs frequency shift demodulation. The bit output is output to the controller 2.

FIG. 13 and FIG. 14 are functional block diagrams showing an example of a demodulator of a known FSK modem.
13 and 14 do not show the controller 2 of FIG. 12, it goes without saying that a standard modulation unit is required as the modem.
Furthermore, a controller 2 for controlling the sequence as a modem is also necessary, but since these are all known, illustration and description are omitted.

  In FIG. 13, a signal input from a line is input to an A / D converter 12 via a DAA (Direct Access Arrangement) circuit unit 11 and converted into digital data. The digital data of the FSK signal waveform output from the A / D converter 12 passes through a band separation filter (BPF) 13 constituted by a digital filter, and unnecessary out-of-band components are removed. Then, the output signal is input to the FSK demodulator 14. The BPF 13 is a digital filter composed of an FIR (finite impulse response) filter, and can realize an arbitrary frequency characteristic by changing a filter coefficient stored in a memory such as a register.

FIG. 14 shows an embodiment of a detailed configuration of the frequency shift demodulator in FIG.
The input FSK signal is first input to the complex processing unit 21. The complex processing unit 21 performs complex processing on the input signal by multiplying the input signal by the in-phase component and the quadrature component of the center frequency to generate a complex vector.
Assuming that the center frequency is f, the input frequency is f + α, and the input signal is cos (2π (f + α) t), a complex vector (x is an integer part and y is an imaginary part) is obtained as in the following equation (1).
x = Gcos (2π (f + α) t) × cos (−2πft)
= G / 2 × [cos (2πat) + cos ((2π2f + a) t)]
y = Gcos (2π (f + a) t) × sin (−2πft)
= G / 2 × [sin (2πat) −sin ((2π2f + a) t)]
・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ (1)

Next, the obtained complex vector is band-limited by the low-pass filter (LPF) 22 to eliminate the second term of the above equation (1), and the complex of only the difference frequency as the following equation (2). Vector A can be extracted.
A = (x, y) = G / 2 × cos (2πat), G / 2 × sin (2πat)
・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ (2)
Each time the data sampled by the A / D converter 12 is input, the complex vector A is extracted and input to the “angle component calculation processing unit 23”.

Next, the “angle component calculation processing unit 23” calculates an angle component with the differential frequency complex vector A one sample before.
Here, it can be approximated by an angle sin θ formed by two complex vectors, and is obtained by the following calculation formula (3). In Equation (3), the denominator indicates an absolute value, and the numerator indicates an outer product.

次に、同期化処理部２４で符号抽出タイミングを生成し、符号抽出タイミングと角度成分の符号ビットからビット判定部２５で１，０のビットを決定し、ビットストリームとして出力する。
以上のような方法で、ＦＳＫ信号の復調処理が行われるが、上式（３）に示したように内部演算処理にルート演算と除算が必要となり、簡単なハードウェア構成では実現できない。

Next, the code extraction timing is generated by the synchronization processing unit 24, and the bit determining unit 25 determines 1 and 0 bits from the code extraction timing and the sign bit of the angle component, and outputs the bit stream.
Although the FSK signal is demodulated by the method as described above, as shown in the above equation (3), root calculation and division are required for internal calculation processing, which cannot be realized with a simple hardware configuration.

That is, the denominator term of the above equation (3) indicates the amplitude value (reception level) of the received signal, and when the frequency characteristic of the line is an ideal (flat) characteristic as shown in FIG. Since the denominator term in Equation (3) can be regarded as almost constant and can be ignored, the hardware configuration can be simplified. However, in the case of a line having frequency characteristics as shown in FIG. Normalization of the amplitude value (vector length) is an important factor that cannot be ignored.
In contrast to the above known technique, the configuration of the present invention is such that the above route calculation and division processing are not performed, and a reduction in processing amount can be expected. The operation relating to the present invention will be described below.

(overall structure)
FIG. 1 is a functional block diagram of a demodulator showing an embodiment of the present invention.
In FIG. 1, a DAA circuit unit 31, an A / D converter 32, and a band separation filter (BPF) 33 are the same as those shown in FIG. In the present invention, a level correction amount calculation unit 35 is newly provided in the frequency shift demodulation unit 34 and operates based on the level correction amount output between the f1 and f2 frequencies from the level correction amount calculation unit 35. A band limiting filter coefficient selecting unit 36 and a band limiting filter coefficient table 37 are provided, and the band limiting filter coefficient selecting unit 36 selects the filter coefficient of the band separation filter 33 that is closest to the level correction amount input from the table 37, and the coefficient And the coefficient of the band separation filter 33 is replaced with the selected coefficient.

(Level correction amount calculation unit)
FIG. 2 is a detailed block diagram of the level correction amount calculation unit in FIG.
The upper blocks in FIG. 2 are all functional units indicating programs, and the lower arithmetic unit 50, register 51, and memory 52 indicate hardware. A level correction amount calculation function is realized by executing the program of each block using hardware.
When the coefficient of the BPF 33 is changed with the first correction amount, the first correction is applied to the preceding stage (BPF), so it is necessary to consider that the second and subsequent corrections include the previous correction amount. If the previous correction amount (reception level ratio between f1 and f2) is α, the correction amount after the second time is α + α ′ when the reception level ratio with f1 is α ′. If the frequency characteristic is sufficiently corrected with the previous correction amount, | α + α ′ | ≦ | α | should be satisfied. Accordingly, after the second time, it is necessary to perform processing for updating α + α ′ as a new correction value when | α + α ′ |> | α |.
The level correction amount calculation unit 35 receives the two frequencies (binary signal) from the BPF 33, generates a center frequency for the two frequencies, and multiplies the input signal by the in-phase component and the quadrature component of the center frequency to form a complex. A processing unit 41 that generates a vector, a processing unit 42 that inputs the complex vector and extracts a complex vector related to a difference frequency from the center frequency by a band limiting filter, and a complex vector length (amplitude) of the difference frequency at the bit determination timing Value), a processing unit 44 that calculates an amplitude (reception) level ratio from the amplitude values of two bits (frequency), and a storage device such as a register that stores the calculated reception level ratio (correction amount). And the absolute value of the reception level ratio calculated at each bit determination timing and the absolute value of the reception level ratio stored in the storage device. When the processing unit 46 to be compared, the processing unit 47 to update the storage contents of the storage device with the larger reception level ratio from the comparison result, and when the correction is performed after the BPF coefficient is changed by the correction amount, | α + α ′ | > 48 that determines whether or not | α |, and a processing unit 49 that sends the value of the correction amount (α + α ′) to the BPF coefficient selection unit 36 at the timing when the reception level ratio of the storage device is updated. It has.

(Level correction amount calculation processing)
FIG. 5 is a process flowchart of the level correction amount calculation unit.
Here, a method of calculating the reception level ratio (correction amount) between the characteristic frequencies f1 and f2 described in FIGS. 1 and 2 will be described with reference to the flowchart of FIG.
In general, the FSK modem starts data handling after detecting the first f1 signal (mark) (step 101). At this time, the amplitude value (complex vector A length) at the bit determination timing at the time of receiving the f1 signal is calculated and stored in a memory such as a register (step 103). Next, data handling is started (step 104), and when the f2 signal (space) is received (step 105), the amplitude value (complex vector A length) is calculated at the bit determination timing in the same manner as described above (step 106). Then, a ratio with the amplitude value of the previously stored f1 signal is calculated, and the ratio is stored in a memory such as a register as a correction amount (step 107). Thereafter, the ratio with the amplitude value of the f1 signal is similarly calculated at the timing when the bit determination of the f2 signal “0” is performed (steps 105 to 107). Then, a comparison is made with the correction amount stored previously, but it is determined whether the correction is for the second time or later (step 109), and if it is the second time or later, the correction amount for the second time or later is α ′, If the previous correction amount is α, it is determined whether or not | α + α ′ |> | α | (step 110). If the above condition is satisfied in the second and subsequent times, the correction amount stored in the memory such as a register is updated with (α + α ′) as a new correction amount, and the correction amount is stored in the BPF coefficient selection unit 36. Send out (step 111).

Here, a specific example of a simple method for calculating a signed amplitude ratio (level correction amount between frequencies) of the f1 signal and the f2 signal will be given.
Based on the first stored amplitude value of the f1 signal, for example, a value (Thresh) in increments of 1 dB within a range of ± 10 dB is calculated and stored in a memory such as a register (step 103).
Next, when the f2 signal is received, the amplitude value of the f2 signal is calculated at the timing when “0” is bit-determined, the amplitude value is compared with each Thresh, and the reception level ratio with respect to the f1 signal is ± 1.0 dB error The range is specified and stored as a correction amount in a storage device such as a memory (step 107).
Thereafter, similarly, the amplitude value of the f2 signal calculated at the timing when “0” is bit-determined is compared with each Thresh, and the reception level ratio (correction amount) for the f1 signal is specified.
As described above, in the first correction, α is sent as a correction amount to the coefficient selection unit. In the second and subsequent corrections, it is determined whether or not | α + α ′ |> | α |. When the expression is satisfied, the correction amount of (α + α ′) is sent to the coefficient selection unit.
By performing the processing as described above, it is possible to reduce the processing compared to actually obtaining the ratio.

(BPF coefficient selector)
Next, the BPF coefficient selection unit will be described.
3 is a data configuration diagram of a BPF coefficient table, FIG. 4 is a block diagram of a digital filter configured by an FIR (finite impulse response) filter, FIG. 6 is an operation flowchart of a BPF coefficient selection unit, and FIG. FIG. 8 is a frequency characteristic curve diagram of a real line, FIG. 9 is a frequency characteristic curve diagram of a BPF (1), and FIG. 10 is a frequency characteristic curve diagram of a BPF (2) and FIG. FIG. 3 is a frequency characteristic curve diagram (3) of the BPF.
When the reception level ratio (level correction amount) between the two characteristic frequencies f1 and f2 is output from the level correction amount calculating unit 35 of the frequency shift demodulating unit 34, the band limiting filter coefficient selecting unit 36 generates the original data. The BPF coefficient selection table unit 37 selects a more appropriate BPF coefficient and replaces the band limiting filter unit 33 coefficient.

The demodulating unit of the FSK modulation / demodulation apparatus usually removes unnecessary signals outside the band by giving the frequency characteristic as shown by the solid line in FIG. 9 as the characteristic of the BPF. However, as shown in FIG. , The reception level of the f2 frequency is attenuated from the reception level of the f1 frequency. Since the reception level ratio of f1 and f2 can be estimated to some extent depending on the line, BPF coefficients (1) and (2) corresponding to the frequency characteristics are prepared as shown in FIGS. 10 and 11, and the correction amount of the f1 / f2 signal And let me correspond. In FIG. 10, since the attenuation amount of the high frequency is large (refer to the dotted characteristic curve), the signal level of f2 is raised from the signal level of f1 (refer to the characteristic curve of the solid line). In FIG. 11, since the attenuation amount of the high frequency is larger, the signal level of f2 is further raised than the signal level of f1 than in the case of FIG. 10 (refer to the solid characteristic curve).
That is, the functional block of the digital filter, which is the band limiting filter (BPF) 33 of the demodulator, connects a plurality of taps T and sets the coefficients of the filter coefficients h _{0 to} h _M as shown in FIG. It is set as. On the other hand, in the BPF coefficient table 37, filter coefficients h ₀ to h _M are prepared for each of the coefficient types C1 to Cn as shown in FIG. 3 and correspond to the frequency characteristics shown in FIGS. 10 and 11, respectively. ing.

As described above, several BPF coefficients are prepared in the BPF coefficient table 37 and stored in the memory as table reference data.
Since the level correction value between f1 and f2 described above is input to the BPF coefficient selection unit 36, the closest one is selected from the coefficient table 37 based on this input value, and one set of coefficients is stored in the BPF 33. Nothing is loaded, and the BPF coefficient data in the previous stage is replaced with the BPF coefficient data group selected from the table.
At this time, since the BPF 33 is composed of an FIR filter as shown in FIG. 4, there is no problem because it is stable even if the filter coefficient is changed at an arbitrary timing.

In this way, by correcting the frequency characteristics of the line by the BPF unit 33 in the previous stage, normalization of the vector at the time of calculating the angle component described above is performed, and calculation processing for normalization performed in internal processing is performed. Since it can be omitted, the performance can be improved with a simple configuration.
By the way, each part of the embodiment of the present invention (FIGS. 1 and 2) is shown as a block, and they all seem to be configured in hardware, but in this embodiment, after the A / D converter, All processing blocks are processed by DSP (Digital Signal Processor) software. However, all of these may be configured by hardware, or a part may be configured by a hardware circuit.

  As shown in FIG. 6, the BPF coefficient selection unit 36 always detects whether or not a level correction value between f1 and f2 has been sent from the level correction amount calculation unit 35 (step 111). For example, referring to the BPF coefficient table 37, the nearest coefficient group is selected based on the level correction value sent (step 112). Next, the selected BPF coefficient group (Cn) is loaded into the band limiting filter (BPF) 33 to replace it with the BPF coefficient group (step 113).

  If the processing flowcharts of the level correction amount calculation unit and the BPF coefficient selection unit shown in FIGS. 5 and 6 are converted into programs and stored in a recording medium such as a CD-ROM, the recording medium is stored in a computer such as a personal computer. By mounting and loading and executing the program, the present invention can be easily realized. It can be easily realized by downloading the program of the present invention from an arbitrary computer to another computer via a network.

It is a block diagram of the demodulation part of the frequency shift modem apparatus which shows one Example of this invention. FIG. 2 is a detailed block diagram of a level correction amount calculation unit in FIG. 1. It is a data block diagram of the band-limiting filter coefficient table which shows one Example of this invention. It is a functional block diagram of the FIR filter which comprises the band-limiting filter (BPF) in FIG. It is an operation | movement flowchart of the level correction amount calculation part which shows one Example of this invention. It is an operation | movement flowchart of the BPF coefficient selection part which shows one Example of this invention. It is an ideal frequency characteristic curve figure of a FSK modem. It is the frequency characteristic curve figure in a real line similarly. It is a frequency characteristic curve figure (1) of BPF in the present invention. It is a frequency characteristic curve figure (2) of BPF similarly. It is a frequency characteristic curve figure (3) of BPF similarly. 1 is a schematic block diagram of a modem device to which the present invention is applied. It is a block diagram of the demodulation part of the FSK modulation / demodulation apparatus to which this invention is applied. It is a functional block diagram of the FSK demodulation part in FIG.

Explanation of symbols

31 ... DAA circuit part 32 ... A / D converter 33 ... Band-limiting filter (BPF)
34 ... Frequency shift demodulation unit 35 ... Level correction amount calculation unit 36 ... BPF coefficient selection unit 37 ... BPF coefficient table 41 ... Complex vector generation processing unit 42 ... Differential frequency complex vector Extraction processing unit 43... Differential frequency complex vector length calculation processing unit 44... Amplitude level ratio calculation processing unit 45... Reception level ratio storage processing unit 46. ... Update processing unit for stored content 49 ... Updated reception level ratio transmission processing unit 51 ... Register 52 ... Calculator 1 ... Modulator / demodulator 2 ... Controller 3 ... Modulation demodulation Section 4 ... Modulation section 5 ... Demodulation section

Claims (11)

Of the modulation / demodulation apparatus in frequency shift keying modulation communication that performs communication with two different frequencies corresponding to the respective values of the binary signal, an I / F unit to the line, etc., and a line via the I / F unit A / D converter that converts an analog signal from a digital signal into a digital signal, and a band limiting filter that includes a filter coefficient stored in a memory and a digital filter that can arbitrarily change the filter coefficient. In the demodulator of the shift / demodulator,
Means for calculating a reception level ratio of two frequencies corresponding to the binary signal;
A plurality of band limiting filter coefficient tables, and band limiting filter coefficient selecting means for selecting a coefficient for correcting the reception level ratio from the coefficient table based on the reception level ratio;
A modulation / demodulation device that replaces the band-limited filter coefficient selected by the band-limited filter coefficient selection means ,
The means for calculating the reception level ratio of the two frequencies generates a center frequency for the two frequencies, and multiplies the input signal by the in-phase component and the quadrature component of the center frequency to generate a complex vector;
Means for extracting a complex vector related to a difference frequency from the center frequency from a generated complex vector by a band limiting filter;
Means for calculating the complex vector length of the difference frequency at the bit determination timing;
Means for calculating a reception level ratio from amplitude values of two frequencies;
Means for calculating a correction amount from the calculated reception level ratio, and storing the correction amount in a storage device;
Means for comparing the correction amount calculated every time the bit determination timing with the correction amount stored last time;
Means for updating the storage content of the storage device with the correction amount when the correction amount is larger than the correction amount stored from the comparison result;
A modulation / demodulation apparatus , wherein the correction amount is sent to a band limiting filter coefficient selection means at a timing when the correction amount of the storage device is updated . The modem according to claim 1 ,
The modulation / demodulation apparatus characterized in that the means for calculating the reception level ratio of the two frequencies is provided in a frequency shift demodulation unit. The modem according to claim 1 or 2 , wherein:
The filter coefficient selecting means for changing the filter coefficient of the band limiting filter to an appropriate coefficient, when the level correction value between the two frequencies is input from the means for calculating the reception level ratio of the two frequencies, the input value is A modulation / demodulation device characterized in that the one closest to the level correction value is selected from a band limiting filter coefficient table and the coefficient value of the band limiting filter is replaced with the selected value. The modem according to any one of claims 1 to 3 ,
The band limiting filter coefficient table stores a plurality of sets of coefficients obtained by combining several band limiting filter coefficients of the FIR filter constituting the band limiting filter, and the band selecting filter coefficient selecting means performs level correction. A modulation / demodulation device, wherein a band-limit filter is loaded so as to replace a set of filter coefficients closest to a quantity with a current set of filter coefficients. In a demodulation method in frequency shift key modulation communication in which two frequencies having different frequencies are communicated corresponding to respective values of a binary signal,
Demodulation that converts an analog signal input from the line via the I / F unit into a digital signal, arbitrarily selects a coefficient value stored in the memory, sets it as a band-limiting filter, and then demodulates it with a frequency shift modulation / demodulation device A method,
Calculate the reception level ratio of the two frequencies corresponding to the binary signal,
Based on the reception level ratio, select a coefficient value for correcting the reception level ratio from the band limit filter coefficient table,
A demodulation method that loads a selected coefficient value into a band-limiting filter and replaces the current coefficient value with the selected coefficient value ,
The process of calculating the reception level ratio of the two frequencies is as follows:
Generating a center frequency for the two frequencies and multiplying an input signal by an in-phase component and a quadrature component of the center frequency to generate a complex vector;
Extracting a plurality of vectors related to a difference frequency with respect to the center frequency from a generated complex vector by a band limiting filter;
Calculating a complex vector length of the difference frequency at the bit determination timing;
Calculating a reception level ratio from amplitude values of two frequencies;
Calculating a correction amount from the calculated reception level ratio, and storing the correction amount in a storage device;
Comparing the correction amount calculated every time the bit determination timing is compared with the correction amount stored and updated last time;
Updating the storage content of the storage device with the correction amount when the correction amount is larger than the correction amount stored from the comparison result;
And a step of transmitting the correction amount at a timing when the correction amount of the storage device is updated . The demodulation method according to claim 5 , wherein
The process for calculating the reception level ratio of the two frequencies is processed in a frequency shift demodulator. In the demodulation method according to claim 5 or 6 ,
The process of replacing and changing the filter coefficient of the band limiting filter to an appropriate coefficient is performed when the level correction value between two frequencies is input by the process of calculating the reception level ratio of the two frequencies. Based on the level correction value, the coefficient group that provides the closest characteristic to the level correction value is selected from the band limit filter coefficient table, the coefficient group is loaded into the band limit filter, and the current coefficient value is selected. A demodulation method characterized by replacing with a coefficient value. The demodulation method according to any one of claims 5 to 7 ,
The process of calculating the reception level ratio of the two frequencies calculates a value obtained by cutting a predetermined range with a predetermined width based on the amplitude value of the first stored f1 signal, and stores the calculated value. Next, the f2 signal is received, the amplitude value of the f2 signal is calculated, the amplitude value is compared with the stored value, and the reception level ratio with respect to the f1 signal is specified as an error range. And a reception level ratio. In the demodulation method according to any one of claims 5 to 8 ,
A demodulation method of the frequency shift modulation / demodulation apparatus is characterized by generating a center frequency for two carrier frequencies and performing demodulation by extracting an input frequency and a shift frequency component of the center frequency. A program for causing a computer to execute each step of the demodulation method according to any one of claims 5 to 9 . Any one in the steps of the demodulating method according converted to program each, a computer-readable recording medium characterized by storing the translated program of claim 9 claim 5.

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