JP4528961B2 - Organic thin film transistor - Google Patents

Description

  The present invention relates to a thin film transistor, and in particular, in a thin film transistor using an organic semiconductor as a semiconductor layer, it promotes efficient carrier movement, obtains high output characteristics, and provides a current amplification ratio (on / off) as transistor characteristics. Ratio).

  The development of thin film transistors using organic semiconductors has been gradually active since the late 1980s, and in recent years, basic characteristics exceeding those of amorphous silicon thin film transistors have been reported. For this reason, in recent years, many techniques for manufacturing a thin film transistor using an organic material have been proposed. This is because the organic semiconductor thin film transistor has the advantage that it is suitable for production on a flexible substrate and can be applied to a low-cost manufacturing process at normal temperature and normal pressure, such as a printing method. Dependent. These features are expected to be compatible with integrated circuit technology for electronic devices that are used in portable environments and are supplied at low prices, such as portable displays and electronic tags such as electronic price tags and tags. Collecting.

  In order to improve the performance of a thin film transistor using an organic semiconductor, whether to develop an organic semiconductor material exhibiting a high field effect mobility or to create a structure having a short channel length has been studied. In particular, in order to improve basic characteristics such as high-speed response and low-voltage driving of a thin film transistor, it is one of the most important factors to reduce the distance between the source and the drain, that is, the channel length.

  In general, in order to manufacture a transistor with a short channel length, a microfabrication technique such as photolithography, photolithography, or the like must be used. However, the advantage of a transistor manufactured using an organic semiconductor material can simplify a manufacturing process. Therefore, the use of such a microfabrication technique is not necessarily suitable for exhibiting the original superiority.

  Various transistors having a vertical structure have been proposed as transistors for controlling the channel length without using a microfabrication technique (see Non-Patent Documents 1, 2, and 3 below). Many of these structures are basically designed based on the concept of covering the low mobility of organic semiconductor materials, so channels are formed perpendicular to the substrate surface, resulting in short channels. The vertical structure is well studied. However, if the channel is formed at the interface in the film thickness direction, the quality of the thin film must be improved with respect to the longitudinal interface. In general, with organic materials, it is not always easy to form a thin film having high quality with respect to the longitudinal interface unless it is an amorphous material. In particular, forming a thin film having high quality in the vertical direction by a solution process has a problem that the barrier is higher.

Therefore, an organic thin film transistor in which the source and drain are manufactured in different processes is proposed as a basic element structure of a transistor that can be realized without applying a microfabrication technique such as photolithography, in which a channel is formed in a direction parallel to the substrate surface. (See Patent Document 1 below). This structure has a great advantage that a thin film transistor having a short channel can be manufactured only by a simple stacking process without applying a microfabrication technique. However, in this structure, in order to obtain stable performance, it is necessary to precisely manufacture the bottom electrode, and there has been a problem that the stability is somewhat affected. Further, in order to improve the performance of this, adjustment of the electrode type is performed. However, when such adjustment of the electrode type is performed, there is a problem that the contact resistance at the electrode semiconductor interface increases.
F. Garnier, Appl. Phys. Lett., 73, 1721, 1998 N. Stutzmann, Science, 299, 1881, 2003 R.Parashkov, Appl. Phys. Lett., 82, 4579, 2003 JP 2003-258265 A

  In a thin film transistor using an organic semiconductor material for an active layer, it is necessary to narrow a channel (a distance between a source and a drain) through which a current flows in order to improve transistor characteristics. However, if the channel length is remarkably narrowed, the influence of parasitic resistance increases, the output current cannot be increased, and the leakage current between the source and the drain increases, and the transistor characteristic is a current amplification ratio (ON / OFF). There was a problem that the off ratio was not sufficiently large.

  The present invention provides a method of manufacturing a thin film transistor that reduces the resistance generated between an electrode and a semiconductor layer, improves output characteristics, reduces leakage current between a source and a drain, and improves an on / off ratio. Is.

  In organic thin-film transistors, it is predicted that leakage current can be suppressed while obtaining high output characteristics in transistors with short channel length by improving the charge injection efficiency and blocking the path where leakage current occurs. As a result of intensive studies on the flow path, the present invention has been achieved.

  According to the present invention, in an organic thin film transistor, a leakage current that increases when a distance between a source electrode and a drain electrode, that is, a channel length is shortened, and a high current amplification ratio (on / off ratio) is realized under a low voltage. be able to.

  Examples The present invention will be described in more detail with reference to examples. However, the present invention is not limited to these examples.

  That is, according to the present invention, the gate electrode 20, the gate insulating layer 30, the first semiconductor layer 40, the source or drain electrode 50, the insulating layer 60, and the second semiconductor layer 70 are formed on the substrate 10 as shown in FIG. In the thin film transistor having the drain and source electrodes 80, the gate electrode 20 is provided on a part of the substrate 10, the gate electrode 20 and the substrate 10 are covered with the insulating layer 30, and the first electrode is formed on the insulating layer 30. The semiconductor layer 40 is provided, the source or drain electrode 50 is provided on a part of the region corresponding to the gate electrode 20 on the first semiconductor layer 40, and the source or drain of the source or drain electrode 50 is provided. An insulating layer 60 is provided at a location corresponding to a region where 50 is overlapped with the gate electrode 20, the first semiconductor layer 40 and the insulating layer 60 are covered with a second semiconductor layer 70, (2) The drain or source electrode 80 is formed so as to cover a region on the semiconductor layer 70 corresponding to the source or drain electrode 50 where the source or drain electrode 50 overlaps the gate electrode 20 A thin film transistor is provided.

  Further, according to the present invention, the substrate 10, the gate electrode 20, the gate insulating layer 30, the first semiconductor layer 40, the source or drain electrode 50, the insulating layer 60, the second semiconductor layer 70, and the drain or source electrode 80 in this order. There is provided a method for manufacturing a thin film transistor, wherein the thin film transistors are sequentially stacked.

  In the thin film transistor of the present invention, the gate electrode 20, the gate insulating layer 30, the first semiconductor layer 40, the source or drain electrode 50, the insulating layer 60, the second semiconductor layer 70, the drain or source electrode 80 are sequentially formed on the substrate 10. Although it is manufactured by stacking, a manufacturing method in this case is not particularly limited. The method of laminating differs depending on the material constituting each layer. In the case of using a material that is not solvent-soluble, a vapor phase growth method that is produced under a vacuum condition such as a vacuum evaporation method or a sputtering method is often used. A method of forming a thin film from a liquid layer by mixing a material with a solvent and applying the solution from a solution, such as spin coating or coating, is used. For this purpose, applying a printing method such as screen printing or inkjet printing is also a preferable method in terms of simplifying the manufacturing process. Also, a printing method called soft lithography such as microcontact printing or micromolding can be applied.

  The thin film transistor according to the present invention has a structure as shown in FIG. 2. However, on these element structures, for the purpose of improving the durability of the element and protecting the element from a subsequent process, A protective film may be formed. At this time, the material for forming the protective film, its shape, thickness, and manufacturing method are not particularly limited, and any material, method, or the like may be used. All of these conditions vary depending on the material constituting the thin film transistor, the manufacturing method, and the like.

  In the thin film transistor according to the present invention, when forming a p-type transistor in which carriers are holes in the first semiconductor layer 40, pentacene, tetracene, thiophene, phthalocyanine, and derivatives substituted at their ends, polythiophene, An organic semiconductor material selected from polyphenylene, polyphenylene vinylene, polyfluorene, and a polymer of a derivative in which a terminal or a side chain thereof is substituted is used, but the composition is not particularly limited, and is composed of a single substance. It may also be configured by mixing a plurality of substances.

  In the thin film transistor of the present invention, when a p-type semiconductor material in which carriers are holes is used for the first semiconductor layer 40, the second semiconductor layer 70 is made of the same material as the first semiconductor layer 40 or hole transport. Although a material is used, the composition is not particularly limited, and it may be composed of a single substance or may be composed of a mixture of a plurality of substances.

  In the thin film transistor according to the present invention, when an n-type transistor in which carriers are electrons is formed in the first semiconductor layer 40, perylenetetracarboxylic dianhydride, naphthalenetetracarboxylic dianhydride, fluorinated phthalocyanine, And organic semiconductor materials selected from these terminal-substituted derivatives are used, but the composition is not particularly limited, and may be composed of a single substance, or by mixing a plurality of substances. It may be configured.

  In the thin film transistor of the present invention, when an n-type semiconductor material in which carriers are electrons is used for the first semiconductor layer 40, the second semiconductor layer 70 is made of the same material as the first semiconductor layer 40, or is transported by electrons. Although a material is used, the composition is not particularly limited, and it may be composed of a single substance or may be composed of a mixture of a plurality of substances.

  A generally used value for the thickness of the first semiconductor layer 40 of the thin film transistor in the present invention is 5 nm to 100 nm, preferably 10 nm to 50 nm. The thickness of the second semiconductor layer 70 is generally 20 nm or more and 2000 nm or less, preferably 100 nm or more and 1000 nm or less.

  The shapes of the first semiconductor layer 40 and the second semiconductor layer in the present invention are not particularly limited. In order to reduce the leakage current and reduce the off current, it is also effective to perform island processing or the like that minimizes the semiconductor region.

The gate insulating layer 30 in contact with the gate used in the present invention is preferably a material having a large dielectric constant in order to obtain a more effective electric field effect. For example, SiO ₂ , Al ₂ O ₃ , ZrO ₂ , Ta ₂ O ₅ , La ₂ O _{3 and the} like can be mentioned. However, the present invention is not limited to these, and in order to impart flexibility of the device, polymethyl methacrylate Polymer dielectrics selected from polyimide, polystyrene, polyparaxylene, polyvinylidene fluoride, polyvinyl alcohol, polyvinylphenol, pullulan and derivatives substituted at these ends can also be used. These compositions are not particularly limited, and may be composed of a single substance or a mixture of a plurality of substances. Further, the first semiconductor layer 40 side of the gate insulating layer 30 is coated or the surface of the gate insulating layer 30 is subjected to orientation treatment in order to increase the crystal grains of the semiconductor thin film 50 or enhance the orientation. It is also possible.

  In the thin film transistor according to the present invention, when the first semiconductor layer 40 and the source or drain electrode 50 are formed by a vapor deposition method in which the first semiconductor layer 40 and the source or drain electrode 50 are formed under a vacuum condition such as a vacuum evaporation method or a sputtering method, the insulating layer 60 is similarly formed. It is preferable to prepare by vapor phase growth. In general, a method using a metal mask is preferably used when the source or drain electrode 50 is formed. However, when the insulating layer 60 is formed, the metal mask is not continuously removed. This is because it is effective. In this case, a material that can be applied to the vapor phase growth method, such as silsesquioxane, parylene, or polyurea, is used as a material for forming the insulating layer 60. It is also possible to use an inorganic insulating layer such as a metal oxide or a metal nitride. In the case of producing by a liquid layer process such as coating, polymethyl methacrylate, polyimide, polystyrene, polyparaxylene, polyvinylidene fluoride, polyvinyl alcohol, polyvinylphenol, pullulan, and derivatives substituted at these ends are used. In addition to the polymer material selected, siloxane compounds and polysilazane compounds can also be used.

  The thickness of the insulating layer 60 in the present invention is not particularly limited. Generally used thickness is 50 nm or more and 2000 nm or less, but preferably 200 nm or more and 1000 nm or less.

  The shape of the insulating layer 60 in the present invention is not particularly limited. Any shape may be used as long as the portion corresponding to the lower portion of the drain or source electrode 80 is covered above the source or drain electrode 50.

  The method for manufacturing the gate insulating layer 30 used in the present invention is not particularly limited, and any method may be used. In general, vapor deposition methods such as vacuum deposition and sputtering are often used, but in terms of simple and low cost production, in addition to spin coating, dip coating, and die coating, screen printing, inkjet Printing methods such as printing are also applied as a wet manufacturing process in which a material is mixed with a solvent and applied as a coating from a solution.

  The material of the source or drain 50 or 80 used in the present invention is not particularly limited, and any material may be used. Generally, it is preferably used when a p-type semiconductor material using holes as carriers is used for the active layer, a metal material having a large work function is used, and an n-type semiconductor material using electrons as carriers is used for the active layer. In many cases, a metal material with a small work function is used, but in order to reduce leakage current and adjust the electric field distribution in the device, one uses a material with a large work function and the other a material with a small work function. May be used. At this time, in order to adjust the work function, stabilize the device, increase the lifetime, increase the charge injection efficiency, etc., the source and drain are composed of a mixture or lamination of a plurality of materials, or surface treatment or a semiconductor layer. It is also possible to perform interfacial modification between the two.

  The method for producing the source or drain electrode 50 or 80 used in the present invention is not particularly limited, and any method may be used. In general, vapor phase growth methods such as vacuum deposition and sputtering are often used. From the viewpoint of simple and low cost production, screen printing, ink jet printing, and other materials are mixed with a solvent and applied from a solution. The printing method as a wet manufacturing process to be manufactured as is also applied.

  The shape of the source or drain electrode 50 or 80 used in the present invention is not particularly limited, and any shape may be used. In general, linear wiring having a width of 1 μm or more and 1 mm or less and a thickness of 20 nm or more and 10 μm or less is preferably used, but is not limited thereto.

  With respect to the arrangement of the gate 20, the source or drain electrode 50, and the drain or source electrode 80 in the present invention, the mutual angle of the respective axes on the substrate plane is not particularly limited when wiring is performed, and any angle may be used. Good. However, it is necessary to have a portion where the gate 20, the source or drain electrode 50, and the drain or source electrode 80 intersect. In addition, it is desirable that each of the portions that are out of the element portion is installed so as not to overlap in the vertical direction.

  A substrate made of synthetic quartz (ES grade) (area 20 x 35 mm, thickness: 1.0 mm) is ultrasonicated for 20 minutes with a neutral detergent (Iuchi Seieido Co., Ltd .: Pure Soft) diluted 5 times with pure water. After washing, ultrasonic cleaning was performed for 20 minutes in pure water to remove the detergent. Thereafter, the substrate was subjected to ultraviolet irradiation cleaning for 10 minutes in an oxygen atmosphere using an ultraviolet-ozone cleaner. On the quartz substrate thus cleaned, as shown in FIG. 3, as a gate electrode 20, gold was vacuum-deposited using a nickel mask so as to have a width of 100 μm and a thickness of 0.2 μm. The film forming conditions at this time are a substrate temperature of 30 ° C. and a deposition rate of 6 nm per minute.

Next, as shown in FIG. 4, polymethyl methacrylate (PMMA) was dissolved in chloroform from the gate electrode 20, and an insulating film 30 was formed from the solution to a thickness of 0.4 μm by spin coating. Thereafter, pentacene was vacuum-deposited as a first semiconductor layer 40 from above the insulating film 30 as shown in FIG. As pentacene, a commercially available product was used which was purified by repeating sublimation purification 5 times. The vacuum deposition conditions were that the substrate was fixed above the deposition boat, the substrate temperature was adjusted to about 30 ° C., and the degree of vacuum was reduced to 2 × 10 ⁻⁶ Torr. Thereafter, vacuum deposition was performed to a thickness of 5 nm at a rate of 1 nm per minute.

  Next, as shown in FIG. 6, as the drain electrode 50, gold was vacuum-deposited using a nickel mask so as to have a width of 100 μm and a thickness of 0.2 μm. The film forming conditions at this time are a substrate temperature of 30 ° C. and a deposition rate of 6 nm per minute. At this time, the drain electrode 50 partially overlaps with the previously produced gate electrode 20 so that the axis of the gate electrode 20 and the axis of the drain electrode 50 are not parallel. Next, as shown in FIG. 7, an insulating layer 60 of polyoctavinylsilsesquioxane (POSS) was formed on the drain electrode 50 by vacuum deposition through a nickel mask.

  Further, pentacene was vacuum deposited as the second semiconductor layer 70 as shown in FIG. Pentacene was vacuum deposited to a thickness of 1 μm at a rate of 1 nm per minute. Then, as shown in FIG. 9, as a source electrode 80, gold was vacuum-deposited using a nickel mask so as to have a width of 100 μm and a thickness of 0.05 μm. At this time, the film was formed so that the axis in the length direction of the source electrode 80 was orthogonal to the axis in the length direction of the drain electrode 50 and not parallel to the axis of the gate electrode 20. The film forming conditions at this time are a substrate temperature of 30 ° C. and a deposition rate of 6 nm per minute. Thus, a field effect thin film transistor having a channel length of 1.005 μm and a channel width of 100 μm was produced.

  An n-type silicon substrate grown with a silicon thermal oxide film of 300 nm as an insulating layer is subjected to ultrasonic cleaning with a neutral detergent diluted with pure water (Inoue Seieisha: Pure Soft). The detergent was removed by sonic cleaning. Furthermore, ultraviolet irradiation cleaning was performed for 20 minutes in an ozone cleaner under ultraviolet irradiation. On the substrate thus cleaned, a gold drain electrode was vacuum-deposited with a width of 100 μm and a thickness of 30 nm. The film forming conditions at this time are a deposition rate of 6 nm per minute under a substrate of 30 ° C. From there, POSS was vacuum deposited only on the drain electrode. As a result, a POSS insulating layer having a thickness of 500 nm was formed on the drain.

Thereafter, a thin film of N, N′-diphenyl-N, N′-di (m-tolyl) benzidine (TPD), which is a hole transport material, was produced by a vacuum deposition method. The vacuum deposition conditions were that the substrate was fixed above the deposition boat, the substrate temperature was adjusted to about 45 ° C., and the degree of vacuum was reduced to 2 × 10 ⁻⁶ Torr. Thereafter, vacuum deposition was performed to a thickness of 2 μm at a rate of 1 nm per minute. Further thereon, gold was vacuum-deposited as a source electrode with a width of 100 μm and a thickness of 0.1 μm so that the length direction was perpendicular to the length direction of the drain electrode. The film forming conditions at this time are a deposition rate of 6 nm per minute under a substrate of 30 ° C. As the gate electrode, a silicon wafer used as a substrate was used.

  The thin film transistor thus manufactured operates as a field effect thin film transistor having a channel length of 2 μm and a channel width of 100 μm. FIG. 10 shows the output characteristics of the device thus manufactured. Since the thickness of the TPD is as thick as 2 μm and the charge injection efficiency of the bottom electrode is poor, the output current ground value is small and the on / off ratio is extremely small at about 2.

An n-type silicon substrate grown with a silicon thermal oxide film of 300 nm as an insulating layer is subjected to ultrasonic cleaning with a neutral detergent diluted with pure water (Inoue Seieisha: Pure Soft). The detergent was removed by sonic cleaning. Furthermore, ultraviolet irradiation cleaning was performed for 20 minutes in an ozone cleaner under ultraviolet irradiation. A pentacene thin film, which is a p-type semiconductor, was produced as a first semiconductor layer on the cleaned substrate by a vacuum deposition method. Pentacene was purified by sublimation purification 5 times. The vacuum deposition conditions were that the substrate was fixed above the deposition boat, the substrate temperature was adjusted to about 45 ° C., and the degree of vacuum was reduced to 2 × 10 ⁻⁶ Torr. Thereafter, vacuum deposition was performed to a thickness of 20 nm at a rate of 1 nm per minute.

Thereafter, a gold drain electrode was vacuum-deposited with a width of 100 μm and a thickness of 30 nm. The film forming conditions at this time are a substrate temperature of 30 ° C. and a deposition rate of 6 nm per minute. From there, POSS was vacuum deposited only on the drain electrode. As a result, a POSS insulating layer having a thickness of 500 nm was formed on the drain. Thereafter, a thin film of N, N′-diphenyl-N, N′-di (m-tolyl) benzidine (TPD), which is a hole transport material, was formed as a second semiconductor layer by a vacuum deposition method. The vacuum deposition conditions were that the substrate was fixed above the deposition boat, the substrate temperature was adjusted to about 45 ° C., and the degree of vacuum was reduced to 2 × 10 ⁻⁶ Torr. Thereafter, vacuum deposition was performed to a thickness of 2 μm at a rate of 1 nm per minute.

  Further thereon, gold was vacuum-deposited as a source electrode with a width of 100 μm and a thickness of 0.1 μm so that the length direction was perpendicular to the length direction of the drain electrode. The film forming conditions at this time are a deposition rate of 6 nm per minute under a substrate of 30 ° C. As the gate electrode, a silicon wafer used as a substrate was used. The thin film transistor thus manufactured operates as a field effect thin film transistor having a channel length of 2.01 μm and a channel width of 100 μm. FIG. 11 shows the output characteristics of the device thus manufactured. Compared to the case without the first semiconductor layer shown in FIG. 10, the output current increased by two orders of magnitude or more and the on / off ratio was remarkably improved.

Schematic cross-sectional view of an example of the element structure of an organic thin-film transistor in which the source and drain are produced in different processes Typical sectional drawing of an example of the organic thin-film transistor in this invention Schematic of useful manufacturing process steps for forming organic thin film transistors in the present invention Schematic of useful manufacturing process steps for forming organic thin film transistors in the present invention Schematic of useful manufacturing process steps for forming organic thin film transistors in the present invention Schematic of useful manufacturing process steps for forming organic thin film transistors in the present invention Schematic of useful manufacturing process steps for forming organic thin film transistors in the present invention Schematic of useful manufacturing process steps for forming organic thin film transistors in the present invention Schematic of useful manufacturing process steps for forming organic thin film transistors in the present invention Output characteristics of the device fabricated in Example 2 Output characteristics of the device fabricated in Example 3

Explanation of symbols

10 Substrate 20 Gate electrode 30 Gate insulating layer 40 First semiconductor layer 50 Drain or source electrode (first electrode)
60 Insulating layer 70 Second semiconductor layer 80 Source or drain electrode (second electrode)
90 Protective film

Claims (7)

Organic thin film transistor comprising a substrate, a gate electrode, a gate insulating layer, a first organic semiconductor layer, a source electrode, a drain electrode, an insulating layer, a second organic semiconductor layer, and a protective film, wherein the source electrode and the drain electrode are formed in different steps The gate electrode is provided on a part of the substrate, the gate electrode and the substrate are covered with a gate insulating layer, a first organic semiconductor layer is formed so as to cover the insulating layer, and a source electrode and a drain electrode are formed. The first electrode formed first is formed on a part of the region corresponding to the gate electrode on the first organic semiconductor layer, the insulating layer covers the first electrode, and the insulating layer on the first electrode layer The first organic semiconductor layer is covered with the second organic semiconductor layer, and the second electrode formed later of the source electrode and the drain electrode is on the second organic semiconductor layer, and at least in a region corresponding to the first electrode home The organic thin film transistor, wherein a first electrode is formed to cover a region that overlaps the gate electrode. 2. The organic thin film transistor according to claim 1, wherein the substrate, the gate electrode, the gate insulating layer, the first organic semiconductor layer, the source or drain electrode (first electrode), the insulating layer, the second organic semiconductor layer, the drain or source. An organic thin film transistor, wherein an electrode (second electrode) and a protective film are sequentially laminated in this order. The organic thin film transistor according to claim 1 or 2, wherein the organic thin film transistor is a p-type transistor in which a carrier is a hole, and the semiconductor material forming the first organic semiconductor layer is pentacene, tetracene, thiophene, phthalocyanine, Coronene, ovalene, anthracene, or derivatives substituted at these ends, polythiophene, polyphenylene, polyphenylene vinylene, polythienylene vinylene, polyfluorene, polyfluorenylene, polyaniline, polypyrrole, polyacetylene, polydiacetylene, polyazulene, polypyrene, or these An organic thin film transistor characterized by being selected from a polymer of a derivative in which a terminal or a side chain thereof is substituted. 4. The organic thin film transistor according to claim 3, wherein the semiconductor material forming the second organic semiconductor layer is the same as the material forming the first organic semiconductor layer which is a hole transport material, or a triphenylamine compound, stilbene. compounds, benzidine compounds, organic thin film transistor which is characterized in that polytriphenylamine compounds or those terminal is more configuration induction body substituted. The organic thin film transistor according to claim 1 or 2, wherein the organic thin film transistor is an n-type transistor in which carriers are electrons, and the semiconductor material forming the first organic semiconductor layer is perylenetetracarboxylic dianhydride, An organic thin film transistor, wherein the organic thin film transistor is selected from naphthalenetetracarboxylic dianhydride, fluorinated phthalocyanine, fullerene, or a derivative having a substituted terminal thereof. 6. The organic thin film transistor according to claim 5, wherein the semiconductor material forming the second organic semiconductor layer is the same as the material forming the first organic semiconductor layer, which is an electron transport material, or oxadiazole, triazole, triazine An organic thin film transistor comprising an aluminum quinolinol complex or a derivative in which a terminal thereof is substituted. The insulating layer formed on the first electrode is made of SiO ₂ , Al ₂ O ₃ or parylene, polyimide, polystyrene, polyparaxylene, polyvinylidene fluoride, polyvinylphenol, pullulan, polysiloxane, silsesquioxane, or these 2. The organic thin film transistor according to claim 1, wherein the organic thin film transistor is composed of a derivative having a terminal substituted.

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