JP4519557B2 - Power supply device and image forming apparatus - Google Patents

Description

  The present invention relates to a power supply device with noise countermeasures and an image forming apparatus using the power supply device.

  The image forming apparatus performs full-wave rectification on a commercial frequency AC power source (hereinafter referred to as an AC power source) received from the outside, and supplies it to internal devices as a DC power source. Further, the temperature control of the fixing device disposed inside the apparatus is performed by turning on / off the AC power source using a switching element and controlling the amount of power supplied to the halogen lamp. Usually, a trigger signal synchronized with a zero cross point of an AC power supply is used to turn on / off the switching element. However, for example, when a disturbance such as surge noise is applied to the AC power supply, the temperature control may malfunction because the zero cross point fluctuates or the switching element becomes inoperable. Therefore, disturbance noise countermeasures in the temperature control of the fixing device are an important technical problem, and various techniques have been disclosed (for example, see Patent Document 1).

  On the other hand, in order to increase the versatility of the image forming apparatus, the AC power source is required to be shared with AC 100 volts and AC 200 volts. In order to achieve this object, a voltage doubler rectifier circuit and a switching mechanism that can easily switch between adoption and non-adoption of this voltage doubler rectifier circuit are usually arranged in the power supply device. Depending on the shipping destination (country) of the image forming apparatus, the adoption or non-adoption of the voltage doubler rectifier circuit is switched before shipment. Therefore, by adopting / not adopting the voltage doubler rectifier circuit, two types of noise protection circuits are originally provided, and the function of the noise protection circuit will not be fulfilled unless switched according to the shipping destination (country).

Japanese Patent Laid-Open No. 2004-13668

  The problems to be solved are that, in the temperature control of the fixing device, when a disturbance such as surge noise is applied to the AC power supply, the trigger signal fluctuates and the temperature control malfunctions, and the AC 100 volt power supply If the AC 200-volt power supply is shared, two types of noise protection circuits will be provided due to the adoption / non-use of the voltage doubler rectifier circuit, and the function of the noise protection circuit will not be fulfilled unless switched according to the shipping destination (country). It is.

  In the present invention, when the voltage doubler rectifier circuit is not employed, the neutral line of the internal power supply unit that receives AC power from the outside of the apparatus and supplies a DC voltage to the internal device, and the neutral of the zero cross detection unit that detects the zero cross point A noise component removing unit is provided that couples the lines to each other at high frequency and reduces the occurrence of a potential difference due to noise components between the two neutral lines. However, if this noise component removal unit is provided, the number of zero-cross points that can be detected in the state where the voltage doubler rectifier circuit is employed will be ½ of the number of times that can be detected in the state where the voltage doubler rectifier circuit is not used. Inconvenience occurs. Therefore, in models that can switch between adoption and non-adoption of the voltage doubler rectifier circuit, zero-cross cycle detection means for detecting the output cycle of the zero-cross signal, and power supply voltage for detecting the switching result based on the detection result of the zero-cross cycle detection means The main means for avoiding the inconvenience is provided with a detection means and a trigger period setting means for setting a generation period of a trigger signal for turning on / off the switching element based on a detection result of the power supply voltage detection means. Features.

  By providing a neutral line of the internal power supply unit and a neutral line of the zero cross detection unit for detecting the zero cross point at a high frequency, and including a noise component removal unit that reduces the occurrence of a potential difference due to noise components between the neutral lines, Even if a disturbance such as surge noise is applied to the AC power supply, the zero cross point does not fluctuate and the switching element does not become inoperable, so that the temperature control does not malfunction. In addition, by providing zero-cross cycle detection means, power supply voltage detection means, and trigger cycle setting means, the same number of trigger signals can be generated within a predetermined time regardless of whether or not the voltage doubler rectifier circuit is used. Therefore, the same noise protection circuit can be used regardless of whether or not the voltage doubler rectifier circuit is used.

  The zero-cross cycle detection unit, the power supply voltage detection unit, and the trigger cycle setting unit are realized only by changing the program of the control unit of the control unit (CPU) included in the image forming apparatus.

The voltage of commercial power supply in each country in the world is generally divided into two types, 100 volts and 200 volts. The power supply device according to the present embodiment realizes a power supply circuit that applies only to 200 volts.
FIG. 1 is a power supply circuit diagram according to the first embodiment.
Before explaining the details of the power supply device of the first embodiment with reference to this figure, the outline of the fixing device in which the power supply device is arranged and the entire printing apparatus will be explained with reference to other drawings.
FIG. 11 is a schematic configuration diagram of the fixing device.
In the figure, reference numeral 50 denotes a fixing device, and 51 denotes a heat roller, which is a part that heat-fixes the toner image transferred to the printing medium. In the heat roller 51, the surface of a metal core bar 51b is covered with an elastic layer 51a made of rubber or the like for fixing in contact with an unfixed toner image on a printing medium.

  Further, the heat roller 51 has a hollow cylindrical shape and includes a halogen lamp 52 as a heat source therein. By irradiating the halogen lamp 52, the elastic layer 51a is heated from the inside through the cored bar 51b, and the toner image is fixed on the print medium by this heat. Here, the cored bar 51b is usually made of an aluminum alloy having high thermal conductivity in order to conduct heat uniformly to the elastic layer 51a on the surface. Further, the thickness of the metal core 51b is set to about 2 mm in order to increase the heat capacity and suppress the temperature fluctuation of the elastic layer 51a. A temperature detecting means 64 for detecting the temperature of the elastic layer 51a is disposed on the surface of the elastic layer 51a.

  Reference numeral 53 denotes a backup roller for pressing the print medium against the heat roller 51. The backup roller 53 is also usually coated on its surface with an elastic layer such as rubber. Reference numeral 56 denotes a cleaning member, which is a part that shares the role of cleaning toner, paper dust, and the like attached to the surface of the heat roller 51. The cleaning member 56 is disposed so as to come into contact with the heat roller 51 by an urging unit 57. Reference numeral 59 denotes a heating roller, which is a metal roller for heating the heat roller 51. A halogen lamp 62 as a fixed energizing heat source is also provided inside the heating roller 59. The heating roller 59 is pressed against the heat roller 51 by a biasing means 58 such as a spring.

  The heating roller 59 is provided with temperature detecting means 63 for detecting the temperature. The halogen lamp 52 heats the heat roller 51 from the inside, and the halogen lamp 62 heats from the outside. That is, the halogen lamp 52 and the halogen lamp 62 are energized until the surface of the heat roller 51 reaches a predetermined temperature at which the toner is melted. This energization is controlled based on the temperature detection results of the temperature detection means 63 and the temperature detection means 64. The heating roller 59 is also provided with a cleaning member 61 for removing toner adhering to the surface and paper dust. The cleaning member 61 is disposed so as to contact the heating roller 59 by a biasing means 60 such as a spring. The fixing device 50 described above is disposed in the final process of the printing process. The outline of the operation will be described below including the operation of the entire printing apparatus.

FIG. 12 is a schematic configuration diagram of the printing apparatus.
First, when a print activation signal is input to the image forming apparatus, the halogen lamp 52 and the halogen lamp 62 are energized and heated, and the heat roller 51 is rotationally driven by a drive source (not shown). The heating roller 59 also rotates as the heat roller 51 rotates. Since the heating roller 59 is made of metal, when heated by the halogen lamp 62, the temperature rapidly rises without causing a temperature difference between the inner wall and the outer wall. Due to this temperature rise, the surface of the elastic layer 51a (FIG. 11) of the heat roller 51 is heated. On the other hand, the inner wall of the metal core 51b (FIG. 11) of the heat roller 51 is heated by the halogen lamp 52, and heat is supplied from the metal core 51b (FIG. 11) to the elastic layer 11a (FIG. 11). Following the above process, the surface of the heat roller 51 reaches a temperature at which the toner can be melted and fixed.

  In this state, the paper feed roller 70 is rotated in the paper feed direction by a drive source (not shown), and the print medium 71 is separated and fed out one by one by the separation mechanism 72. When the print medium 71 comes into contact with the feed roller 73, the paper feed roller 70 stops. At this time, the feed roller 73 is driven by a drive source (not shown), and the print medium 71 is sequentially supplied to the four image forming apparatuses 74 along the conveyance path. Subsequently, the toner images of the respective colors formed by the respective image forming apparatuses 74 are transferred onto the print medium 71 by the transfer means 75, respectively. The print medium 71 on which the toner image is transferred is carried into the fixing device 50.

  The fixing device 50 receives a print medium 71 on which toners of yellow, magenta, cyan, and black are transferred. The print medium 71 is fed between the heat roller 51 and the backup roller 53, and is sandwiched and conveyed by both rollers. Here, the print medium 71 is conveyed in a state where the surface on which the toner image is transferred is pressed against the heat roller 51. Therefore, the toner constituting the toner image is continuously melted by the heat of the elastic layer 51a (FIG. 11) as the heat roller 51 rotates. The melted toner adheres to the print medium 71 and is fixed. The print medium 71 on which the toner is fixed is discharged, and the fixing process is completed.

Returning to FIG. 1, details of the power supply device of the first embodiment will be described.
As shown in the figure, in a partial circuit related to heating of the fixing device, a DC power source 1 is connected to an anode side of a light emitting diode constituting a phototriac 4 via a resistor 2, and a control (not shown) is provided on the cathode side. The ACTRG-N signal 5 is input from the unit. Accordingly, when the ACTRG-N signal 5 becomes the LOW level, the light emitting diode of the phototriac 4 emits light. The triac side of the phototriac 4 is connected between the T2 terminal and the T1 terminal of the triac 7 in series with the resistor 6 and the resistor 9, and the connection point of the resistor 6 and the resistor 9 is connected to the gate terminal of the triac 7. When the light emitting diode of the phototriac 4 emits light, an on trigger signal is applied to the triac 7. The triac 7 is turned on by this on-trigger signal, the AC power 15 is applied to the halogen lamp 8, and the fixing device is heated. The partial circuit described above constitutes the heating unit 34 in the drawing. The heating unit 34 is a part that heats the fixing device 50 (FIG. 12) to a predetermined temperature and maintains the state.

  The AC power supply 15 is connected to the subsequent stage via the AC filter 14. The active line side of the AC power supply is connected to one end of the halogen lamp 8. The other end of the halogen lamp 8 is connected to the T2 terminal of the triac 7. On the other hand, the neutral line side of the AC power source is connected to the T1 terminal of the triac 7, and when an on trigger signal is applied to the gate terminal of the triac 7 that forms part of the heating unit 34, an AC voltage is applied to the halogen lamp 8. Will be applied. Here, the AC power supply 15 and the AC filter 14 constitute an AC power supply unit 31 in the figure. The AC power supply unit 31 is a part that supplies an AC power supply of usually 100 volts or 200 volts (only 200 volts in this embodiment) to the power supply circuit.

  The active line side of the AC power supply 15 is connected to the AC input terminal of the rectification bridge 13, and the neutral line side of the AC power supply is connected to the other AC input terminal of the rectification bridge 13. The plus output of the rectifying bridge 13 is connected to the plus terminal of the rectifying capacitor 11, and the minus output of the rectifying bridge 13 is connected to the minus terminal of the rectifying capacitor 12. Further, the negative terminal of the rectifying capacitor 11 is connected to the positive terminal of the rectifying capacitor 12 to constitute a primary side rectifying circuit. The partial circuit described above constitutes the internal power supply unit 32 in the figure. The internal power supply unit 32 is a part that receives and rectifies a predetermined AC power supply from the AC power supply unit 31 and supplies power to each part in the apparatus via the primary side switching circuit.

  Further, the active line side of the AC power supply 15 is connected to the AC input terminal of the rectification bridge 23, and the neutral side of the AC power supply 15 is connected to the other AC input terminal of the rectification bridge 23. Between the positive output terminal and the negative output terminal of the rectifier bridge 23, a resistor 22, a Zener diode 24, and a resistor 25 are connected in series and inserted. The base terminal of the transistor 26 is connected to the connection point between the anode of the Zener diode 24 and the resistor 25. When the AC power source 15 exceeds a threshold voltage determined by the resistor 22, the Zener diode 24, and the resistor 25, the transistor 26 The light-emitting diode of the phototransistor 18 emits light. The collector side of the phototransistor in the phototransistor 18 is connected to the DC power source 17, and the emitter side of the phototransistor in the phototransistor 18 is connected to the secondary side ground via the resistor 20.

  When the light emitting diode of the phototransistor 18 emits light, that is, when the AC power supply 15 exceeds the threshold voltage, the phototransistor of the phototransistor 18 is turned on, and the voltage at the connection point between the emitter side of the phototransistor 18 and the resistor 20. Goes high. The voltage change at this connection point is output as an ACZX-N signal. The partial circuit described above constitutes the zero-cross detection unit 33 in the drawing. The zero-cross detection unit 33 is a part that detects a zero-cross point of the AC power supply 15 that is a reference for generating the ACTRG-N signal (FIG. 1).

  The capacitor 16 is inserted between the negative side of the rectifier bridge 13 and the negative side of the rectifier bridge 23, and connects the ground point A point of the primary side switching circuit and the ground point B point of the zero cross detection circuit in high frequency. Are connected. A partial circuit that connects the minus side of the rectifying bridge 13 and the minus side of the rectifying bridge 23 with a capacitor 16 constitutes a noise component removing unit 35. This noise component removing unit 35 is a portion that equalizes the potential difference between the primary side switching circuit and the zero-crossing detection circuit and alleviates the malfunction of the zero-crossing detection unit 33 when a disturbance such as surge noise enters the AC power supply 15. is there.

  That is, when a disturbance such as surge noise enters the AC power supply 15, the output of the rectifier bridge 13 and the rectifier bridge 23 increases in the positive direction regardless of the polarity of the surge noise. However, since the rectifying capacitors 11 and 12 are connected to the rectifying bridge 13, an increase in output is mitigated. On the other hand, since a resistive load (resistors 22, 24, etc.) is mainly connected to the rectifier bridge 23, the output increase is rapid. Therefore, if the capacitor 16 is not connected, the potential at the point C viewed from the point B increases rapidly. This sudden increase in the potential difference immediately leads to a malfunction (including operation stop) of the zero cross detector 33.

  In the present invention, the negative side of the rectifying bridge 13 and the negative side of the rectifying bridge 23 are connected by the capacitor 16 in order to prevent this problem. In this way, when a disturbance such as surge noise enters the AC power supply 15, a part of the current that flows mainly in the resistive load (resistors 22, 24, etc.) of the rectifying bridge 23 is transferred to the rectifying bridge 13 side. Can be shunted. As a result, an increase in potential difference between the negative side of the rectifying bridge 13 and the negative side of the rectifying bridge 23 can be mitigated. This relaxation of the potential difference leads to a decrease in the potential at point C as viewed from point B. As a result, it is possible to prevent the malfunction (including operation stop) of the zero-cross detection unit 33 from occurring.

Next, the operation of the power supply circuit according to the first embodiment will be described in detail using a time chart.
FIG. 2 is a time chart of the power supply circuit according to the first embodiment.
In the figure, in order from the top, (a) is the waveform of the AC power input voltage, (b) is the potential waveform at point A (FIG. 1) viewed from point B (FIG. 1), ( c) is the potential waveform at point C (FIG. 1) viewed from point B (FIG. 1), (d) is the waveform of the ACZX-N signal (FIG. 1), and (e) is ACTRG- The waveform of the N signal (FIG. 1), (f) is the current waveform flowing through the halogen lamp 8 (FIG. 1), and (g) is the time axis representing the passage of time common to all drawings.

Time T0
An AC power supply of 200 volts is applied to the power supply circuit to start operation.
Time T1
Since the transistor 26 (FIG. 1) is turned off when the potential at the point C (FIG. 1) viewed from the full-wave rectified point B (FIG. 1) falls below a predetermined voltage (threshold voltage S), the photo The transistor 18 is also turned off. Accordingly, since the current flowing through the resistor 20 is interrupted, the ACZX-N signal (FIG. 1) is shifted to a low level. This transition to the low level is sent to a control unit (not shown).

Time T2
When the AC power supply 15 (FIG. 1) increases and passes through the 0 level, the rectification bridge 23 (FIG. 1) starts the next half-wave rectification, so the point C as viewed from the point B (FIG. 1) (FIG. 1). The potential of begins to increase. At this time, the gates of the triac 7 (FIG. 1) and the photo triac 4 (FIG. 1) are turned off.
Time T3
Since the transistor 26 (FIG. 1) is turned on when the potential at the point C (FIG. 1) viewed from the full-wave rectified point B (FIG. 1) exceeds a predetermined voltage (threshold voltage S), the phototransistor 18 turns on. Therefore, a predetermined amount of current flows through the resistor 20, and the ACZX-N signal 19 (FIG. 1) shifts to a high level and maintains its value. The transition to the high level is sent to a control unit (not shown).

Time T4
A negative trigger ACTRG-N signal 5 (FIG. 1) is received after a predetermined time (S1 × α) has elapsed from the transition of the ACZX-N signal 19 (FIG. 1) to the low level, which is received by the control unit (not shown) at time T1. Is supplied to the cathode side of the phototriac 4 (FIG. 1). An on-trigger is applied to the gate of the triac 7 (FIG. 1) by the minus trigger ACTRG-N signal (FIG. 1). As a result, a halogen lamp current (f) is applied to the halogen lamp 8 (FIG. 1). Here, S1 is a half-wavelength period of the AC power supply 15 (FIG. 1), and α is a predetermined constant, which is normally set to about 0.7.

Time T5
Since the transistor 26 (FIG. 1) is turned off when the potential at the point C (FIG. 1) viewed from the full-wave rectified point B (FIG. 1) falls below a predetermined voltage (threshold voltage S), the photo The transistor 18 is also turned off. Accordingly, since the current flowing through the resistor 20 is interrupted, the ACZX-N signal (FIG. 1) is shifted to a low level. This transition to the low level is sent to a control unit (not shown).

Time T6
When the AC power supply 15 (FIG. 1) decreases and passes through the 0 level, the rectifier bridge 23 (FIG. 1) starts the next half-wave rectification, so the point C as viewed from the point B (FIG. 1) (FIG. 1). The potential of begins to increase. At this time, the gates of the triac 7 (FIG. 1) and the photo triac 4 (FIG. 1) are turned off. The same operation is repeated thereafter.

  In the above operation, the potential at point A (FIG. 1) viewed from point B (FIG. 1) is constantly at 0 level as shown in FIG. In this embodiment, since the rectification waveforms of the rectifier bridge 13 (FIG. 1) and the rectifier bridge 23 are equal, the capacitor 16 is interposed between the negative side of the rectifier bridge 13 (FIG. 1) and the negative side of the rectifier bridge 23 in a normal state. It is not inserted and should maintain the 0 level.

  However, for example, when a disturbance such as surge noise enters the AC power supply 15 (FIG. 1), the internal power supply unit 32 (FIG. 1) and the zero cross detection unit 33 (FIG. 1) react with each other. Since the components are greatly different, the effect on both output waveforms is not the same. In particular, the influence of high-frequency components such as surge noise on both output waveforms cannot be ignored. As a result, a malfunction (including operation stop) occurs due to a shift in the zero cross point which is a reference for generating the negative trigger ACTRG-N signal (FIG. 1).

  However, in the present invention, the capacitor 16 is inserted between the negative side of the rectifying bridge 13 and the negative side of the rectifying bridge 23, and the point A of the internal power supply unit 32 (FIG. 1) and the zero cross detection unit 33. The point B in FIG. 1 is coupled at a high frequency. As a result, even if a disturbance such as surge noise enters the AC power source 15, the internal power supply unit 32 (FIG. 1) and the zero-cross detection unit 33 (FIG. 1) have a uniform high-frequency component potential difference. Thus, it is possible to alleviate the occurrence of malfunction due to the shift of the zero cross point.

In the first embodiment, the power supply device has been described with respect to a power supply circuit that applies only to 200 volts. However, in this embodiment, a power supply circuit that can be applied to both the power supply voltage 100 volts and the power supply voltage 200 volts is realized.
FIG. 3 is a power supply circuit diagram according to the second embodiment.
As shown in the figure, the power supply circuit according to the second embodiment includes an AC power supply unit 31, an internal power supply unit 32, a zero-cross detection unit 33, an output voltage maintenance setting unit 41, and a control unit 42. Only differences from the first embodiment will be described below. About the part similar to Example 1, the same code | symbol is attached | subjected and description is abbreviate | omitted.

  The output voltage maintenance setting unit 41 is connected to the active line of the AC power supply unit 31 and the connection points of the rectifier capacitor 11 and the rectifier capacitor 12 of the internal power supply unit 32 using a connection line or the like from the same state as in the first embodiment. Are switched to a connected state or a disconnected state to maintain a predetermined output voltage. That is, it is a portion that performs voltage doubler rectification using a connection line, or removes the connection line and disconnects both to return to the same state as in the first embodiment.

  The control unit 42 includes a memory that stores a predetermined program and a CPU (central processing unit) that executes the program, and controls the entire power supply circuit. In the same manner as in the first embodiment, in addition to the control for supplying the minus trigger ACTRG-N signal 5 to the cathode side of the phototriac 4 after the elapse of a predetermined time from the transition of the ACZX-N signal 19 to the low level, the zero cross period detecting means 42-1 A power supply voltage detection means 42-2, a trigger cycle setting means 42-3, an external interrupt count setting means 42-4, and an external interrupt count measurement means 42-5. This is the part that controls Each of these means is a control means generated when the CPU of the control unit 42 executes a program stored in a predetermined memory in advance.

The zero-cross cycle detection unit 42-1 is a unit that receives the ACZX-N signal from the zero-cross detection unit 33 and detects the repetition time S2.
The power supply voltage detection means 42-2 detects from the repetition time S2 detected by the zero cross detection unit 33 whether the switching state of the output voltage maintenance setting unit 41 at the time of detection is the connection state or the disconnection state. It is means to do. That is, it is means for detecting whether or not voltage doubler rectification is set. As will be described later, when the voltage doubler rectification is set, that is, when the AC power supply unit 31 is 100 volts, the repetition time S2 is twice that when the voltage doubler rectification is not set. This makes it possible to detect.

  The trigger cycle setting unit 42-3 determines the generation cycle of the ACTRG-N signal (energization trigger) based on the detection result of the power supply voltage detection unit 42-2 as the ACZX-N signal (pulse). Signal) is set to the output cycle, and when in the connection state, the generation cycle of the ACTRG-N signal (energization trigger) is set to ½ of the output cycle of the ACZX-N signal (pulse signal). is there. As will be described later again, when voltage rectification is not set, it is the same as in Example 1, but when voltage rectification is set, that is, when the AC power supply 31 is 100 volts. This is because the repetition time S2 is twice that in the case where the voltage doubler rectification is not set.

  The external interrupt number setting means 42-4 is a means for calculating the number of times of outputting the ACTRG-N signal and setting the number of times of accepting the ACZX-N signal corresponding to the number of times. Although not described in the first embodiment, the number of times the ACTRG-N signal is output is determined in advance. In the first embodiment, the number of times the ACZX-N signal is accepted is equal to the number of times the ACTRG-N signal is output. However, in this embodiment, when the voltage doubler rectification is set, the repetition time S2 is twice as long as that when the voltage doubler rectification is not set. Therefore, if both output the same number of ACTRG-N signals within the same time, the number of ACZX-N signals received during that time is n when the voltage doubler rectification is set. On the other hand, the number of times of acceptance when the voltage doubler rectification is not set is 2n.

  The external interrupt count measuring means 42-5 is a means for measuring the acceptance of the ACZX-N signal and stopping the acceptance when a predetermined number of acceptances is reached.

Next, the operation of the power supply circuit according to the second embodiment will be described in detail using a time chart.
FIG. 4 is a time chart of the power supply circuit according to the second embodiment.
In the figure, in order from the top, (a) is the waveform of the AC power input voltage, (b) is the potential waveform at point A (FIG. 3) viewed from point B (FIG. 3), ( c) is a potential waveform at point C (FIG. 3) viewed from point B (FIG. 3), (d) is a waveform of the ACZX-N signal (FIG. 3), and (e) is ACTRG- FIG. 3 is a waveform of the N signal (FIG. 3), (f) is a current waveform flowing through the halogen lamp 8 (FIG. 3), and (g) is a time axis representing the passage of time common to all the drawings.
Here, only the case where the output voltage maintenance setting unit 41 (FIG. 3) is set to voltage doubler rectification will be described. This is because the case where the voltage doubler rectification is not set is exactly the same as FIG. 2 of the first embodiment.

Time T0
An AC power supply of 100 volts is applied to the power supply circuit to start operation.
Time T1
When the potential (c) at point C (FIG. 3) viewed from full-wave rectified point B (FIG. 3) falls below a predetermined voltage (threshold voltage S), transistor 26 (FIG. 3) is turned off. Therefore, the phototransistor 18 (FIG. 3) is also turned off. Accordingly, since the current flowing through the resistor 20 (FIG. 3) is cut off, the ACZX-N signal (FIG. 3) shifts to a low level. This transition to the low level is sent to the control unit 42 (FIG. 3).

Time T2
When the AC power supply 15 (FIG. 3) increases and passes through the 0 level, the rectifier bridge 23 (FIG. 3) starts the next half-wave rectification, and therefore the point C as viewed from the point B (FIG. 3) (FIG. 3). The potential of (c) begins to increase. At this time, the gates of the triac 7 (FIG. 3) and the photo triac 4 (FIG. 3) are turned off. At the same time, the current flowing from the active line of the AC power supply unit 31 (FIG. 3) to the negative side of the rectifier bridge 13 (FIG. 3) through the output voltage maintenance setting unit 41 (FIG. 3) passes through the point A, and part thereof Flows through the capacitor 16 (FIG. 3) to the negative side of the rectifier bridge 23 (FIG. 3), so that the potential (b) at the point A (FIG. 3) viewed from the point B (FIG. 3) also starts to rise.

Time T3
When the potential (c) at point C (FIG. 3) viewed from full-wave rectified point B (FIG. 3) exceeds a predetermined voltage (threshold voltage S), the transistor 26 (FIG. 3) is turned on. The phototransistor 18 (FIG. 3) is turned on. Therefore, a predetermined amount of current flows through the resistor 20 (FIG. 3), and the ACZX-N signal 19 (FIG. 3) (d) shifts to a high level and maintains its value. This high level transition is sent to the control unit 42 (FIG. 3).

Time T4
When the AC power supply 15 (FIG. 3) reaches a positive peak value, the potential (b) at the point A (FIG. 3) viewed from the point B (FIG. 3), that is, the accumulated charge amount of the capacitor 16 (FIG. 3) is also maximized. to maintain a high value. After that, the electric charge 15 is attenuated by the AC power supply 15 (FIG. 3), the capacitor 16 (FIG. 3), the rectifier bridge 13 (FIG. 3), the rectifier bridge 23 (FIG. 3), the resistor 22 (FIG. 3), the Zener. diode 24 (FIG. 3), the resistor 25 (FIG. 3), are conductive discharge through the loop consisting of the charge on capacitor 16 at time T7 vicinity will return to minimum value. At the same time, the potential (c) at the point C (FIG. 3) viewed from the point B (FIG. 3) also reaches the peak value, and then starts to decay.

Time T5
ACTRG-N after a predetermined time ((S2 / 2) × α) has elapsed from the transition of the ACZX-N signal 19 (FIG. 3) (d) to the low level, which is accepted by the control unit 42 (FIG. 3) at time T1. Signal 5 (FIG. 3) (e) is supplied to the cathode side of phototriac 4 (FIG. 3). An on trigger is applied to the gate of the TRIAC 7 (FIG. 3) by the ACTRG-N signal (FIG. 3) (e). As a result, a halogen lamp current (f) is applied to the halogen lamp 8 (FIG. 3). Here, S2 is one wavelength period of the AC power supply 15 (FIG. 3), and α is a predetermined constant, which is normally set to 0.7.

Time T6
When the AC power supply 15 (FIG. 3) decreases and passes through the 0 level, the rectifier bridge 23 (FIG. 3) starts the next half-wave rectification, so the point C as viewed from the point B (FIG. 3) (FIG. 3). The potential (c) starts increasing before reaching the threshold voltage S. This is because the capacitor 16 is affected by the electric charge. Therefore, the ACZX-N signal 19 (FIG. 3) remains at the high level.

Time T7
When the AC power supply 15 (FIG. 3) reaches a negative peak value and starts to increase, the potential (c) at the point C (FIG. 1) viewed from the full-wave rectified point B (FIG. 1) decays from the peak value. Turn to.
Time T8
Negative trigger after a predetermined time ((S2 / 2) α + S2 / 2) has elapsed since the transition of the ACZX-N signal 19 (FIG. 3) (d) to the low level received by the control unit 42 (FIG. 3) at time T1. The ACTRG-N signal 5 (FIG. 3) (e) is supplied to the cathode side of the phototriac 4 (FIG. 3). An on trigger is applied to the gate of the triac 7 (FIG. 3) by the ACTRG-N signal (FIG. 3). As a result, a halogen lamp current (f) is applied to the halogen lamp 8 (FIG. 3).

Time T9
When the potential (c) at point C (FIG. 3) viewed from full-wave rectified point B (FIG. 3) falls below a predetermined voltage (threshold voltage S), transistor 26 (FIG. 3) is turned off. Therefore, the phototransistor 18 (FIG. 3) is also turned off. Accordingly, since the current flowing through the resistor 20 (FIG. 3) is cut off, the ACZX-N signal (FIG. 3) (d) shifts to a low level. The transition of the ACZX-N signal 19 (FIG. 3) to the low level is sent to the control unit 42 (FIG. 3).

Time T10
When the AC power supply 15 (FIG. 3) increases and passes through the 0 level, the rectifier bridge 23 (FIG. 3) starts the next half-wave rectification, and therefore the point C as viewed from the point B (FIG. 3) (FIG. 3). The potential of (c) begins to increase. At this time, the gates of the triac 7 (FIG. 3) and the photo triac 4 (FIG. 3) are turned off. At the same time, the current flowing from the active line of the AC power supply unit 31 (FIG. 3) to the negative side of the rectifier bridge 13 (FIG. 3) through the output voltage maintenance setting unit 41 (FIG. 3) passes through the point A (B The potential at point A (FIG. 3) viewed from FIG. 3) also starts to rise. The same operation is repeated thereafter.

The following points should be noted in the above description.
At the time T6, the voltage at the point C (b) viewed from the point B before being attenuated to the threshold voltage S starts to rise due to the influence of the charge accumulated in the capacitor 16 (FIG. 3). Therefore, the ACZX-N signal (d) is generated 1/2 times the number of zero crossings of the AC power supply input voltage (a). The first embodiment (FIG. 2) is greatly different from the number of times of generation equal to the number of zero crossings of the AC power supply input voltage (a). Therefore, every time the control unit 42 (FIG. 3) accepts the ACZX-N signal (d) once, it generates ACTRG-N twice (e). In order to perform this control, in the second embodiment, when the voltage doubler rectification is set, each control means described below is required.

Next, the operation of each control means of the control unit 42 (FIG. 3) will be described using a flowchart.
FIG. 5 is a processing flow (part 1) upon power-on.
FIG. 6 is a process flow (No. 2) at power-on.
Hereinafter, processing executed by the control unit 42 when the power is turned on will be described in order of steps from step S1 to step S20.
Step S1
Turn on the power and start the flow.
Step S2
The control unit 42 (FIG. 3) initializes the entire system.

Step S3
The control unit 42 (FIG. 3) sets the input port that accepts the ACZX-N signal (FIG. 3) as a simple input port, and makes it impossible to accept the ACZX-N signal (FIG. 3).
Step S4
The control unit 42 (FIG. 3) clears the timer that measures the ACZX-N signal repetition time S2.

Step S5
The control unit 42 (FIG. 3) waits for the ACZX-N signal to become high level, and proceeds to the next after detecting that the ACZX-N signal has become high level.
Step S6
The control unit 42 (FIG. 3) waits for the ACZX-N signal to become low level, and proceeds to the next after detecting that the ACZX-N signal has become low level. Through steps S5 and S6, the fall time T1 of the ACZX-N signal in FIG. 4D is detected.

Step S7
The control unit 42 (FIG. 3) starts a timer for measuring the ACZX-N signal repetition time S2.
Step S8
The process waits until the ACZX-N signal becomes high level, and proceeds to the next after detecting that the ACZX-N signal has become high level.
Step S9
The control unit 42 (FIG. 3) waits for the ACZX-N signal to become low level, and proceeds to the next after detecting that the ACZX-N signal has become low level. Through steps S8 and S9, the fall time T9 of the ACZX-N signal in FIG. 4D is detected.

Step S10
The control unit 42 (FIG. 3) stops the timer count and detects the timer value. This measurement time becomes the ACZX-N signal repetition time S2. Here, for the sake of simplicity, the ACZX-N signal repetition time S2 is measured only once. However, the reliability of the measurement value is increased by repeating Steps S4 to S10 a plurality of times and calculating the average value. I can do it.
In the above description, Step S4 to Step S10 correspond to the zero cross period detecting means 42-1 (FIG. 3).

Step S11
Based on the measured timer value, the control unit 42 (FIG. 3) proceeds to step S12 if the timer value is 13.3 mSec or more, and proceeds to step S15 if the timer value is 13.3 mSec or less. This step corresponds to the power supply voltage detection means 42-2 (FIG. 3). That is, in the case of voltage doubler rectification (power supply voltage 100 volts), the ACZX-N signal is output every voltage cycle (corresponding to FIG. 4), so that the repetition cycle becomes longer.
Step S12
The control unit 42 (FIG. 3) determines that the ACZX-N signal is output every cycle of the voltage of the AC power supply 15 (FIG. 3) (corresponding to FIG. 4), turns on the repetitive flag, and proceeds to the next. .
Step S13
The control unit 42 (FIG. 3) obtains trigger time = (timer value (S2) / 2) × α and stores it in a predetermined memory.

Step S14
The control unit 42 (FIG. 3) obtains the repetition time of the ACTRG-N signal (from T5 to T7 in FIG. 4) = (timer value (S2 / 2)) and stores it in a predetermined memory. This period corresponds to FIG. 4 (when set to voltage doubler rectification).

Step S15
The control unit 42 (FIG. 3) determines that the ACZX-N signal is output every 1/2 period of the voltage of the AC power supply 15 (FIG. 3) (corresponding to FIG. 2). Proceed to
Step S16
The control unit 42 (FIG. 3) obtains trigger time = (timer value (S1)) × α and stores it in a predetermined memory.
In the above description, step S14 corresponds to the trigger cycle setting unit 42-3.

Step S17
The control unit 42 (FIG. 3) once prohibits interruption by the ACZX-N signal.
Step S18
The control unit 42 (FIG. 3) sets the input port that receives the ACZX-N signal (FIG. 3) set in step S3 as an external interrupt input port.
Step S19
The control unit 42 (FIG. 3) sets an interrupt prohibition setting for a timer that creates a time from when the ACZX-N signal is first received until the ACTRG-N signal is output, and thereafter, voltage application processing to the halogen lamp 8 is performed. Wait for it to start.

FIG. 7 is a processing flow for starting application.
The number of times 2n that the ACTRG-N signal is output is predetermined. However, when the voltage doubler rectification is not set (corresponding to FIG. 2), it may be outputted 2n times in synchronization with the ACZX-N signal in a one-to-one manner, but is set to voltage doubler rectification. In this case, that is, when the AC power supply 31 is 100 volts (corresponding to FIG. 4), the repetition time S2 is twice as long as S1 in FIG. The output is set 2n times in synchronization with the pair 2. In this flow, the process is executed.

Step S30
The control unit 42 (FIG. 3) starts the flow of the application start process.
Step S31
The controller 42 (FIG. 3) turns on the first flag in order to determine whether or not the next timer interrupt to be generated is the first interrupt after the ACZX-N signal interrupt is generated.
Step S32
The control unit 42 (FIG. 3) sets the trigger time (S1α or (S2 / 2) α) obtained in step S13 (FIG. 6) or step S16 (FIG. 6) in the interrupt timer.

Step S33
The control unit 42 (FIG. 3) proceeds to step S34 when the repetition flag (set in step S15 or step S12 in FIG. 6) is set to on, and when set to off. Proceed to step S35.
Step S34
In the control unit 42 (FIG. 3), the repetitive flag is turned on, that is, the voltage doubler rectification is set, and the ACZX-N signal is accepted n times at a predetermined time. Set.

Step S35
Since the controller 42 (FIG. 3) repeats the flag OFF, that is, the voltage doubler rectification is not set, the ACZX-N signal is accepted 2n times at a predetermined time, so the interrupt counter 2n times Set to.
In the above description, step S34 and step S35 are the external interrupt number setting means 42-4.
Step S36
Since the preparation for interrupt acceptance is completed, the control unit 42 (FIG. 3) waits for acceptance of the ACZX-N signal by setting permission for external interruption.
Step S37
End the flow.

FIG. 8 is an ACZX-N interrupt processing flow.
Since the above steps S30 to S37 are executed and the preparation for interrupt acceptance is completed, the next time, the ACTRG-N signal is output a predetermined number of times in synchronization with the ACZX-N signal. This is a process for measuring the number of interrupts made.
Step S40
The control unit 42 (FIG. 3) starts the interrupt process for the ACZX-N signal.

Step S41
The control unit 42 (FIG. 3) once sets the ACZX-N signal interrupt prohibition.
Step S42
When the control unit 42 (FIG. 3) accepts the ACZX-N signal, the interrupt count is set (step S35 or step S34), and the count value of the internal counter is decremented by 1.

Step S43
The control unit 42 (FIG. 3) proceeds to step S44 when the count value of the internal counter becomes 0 by the current decrement, and proceeds to step S47 when the count value has not yet reached 0.
In the above description, step S42 and step S43 correspond to the external interrupt count measuring means 42-5 (FIG. 3).
Step S44
Since the controller 42 (FIG. 3) has completed outputting the required number of ACTRG-N signals, it turns on the application end flag and proceeds to the next.

Step S45
After outputting the required number of times ACTRG-N signal, the control unit 42 (FIG. 3) sets an application time for continuously energizing the halogen lamp 8 (FIG. 3) to an interrupt timer for a predetermined time set in advance. Set.
Step S46
The control unit 42 (FIG. 3) shifts the ACTRG-N signal to a low level in order to continuously energize the halogen lamp 8 (FIG. 3). Thereafter, the halogen lamp 8 (FIG. 3) is energized continuously until the application time is timed out.

Step S47
Since the control unit 42 (FIG. 3) has not yet output the ACTRG-N signal the required number of times, the control unit 42 turns off the application end flag and proceeds to the next.
Step S48
The control unit 42 (FIG. 3) sets the trigger time (step S13 (FIG. 6) or step S16 (FIG. 6) obtained in step S13 (FIG. 6) to the timer that creates the time from when the ACZX-N signal is received until the ACTRG-N signal is output. S1α or (S2 / 2) α) is set.

Step S49
The control unit 42 (FIG. 3) turns on the first flag in order to determine whether the next timer interrupt to be generated is the first interrupt after the ACZX-N signal interrupt is generated. Then go to the next.
Step S50
The control unit 42 (FIG. 3) starts counting the interrupt timer.
Step S51
The control unit 42 (FIG. 3) makes a timer interrupt permission setting.
Step S52
End the flow.

FIG. 9 shows a timer interrupt processing flow (part 1).
FIG. 10 is a timer interrupt processing flow (part 2).
If voltage doubler rectification is set in the process of outputting the ACTRG-N signal a predetermined number of times in synchronization with the ACZX-N signal, the timer interrupt is added to the external input interrupt by the ACZX-N signal. This is a process for setting the timer interrupt.
Step S60
The control unit 42 (FIG. 3) starts a timer interrupt process.
Step S61
The controller 42 (FIG. 3) once prohibits timer interruption.

Step S62
The control unit 42 (FIG. 3) proceeds to step S98 if the application end flag is on, and proceeds to step S63 if the application end flag is off.
Step S63
The control unit 42 (FIG. 3) proceeds to step S64 when the first flag is on, and proceeds to step S91 when the first flag is off.

Step S64
The control unit 42 (FIG. 3) proceeds to step S65 when the repetition flag (set in step S12 or step S15) is on, and jumps to step S67 when the repetition flag is off.
Step S65
The control unit 42 (FIG. 3) first receives the ACZX-N signal because the flag is repeatedly turned on in step S12 (FIG. 6) (that is, the voltage doubler rectification is set), and first receives the ACTRG-N. After outputting the signal, an interrupt is necessary after again (S2 / 2) (time T8 in FIG. 4E). Therefore, the repetition time S2 / 2 is set in the interrupt timer and the process proceeds to the next.

Step S66
The control unit 42 (FIG. 3) starts the interrupt timer and proceeds to the next.
Step S67
The controller 42 (FIG. 3) shifts the ACTRG-N signal to a low level and outputs it.
Step S68
The control unit 42 (FIG. 3) maintains a low level for a predetermined time (trigger time).
Step S69
The control unit 42 (FIG. 3) changes the ACTRG-N signal to high level after the elapse.

Step S70
The control unit 42 (FIG. 3) proceeds to step S71 when the repetition flag is on, and proceeds to step S73 when the repetition flag is off.
Step S71
The control unit 42 (FIG. 3) turns off the first flag and proceeds to the next.

Step S72
The control unit 42 (FIG. 3) first receives the ACZX-N signal because the flag is repeatedly turned on in step S12 (FIG. 6) (that is, the voltage doubler rectification is set), and first receives the ACTRG-N. After the signal is output, the timer interrupt is necessary again after (S2 / 2) again (time T8 in FIG. 4 (e)), so that the timer interrupt is permitted and the second timer interrupt is prepared. .
Step S73
Since the voltage doubler rectification is not set, the control unit 42 (FIG. 3) performs subsequent ACZX-N signal interrupt permission setting (external interrupt permission setting).
Step S74
End the flow.

In the above flow, when the flow is finished through step S71 and step S72 (when voltage doubler rectification is set), the second timer interrupt is entered, so the process returns to step S60 and step S61. Through step S62, the process proceeds to step S63. Here, since the first flag is turned off (step S71), the process proceeds to step S91.
Step S91
The controller 42 (FIG. 3) shifts the ACTRG-N signal to a low level and outputs it.
Step S92
The control unit 42 (FIG. 3) maintains a low level for a predetermined time (trigger time).
Step S93
The controller 42 (FIG. 3) shifts the ACTRG-N signal to a high level after a predetermined time has elapsed.
Step S94
The control unit 42 (FIG. 3) maintains that state for a predetermined time.

Step S95
The control unit 42 (FIG. 3) permits and sets the ACZX-N signal interrupt (external interrupt).
Step S96
End the flow. As a result, when the control unit 42 (FIG. 3) accepts the subsequent ACZX-N signal, the process returns to step S40 in FIG. 8, and the same flow is repeated until the number of interrupts becomes 0, and in step S43 (FIG. 8). When the number of interrupts becomes 0, the application end flag is turned on in step S44, so that the next iteration proceeds from step S62 to step S98.

Step S98
The control unit 42 (FIG. 3) shifts the ACTRG-N signal to a high level. By doing so, the energization of the halogen lamp 8 (FIG. 3) that has been energized in step S46 is stopped.
Step S99
The control unit 42 (FIG. 3) prohibits the timer interrupt.
Step S100
The control unit 42 (FIG. 3) prohibits the ACZX-N interrupt.
Step S101
End the flow.

  In the above flow, when the flow is finished through step S73 (when the voltage doubler rectification is not set), when the subsequent ACZX-N signal is accepted, the process returns to step S40 (FIG. 8) and the same. When the flow is repeated and the number of interrupts becomes zero in step S43 (FIG. 8), the process proceeds from step S62 to step S98 in the next repetition. The flow is ended through steps S98, S99, and S100 in the same manner as when the steps are completed through steps S71 and S72.

  As described above, when the voltage doubler rectification is set, two pulses of the ACTRG-N signal are output for one pulse of the ACZX-N signal, and the phase control of the halogen lamp current is performed in the AC input voltage cycle. After n times, continuous energization begins. When voltage doubler rectification is not set, one pulse of ACTRG-N signal is output for one pulse of ACZX-N signal, and the phase control of the halogen lamp current is performed n times in the AC input voltage cycle. After that, energization control begins. Therefore, even if voltage doubler rectification is set, the number of times the halogen lamp 8 is energized within a predetermined time is the same even if it is not set. As a result, by adding the noise component removing unit 35 described in the first embodiment, it is possible to automatically solve the disadvantages that occur when the voltage doubler rectification is set.

  In the above description, the value of n is not particularly set. However, in the present invention, the value of n can be set arbitrarily. Therefore, even when the halogen lamp 8 is in a cold state immediately after the power is turned on or after returning from the power saving state, the inrush current at the start of energization can be prevented from becoming excessive. Can also be obtained.

  In the above description, the case where the present invention is applied to an electrophotographic printer has been described, but the present invention is not limited to this example. That is, the present invention can also be applied to a copying machine or a composite device.

1 is a power supply circuit diagram according to Embodiment 1. FIG. 3 is a time chart of the power supply circuit according to the first embodiment. 6 is a power supply circuit diagram according to Embodiment 2. FIG. 6 is a time chart of a power supply circuit according to Embodiment 2. It is the processing flow (the 1) at the time of power activation. It is a processing flow (the 2) at the time of power activation. It is a processing flow of an application start. It is an ACZX-N interrupt processing flow. It is a timer interrupt processing flow (part 1). It is a timer interrupt processing flow (part 2). 1 is a schematic configuration diagram of a fixing device. It is a schematic block diagram of a printing apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 DC power supply 2 Resistance 4 Phototriac 5 ACTRG-N signal 6 Resistance 7 Triac 8 Halogen lamp 9 Resistance 11 Rectifier capacitor 12 Rectifier capacitor 13 Rectifier bridge 14 AC filter 15 AC power source 16 Capacitor 17 DC power source 18 Phototransistor 19 ACZX-N signal 20 Resistor 21 Resistor 22 Resistor 23 Rectifier Bridge 24 Zener Diode 25 Resistor 26 Transistor 31 AC Power Supply Unit 32 Internal Power Supply Unit 33 Zero-Cross Detection Unit 34 Heating Unit 35 Noise Component Removal Unit

Claims (3)

A power supply device having a first power supply output unit that inputs an AC power supply, outputs the AC power supply by full-wave rectification, and a second power supply output unit that outputs a part of the AC power supply as an AC supply power supply. There,
A zero-cross detector that changes the output signal when the output voltage obtained by full-wave rectification of the AC power source is within a predetermined range;
An output control unit for controlling the output of the second power output unit based on a change in the output signal;
A potential adjustment unit that couples the neutral line of the first power supply output unit and the neutral line of the zero-cross detection unit at high frequency, and prevents noise components from entering the zero-cross detection unit ;
An output voltage maintenance setting unit that maintains a predetermined output voltage by switching the input active line of the first power output unit and the middle point of the output load to a connected state or a disconnected state according to the voltage level of the input AC power source When,
Zero-cross period detecting means for detecting a change period of the output signal;
A power supply voltage detecting means for detecting a switching state by the output voltage maintaining and setting unit based on a comparison result between a detection result of the zero cross period detecting means and a reference change period set in advance;
Control for causing the output control unit to output a control signal at one of the change period detected by the zero-crossing period detection means and ½ of the change period based on the detection result of the power supply voltage detection means A power supply apparatus further comprising a signal generation cycle setting means. A power supply device having a first power supply output unit that inputs an AC power supply, outputs the AC power supply by full-wave rectification, and a second power supply output unit that outputs a part of the AC power supply as an AC supply power supply. There,
A zero-cross detector that changes the output signal when the output voltage obtained by full-wave rectification of the AC power source is within a predetermined range;
An output control unit for controlling the output of the second power output unit based on a change in the output signal;
An output voltage maintenance setting unit that maintains a predetermined output voltage by switching the input active line of the first power output unit and the middle point of the output load to a connected state or a disconnected state according to the voltage level of the input AC power source When,
Zero-cross period detecting means for detecting a change period of the output signal;
A power supply voltage detecting means for detecting a switching state by the output voltage maintaining and setting unit based on a comparison result between a detection result of the zero cross period detecting means and a reference change period set in advance;
Control for causing the output control unit to output a control signal at one of the change period detected by the zero-crossing period detection means and ½ of the change period based on the detection result of the power supply voltage detection means A power supply apparatus further comprising a signal generation cycle setting means. A power supply device according to any one of claims 1 and 2, comprising:
The output control unit receiving power from the first power output unit;
An image forming apparatus comprising: a heating element that receives power from the second power output unit.