JP4513702B2 - Image output device - Google Patents

Description

  The present invention relates to a technique for performing predetermined image processing on input image data and outputting the processed image data.

  The printing resolution of printing apparatuses such as printers is increasing year by year, and often exceeds the resolution of images taken with a digital camera or the like. In such a case, one pixel of image data to be printed corresponds to a plurality of sets of pixels that are units for printing. For example, when the resolution of an image to be printed is 360 dpi × 360 dpi and the print resolution is 1440 dpi × 720 dpi, one pixel on the image data side corresponds to a set of 4 × 2 pixels on the printing device side. It will be.

  In this way, when the output resolution is higher than the input resolution, for example, the gradation value of one pixel on the image data side is to be coded by the number and arrangement of dots formed in the 4 × 2 pixel group. A method can be considered. The simplest method in this case applies the concept of area gradation to a set of 4 × 2 pixels, and dots are formed on all pixels from a state where dots are not formed on all pixels. This is a technique of expressing the state with 9 levels of code values (also called density pattern method). On the other hand, the applicant proposes a method that realizes high-speed processing while maintaining the image quality by the systematic dither method by applying the concept of the systematic dither method locally to a set of 4x2 pixels, so to speak. (See Patent Document 1 below). Such a technique is an epoch-making technique that realizes extremely high-speed halftone processing and realizes an image quality comparable to that of the conventional systematic dither method.

International Publication No. 2004/086750 Pamphlet

  By the way, such image processing may be realized by software using a CPU, or may be realized by designing dedicated hardware. In general, if appropriate hardware is designed, high-speed processing can be realized as compared with software. Since the above method can originally perform processing faster than error diffusion, if it is realized by hardware, it is possible to further increase the speed.

  However, there are various restrictions on hardware design. For example, when a specific condition is established in the image data, it is difficult to realize a flexible response that is performed by performing a process different from the original process by hardware.

  In view of such a situation, the problem to be solved by the present invention is that an image output device that implements image processing in units of a predetermined pixel group by hardware can easily perform different processing according to specific conditions. There is to do.

In order to solve the above problems, the present invention is configured as an image output apparatus as follows. That is,
An image output device that performs predetermined image processing and outputs the input image data,
Intermediate data generation that divides input image data into pixel groups in units of a predetermined number of pixels, generates first intermediate data and second intermediate data from the pixel groups according to the characteristics of the pixel groups, and outputs them respectively Unit,
An image processing unit group in which a plurality of image processing units that input the first intermediate data and sequentially transfer the first intermediate data while performing predetermined image processing on each of the first intermediate data;
A plurality of pass units that input the second intermediate data and sequentially transfer at least the second intermediate data in synchronization with the transfer of the first intermediate data between the image processing units in series. Connected path units, and
The first intermediate data after image processing is performed by the image processing unit group and the second intermediate data sequentially transferred through the pass unit group are input, and the input is performed based on a predetermined condition. A data selector for selecting one of the intermediate data received,
The gist includes: a storage unit that stores intermediate data selected by the data selector; and an output image generation unit that generates an output image using the intermediate data stored in the storage unit.

  In the image output apparatus of the present invention, the input image data is divided into pixel groups each having a predetermined number of pixels, and first intermediate data and second intermediate data are generated according to the characteristics of the pixel groups. . The first intermediate data is transferred while being subjected to various image processing by each image processing unit, and the second intermediate data is synchronized with the transfer of the first intermediate data through the image processing unit group. Each pass unit is transferred. Finally, any intermediate data is selected by the data selector based on a predetermined condition, and the intermediate data thus selected is sequentially stored in the storage unit.

  According to the image output apparatus having such a configuration, two intermediate data generated according to the characteristics of the pixel group are transferred in synchronization with the image processing unit group and the pass unit group, respectively, and an output image is generated. Is stored in the storage unit. Therefore, different image processing can be easily performed between the first intermediate data and the second intermediate data. Further, since the first intermediate data and the second intermediate data are transferred in synchronization before being stored in the storage unit, the transfer order is not changed, and the intermediate data is processed one after another. It is possible to flow through the unit group and the pass unit group. As a result, hardware for ensuring the consistency of the data order is not required, so that the hardware can be simplified and the processing time required for image processing can be greatly shortened. In addition to the transfer of the second intermediate data, the pass unit may perform predetermined image processing on the second intermediate data.

In the image output apparatus having the above configuration,
The pass unit group may include the same number of pass units as the image processing units.

  With such a configuration, it is possible to easily synchronize the transfer of the first intermediate data in the image processing unit group and the transfer of the second intermediate data in the pass unit group.

In the image output apparatus having the above configuration,
The image processing unit transmits a request signal for requesting data reception to another image processing unit to which the first intermediate data is transferred, and the other image processing unit receives the request signal. Then, the first intermediate data transferred from the image processing unit is received, and when the reception of the first intermediate data is completed, a confirmation indicating that the data reception is completed is given to the image processing unit. The first intermediate data can be transferred by transmitting a signal.

  According to such a configuration, each image processing unit can efficiently transfer the first intermediate data sequentially while performing the image processing that each image processing unit is responsible for.

In the image output apparatus having the above configuration,
The pass unit is
The image processing unit provided corresponding to the pass unit branches and inputs the confirmation signal to be transmitted to another image processing unit that is a transfer source of the first intermediate data. When the input is detected, the second intermediate data is input from another path unit that is a transfer source of the second intermediate data;
The image processing unit provided corresponding to the pass unit is transmitted from another image processing unit that transfers the first intermediate data to the image processing unit provided corresponding to the pass unit. When the confirmation signal is branched and input, and the input of the confirmation signal is detected, the second intermediate data is output to another path unit to which the second intermediate data is transferred, The second intermediate data may be transferred in synchronization with the transfer of the first intermediate data between the image processing units.

  According to such a configuration, each path unit can appropriately transfer the second intermediate data by using a signal used by each image processing unit to transfer the first intermediate data. With this configuration, the first intermediate data and the second intermediate data can be transferred in synchronization.

  In the image output apparatus having the above-described configuration, the intermediate data generation unit generates, as the first intermediate data, data obtained by averaging pixel values of pixels constituting the pixel group and reducing the resolution of the pixel group. Can be.

  With such a configuration, data with reduced resolution of the input image data can be generated as the first intermediate data. Therefore, the processing speed of image processing in each image processing unit can be improved.

In the image output apparatus having the above configuration,
The intermediate data generation unit is
Detecting means for detecting whether or not an edge is included in the pixel group;
When the detection unit detects that an edge is included, the second intermediate data may include a generation unit that generates data representing a form of the edge.

  With such a configuration, image processing is performed at a high resolution while maintaining the resolution at the time of input with respect to a characteristic portion having an edge such as a character, and the other portions have a resolution as in the configuration described above. It is possible to perform processing such as performing image processing while reducing the above.

In the image output apparatus having the above configuration,
The detection unit of the intermediate data generation unit may determine that an edge is included when the pixel group includes white and black pixels.

  According to such a configuration, it is possible to determine the presence / absence of an edge by a simple determination process of whether or not a pixel group includes white and black pixels. In addition, since most of the character parts in image data representing business documents are represented by white and black, the character parts are efficiently extracted from the image data, It becomes possible to perform processing different from the part.

In the image output apparatus having the above configuration,
The generation unit of the intermediate data generation unit generates data that binarizes the pixel group according to the arrangement of white and black pixels in the pixel group as data representing the form of the edge. Can do.

  According to such a configuration, the data capacity of the second intermediate data can be greatly reduced.

In the image output apparatus having the above configuration,
The generation means of the intermediate data generation unit includes means for generating predetermined dummy data as the second intermediate data when the detection means detects that no edge is included. it can.

  According to such a configuration, even when the pixel group is in a normal mode that does not include an edge, dummy data is transferred to the pass unit group, so that the synchronization between the image processing unit group and the pass unit group is appropriately maintained. be able to.

In the image output apparatus having the above configuration,
The intermediate data generation unit generates an identifier indicating which intermediate data is superior between the first intermediate data and the second intermediate data according to the presence or absence of the edge, and A means for outputting the identifier to the path unit group together with the intermediate data of 2 may be provided.

  In such a configuration, the data selector may input the identifier together with the second intermediate data, and perform the selection according to the identifier.

  According to such a configuration, it is possible to easily determine which intermediate data of the first intermediate data and the second intermediate data should be stored in the storage unit.

In the image output apparatus having the above configuration,
Each of the pass units may be composed of a predetermined number of FIFO memories.

  According to such a configuration, even when one image processing unit inputs a plurality of first intermediate data and performs image processing, the same number of second intermediates are assigned to one pass unit. Since data can be stored, the first intermediate data and the second intermediate data can be transferred in appropriate synchronization.

In the image output apparatus having the above configuration,
The output image generation unit generates the output image by individually performing different halftone processes on the first intermediate data and the second intermediate data stored in the storage unit. It can be.

  According to such a configuration, the first intermediate data and the second intermediate data can be subjected to halftone processing according to the respective characteristics to generate an output image, so that the image quality can be improved. It becomes possible to plan.

Hereinafter, in order to further clarify the operations and effects of the present invention described above, embodiments of the present invention will be described based on examples in the following order.
A. General configuration of printing device:
B. Internal configuration of the printing device:
C. Detailed configuration of the image processing unit:
C-1. Color conversion circuit (monochrome edge encoding, etc.):
C-2. Halftone circuit (monochrome edge decoding, halftone processing, etc.):
C-3. Head drive data conversion circuit:
D. Effects of the embodiment:
E. Data flow in the halftone circuit in 1 × 1 mode:
F. How to create a black data table:
G. Examples of other output resolution modes:
H. Variations:

A. General configuration of printing device:
FIG. 1 is an explanatory diagram illustrating a schematic configuration of a printing apparatus 100 as an embodiment. The printing apparatus 100 corresponds to the image output apparatus of the present invention. As illustrated, the printing apparatus 100 according to the present exemplary embodiment is an apparatus that is connected to a computer 900 via a USB cable 135 or the like and prints data such as images and documents output from the computer 900. When printing these data, the computer 900 can perform various print settings such as designation of the type and size of the print medium S and designation of output resolution for the printing apparatus 100. In addition, the printing apparatus 100 includes an operation panel 140, and the same setting can be performed from the printing apparatus 100 main body. Note that the printing apparatus 100 and the computer 900 may be collectively referred to as an image output apparatus in a broad sense.

  The printing apparatus 100 according to the present embodiment is a so-called multifunction machine type printing apparatus, and a scanner 110 is provided on an upper portion thereof. If this scanner 110 is used, it is possible to capture an image with the printing apparatus 100 alone and print the captured image regardless of whether the computer 900 is connected or not. A memory card slot 120 for inserting a memory card is provided on the front surface of the printing apparatus 100. The printing apparatus 100 can also input and print an image from a memory card inserted into the memory card slot 120 regardless of whether or not the computer 900 is connected.

  The outline of the operation of the printing apparatus 100 of the present embodiment is shown in the lower part of the figure. The printing apparatus 100 according to the present exemplary embodiment inputs image data with a resolution of 720 dpi × 720 dpi from a computer 900, a scanner 110, a memory card, and the like, and performs printing on the print medium S with a resolution of 720 dpi × 720 dpi. In such a printing process, the printing apparatus 100 determines whether or not a portion (hereinafter, such a portion is referred to as a “monochrome edge”) configured only by a combination of white and black in the input image. . As a result, the first halftone process is performed on the portion where the black and white edge does not exist by referring to various tables called a quantization table, a number table, and an order value matrix once the resolution is reduced to 360 dpi × 360 dpi. On the other hand, the second halftone process is performed on the portion where the black and white edge exists while maintaining the resolution of 720 dpi × 720 dpi while referring to a table called a black data table created in advance. Finally, both parts are combined and printing is performed at an output resolution of 720 dpi × 720 dpi. By doing this, it is possible to print clearly with high resolution for characters and symbols composed of a combination of white and black, and for other background portions, while reducing the amount of data. be able to. Hereinafter, a detailed configuration of the printing apparatus 100 will be described.

B. Internal configuration of the printing device:
FIG. 2 is an explanatory diagram illustrating an internal configuration of the printing apparatus 100. As shown in the figure, the printing apparatus 100 serves as a mechanism for printing on the print medium S, a carriage 210 having an ink cartridge 212 mounted thereon, a carriage motor 220 that drives the carriage 210 in the main scanning direction, and the print medium S in the sub-scanning direction. And a paper feed motor 230 for conveying the paper.

  The carriage 210 is movably held by a sliding shaft 280 installed in parallel with the axial direction of the platen 270. The carriage motor 220 can reciprocate the carriage 210 in the main scanning direction along the sliding shaft 280 by rotating the drive belt 260 in accordance with a command from the control unit 150.

  The paper feed motor 230 rotates the platen 270 according to a command from the control unit 150, thereby conveying the print medium S perpendicular to the axial direction of the platen 270. That is, the paper feed motor 230 can relatively move the carriage 210 in the sub-scanning direction.

  The carriage 210 has a total of eight colors: cyan (C), magenta (M), yellow (Y), black (K), light cyan (lc), light magenta (lm), dark yellow (dy), and transparent (cr). The ink cartridge 212 containing the ink is mounted (in the drawing, only four types of ink cartridges are shown for convenience). When the ink cartridge 212 is mounted on the carriage 210, the ink in the ink cartridge 212 is supplied to the ink head 211 provided on the lower surface of the carriage 210 through an ink passage (not shown). In this embodiment, eight colors of ink are used, but light cyan, light magenta, dark yellow, and transparent colors may not be used. The transparent ink is ink that is mainly ejected on a blank paper portion on which other ink is not ejected. According to this transparent ink, the same glossiness as that of other inks can be imparted to the portion where no color is printed.

  In the ink head 211, eight sets of nozzle rows are arranged in the sub-scanning direction for each ink type. In one set of nozzle rows, 90 nozzles are arranged at a constant pitch (for example, 1/120 inch = 0.21 mm). That is, when the carriage is main-scanned once, a maximum of 90 raster lines are simultaneously formed on the print medium S with a certain pitch interval. This pitch spacing is an integer multiple of the pitch between adjacent rasters that are ultimately formed on the print medium. Here, the number of nozzles arranged in the sub-scanning direction of the nozzle row is N [numbers] (N is a positive integer), and the dot pitch between nozzles is k [numbers] (k is relatively prime to N. (Integer), assuming that the nozzle density is D [pieces / inch], each time the main scanning is performed, if the print medium is conveyed in the sub-scanning direction by a fixed distance corresponding to N / (D · k), it is adjacent in the sub-scanning direction. The raster to be formed is formed by different nozzles. Therefore, even when there are some variations in the characteristics and pitches of individual nozzles, banding due to such variations can be suppressed, and high-quality printing can be performed. Such a printing method is called interlaced printing.

  The ink head 211 can adjust the size of the ink droplets to be ejected according to control by the control unit 150. As a result, three types of sizes of large dots, medium dots, and small dots can be formed on the print medium S.

  FIG. 3 is an explanatory diagram showing the principle by which ink droplets of different sizes are ejected from the ink head 211. In the voltage waveform shown in the upper part of the figure, the waveform indicated by a broken line is a waveform when a normal dot is ejected. In a section d2 shown in the voltage waveform, once a negative voltage is applied to the piezo element PE, the piezo element PE is deformed in a direction in which the cross-sectional area of the ink passage 68 is increased. Since the ink supply speed from the ink passage of the ink cartridge 212 is limited, the ink supply amount is insufficient for the expansion of the ink passage 68. As a result, as shown in the state A in the lower part of FIG. 3, the ink interface Me at the tip of the nozzle Nz is indented inside the nozzle Nz.

  On the other hand, if a negative voltage is suddenly applied to the piezo element PE as shown in the section d1 using the voltage waveform indicated by the solid line, the amount of ink supplied from the ink cartridge 212 is further insufficient. Therefore, the ink interface Me is further indented as compared with the state A as indicated by the state a. Next, when a positive voltage is applied to the piezo element PE (section d3), the ink passage 68 is narrowed and ink is ejected. At this time, large ink droplets are ejected from the state (state A) where the ink interface Me is not recessed inward so much as shown in the state B and the state C. On the other hand, small ink droplets are ejected from the state (state a) where the ink interface Me is greatly recessed inward as shown in the state b and the state c. Thus, inks having different sizes are ejected from the ink head 211.

  Returning to FIG. The printing apparatus 100 includes a control unit 150 for controlling the printing mechanism described above. Connected to the control unit 150 are a USB interface 130 for inputting image data to be printed, a scanner 110, and a memory card slot 120. Further, the control unit 150 is connected with an operation panel 140 for receiving an operation by a user.

  The control unit 150 has a function of performing predetermined image processing on image data input from the USB interface 130, the scanner 110, and the memory card slot 120, and controlling the printing mechanism to perform printing. The control unit 150 includes a CPU 151, an SDRAM 152, a ROM 153, an EEPROM 154, an image processing unit 155, a head control unit 156, and the like in order to realize such functions. Each of these devices is connected to each other via a predetermined bus.

  In the ROM 153, firmware is recorded as a program for controlling the entire operation of the printing apparatus 100. When the printing apparatus 100 is powered on, the CPU 151 loads this firmware into a predetermined work area of the SDRAM 152 and executes it.

  FIG. 4 is an explanatory diagram showing a memory map of the SDRAM 152. As shown in the drawing, in the SDRAM 152, various data in addition to the firmware FW are read from the ROM 153 by the CPU 151 and expanded. Examples of data to be developed include a monochrome edge table ET, a color conversion table LUT, a quantization table QT, a first dot number table DT1, a second dot number table DT2, an order value matrix OM, and a black data table BT. . Also, the SDRAM 152 has various buffer areas for temporarily storing various intermediate data generated during image processing. Examples of the buffer area include a line buffer LB, an encode data buffer EB, a dot formation data buffer DB, and a head drive data buffer HB. The functions of the data and buffers listed here will be described as needed.

  Returning to FIG. In the EEPROM 154, data for correcting the characteristic unique to each individual detected in the manufacturing process of the printing apparatus 100 is recorded. Such correction data includes, for example, data for correcting the amount of ink ejected from each nozzle of the ink head 211 and the ejection direction of ink ejected from each nozzle. These correction data are used when the color tone is corrected by an image processing unit 155 described later.

  The image processing unit 155 is a custom LSI specializing in image processing functions related to printing, and the interior is roughly divided into a color conversion circuit 300, a halftone circuit 400, and a head drive data conversion circuit 500. ing. The color conversion circuit 300 is a circuit that converts RGB format data into CMYK format data. The halftone circuit 400 is a circuit that performs halftone processing on CMYK format data. The head driving data conversion circuit 500 is a circuit for converting the data subjected to the halftone process into data for driving the ink head 211.

  The image processing unit 155 includes a register (not shown) for setting various setting information necessary for image processing. Various setting information set by the user by the computer 900 or the operation panel 140, such as the resolution of image data to be printed, the size of the print medium, and the output resolution mode, is written into this register by the CPU 151. The image processing unit 155 performs various image processing according to the setting information written in the register.

  The head control unit 156 acquires the head driving data finally generated by the image processing unit 155 from the head driving data buffer HB of the SDRAM 152, and based on the head driving data, the paper feed motor 230 and the carriage motor 220 are acquired. Ink droplets are ejected from each nozzle at an appropriate timing. In this way, dots of each color are formed at appropriate positions on the print medium S, and color printing is performed.

C. Detailed configuration of the image processing unit:
Next, a detailed configuration of the image processing unit 155 will be described. As described above, the image processing unit 155 includes the color conversion circuit 300, the halftone circuit 400, and the head driving data conversion circuit 500. Therefore, these circuits will be described in order below.

C-1. Color conversion circuit:
FIG. 5 is a block diagram showing a detailed configuration of the color conversion circuit 300. The color conversion circuit 300 has a function of converting image data expressed in RGB format (hereinafter referred to as “RGB image data”) into image data in CMYK format (hereinafter referred to as “CMYK image data”), and CMYK. It has a function of performing various image processes for improving the image quality of image data, a function of extracting a black and white edge portion from input RGB image data, and the like.

  As shown in the figure, the color conversion circuit 300 includes a line input unit 310, a monochrome edge processing unit 320, a color conversion unit 330, an ink amount correction unit 340, a print fringe suppression unit 350, a bit reduction unit 360, A transparent ink post-processing unit 370 and an in-block smoothing unit 380 are provided. Hereinafter, these units located in the upper part of the figure are collectively referred to as a main unit.

  The monochrome edge processing unit 320 of this embodiment corresponds to the “intermediate data generation unit” of the present application. Further, in the color conversion circuit 300, the color conversion unit 330, the ink amount correction unit 340, the print fringe suppression unit 350, the bit reduction unit 360, the transparent ink post-processing unit 370, and the in-block smoothing unit 380 The encoder 410 in the halftone circuit 400 described later corresponds to the “image processing unit” of the present application.

  The main unit is connected in series in the order described above by three types of signal lines: a data line (data), a request line (req), and an acknowledge line (ack). Each unit exchanges data by exchanging a req signal and an ack signal using these signal lines. Specifically, when the data transmitting unit transmits data to the receiving unit, it transmits a req signal notifying that the data has been transmitted. When the receiving side receives the req signal, it knows that the data has been transmitted, so it starts the data reading process and returns an ack signal indicating that the data is being received. When the receiving unit completes the reading process and restores the ack signal, the transmitting side can confirm that the data has been reliably received. Then, the transmission-side unit returns the req signal to the original, and shifts to transmission of the next data.

  The color conversion circuit 300 includes a total of six pass units 390a to 390f from the first pass unit 390a to the sixth pass unit 390f so as to correspond to the main units from the color conversion unit 330 to the in-block smoothing unit 380. It is provided in series. These pass units 390a to 390f transmit the data output from the monochrome edge processing unit 320 to the halftone circuit 400 described later, and also output various information output from the color conversion unit 330 to the in-block smoothing unit 380. It is a unit provided to transmit up to.

  When each of the pass units 390a to 390f branches and inputs an ack signal transmitted from the main unit provided corresponding to the pass unit to the main unit in the previous stage, the path units 390a to 390f take in data from the previous pass unit. Then, when the main unit provided correspondingly branches and inputs the ack signal received from the subsequent main unit, the data is transferred to the subsequent pass unit. That is, data is sequentially transmitted to the pass units 390a to 390f in synchronization with the data being transmitted to the main unit. According to such a configuration, various data transferred through the pass unit can be easily taken into the corresponding main unit, and the expandability of the circuit can be improved. Further, even when the volume of data to be handled increases and the bus width between the main units is insufficient, more data can be handled by using the path unit.

  FIG. 6 is an explanatory diagram showing the internal configuration of the pass units 390a to 390f. As shown in the drawing, the path units 390a to 390f are configured as 8-bit 16-stage FIFO memories. In this FIFO memory, 8-bit data transferred from the previous pass unit is sequentially stored. Then, data is output to the subsequent pass unit in the order in which the accumulated order is old. The 8-bit data includes 5-bit monochrome edge data, 2-bit edge data, and 1-bit noise data.

(C-1-1) Line input unit:
Here, the description returns to FIG. 5, and details of each unit constituting the main unit will be described.
The line input unit 310 inputs RGB image data having a resolution of 720 dpi × 720 dpi from the USB interface 130, the scanner 110, the memory card slot 120, and the like, and accumulates the input RGB image data in the line buffer LB. Then, the RGB image data is read from the line buffer LB two lines at a time, and the read two lines of data are transferred to the monochrome edge processing unit 320. The line input unit 310 also has a function of transferring image data line by line when the resolution of the input RGB image data is 360 dpi × 360 dpi.

(C-1-2) Monochrome edge processing unit:
FIG. 7 is an explanatory diagram showing the internal configuration of the monochrome edge processing unit 320 shown in FIG. As illustrated, the monochrome edge processing unit 320 includes a monochrome edge determination circuit 321 connected to the line input unit 310, and an averaging circuit 322 that receives the output of the monochrome edge determination circuit 321 and performs gradation value averaging processing. The black and white edge encoding circuit 323 that receives the output of the black and white edge determination circuit 321 and encodes the black and white edge portion, and the data that is output from the line input unit 310 and the averaging circuit 322 and is output to the color conversion unit 330 And a selector circuit 324 for performing selection.

(C-1-2-1) Monochrome edge determination circuit:
The monochrome edge determination circuit 321 is a circuit that determines whether or not an input pixel corresponds to a monochrome edge. Specifically, the black and white edge determination circuit 321 generates 2 × 2 pixel groups (A, B, C, and D in the figure) from the image data of the first line and the second line input from the line input unit 310. Are sequentially extracted, and it is determined whether or not these four pixels are monochrome edge patterns. A monochrome edge pattern is a pattern in which four pixels are composed of only white (RGB = (255, 255, 255)) and black (RGB = (0, 0, 0)). A pattern excluding a white pattern and a black pattern for all pixels. The monochrome edge determination circuit 321 sets “1” to the monochrome edge determination flag if the extracted four pixels are the monochrome edge pattern, and sets “0” to the monochrome edge determination flag if it is not the monochrome edge pattern. . When the black and white edge pattern determination is completed, the black and white edge determination circuit 321 outputs the RGB data of the four pixels to be determined to both the averaging circuit 322 and the black and white edge encoding circuit 323. At this time, the value of the above-described monochrome edge determination flag is also output to the monochrome edge encoding circuit 323.

(C-1-2-2) Monochrome edge encoding circuit:
The monochrome edge encoding circuit 323 is a circuit that binarizes monochrome edge pattern data and encodes it into 5-bit data. Specifically, if the monochrome edge determination flag input from the monochrome edge determination circuit 321 is set to “1”, the monochrome edge table ET is stored for the RGB data of the four pixels transferred from the monochrome edge determination circuit 321. Data conversion is performed with reference to generate 5-bit monochrome edge data.

  FIG. 8 is an explanatory diagram showing an example of the black and white edge table ET. As shown in the figure, the monochrome edge table ET stores 4-bit encoded data in association with the pattern of four pixels. This monochrome edge table ET is stored in the SDRAM 152 as shown in FIG. As shown in the upper part of the figure, assuming that the upper left pixel of the four pixels is A, the upper right is B, the lower left is C, and the lower right is D, for example, the monochrome edge encoding circuit 323 has four pixels of RGB data, If (A, B, C, D) = (0, 0, 0, 255), it is converted into 4-bit data “0001”, and (A, B, C, D) = (0, 0, 255). , 0), it is converted into 4-bit data “0010”. The black and white edge table ET has a relatively small data capacity and may be incorporated as a circuit in the black and white edge encoding circuit 323. Even if the monochrome edge table ET is not used, the gradation value of each pixel may be divided by 255 and the quotient portion may be combined to dynamically generate encoded data.

  Returning to FIG. On the other hand, if the monochrome edge determination flag received from the monochrome edge determination circuit 321 is set to “0”, the monochrome edge encoding circuit 323 is transferred from the monochrome edge determination circuit 321 regardless of the monochrome edge table ET. The RGB data of the four pixels is encoded into 4-bit data “0000”.

  As described above, the monochrome edge encoding circuit 323 converts the RGB data of the four pixels into 4-bit data, adds the content of the monochrome edge determination flag to the most significant bit of the encoded 4-bit data, Finally, 5-bit monochrome edge data is generated. For example, if the result of encoding four pixels is “0001”, the finally obtained data is “10001”. If the four pixels are not monochrome edge patterns, the finally obtained data is “00000”. The data “00000” may be called dummy data in distinction from the monochrome edge data.

  The monochrome edge encoding circuit 323 transfers the 5-bit monochrome edge data thus encoded to the first pass unit 390a. Therefore, when the four pixels to be processed are monochrome edge patterns, monochrome edge data is sequentially transferred to the pass units 390a to 390f, and when the pixels to be processed are not monochrome edge patterns, dummy data is sequentially transferred. become.

(C-1-2-3) Averaging circuit:
Next, the averaging circuit 322 in FIG. 7 will be described. The averaging circuit 322 is a circuit that averages the gradation values of four pixels and reduces the resolution. That is, the averaging circuit 322 averages the gradation values of the four pixels with respect to the RGB data of the four pixels input from the black and white edge determination circuit 321, thereby converting the image data of 720 dpi × 720 dpi into 360 dpi × 360 dpi. Convert to equivalent data. Note that the RGB data of the four pixels output from the monochrome edge determination circuit 321 is also input to the averaging circuit 322 regardless of whether or not it corresponds to the monochrome edge pattern. The corresponding four pixels are also averaged.

The averaging of the gradation values of the four pixels can be performed by the following calculation. That is, the gradation values of the four pixels A, B, C, and D are respectively set.
A = (Ra, Ga, Ba)
B = (Rb, Gb, Bb)
C = (Rc, Gc, Bc)
D = (Rd, Gd, Bd)
Then, the gradation value (R, G, B) of one pixel after conversion is
R = (Ra + Rb + Rc + Rd) / 4
G = (Ga + Gb + Gc + Gd) / 4
B = (Ba + Bb + Bc + Bd) / 4
It becomes. Of course, when dividing by 4, the calculation can be easily performed by bit-shifting the value to the right by 2 bits. The averaged RGB data is output to the selector circuit 324 as the gradation value of a new 1 × 1 pixel converted to a resolution of 360 dpi × 360 dpi.

(C-1-2-4) Selector circuit:
The selector circuit 324 receives the 360 dpi × 360 dpi RGB data output from the averaging circuit 322 and the RGB data output from the line input unit 310. When the resolution of the original image data input by the image processing unit 155 is 720 dpi × 720 dpi, the RGB data input from the averaging circuit 322 is selected and transferred to the subsequent color conversion unit 330. On the other hand, when the resolution of the original image data input by the image processing unit 155 is 360 dpi × 360 dpi, the RGB data directly input from the line input unit 310 is selected and transferred to the subsequent color conversion unit 330. That is, when the input resolution of the image data to be printed is low resolution (360 dpi × 360 dpi), the black and white edge portion cannot be processed at high resolution (720 dpi × 720 dpi). The RGB data input from the input unit 310 is output through.

  As described above, the monochrome edge processing unit 320 maintains a resolution of 720 dpi × 720 dpi with respect to the first pass unit 390a if the image data input from the line input unit 310 is data having a monochrome edge pattern. The monochrome edge data converted to 5 bits is output, and further, the RGB data of 360 dpi × 360 dpi obtained by averaging the gradation values of the four pixels is output to the color conversion unit 330. On the other hand, if the image data input from the line input unit 310 is normal data other than the monochrome edge pattern, 5-bit dummy data is output to the first pass unit, and the color conversion unit 330 is further output. On the other hand, RGB data of 360 dpi × 360 dpi obtained by averaging the gradation values of four pixels is output.

  In the present embodiment, the RGB data obtained by averaging the gradation values of the four pixels by the monochrome edge processing unit 320 corresponds to the “first intermediate data” of the present application, and the monochrome edge data obtained by encoding the monochrome edge is , Corresponding to “second intermediate data” of the present application.

(C-1-3) Color conversion unit:
FIG. 9 is an explanatory diagram showing an internal configuration of the color conversion unit 330 shown in FIG. The color conversion unit 330 is a unit that performs color conversion on the RGB data input from the monochrome edge processing unit 320 and generates CMYK data. As shown in the figure, the color conversion unit 330 is connected to the monochrome edge processing unit 320, and is connected to the conversion circuit 331 for converting RGB format data into CMYK format data, and the monochrome edge processing unit 320, and is connected between two pixels. A standard edge determination circuit 332 that determines an edge, a noise generation circuit 333 that generates 1-bit noise, a conversion circuit 331, a standard edge determination circuit 332, and a noise generation circuit 333 are connected to and output from these circuits. And a smoothing circuit 334 that smoothes gradation values using data.

(C-1-3-1) Conversion circuit:
The conversion circuit 331 refers to the color conversion table LUT stored in the SDRAM 152 and converts the RGB data input from the monochrome edge processing unit 320 into CMYK data. The color conversion table LUT includes colors represented in RGB format, C (cyan), M (magenta), Y (yellow), K (black), lc (light cyan), lm (light magenta), and dy (dark yellow). ), Cr (transparent ink), and colors represented by a combination of a total of eight colors are recorded in association with each other. The conversion circuit 331 can perform color conversion by deriving CMYK data corresponding to RGB data input from the monochrome edge processing unit 320 with reference to the color conversion table LUT.

(C-1-3-2) Standard edge determination circuit:
When the standard edge determination circuit 332 receives RGB data for two pixels from the monochrome edge processing unit 320, the standard edge determination circuit 332 obtains a horizontal gradient (edge) between these pixels, and the intensity is in a degree from 0 to 2. 2 bits of standard edge data is generated. Such standard edge data is a different type of data from the monochrome edge data.

  The edge determination procedure is generally as follows. First, the standard edge determination circuit 332 calculates the differences Rdiff, Gdiff, and Bdiff between the RGB gradation values of two pixels in the horizontal direction as follows. The RGB values of the target pixel for determining the edge are represented as R, G, and B, and the RGB values of the pixel located on the left side thereof are represented as Rp, Gp, and Bp.

Rdiff = | R−Rp |
Gdiff = | G-Gp |
Bdiff = | B-Gp |

  Next, weighting is performed for each RGB by the following formula. Note that TR, TG, and TB are predetermined threshold values, for example, TR = 10, TG = 8, and TB = 14.

Rdiff = Rdiff− (TR-TG)
Gdiff = Gdiff
Bdiff = Bdiff− (TB−TG)

  Then, the maximum value among Rdiff, Gdiff, and Bdiff is selected as the maximum difference DiffMax as follows.

DiffMax = max (Rdiff, Gdiff, Bdiff)

  Finally, if the maximum difference DiffMax is smaller than the threshold TG, it is determined that there is no edge, and the standard edge data is set to “0”. If the maximum difference DiffMax is larger than the threshold TG and smaller than a value obtained by adding a predetermined offset value (for example, 8) to the threshold TG, it is determined that there is a weak edge, and the standard edge data is set to “1”. . If the maximum difference DiffMax is larger than the value obtained by adding a predetermined offset value to the threshold TG, it is determined that there is a strong edge, and the standard edge data is set to “2”. If the state of the monochrome edge determination flag input from the monochrome edge processing unit 320 is “1”, the standard edge data of the pixel is “2” representing the strongest edge regardless of the value of the maximum difference DiffMax. And The standard edge determination circuit 332 outputs the standard edge data determined in this way to the smoothing circuit 334 and the second path unit 390b. The standard edge data output to the second pass unit 390b is transferred through the pass unit group to the intra-block smoothing unit 380 described later.

(C-1-3-3) Noise generation circuit:
The noise generation circuit 333 is a circuit that randomly generates 1-bit noise data (random number) representing a value of “0” or “1”. The noise generation circuit 333 generates two different noise data, outputs one to the smoothing circuit 334, and outputs the other to the second path unit 390b. The noise data output to the second pass unit 390b is transferred through the pass unit group to the intra-block smoothing unit 380 described later.

(C-1-3-4) Smoothing circuit:
The smoothing circuit 334 smoothes gradation values for the CMYK data output from the conversion circuit 331 based on the standard edge data input from the standard edge determination circuit 332 and the noise data input from the noise generation circuit 333. Do. The smoothing procedure is generally as follows.

  First, the smoothing circuit 334 determines the value of the standard edge data. If the value of the standard edge data is 0 or 1, the smoothing circuit 334 smoothes CMYK colors for two horizontal pixels by the following calculation. In the following arithmetic expression, C represents a gradation value of a pixel to be smoothed, and Cp represents a gradation value of a pixel located on the left side of the pixel to be smoothed. SP0 and SP1 represent predetermined weighting parameters (for example, SP0 = 4, SP1 = 2), and N represents the value of noise data (0 or 1).

(1) When standard edge data is 0:
C = (C + Cp × (SP0-1) + N × (SP0-1)) / SP0
(2) When the standard edge data is 1:
C = (C + Cp × (SP1-1) + N × (SP1-1)) / SP1

  On the other hand, if the value of the standard edge data is 2, the smoothing circuit 334 determines that the pixel has a strong edge and does not perform smoothing. By doing so, it is possible to suppress a decrease in the clarity of the output image. The smoothing circuit 334 outputs the CMYK data thus smoothed to the ink amount correction unit 340.

(C-1-4) Ink amount correction unit:
Returning to FIG. The ink amount correction unit 340 is a unit for correcting the ink amount discharged from each nozzle by inputting the CMYK data output from the color conversion unit 330 and correcting the gradation value of the CMYK data. is there. The nozzle rows in the ink head 211 prepared for each type of ink may have different inner diameters and deformation degrees of the piezo elements due to manufacturing errors. Even if ink is ejected at the same gradation value, ejection The amount of ink applied may vary from nozzle row to nozzle row. Therefore, in the manufacturing process of the printing apparatus 100, the amount of ink ejected from each nozzle row is inspected in advance, and correction data for eliminating the difference in the amount is recorded in the EEPROM 154.

  The ink amount correction unit 340 reads the correction data recorded in the EEPROM 154, and corrects the gradation value of each color in the CMYK format based on the correction data. For example, if the amount of ink ejected from the cyan nozzle row is larger than the amount of ink ejected from the nozzle row of other colors, the cyan tone value becomes lower than the tone values of other colors. Thus, the gradation value is corrected. By doing so, the amount of ink ejected from each nozzle row can be made uniform.

  The ink amount correction unit 340 performs correction after extending the input 8-bit data to 12-bit data internally in order to improve the correction accuracy. That is, the correction is performed by extending the CMYK gradation value normally expressed by 256 gradations to 4096 gradations. The extension to 12 bits can be performed by shifting the input CMYK data to the left by 4 bits. When the above-described correction is performed, the ink amount correction unit 340 transfers the 12-bit CMYK data of each color to the print fringe suppression unit 350.

(C-1-5) Print stripe suppression unit:
When receiving the transfer of 12-bit CMYK data of each color from the ink amount correction unit 340, the print fringe suppression unit 350 performs correction for suppressing the print fringes on the data. The nozzle rows in the ink head 211 are arranged in the sub-scanning direction at a constant pitch, but ink is not ejected vertically from all nozzles, and ink is inclined and ejected due to nozzle manufacturing errors. There is a case. When an image is printed on the printing medium in such a case, a print stripe may appear in the main scanning direction due to this inclination. Therefore, in the manufacturing process of the printing apparatus 100, the inclination of each nozzle is inspected, and correction data for eliminating the inclination is recorded in the EEPROM 154 in advance.

  The print fringe suppression unit 350 reads the correction data recorded in the EEPROM 154 and corrects the gradation value of each color in the CMYK format based on the correction data. For example, if the currently input CMYK data is data belonging to a raster line in which print stripes occur, correction is performed so that the number of ink ejections is increased by increasing the gradation value. Further, in the case of CMYK data belonging to a raster line in which dots overlap due to the tilt of the nozzle, correction is performed so that the number of ink ejections is reduced by reducing the gradation value. By doing so, it is possible to suppress the occurrence of printing stripes. Note that this print fringe suppression unit 350 also performs correction on CMYK data expanded to 12 bits in order to improve correction accuracy. When the above-described correction is performed, the print fringe suppression unit 350 transfers the 12-bit CMYK data of each color to the bit reduction unit 360.

  The ink amount correction unit 340 and the print fringe suppression unit 350 described above each receive correction data from the EEPROM 154. However, the correction data is loaded from the EEPROM 154 to the SDRAM 152 when the printing apparatus 100 is turned on, and the SDRAM 152 It is good also as what inputs from. In this way, correction can be performed at high speed.

(C-1-6) Bit reduction unit:
When the bit reduction unit 360 receives the 12-bit CMYK data from the print fringe suppression unit 350, the bit reduction unit 360 reduces the data and returns it to 8-bit data in order to reduce the data amount. Specifically, after adding 4 bits of noise to 12 bits of CMYK data, 8 bits of data are generated by cutting off the lower 4 bits of 12 bits. Of course, 12 bits of data may be shifted to the right by 4 bits and then the upper 4 bits may be cut off. If noise is added as described above, it is possible to suppress the generation of the same data continuously and to prevent the image quality from being deteriorated, compared to the case where the lower 4 bits are simply cut off. it can. In this embodiment, the 4-bit noise described above is generated when the bit reduction unit 360 includes a noise generation circuit therein. However, the noise data transferred from the color conversion unit 330 may be branched and input from the third pass unit 390c. When the bit reduction unit 360 thus converts the CMYK data into 8-bit data, the bit reduction unit 360 transfers the data to the transparent ink post-processing unit 370.

(C-1-7) Transparent ink post-processing unit:
When the transparent ink post-processing unit 370 receives 8-bit CMYK data from the bit reduction unit 360, the ink (cr) of the CMYK data is prevented from being ejected to a portion that protrudes beyond the print medium S. Correction for setting the gradation value to 0 is performed. Since the size information of the print medium S is set in the register of the image processing unit 155 by the CPU 151, whether the dot formation position of the currently input CMYK data falls outside the print medium S by referring to the register. It can be determined whether or not.

  During so-called borderless printing, the printing apparatus 100 ejects ink onto a printing surface larger than the printing medium S, and discards excess ink outside the printing medium S to perform printing over the entire surface of the printing medium S. Although transparent ink does not contain pigments (or dyes), it contains more resin components than other inks. If the ink is discarded outside the printing medium, it will absorb the discarded ink. There is a possibility that the resin adheres to the surface of the waste ink absorber (sponge etc.) and the absorption of other inks is hindered. For this reason, if the transparent ink post-processing unit 370 sets the gradation value of the transparent ink to zero in the print region that protrudes from the print medium, such a phenomenon can be suppressed.

(C-1-8) In-block smoothing unit:
The in-block smoothing unit 380 receives the CMYK data for two adjacent pixels from the transparent ink post-processing unit 370, and further outputs a 2-bit standard output from the color conversion unit 330 via the fifth pass unit 390e. Edge data and 1-bit noise data are input. Then, using the 2-bit standard edge data and 1-bit noise data output from the color conversion unit 330, the gradation values of the two pixels input from the transparent ink post-processing unit 370 are smoothed. Smoothing is performed by adding CMYK data of 2 pixels when the standard edge data between 2 pixels is equal to or less than a set value (for example, 0 or 1), and further adding 1-bit noise data value thereto. The added value is divided by two. That is, the new gradation value is the same value for both pixels. When the edge strength is low between pixels, dots may be formed adjacent to each other on the print medium as a result of the arrangement of dots within one block based on the order value matrix in the 2 × 2 mode described later. Yes, the image quality may be degraded. For this reason, the dots are not formed adjacent to each other by averaging the gradation values of pixels having low edge strength before the halftone process. As a result, the image quality can be improved. In this embodiment, the intra-block smoothing unit 380 uses the standard edge data and the noise data that are output from the color conversion unit 330 and transferred through the pass unit group. There is no need to generate these data in the unit 380, and redundant processing can be omitted.

  The detailed configuration of the color conversion circuit 300 has been described above. According to the color conversion circuit 300, 8-bit CMYK data having a resolution equivalent to 360 dpi × 360 dpi and 5-bit monochrome edge data having a resolution equivalent to 720 dpi × 720 dpi are output to the halftone circuit 400. Will be.

C-2. Halftone circuit:
FIG. 10 is a block diagram showing a detailed configuration of the halftone circuit 400 and the head driving data conversion circuit 500. In the following, first, the halftone circuit 400 will be described. The halftone circuit 400 is a circuit that converts CMYK data in which color shades are expressed by gradation values from 0 to 255 into dot formation data representing the density of dots to be formed on a print medium. Basically, the printing apparatus 100 can only be in a state where ink is applied or not applied to the printing medium S, and the color density is changed by the distribution of dots formed by ink ejection. It is necessary to express. As a general method of halftone processing, there are known methods such as an error diffusion method and a systematic dither method, but in this embodiment, halftone processing is performed by a unique method developed from the systematic dither method. .

<Concept of halftone processing>
Here, the concept of the halftone process of the present embodiment will be described in comparison with the conventional systematic dither method.
FIG. 11 is an explanatory diagram showing an outline of halftone processing by a conventional systematic dither method. In the conventional systematic dither method, as shown in the upper part of the figure, threshold values from 1 to 255 are uniformly distributed with respect to a dither matrix having a predetermined size (here, 128 × 64). Has been. In order to perform halftone processing using such a dither matrix, as shown in the lower part of the figure, the gradation value of each pixel constituting the CMYK image data and the threshold value present at the position corresponding to that pixel on the dither matrix If the gradation value exceeds the threshold value, a dot is formed at that position, and if the threshold value is not exceeded, it is determined that no dot is formed at that position. By doing so, it is possible to convert 256-tone CMYK data into dot formation data indicating the presence or absence of dots.

  In this embodiment, halftone processing is not performed by sequentially extracting threshold values from a large dither matrix of 128 pixels × 64 pixels shown in the upper part of FIG. For example, as in the threshold value group shown in the frame RG in the figure, a threshold value group having 4 × 2 as the origin is extracted from the 128 pixel × 64 pixel dither matrix, and the position is set according to the position. A unique number called a block number is assigned to each threshold group in advance. Then, for each block number, the gradation value of the pixel is converted into data representing the presence / absence of a dot using a 4 × 2 threshold value group. That is, in this embodiment, halftone processing is performed in units of 4 × 2 pixels. This point will be described below.

  The threshold groups having a size of 4 × 2 extracted from the global dither matrix shown in FIG. 11 are all combinations of different threshold values. Therefore, assuming that the gradation values of the 4 × 2 pixel group are all the same, and the gradation value of the pixel group rises in steps from 0 to 255, the threshold value group of 4 × 2 is obtained. The dot on / off changes according to the eight included thresholds.

  FIG. 12 is an explanatory diagram showing how the number of dots changes for a 4 × 2 pixel group. Taking the threshold value group shown in FIG. 12 (a) as an example, as shown in FIG. 12 (b), the gradation values are eight places of 1,42,58,109,170,177,212,255, The number of generated dots changes from 0 to 1, 1 to 2,... 7 to 8. Of course, if the threshold value group is different, the gradation value at which the number of generated dots changes is different. For this reason, even if pixels having the same gradation value continue in succession in the image data, the same result as using the large dither matrix of FIG. 11 can be obtained if different threshold groups are sequentially applied. Become.

  Since the change point of the gradation value at which dots increase as shown in FIG. 12B is different for each threshold group, the relationship between the gradation value and the number of dots to be generated is obtained in advance for each threshold group to obtain a correspondence table. I can keep it. If such a correspondence table is prepared, when a gradation value of a certain pixel in image data is given, a threshold group to be applied to the pixel is specified using a block number, and the block number and its By referring to the correspondence table using the gradation value of the pixel, the number of dots to be generated can be acquired. If the threshold group to be applied is determined, dots need only be formed in order from the smallest threshold within the threshold group, and the dot formation order is inevitably determined.

  FIG. 13 is an explanatory diagram showing the relationship between gradation values, the number of generated dots, and their arrangement. For example, if the gradation value of a certain pixel is 127, the block number and gradation value of the threshold group to be applied to that pixel by referring to the above-described correspondence table (corresponding to the quantization data and dot number table described later). 127, the number of dots to be formed (4 in the example in the figure) can be obtained. On the other hand, an order value matrix OM that defines the order in which dots are to be formed is also determined for each block number. Therefore, by combining these two, it is possible to determine the arrangement of the four dots as shown at the right end of the lower column of FIG. Note that the order value matrix OM in the figure divides the above-mentioned dither matrix into 4 × 2 blocks, assigns unique block numbers to the respective blocks, and sets the dot values in ascending order of threshold values within the block. It is generated by giving an order value representing the generation order.

  According to the above description, in the halftone processing of the present embodiment, the information on the gradation value applied to a certain pixel in the image data is the information on the change point of the dot occurrence included in the threshold group used for the halftone processing. It can be said that processing is performed in which the information is encoded separately with the information indicating in which order the dots are generated, and then decoded to determine the dot generation position.

  Up to this point, the description has been given assuming that there is only one type of dot formed on the print medium. 11, 12, and 13 are merely examples for determining on / off of a single type of dot. In an actual printing apparatus, a plurality of types of dots, such as large, medium, small and light dots, or light and dark dots, can be formed on the same pixel, so determination of dot on / off is a little more complicated. Therefore, this point will be described next.

  FIG. 14 shows a method for extending the above-described concept when large, medium, and small dots can be formed as in the printing apparatus 100 of the present embodiment. In this case, in order to predetermine the combination of dots to be formed according to the gradation value, first, as shown in FIG. 14A, for each gradation value, small dots, Convert to density data to form medium dots and large dots. The relationship shown in FIG. 14A is set in advance, for example, for each printing apparatus or according to printing quality, paper type, or the like. According to the graph shown in FIG. 14A, when a certain gradation value is given, density data for small dots, density data for medium dots, and density data for large dots are obtained.

  Now, the gradation value 127 is given to the 4 × 2 pixel group shown in FIG. 14B, and from the relationship shown in FIG. 14A, the small dot density data is 32 and the medium dot density data is. 90, it is assumed that the large dot density data is 2. Then, the large / medium / small dots are turned on / off by comparing the large / medium / small dot density data with the threshold values in the 4 × 2 threshold group in this order.

  First, when the large dot density data 2 is compared with each threshold value, as shown in FIG. 14C, the large dot is turned on for the pixel having the threshold value “1”. There is no place where pixels other than the threshold value “1” are turned on. Therefore, next, the medium dot is determined. When determining the medium dot, the large dot density data is added to the medium dot density data (90 + 2 = 92), and this is compared with the threshold value group. As a result, as shown in FIG. 14D, medium dots are turned on in the pixels having the threshold values “58” and “42”. Further, a small dot is determined. In this case, medium and large dot density data are added to the small dot density data (32 + 90 + 2 = 124), and this is compared with a threshold group. As a result, as shown in FIG. 14E, the small dot is turned on in the pixel having the threshold value “109”.

  According to the above-described method, even when large, medium, and small dots can be formed, if a certain gradation value is given and the threshold value group to be applied is determined, the formation mode of the large, medium, and small dots (the number of dots formed and their arrangement) , Determined uniquely. Therefore, in exactly the same manner as described with reference to FIG. 12, a 4 × 2 threshold group is extracted from a global dither matrix prepared in advance, and a block number is assigned to each group, and the gradation of the corresponding pixel group is obtained. A transition table of large, medium, and small dots when the value is changed from the minimum value to the maximum value (from 0 to 255 in this embodiment) can be examined and prepared as a correspondence table. FIG. 15 and FIG. 16 show the correspondence table in the case of large, medium and small dots by examining this relationship.

  FIG. 15 shows how large, medium, and small dot formation modes change when the tone value of the image data changes from 0 to 255 for the five threshold groups of block numbers N1 to N5. It is a graph to represent. The horizontal axis indicates the gradation value, and the vertical axis indicates the value of the quantized data that encodes the formation mode of large, medium, and small dots corresponding to the gradation value. In FIG. 15, for convenience of understanding, the transition of quantized data is drawn with the vertical axis shifted for each block number. As shown in the figure, the transition state of the dot formation mode is different for each block number if the combination of thresholds in the threshold group is different, that is, if the block number is different, as described with reference to FIG. This is because the formation mode of large, medium and small dots changes.

  FIG. 16 is an explanatory diagram showing the graph shown in FIG. 15 as a correspondence table. Hereinafter, this correspondence table is referred to as a quantization table QT. According to this quantization table QT, when a gradation value of a pixel to be subjected to halftone processing is given, a threshold group to be applied to that pixel is specified by a block number, and this quantization table QT is referred to. For example, from the block number and the gradation value, it is possible to immediately obtain quantized data that encodes the dot formation mode. In this embodiment, this conversion of the pixel gradation value into quantized data is called encoding. The reason why the maximum values are not necessarily the same in the quantization table QT in FIG. 16 is that the number of times that the combination of large, medium, and small dots occurs varies depending on the combination of threshold values. However, this maximum number does not exceed 32, and the quantized data shown in FIG. 16 can be expressed with at least 5 bits. In the present embodiment, the value obtained by encoding the dot formation mode is expressed as “quantized data”. However, this uses the quantization table QT so that the gradation value of the pixel is apparently smaller. This is because the term “quantization” is used to express the value.

  Next, a process for decoding quantized data encoded using the quantization table QT will be described. The decoding mechanism for arranging dots in 4 × 2 pixels from the dot count data has already been briefly described with reference to FIG. 13 in the case where a single type of dot can be formed. In the halftone process of the present embodiment, in fact, large, medium, and small ink droplets are ejected onto the print medium to form large, medium, and small dots. The decoding process mechanism is shown in FIG. It is not different from the case explained using. That is, first, the quantized data obtained as a result of the encoding process described above is formed in a target region with reference to the first dot number table DT1 (FIG. 22) and the second dot number table DT2 (FIG. 23). Get the number of large, medium and small dots. Then, by referring to the order value matrix corresponding to the block number, the dot arrangement corresponding to the number is determined. If the necessary number of large, medium, and small dots are arranged in this order, halftone processing is completed.

  As described above, in the halftone processing of this embodiment, when a gradation value of a certain pixel is given, the quantization table QT is referred to from the block number to which the pixel belongs and the gradation value. The gradation value is encoded into the quantized data. Then, the halftone process is completed by decoding the quantized data by using the dot number table of FIGS. 22 and 23 and the order value matrix. As described above, in this embodiment, halftone processing can be performed only by referring to various tables such as a quantization table and a number table. Therefore, as in the conventional systematic dither method, the gradation value and the threshold value are set. Conditional branch processing for comparing sizes is not necessary, and the processing speed can be improved. In addition, since the halftone processing of this embodiment is based on the systematic dither method, pseudo-contour noise peculiar to the error diffusion method does not occur and very high-quality printing is performed. Is possible.

<Details of halftone circuit>
Here, the description will be returned to FIG. 10 and the details of each unit constituting the halftone circuit 400 will be described. As shown in FIG. 10, the halftone circuit 400 is connected to the in-block smoothing unit 380 in the color conversion circuit 300 shown in FIG. 5, and encodes CMYK data. A data selector 420 that is connected to the path unit 390g and selects data output from these, and an EB control unit 440 that is connected to the data selector 420 and stores the data output from the data selector 420 in the encoded data buffer EB. And a decoder 430 that is connected to the encode data buffer EB and decodes the encode data stored in the encode data buffer EB.

  The seventh pass unit 390g connected to the previous stage of the data selector 420 is connected in series to the sixth pass unit 390f in the color conversion circuit 300. The main unit corresponding to the seventh pass unit 390g is the encoder 410. Therefore, for example, when monochrome edge data arrives at the seventh pass unit 390g, CMYK data obtained by averaging the four pixels that are the encoding source of the monochrome edge data reaches the encoder 410. Then, the data output from the encoder 410 and the data output from the seventh path unit 390g are simultaneously input to the data selector 420.

(C-2-1) Encoder:
The encoder 410 is a unit that encodes 8-bit CMYK data of each color input from the color conversion circuit 300 into 5-bit quantized data. As shown in FIG. 10, the encoder 410 includes a block number determination circuit 411 and a quantization circuit 412.

(C-2-1-1) Block number discrimination circuit:
The block number determination circuit 411 is a circuit that determines to which block number a pixel represented by CMYK data input from the color conversion circuit 300 belongs. The block number discrimination method differs depending on the output resolution mode when printing an image. As such modes, there are roughly the following seven types of modes. In this embodiment, 360 dpi × 360 dpi CMYK data is input from the color conversion circuit 300, and this is printed at a resolution of 720 dpi × 720 dpi. Therefore, among these modes, the block number is determined based on the 2 × 2 mode. I do. Note that since the output resolution mode is set in the predetermined register of the image processing unit 155 by the CPU 151 prior to the start of printing, the current mode can be determined by referring to the register.

Mode name Input resolution (dpi) Output resolution (dpi)
1x1 mode ... 360x360 360x360
1 × 2 mode: 360 × 360 360 × 720
2 × 1 mode: 360 × 360 720 × 360
2 × 2 mode: 360 × 360 720 × 720
2 × 4 mode: 360 × 360 720 × 1440
4x2 mode ... 360x360 1440x720
4x4 mode ... 360x360 1440x1440

  FIG. 17 is an explanatory diagram showing a block number discrimination method in the 2 × 2 mode. The 2 × 2 mode is a mode in which the resolution (360 dpi × 360 dpi) of the CMYK image data input by the encoder 410 is output at a double resolution (720 dpi × 720 dpi). That is, in the order value matrix OM shown in the lower part of the figure, the size of the 4 × 2 unit block to which one block number is assigned is the size of the CMYK image data to be output in the 2 × 2 mode. This corresponds to a size of 2 pixels × 1 pixel which is a half. Therefore, as illustrated, in the 2 × 2 mode, the encoder 410 determines that two pixels adjacent in the horizontal direction among the pixels constituting the CMYK image data have the same block number.

  According to such a determination method, for example, as shown in the figure, the encoder 410 determines that the two pixels located in the upper left corner of the CMYK image data correspond to the block number “1”, and the block number “1”. It is determined that the two pixels adjacent to the right of the two pixels for which “” is set correspond to the block number “2”. Furthermore, it is determined that the two pixels adjacent to the lower side of the two pixels set with the block number “1” correspond to the block number “33”, for example. In this way, the encoder 410 also determines the block number for each of the other pixels, using two adjacent pixels as one unit.

  FIG. 18 is an explanatory diagram of an actual discrimination example of block numbers. In general, the size of image data input from the computer 900 or the scanner 110 is larger than the size of a 128 pixel × 64 pixel dither matrix (see FIG. 11) from which the order value matrix OM is generated. Therefore, in such a case, the block number is determined by repeatedly applying a set of order value matrices OM corresponding to the size of the dither matrix as shown in FIG. For example, if the encoder 410 inputs CMYK image data having 640 pixels in the horizontal direction, first, the block number from 1 to 32 is set 10 times (= 640 / (32 * 2)) The determination is repeated, and then the block number from 33 to 64 is determined twice for each second pixel for the second line, and the determination is repeated 10 times.

(C-2-1-2) Quantization circuit:
Returning to FIG. The quantization circuit 412 is a circuit that encodes the CMYK data into quantized data with reference to the quantization table QT shown in FIG. 16 in order from the pixel whose block number is determined by the block number determination circuit 411. The quantization table QT is stored in the SDRAM 152 as shown in FIG.

  As shown in FIG. 16, in the quantization table QT, the quantized data starts from 0 according to the gradation value (minimum 0 to maximum 255) of CMYK data and the block number (minimum 1 to maximum 1024). It is set to take a value up to 31. The quantization circuit 412 refers to this quantization table QT from the CMYK data of the pixel to be encoded and the block number determination circuit 411 and acquires one quantization data corresponding to the pixel.

  As shown in FIG. 15, the quantized data is set so as to increase as the gradation value increases, and the degree of increase differs depending on the block number. Block numbers N1 to N5 in FIG. 15 represent different block numbers, respectively, and indicate the results of encoding for five pixels corresponding to these block numbers N1 to N5. In FIG. 15, the origin positions of the quantized data are displayed while being shifted little by little in the vertical axis direction in order to prevent the broken lines of the block numbers N1 to N5 from being overlapped and difficult to discriminate.

  In the figure, a block number N1 indicated by a thick solid line will be described. In this block number N1, the quantization data is “0” in the range where the pixel gradation value is “0” to “4”, but the pixel gradation value is in the range “5” to “20”. Then, the quantized data increases to “1”. In addition, in the range where the gradation value of the pixel is “21” to “42”, the quantized data increases to “2”. In addition, in the range where the gradation value of the pixel is “43” to “69”, the quantized data increases to “3”. Thus, the quantized data also increases step by step as the gradation value of the pixel increases. Finally, the quantized data increases to “15”. That is, for the block number N1, the gradation value of the pixel having a value from 0 to 255 is quantized into 16 levels from 0 to 15.

  Similarly, for the block number N2 indicated by a thick broken line in the figure and the block number N3 indicated by a thick dashed line, the gradation value of a pixel having a value from 0 to 255 is set to 18 levels from 0 to 17. It is quantized to. Further, for the block number N4 indicated by a thin solid line and the block number N5 indicated by a thin one-dot chain line, the gradation value of the pixel is quantized in 21 steps from 0 to 20. The maximum number of stages of quantized data is approximately 15 to 22 depending on the block number. In this way, in the quantization table QT, quantized data is defined with a unique number of stages according to the block number. Also, the degree of increase in the quantized data is uniquely defined according to the block number. Therefore, even when the same gradation value is quantized, if the block number to which the pixel belongs is different, it is converted into different quantized data.

  As described above, the quantization circuit 412 converts the CMYK gradation value of a pixel into quantized data, thereby converting the value of CMYK data having 256 gradations into a maximum of 32 stages of quantized data. Convert to By doing this, CMYK data that required an 8-bit data amount can be converted into 5-bit data representing information necessary for generating dots, and the data capacity can be reduced.

  Finally, the encoder 410 outputs the quantized data encoded by the quantization circuit 412 to the data selector 420 pixel by pixel. The quantized data is output for each color of CMYK.

(C-2-2) Data selector:
FIG. 19 is an explanatory diagram showing a detailed configuration of the data selector 420 shown in FIG. The data selector 420 includes eight selector elements 411a to 411h corresponding to the types of ink included in the printing apparatus 100. Each selector element 411a to 411h receives 5-bit quantized data of a color corresponding to the selector element from the encoder 410 and 5-bit monochrome edge data from the seventh path unit 390g. Each of the selector elements 411a to 411h inputs the most significant bit of the monochrome edge data, that is, data representing the contents of the monochrome edge determination flag as a select signal.

  When the selector elements 411a to 411h receive data from the encoder 410 and the seventh pass unit 390g, the selector elements 411a to 411h check the value of the monochrome edge determination flag input as the select signal. As a result, if the monochrome edge determination flag is “1”, monochrome edge data is selected and output, and if it is “0”, quantized data is selected and output. Bit adders 412a to 412h are connected to the subsequent stages of the selector elements 411a to 411h, respectively. Bit adders 412a to 412h add the value of the monochrome edge determination flag to the most significant bit of the data output from selector elements 411a to 411h. Therefore, the data finally output from the data selector 420 is 6-bit data in both cases of quantized data and monochrome edge data. The data selector 420 outputs any data selected by the above processing to the EB control unit 440. Note that the monochrome edge determination flag value is added to the most significant bit by the monochrome edge processing unit 320 in the color conversion circuit 300 in the 5-bit monochrome edge data at the time of input to the data selector 420. In the upper 2 bits of the black and white edge data converted into bits, the value of the black and white edge determination flag is recorded redundantly. However, even if data having the same contents are recorded in duplicate, the data length of the quantized data and the data length of the monochrome edge data can be made uniform, so that the encoded data buffer EB for storing these data is used. Address management can be facilitated, hardware complexity can be suppressed, and processing speed can be improved.

(C-2-3) EB control unit:
Returning to FIG. When 6-bit monochrome edge data or 6-bit quantized data is alternatively input from the data selector 420, the EB control unit 440 stores these data in the encoded data buffer EB. In the following description, the quantized data and the monochrome edge data may be collectively referred to as “encoded data”.

  FIG. 20 is an explanatory diagram conceptually showing the process until the EB control unit 440 stores the encoded data in the encoded data buffer EB. As shown in the figure, the data selector 420 receives the quantized data from the encoder 410 and black and white edge data from the seventh pass unit 390g. Then, using the value of the black and white edge determination flag, black and white edge data excluding the dummy data (000000) among these encoded data is output with priority over the quantized data. Then, the EB control unit 440 sequentially stores the encoded data output from the data selector 420 in the encoded data buffer EB. The encoded data stored in the encoded data buffer EB is sequentially read out by the decoder 430 shown in FIG.

(C-2-4) Decoder:
FIG. 21 is an explanatory diagram showing a detailed configuration of the decoder 430 shown in FIG. The decoder 430 is a unit for individually decoding monochrome edge data and quantized data and generating dot formation data. As shown in the figure, the decoder 430 is connected to the encode data buffer EB, and receives a data determination circuit 431 that inputs the encode data, and a black and white edge data decode circuit 432 that receives the output from the data determination circuit 431 and decodes the black and white edge data. And a quantized data decoding circuit 433 that receives the output from the data determination circuit 431 and decodes the quantized data.

(C-2-4-1) Data determination circuit:
The data determination circuit 431 sequentially reads the encoded data from the encoded data buffer EB, and determines the block number of the read encoded data. Since the encoded data is stored in the encoded data buffer EB in the order of the block numbers shown in FIG. 17 or FIG. 18, if the encoded data is read out in the storage order, the block number corresponding to the encoded data is automatically determined. Can do. That is, when the output resolution is 2 × 2 mode, the same block number is assigned to two adjacent pixels, and the block number of the encoded data read out in the first and second is “1”. The block number of the encoded data read out in the third and fourth is “2”. Also, for example, when encoded data is generated for CMYK image data having 640 pixels in the horizontal direction, first, the block numbers from 1 to 32 for each two pixels are generated 10 times (= 640 / (32 * 2). )) Discrimination is repeated, and then the block numbers 33 to 64 for each two pixels are repeatedly discriminated a total of 10 times. Since the CPU 151 sets information relating to the output resolution mode and the image size in the register of the image processing unit 155, the data determination circuit 431 refers to such a register so that the output resolution mode and the image The block number can be determined according to the size.

  When the determination of the block number is completed, the data determination circuit 431 checks the most significant bit of the read 6-bit encoded data. The most significant bit is added with the value of the monochrome edge determination flag indicating whether or not the data is monochrome edge data by the data selector 420. Therefore, if the most significant bit of the encoded data is “0”, it is determined that the encoded data is quantized data, and after the most significant bit is discarded, the quantized data decoding circuit 433 receives the 5-bit quantum data. The data and the block number value are transferred. On the other hand, if the most significant bit is “1”, it is determined that the read encoded data is black and white edge data, and the upper 2 bits in which the value of the black and white edge determination flag is recorded are discarded, and then the black and white edge data decoding is performed. The 4-bit monochrome edge data and the block number value are transferred to the circuit 432.

(C-2-4-2) Quantized data decoding circuit:
The quantized data decoding circuit 433 is a circuit that decodes the 5-bit quantized data transferred from the data determination circuit 431 and generates dot formation data. The dot formation data is data representing the size of a dot to be formed by four values “11”, “10”, “01”, and “00”, and a print image by the distribution of these values. In order to generate dot formation data, first, referring to the first dot number table DT1 and the second dot number table DT2 stored in the SDRAM 152, the quantized data represents the number of dots of large, medium, and small sizes. Conversion to dot number data is performed, and further, dot arrangement is performed based on the dot number data and the order value matrix OM stored in the SDRAM 152. The details of such processing will be described below.

<Conversion of quantized data into dot count data>
FIG. 22 is an explanatory diagram showing an example of the first dot number table DT1. As shown in the drawing, in the first dot number table DT1, first dot number data is defined according to the block number and the quantized data. The first dot number data is data representing how many dots are formed in the pixel represented by the quantized data. The first dot number data does not accurately represent the number of dots, and is a value obtained by encoding the number of large, medium, and small dots as will be described later. The first dot number data takes values from 0 to 164. That is, according to the first dot number table DT1, 5-bit quantized data is converted into 8-bit first dot number data.

Here, the reason why the first dot number data falls within a value up to 164 will be described. As for eight pixels constituting one block, “large dot formation” and “medium dot formation” are performed for each pixel. Four states are possible: “Yes”, “Form a small dot”, and “No dot”. Accordingly, the combination of the number of dots can be obtained by ₄ H ₈ (= _{4 + 8-1} C ₈ ) because these four states are equal to the number of combinations when eight times are selected while allowing overlap. For this reason, only 165 combinations (0 to 164) appear at most. Note that _n H _r is an operator that determines the number of overlapping combinations when r is selected r times from among n objects. _N C _r is an operator for obtaining the number of combinations when selecting r times from n objects without allowing duplication.

  The quantized data decoding circuit 433 acquires the first dot number data corresponding to the quantized data and the block number input from the data determination circuit 431 by referring to the first dot number table DT1 shown in FIG. . For example, if the input quantized data is “0” and the block number is “1”, the first dot number data is “0” as illustrated. If the value of the input quantized data is “3” and the block number is “2”, the first dot number data is “4”.

  Next, the quantized data decoding circuit 433 refers to the second dot number table DT2, and converts the first dot number data into second dot number data representing the number of large, medium, and small dots.

  FIG. 23 illustrates an example of the second dot number table DT2. As shown in the drawing, the second dot number table DT2 stores the first dot number data and the second dot number data representing the number of dots of each size in association with each other. The table on the right side of the figure is a reference diagram showing in detail the breakdown of the number of dots of each size represented by the second dot number data. As described above, the first dot number data is data from 0 to 164, that is, 8-bit data, and the second dot number data is 16-bit data. In this 16-bit data, 2 bits are set as one set, and the value of each set represents the dot size.

  FIG. 24 is an explanatory diagram showing an example of second dot number data. The second dot number data shown in the figure is “0001011010111111”. When this is divided into sets of 2 bits each, “00” “01” “01” “10” “10” “11” from the left. “11” and “11”. The contents of each set of 2 bits represent the size of the dot, with “11” representing a large dot, “10” representing a medium dot, “01” representing a small dot, and “00” representing no dot. That is, the illustrated second dot number data indicates that three large dots, two medium dots, and two small dots are formed. As shown in the figure, the second dot number data is stored in the right-aligned order starting from the data representing the large dots.

  Here, the description returns to FIG. According to the second dot number table DT2 shown in FIG. 23, for example, the second dot number data corresponding to the first dot number data “0” is “0000000000000”, “large dot”, “medium dot”. , “Small dot” is not formed. The second dot number data corresponding to the first dot number data “2” is “0000000000000101”, which indicates that only two “small dots” are formed. The second dot number data corresponding to the first dot number data “160” is “1010111111111111”, which indicates that six “large dots” and two “medium dots” are formed.

  The lower part of FIG. 23 shows the transition of the dot size represented by the second dot number data. As shown in the figure, the size of the dots formed increases as the first dot number data increases, and the proportion of large dots increases. That is, the first dot number data increases in proportion to the quantized data as shown in FIG. 22, and the quantized data increases in proportion to the gradation value of the CMYK data as shown in FIG. As the gradation value of CMYK increases, the proportion of large size dots gradually increases, and the density of dots formed on the print medium increases.

<Dot arrangement based on order value matrix>
When the quantized data decoding circuit 433 in FIG. 21 converts the first dot number data into the second dot number data, the quantized data decoding circuit 433 refers to the order value matrix OM stored in the SDRAM 152 to obtain the second dot number data and the block number. Based on the size, dots of each size are arranged.

  FIG. 25 is an enlarged view of a part of the order value matrix OM shown in FIG. As already described, the order value matrix OM is preset with order values representing the order in which dots should be formed for each element in the 4 × 2 unit block. The dot formation order is individually set for each block, and the order value is set to a value from 1 to 8 because different values are set for the eight elements. Referring to this figure, for example, in the order value matrix OM corresponding to block number 1, among the eight elements, the order value “1” is set for the pixel in the upper left corner. In 1, the first dot is formed at the upper left corner of the image. In block number 1, since the order value “2” is set for the pixel in the lower right corner of the eight elements, the second dot is formed in the lower right corner.

  For example, in the order value matrix OM corresponding to the block number 2, the order value “1” is set to the second element from the left in the lower row, and the order value “2” is set to the element in the lower right corner. Yes. Further, in the order value matrix OM corresponding to the block number 3, the order value “1” is set as the second element from the upper right, and the order value “2” is set as the element in the lower left corner. Thus, the dot formation order is set in a different order for each block number.

  FIG. 26 is an explanatory diagram conceptually showing a procedure for arranging dots for eight pixels based on the second dot number data and the order value matrix OM. Here, the second dot number data is data that should be formed with three large dots, two medium dots, and two small dots, and the applied order value matrix OM is the block shown in FIG. It is assumed that the order value matrix OM corresponds to the number “1”.

  As shown in FIG. 26, the quantized data decoding circuit 433 first generates 2-bit data located at the right end of the second dot number data for the pixel corresponding to the order value “1” of the order value matrix OM. To get. Next, for the pixel corresponding to the order value “2” in the order value matrix OM, 2-bit data that is located second from the right of the second dot number data is acquired. In this way, if 2-bit data is applied in order from the right end of the second dot number data to each order value in the order value matrix OM, 4 pixels × 2 pixels as shown in the middle of the figure. Intermediate dot data is generated. The dot image formed by the intermediate dot data is referred to as “dot image” and is shown in the lower part of the figure.

  In this way, if 2-bit data is applied in order from the right end of the second dot number data in accordance with the order value set in the order value matrix OM, the second dot number data has a right-justified large dot. Since the data are recorded in order, the dots are arranged in order from the largest dot in the order value matrix OM. If large dots are placed next to each other, their presence will be noticeable. However, if dots are placed in order from the largest dots as described above, the larger dots will be distributed preferentially, and their presence. Can be made inconspicuous. As a result, the image quality can be improved.

<Adjustment of output resolution by distributing intermediate dot data>
According to the processing described above, the quantized data decoding circuit 433 generates 4 × 2 pixel intermediate dot data from one quantized data. Since one quantized data corresponds to one pixel of CMYK image data input to the halftone circuit 400, when intermediate dot data is generated for all quantized data, an input resolution of 360 dpi × 360 dpi is 1440 dpi × The output resolution is 720 dpi, and the output resolution is different from the target 720 dpi × 720 dpi in the 2 × 2 mode.

  Therefore, the quantized data decoding circuit 433 divides the pixels in the intermediate dot data while converting the quantized data to the intermediate dot data, performs appropriate distribution, and adjusts the output resolution. Specifically, in the 2 × 2 mode, the same block number is assigned to two adjacent pixels. Therefore, for the pixel located on the left side, the left 2 × 2 pixel in the intermediate dot data is doted. For the pixels located on the right side, the 2 × 2 pixels on the right side in the intermediate dot data are assigned as the dot formation data. By doing so, the input resolution of 360 dpi × 360 dpi is normally converted to the output resolution of 720 dpi × 720 dpi.

  FIG. 27 is an explanatory diagram showing a specific example in which intermediate dot data is distributed in the 2 × 2 mode. As shown in the figure, when the quantized data decoding circuit 433 receives the quantized data of two adjacent pixels belonging to the same block number, the quantized data is converted into the first dot number data and the second dot number, respectively. Data is converted into intermediate dot data based on the order value matrix. Since the intermediate dot data is generated for 8 pixels each, among the first intermediate dot data, the four pixels located on the left side (the portion indicated by “L” in the figure) are adopted as the dot formation data. . Of the second intermediate dot data, the four pixels located on the right side (the portion indicated by “R” in the figure) are employed as the next dot formation data. The quantized data decoding circuit 433 can generate dot formation data as shown in the lower part of the figure by repeating such processing for intermediate dot data belonging to the same block number.

  According to the processing described above, the quantized data decoding circuit 433 generates 2 pixel × 2 pixel dot formation data for each quantized data input from the encoded data buffer EB. Become. The dot formation data generated in this way is sequentially stored in the dot formation data buffer DB. Thus, the decoding process by the quantized data decoding circuit 433 is completed.

  In this embodiment, as shown in FIGS. 26 and 27, intermediate dot data for all 8 pixels is generated, and then the intermediate dot data is divided into two, and either one is used as dot formation data. It was supposed to be distributed. On the other hand, the following distribution can also be performed. That is, as shown in FIG. 27, the portion allocated to the dot formation data in the intermediate dot data has already been determined as indicated by “L” and “R”, and therefore corresponds to the portion to be allocated. If only the order values in the order value matrix OM are used, the dot formation data can be generated without generating all eight pixels in the intermediate dot data. For example, for the “L” portion at the upper left of the dot formation data in FIG. 27, the bits corresponding to the order values 1, 6, 8, and 4 in the left half of the order value matrix OM of block number 1 shown in FIG. If only this is acquired from the second dot number data, the dot formation data for such a portion can be generated. For the adjacent “R” portion, only the bits corresponding to the order values 3, 5, 7, and 2 in the right half of the order value matrix OM of the block number 1 shown in FIG. Can be used to generate dot formation data for such a portion. According to such a distribution method, it is not necessary to generate intermediate dot data for all eight pixels, so that the processing speed can be improved and the memory capacity to be used can be reduced.

(C-2-4-3) Monochrome edge data decoding circuit:
Next, the monochrome edge data decoding circuit 432 shown in FIG. 21 will be described. The monochrome edge data decoding circuit 432 is a circuit for performing halftone processing on monochrome edge data. When the black / white edge data decoding circuit 432 receives the 4-bit monochrome edge data and the block number value from the data determination circuit 431, the monochrome edge table ET shown in FIG. Determine the color. For example, if the monochrome edge data input from the data determination circuit 431 is “1110”, (A, B, C, D) = (1, 1, 1, 0). Since “1” represents white and “0” represents black, the colors are (A, B, C, D) = (white, white, white, black).

  Since the black and white edge data decoding circuit 432 is a color in which ink is not ejected in the white portion in the 2 × 2 pixel, the dot formation data represented by 2 bits is “00” representing no dot. . That is, for the white portion, the halftone process is not executed, and the dot formation data is set directly to “00”. By doing so, the processing speed can be improved. When transparent ink is used, only the dot formation data for transparent ink can be set to “11”, and the dot formation data for other inks can be set to “00”.

  On the other hand, for the black portion in 2 × 2 pixels, (R, G, B) = (0, 0, 0), which is a color that does not develop color in the RGB format, but C, M, Since the color is a color generated by combining a plurality of inks such as Y, the black and white edge data decoding circuit 432 converts the black portion in the 2 × 2 pixel to the dot formation data based on the black data table BT stored in the SDRAM 152. Perform the conversion process. Since the black and white edge is composed of white pixels and black pixels, black is the only color in which dots need to be actually formed. Therefore, by preparing in advance as a black data table BT a dedicated table for halftone processing only for black, it is possible to immediately convert black pixels in the black and white edge into dot formation data. . The black data table BT can be created in advance by inputting image data of a predetermined size constituted by only black pixels to the color conversion circuit 300 and the halftone circuit 400 and performing halftone processing. A detailed method for creating the black data table BT will be described later. Note that black can be represented only by K ink, but since the color tone may be finely adjusted depending on the type of printing paper, the inclination of the nozzle, and the like, in this embodiment, C, M, It is assumed that coloring is performed by a combination of a plurality of inks such as Y.

  FIG. 28 is an explanatory diagram showing an example of the black data table BT. As shown in the figure, the black data table BT has a size of 128 × 64, which is the same size as the order value matrix OM, and is entirely divided into a plurality of blocks each having a size of 4 × 2. Yes. Each block is assigned the same block number as the order value matrix OM. The black data table BT has planes for a total of eight colors for each ink color, and 2-bit dot formation data representing the dot size is recorded in each element. By referring to the black data table BT, the monochrome edge data decoding circuit 432 can acquire dot formation data corresponding to the position of the black portion included in the monochrome edge data.

  Here, as to which position in the black data table BT the black data to be converted corresponds, the block number of the input black-and-white edge data, the order in which the data determination circuit 431 inputs the black-and-white edge data, 2 × It can be determined from the position of black data in the black and white edge data. For example, the black and white edge data including the black data to be converted (see the lower part of FIG. 28) has the block number “1”, and the black and white edge data is the second input from the encode data buffer EB. Considering the case in which 2 × 2 black and white edge data exists in the lower right (“D” portion), the dot formation data set at the lower right in the block with the block number “1” Will be acquired.

  By using the black data table BT described above, the black and white edge data decoding circuit 432 can directly convert the black data into dot formation data without converting into the CMYK format, quantized data, or the like. , Processing speed can be improved. In addition, since monochrome edge data having a resolution of 720 dpi × 720 dpi can be converted into dot formation data of 720 dpi × 720 dpi, the half resolution is more reproducible than the quantized data decoding circuit 433 having an input resolution of 360 dpi × 360 dpi. Tone processing can be performed. In this embodiment, the black data is directly converted into dot formation data by using the black data table BT. However, the black data is temporarily converted from RGB data to CMYK without using the black data table BT. Data can be converted into dot formation data by quantizing the data and then converting the data into first dot number data and second dot number data and arranging dots based on the order value matrix OM. .

  When the monochrome edge data decoding circuit 432 converts the monochrome edge data into dot formation data for four pixels by the above-described processing, the dot formation data buffer DB sequentially stores the generated dot formation data. Then, 2 × 2 pixel dot formation data having a resolution of 720 dpi × 720 dpi output from the quantized data decoding circuit 433 and the monochrome edge data decoding circuit 432 is sequentially stored in the dot formation data buffer DB. become. That is, at this point, image data representing characters and the like and image data representing the background and the like are combined to form one output image. When the accumulation of dot formation data is completed, the decoder 430 (FIG. 21) outputs a ready signal indicating that the accumulation of dot formation data is completed to the head driving data conversion circuit 500.

  Note that the decoder 430 finally accumulates dot formation data that can be printed by the ink head 211 in one main scan in the dot formation data buffer DB. That is, the dot formation data buffer DB is accumulated after thinning out the dot formation data that is located between the nozzle pitches and is not printed in one main scan. Such a thinning-out process can be performed by decoding only data corresponding to a raster line that actually ejects ink when the decoder 430 decodes quantized data and monochrome edge data. Specifically, for example, when decoding quantized data, only the necessary order values in the order value matrix (for example, order values 1, 6, 3, and 5 of the order value matrix shown in FIG. 26) When dot data is acquired from 2-dot count data and monochrome edge data is decoded, only necessary portions (for example, “A” and “B” shown in the lower part of FIG. 28) in the monochrome edge data are decoded. This can be done by obtaining dot data from the black data table BT. In the conventional error diffusion method, it is necessary to perform a process of gradually dispersing the gradation value error of the pixel of interest to the gradation values of surrounding pixels, so only the dot formation data belonging to the necessary raster line is generated. Although it is difficult, in the halftone process of this embodiment, only the dot formation data on the raster line for actually ejecting ink can be easily generated by the process as described above.

C-3. Head drive data conversion circuit:
Next, the head drive data conversion circuit 500 shown in FIG. 10 will be described. The head drive data conversion circuit 500 is a circuit that converts the dot formation data stored in the dot formation data buffer DB into head drive data for driving the ink head. As shown, the head drive data conversion circuit 500 includes a data rotation unit 510 connected to the dot formation data buffer DB, and an HB control unit 520 connected to the data rotation unit 510.

(C-3-1) Data rotation unit:
When the data rotation unit 510 receives a ready signal from the decoder 430 of the halftone circuit 400, the data rotation unit 510 reads the data formation data from the dot formation data buffer DB and converts it into head drive data. Until the conversion process is completed, the busy signal is transmitted to the decoder 430 of the halftone circuit. The decoder 430 stops various decoding processes until the busy signal is stopped. By doing so, it is possible to prevent the dot formation data buffer DB from overflowing.

  FIG. 29 is an explanatory diagram showing the concept of data rearrangement by the data rotation unit 510. In the dot formation data buffer DB, as shown in the upper part of the figure, the dot formation data that has been subjected to the thinning process is stored in alignment in the main scanning direction, but the ink head 211 has a plurality of nozzles for each color. Are provided in the sub-scanning direction, and raster lines are simultaneously printed by the number of the nozzles. Therefore, the data rotation unit 510 reads the dot formation data in the vertical direction so that the data is assigned in order from the top of the nozzle. Then, as shown in the lower part of the figure, the data is rearranged and converted to head driving data.

(C-3-2) HB control unit:
The HB control unit 520 in FIG. 10 is a unit that controls the output of data to the head driving data buffer HB. The HB control unit 520 receives head driving data from the data rotation unit 510 and sequentially stores it in the head driving data buffer HB. The head driving data stored in the head driving data buffer HB is read by the head control unit 156 in the control unit 150 shown in FIG. 2 and used for ink ejection control. The head control unit 156 applies the voltage waveform for forming a large dot to the piezo element if the data input from the head driving data buffer HB is “11” while repeating the main scanning and the sub scanning of the carriage 210. If “10”, a voltage waveform for forming a medium dot is applied to the piezo element. If “01”, a voltage waveform for forming a small dot is applied to the piezo element. In this way, the printing apparatus 100 performs color printing on the print medium S.

D. Effects of the embodiment:
The embodiments of the present invention have been described based on the examples. According to the printing apparatus 100 of the present embodiment, a high-resolution (720 dpi × 720 dpi) image is input, and a portion of a character or a symbol (monochrome edge) represented by only a combination of white and black is included in the image. Then, halftone processing is performed with the high resolution (720 dpi × 720 dpi), and for other background images and the like, the halftone processing is performed by once reducing the resolution to half (360 dpi × 360 dpi). For this reason, halftone processing can be performed with a much smaller memory capacity than with halftone processing with high resolution for all image regions.

  In addition, since black and white edge portions representing characters and symbols are subjected to halftone processing while maintaining the resolution of the input image, printing can be performed while maintaining clear image quality. For the background image and the like, the resolution is finally raised to the original resolution (720 dpi × 720 dpi) and is combined with the character portion and the like. For this reason, the image formed on the print medium S has the same resolution in all areas. Background images and the like have fewer edge portions than characters and the like, so even if the resolution is reduced during the halftone process, the image quality of the final output image is hardly affected. Rather, the process of taking the average of the gradation values of the four pixels and reducing the resolution may round off components such as noise and give the impression of improved image quality. Therefore, according to the present embodiment, the impression that the image quality is improved as a whole can be given to the user.

  In this embodiment, when halftone processing is performed on a portion other than the black and white edge, the 8-bit gradation value of each color constituting the CMYK image data is encoded into 5-bit quantized data. Can be reduced. Furthermore, for monochrome edge data, a total of 96 bits (= 4 pixels × 8 bits × 3 colors) representing RGB data for 4 pixels is binarized, and a monochrome edge of 5 bits including monochrome edge determination bits is obtained. Since the data can be encoded, the data capacity of about 95% can be reduced for a portion such as a character composed only of black and white edges.

  Further, according to the applicant's estimation, the image processing according to the present embodiment has a memory capacity of about 720 dpi × 720 dpi, which is about 20% of the memory capacity required to perform halftone processing on a standard 360 dpi × 360 dpi image. It became possible to handle image data. This does not reduce the resolution for black and white edges and other portions than black and white edges, and simply requires four times the memory capacity required for halftone processing of 720 dpi × 720 dpi image data at 360 dpi × 360 dpi. The capacity is much less than that.

  In this embodiment, halftone processing is performed by referring to various tables such as the quantization table QT, the first dot number table DT1, the second dot number table DT2, and the order value matrix OM. In the halftone process, the presence / absence of dots is determined simply by referring to these tables. Therefore, it is not necessary to perform processing for comparing the threshold value and the gradation value as in the conventional systematic dither method, and the error generated in each pixel is different from that in the conventional error diffusion method. It is not necessary to perform a process of distributing to the pixels. Therefore, halftone processing can be performed at a very high speed as compared with the conventional method.

  In addition, since the printing apparatus 100 does not need to form dots for the white portion, in this embodiment, the halftone process is not performed for the white portion among the pixels constituting the monochrome edge. Therefore, the processing speed can be improved.

  In addition, as illustrated in FIGS. 5 and 10, the printing apparatus 100 according to the present embodiment includes a main unit group in which various main units that perform predetermined image processing are connected in series, and these main units in parallel. And a pass unit group in which a plurality of pass units are connected in series. Averaged data obtained by averaging the gradation values of the four pixels by the monochrome edge processing unit 320 is sequentially transferred to the main unit group. On the other hand, the black and white edge data generated by the black and white edge processing unit 320 is sequentially transferred to the pass unit group in synchronization with the transfer of the averaged data to the main unit group. Thus, the averaged data and the monochrome edge data output synchronously from each unit group are input to the data selector 420 at the same timing, and either data is encoded data according to the state of the monochrome edge determination bit. Accumulated in buffer EB. According to the configuration of this embodiment, different image processing can be easily performed on the averaged data and the monochrome edge data. In addition, since the averaged data and the black and white edge data are transferred in synchronization with the main unit and the pass unit, respectively, the transfer order does not get out of order until the data selector 420 is reached, and the order relation is maintained. can do. That is, in the transfer process, any data does not overtake the other data. Therefore, it is not necessary to wait for the next data to be processed until the averaged data or the black-and-white edge data reaches the encoded data buffer EB, and the data can be subsequently input to the main unit and the pass unit. As a result, the processing speed can be increased, and the printing speed can be improved.

E. Data flow in the halftone circuit in 1 × 1 mode:
Incidentally, in FIG. 10, signal lines used in the 1 × 1 mode are indicated by broken lines. The 1 × 1 mode is a mode in which both the input resolution and the output resolution are 360 dpi × 360 dpi, and thus processing related to a monochrome edge that requires a resolution of 720 dpi × 720 dpi is not performed. Therefore, in the 1 × 1 mode, as will be described below, halftone processing is performed in a different procedure from that in other modes.

  As shown in FIG. 10, in the 1 × 1 mode, the encoder 410 encodes CMYK data input from the color conversion circuit 300 into 5-bit quantized data as in other modes, not the data selector 420, The quantized data is output directly to the decoder 430. When the quantized data is input from the encoder 410, the decoder 430 converts the quantized data into 2-bit dot formation data using the first dot number table DT1, the second dot number table DT2, and the order value matrix OM. To do. The dot formation data is stored in the encoded data buffer EB via the EB control unit 440, not the dot formation data buffer DB. That is, in other modes, 6-bit quantized data or 6-bit black and white edge data is stored in the encode data buffer EB, but in the 1 × 1 mode, 2-bit dot formation data is stored. Accumulated.

  The dot formation data stored in the encode data buffer EB is read into the data rotation unit 510 and converted into head driving data. In the 1 × 1 mode, the dot formation data on the raster line located between the nozzle pitches is thinned out (interlaced) by the data rotation unit 510 instead of the decoder 430.

  According to the above configuration, in the 1 × 1 mode, since the data selector 420 and the dot formation data buffer DB are not used and the dot formation data is output to the data rotation unit 510, the printing speed is increased. Can be improved. That is, it is possible to perform printing with priority given to speed over image quality.

F. How to create a black data table:
The black data table BT (see FIG. 28) used when the decoder 430 of the halftone circuit 400 shown in FIG. 10 decodes monochrome edge data is recorded in the ROM 153 in advance, and when the printing process is started or the printing apparatus 100 is started. Sometimes this can be loaded onto the SDRAM 152. However, since the black data table BT has the same capacity as the order value matrix OM, the storage area of the ROM 153 is consumed greatly. Therefore, in the above embodiment, the printing apparatus 100 dynamically generates the black data table BT by the method described below.

  FIG. 30 is a flowchart of black data table creation processing executed by the CPU 151 of the control unit 150. As shown in the figure, when the RGB image data to be printed is input from the computer 900 or the scanner 110 (step S100), the CPU 151 sets the image processing unit 155 to the 1 × 1 mode prior to image processing of the RGB image data. (Step S110), all pixels are black, that is, RGB image data of 128 pixels × 64 pixels in which the RGB values of all pixels are (0, 0, 0) is output to the image processing unit 155 (Step S120). The 1 × 1 mode is a mode in which the resolution of the input image and the resolution of the output image are made to correspond one-to-one.

  When RGB image data of 128 pixels × 64 pixels is input to the image processing unit 155, all the pixels having a size of 128 × 64 are black on the encoded data buffer EB of the SDRAM 152 by the operation of the image processing unit 155 described above. The dot formation data is generated. Then, the CPU 151 transfers and stores the dot formation data to an area for storing the black data table BT in the SDRAM 152 (step S130).

  As a result of the above processing, the black data table BT is created in a predetermined area of the SDRAM 152. Therefore, the CPU 151 sets the image processing unit 155 to the 2 × 2 mode (step S140), and the RGB image data input in step S100 is The image is output to the image processing unit 155 (step S150).

  According to the processing described above, the black data table BT is generated on the SDRAM 152 only by outputting RGB data representing black of 128 pixels × 64 pixels to the image processing unit 155. Therefore, it is not necessary to store the black data table BT in the ROM 153 in advance, and the storage capacity of the ROM 153 can be reduced. Further, since the color conversion circuit 300 of the image processing unit 155 performs ink amount correction and print stripe correction according to the individual printing apparatus 100, an optimal black data table BT is created according to the individual printing apparatus. Will be. Therefore, it is possible to improve the image quality.

  Further, since the black data table BT is created every time print data is input in the above-described creation process of the black data table BT, for example, the type of printing paper, the type of ink set, and the print image quality Depending on the setting, a black data table BT suitable for the setting can be created. Of course, when such a necessity is not necessary, the processing in steps S110 to S130 of FIG. 30 may be executed when the printing apparatus 100 is activated. In this way, it is not necessary to create the black data table BT every time printing is performed, so that the printing speed can be improved.

G. Examples of other output resolution modes:
In the printing apparatus 100 described above, the case where various image processes are performed in the 2 × 2 mode has been described. Here, for reference, a block number determination method and an intermediate dot data distribution method in other output resolution modes will be described.

<Determination method of block number in each mode>
FIG. 31 is an explanatory diagram showing a block number discrimination method in the 1 × 1 mode. The 1 × 1 mode is a mode in which the resolution (360 dpi × 360 dpi) of the CMYK image data input by the encoder 410 is output at an equal resolution (360 dpi × 360 dpi). Therefore, the size of the 4 × 2 unit block to which one block number is assigned in the order value matrix OM is 4 × 2 pixels even in the CMYK image data if it is output in the 1 × 1 mode. It corresponds to. Therefore, the halftone circuit 400 determines that the 4 × 2 pixels have the same block number.

  FIG. 32 is an explanatory diagram showing a block number discrimination method in the 1 × 2 mode. The 1 × 2 mode is a mode in which the resolution of CMYK image data input by the encoder 410 (360 dpi × 360 dpi) is doubled in the vertical direction (360 dpi × 720 dpi) and output. Therefore, the size of a 4 × 2 unit block to which one block number is assigned in the order value matrix OM is 4 × 1 pixel in CMYK image data to be output in the 1 × 2 mode. It corresponds to. Therefore, the halftone circuit 400 determines that the 4 × 1 pixels have the same block number.

  FIG. 33 is an explanatory diagram showing a block number discrimination method in the 2 × 1 mode. The 2 × 1 mode is a mode in which the resolution (360 dpi × 360 dpi) of CMYK image data input by the encoder 410 is doubled in the horizontal direction (720 dpi × 360 dpi). Therefore, the size of the 4 × 2 unit block to which one block number is assigned in the order value matrix OM is 2 × 2 pixels in the CMYK image data to be output in the 2 × 1 mode. It corresponds to. Therefore, the halftone circuit 400 determines that the 2 × 2 pixels have the same block number.

  FIG. 34 is an explanatory diagram showing a block number discrimination method in the 4 × 2 mode. The 4 × 2 mode is a mode in which the resolution (360 dpi × 360 dpi) of CMYK image data input by the encoder 410 is four times in the horizontal direction and doubled in the vertical direction (1440 dpi × 720 dpi). Therefore, the size of the 4 × 2 unit block to which one block number in the order value matrix OM is assigned is 1 pixel × 1 pixel in the CMYK image data to be output in the 4 × 2 mode. It corresponds to. Therefore, the halftone circuit 400 determines that such 1 × 1 pixels have the same block number.

<Distribution of intermediate dot data in each mode>
As shown in FIG. 26, 4 × 2 intermediate dot data is generated from one quantized data regardless of the output resolution mode. Since one quantized data corresponds to one pixel of CMYK image data, when intermediate dot data is generated for all quantized data, an input resolution of 360 dpi × 360 dpi becomes an output resolution of 1440 dpi × 720 dpi. Each mode (excluding the 4 × 2 mode) has a resolution different from the target output resolution. Therefore, the quantized data decoding circuit 433 in the decoder 430 appropriately distributes the pixels constituting the intermediate dot data according to the output resolution mode and adjusts the output resolution.

<1x1 mode>
FIG. 35 is an explanatory diagram showing a method for distributing intermediate dot data in the 1 × 1 mode. As shown in FIG. 31, in the 1 × 1 mode, a total of 8 pixels of 4 × 2 pixels have the same block number. Accordingly, as shown in FIG. 35, pixels at different positions are extracted one by one from a total of eight intermediate dot data, each of which is generated from the eight pixels, four in the horizontal direction and two in the vertical direction. This is distributed as dot formation data of pixel × 2 pixels. By doing so, the input resolution of 360 dpi × 360 dpi is converted to the target output resolution of 360 dpi × 360 dpi.

<1x2 mode>
FIG. 36 is an explanatory diagram showing a method for distributing intermediate dot data in the 1 × 2 mode. As shown in FIG. 32, in the 1 × 2 mode, a total of 4 pixels of 4 pixels × 1 pixel have the same block number. Therefore, as shown in FIG. 36, two pixels at different positions are extracted in the vertical direction from four intermediate dot data in the horizontal direction generated from the four pixels, and these are extracted as 4 pixels × 2 pixels. Is distributed as dot formation data. By doing so, the input resolution of 360 dpi × 360 dpi is converted to the target output resolution of 360 dpi × 720 dpi.

<In the case of 2 × 1 mode>
FIG. 37 is an explanatory diagram showing a method for distributing intermediate dot data in the 2 × 1 mode. As shown in FIG. 33, in the 2 × 1 mode, a total of 4 pixels of 2 × 2 pixels have the same block number. Therefore, as shown in FIG. 37, two pixels at different positions are extracted from each of the four intermediate dot data generated from the four pixels, two in the horizontal direction and two in the vertical direction. This is distributed as dot formation data of 4 pixels × 2 pixels. By doing so, the input resolution of 360 dpi × 360 dpi is converted to the target output resolution of 720 dpi × 360 dpi.

<4x2 mode>
FIG. 38 is an explanatory diagram showing a method for distributing intermediate dot data in the 4 × 2 mode. As shown in FIG. 34, in the 4 × 2 mode, each pixel has one block number. Therefore, as shown in FIG. 38, all pixels are extracted from one intermediate dot data generated from one pixel, and this is applied as it is as dot formation data of 4 pixels × 2 pixels. By doing so, the input resolution of 360 dpi × 360 dpi is converted to the target output resolution of 1440 dpi × 720 dpi.

<Other modes>
Other output resolution modes include a 2 × 4 mode with an output resolution of 720 dpi × 1440 dpi and a 4 × 4 mode with an output resolution of 1440 dpi × 1440 dpi. In these modes, FIG. 22 and FIG. Since the contents of the first dot number table DT1 and the second dot number table DT2 shown in FIG. 23 are different and the mode of the halftone process is different from the other modes, detailed description is omitted in this embodiment.

H. Variations:
Although various embodiments of the present invention have been described above, the present invention is not limited to such embodiments, and it goes without saying that various configurations can be adopted without departing from the spirit of the present invention. For example, a function realized by hardware may be realized by software by the CPU 151 executing a predetermined program. In addition, the following modifications are possible.

(H-1) Modification 1:
In the above embodiment, the color conversion process and the encoding / decoding of the quantized data are performed by the printing apparatus 100 alone. On the other hand, for example, each device located before the encoded data buffer EB, that is, the color conversion circuit 300, the encoder 410, and the data selector 420 are incorporated in a device different from the printing device 100, and the printing device 100 is used. It is good also as what connects with an apparatus by a predetermined communication path. As such a device, for example, a computer 900 can be used. When the computer 900 is used, processing corresponding to the processing performed by the color conversion circuit 300, the encoder 410, and the data selector 420 can be realized by software using, for example, a printer driver. By doing so, the processing burden on the printing apparatus 100 can be reduced. In addition, the quantized data encoded by the encoder 410 and the black and white edge data encoded by the black and white edge processing unit 320 are greatly reduced in data capacity compared to the original RGB data. Will be reduced.

(H-2) Modification 2:
In the above embodiment, the size of the order value matrix is 128 × 64. However, the order value matrix is not limited to such a size, and may be a larger size (for example, 512 × 256). If an order value matrix having a large size is used, halftone processing can be efficiently performed even when the size of the input image is large.

  39 and 40 are explanatory diagrams illustrating an example of an order value matrix of 512 × 256. FIG. 39 shows an example in which the 128 × 64 size order value matrix (hatched portion in the figure) shown in the embodiment is applied in a tile shape while offset by 64 pixels in the horizontal direction. . FIG. 40 shows an example in which the 128 × 64 order value matrix shown in the embodiment is applied in a tile shape while being offset by 32 pixels in the vertical direction. In this way, by repeatedly applying a normal size order value matrix, it is possible to easily generate a large size order value matrix.

  The order value matrix having a large size may be recorded in advance in the ROM 153, but the normal order value matrix of 128 × 64 size is stored in the ROM 153 so that the printing apparatus 100 is started up. The CPU 151 may load the small order value matrix, configure the arrangement shown in FIG. 39 or FIG. In this way, the storage capacity of the ROM 153 can be reduced. When the order value matrix is increased in size, the black data table BT is also increased in size accordingly.

(H-3) Modification 3:
In the above embodiment, the halftone process is performed with the high resolution for the portion constituted only by the combination of white and black, but the combination of colors is not limited to this. For example, white and blue or white and green can be used. In this case, for example, the user may be able to set a color combination using the computer 900 or the operation panel 140. In this way, even when the color of a character or the like is expressed by a color other than black, the character can be printed with a high resolution. When the user designates a color, a table corresponding to the color can be created instead of the black data table BT. Even in this case, if the black data table creation method described above is followed, a table corresponding to the designated color can be easily generated.

(H-4) Modification 4:
In the above embodiment, the image processing in the case where the input resolution is 720 dpi × 720 dpi and the output resolution is 720 dpi × 720 dpi has been described, but the resolution is not limited to this. For example, both resolutions may be 600 dpi × 600 dpi, or 1200 dpi × 1200 dpi. Further, it may be 1440 dpi × 1440 dpi.

(H-5) Modification 5:
In the above embodiment, each path unit has been described as having a function of sequentially transferring data such as black and white edge data. On the other hand, each pass unit may have a function of performing predetermined image processing on data to be transferred as well as transfer of black-and-white edge data and the like. For example, processing for converting the resolution of black and white edge data to a higher resolution, processing for converting the color of a black or white pixel represented by black and white edge data to another color, and the like can be performed. These processes can be processes that are completed within the processing time in which the main unit corresponding to the pass unit performs image processing. By doing so, there is no delay in data transfer by the main unit, and appropriate synchronization can be achieved.

(H-6) Modification 6:
In the above embodiment, the pass units existing in the color conversion circuit 300 and the halftone circuit 400 include the same number of units as the corresponding main units. On the other hand, the pass unit can be configured with a smaller number.

  FIG. 41 is an explanatory diagram comparing the configuration of the pass unit of the above embodiment and the configuration of a pass unit as a modification. FIG. 41A shows the configuration of the pass unit of the embodiment, and FIG. 41B shows the configuration of the pass unit as a modification. In this figure, a part of the main unit shown in the embodiment is omitted for convenience. As shown in FIG. 41 (a), the printing apparatus 100 of the above embodiment includes the same number of pass units as the main unit. However, in this modification, as shown in FIG. The number of pass units is less than the number.

  In such a modification, the ack signal output from the encoder 410 to the preceding ink amount correction unit 340 is branched and input to the output side of the first pass unit 390a and the input side of the seventh pass unit 390g. It was. By doing so, monochrome edge data is transferred from the first pass unit 390a to the seventh pass unit 390g at the timing when the averaged data is transferred from the ink amount correction unit 340 to the encoder 410. Therefore, even if the number of main units and pass units is not the same as in this modification, the averaged data and the monochrome edge data can be appropriately transferred in synchronization. In the modification shown in FIG. 41B, the FIFO memory constituting the first pass unit has a memory capacity that can store more data than the data stored in the color conversion unit 330 and the ink amount correction unit 340. Shall have.

It is explanatory drawing which shows schematic structure of the printing apparatus 100 as an Example. 2 is an explanatory diagram illustrating an internal configuration of the printing apparatus 100. FIG. FIG. 5 is an explanatory diagram illustrating a principle of ejecting ink droplets of different sizes from the ink head 211. 3 is an explanatory diagram showing a memory map of an SDRAM 152. FIG. 2 is a block diagram showing a detailed configuration of a color conversion circuit 300. FIG. It is explanatory drawing which shows the internal structure of the pass units 390a-390f. 3 is an explanatory diagram showing an internal configuration of a monochrome edge processing unit 320. FIG. It is explanatory drawing which shows an example of the monochrome edge table ET. 3 is an explanatory diagram showing an internal configuration of a color conversion unit 330. FIG. 2 is a block diagram showing detailed configurations of a halftone circuit 400 and a head drive data conversion circuit 500. FIG. It is explanatory drawing which shows the outline | summary of the halftone process by the conventional systematic dither method. It is explanatory drawing which shows a mode that the number of dots changes about a 4x2 pixel group. It is explanatory drawing which shows the relationship between the gradation value, the number of generated dots, and their arrangement. It is explanatory drawing which shows the determination method of ON / OFF of a dot in case large, medium, and small dots can be formed. When the gradation value of image data changes from 0 to 255, it is a graph showing how a gradation value changes on a printing medium by the combination of large, medium, and small dots. FIG. 16 is an explanatory diagram illustrating the graph illustrated in FIG. 15 as a correspondence table. It is explanatory drawing which shows the discrimination method of the block number in 2 * 2 mode. It is explanatory drawing which shows the example of an actual discrimination | determination of a block number. 6 is an explanatory diagram showing a detailed configuration of a data selector 420. FIG. It is explanatory drawing which shows notionally the process until it stores encoded data in the encoded data buffer EB. 4 is an explanatory diagram showing a detailed configuration of a decoder 430. FIG. It is explanatory drawing which shows an example of 1st dot number table DT1. An example of the second dot number table DT2 will be described. It is explanatory drawing which shows an example of 2nd dot number data. It is the figure which expanded a part of order value matrix. It is explanatory drawing which shows notionally the procedure which arrange | positions a dot, respectively about eight pixels based on 2nd dot number data and order value matrix OM. It is explanatory drawing which shows the specific example which distributes intermediate dot data in 2 * 2 mode. It is explanatory drawing which shows an example of the black data table BT. It is explanatory drawing which shows the concept of the rearrangement of the data by the data rotation unit. It is a flowchart of a black data table creation process. It is explanatory drawing which shows the discrimination method of the block number in 1 * 1 mode. It is explanatory drawing which shows the discrimination method of the block number in 1 * 2 mode. It is explanatory drawing which shows the discrimination method of the block number in 2 * 1 mode. It is explanatory drawing which shows the discrimination method of the block number in 4x2 mode. It is explanatory drawing which shows the distribution method of the intermediate dot data in 1x1 mode. It is explanatory drawing which shows the distribution method of the intermediate dot data in 1x2 mode. It is explanatory drawing which shows the distribution method of the intermediate dot data in 2 * 1 mode. It is explanatory drawing which shows the distribution method of the intermediate dot data in 4x2 mode. It is explanatory drawing which shows an example of the order value matrix of 512x256. It is explanatory drawing which shows an example of the order value matrix of 512x256. It is explanatory drawing which compares the structure of the pass unit of an Example, and the structure of the pass unit of a modification.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... Printing apparatus 110 ... Scanner 120 ... Memory card slot 130 ... USB interface 140 ... Operation panel 150 ... Control unit 151 ... CPU
152 ... SDRAM
153 ... ROM
154 ... EEPROM
155 ... Image processing unit 156 ... Head control unit 160 ... Printing mechanism 200 ... Printer 210 ... Carriage 211 ... Ink head 212 ... Ink cartridge 220 ... Carriage motor 230. ..Paper feed motor 260 ... drive belt 270 ... platen 280 ... sliding shaft 300 ... color conversion circuit 310 ... line input unit 320 ... monochrome edge processing unit 321 ... monochrome Edge determination circuit 322 ... Averaging circuit 323 ... Monochrome edge encoding circuit 324 ... Selector circuit 330 ... Color conversion unit 331 ... Conversion circuit 332 ... Standard edge determination circuit 333 ... Noise Generating circuit 334 ... Smoothing circuit 340 ... Ink amount correction unit 350 ... Print stripe suppression unit 360 ... Bit reduction unit 370 ... Transparent ink post-processing unit 380 ... Smoothing unit in lock 390a to g ... pass unit 400 ... halftone circuit 410 ... encoder 411 ... block number discrimination circuit 412 ... quantization circuit 420 ... data selector 430 ... Decoder 431 ... Data determination circuit 432 ... Monochrome edge data decode circuit 433 ... Quantized data decode circuit 440 ... EB control unit 500 ... Head drive data conversion circuit 510 ... Data rotation unit 520 ... HB control unit 900 ... Computer

Claims (7)

An image output device that performs predetermined image processing and outputs the input image data,
Intermediate data generation that divides input image data into pixel groups in units of a predetermined number of pixels, generates first intermediate data and second intermediate data from the pixel groups according to the characteristics of the pixel groups, and outputs them respectively Unit,
An image processing unit group in which a plurality of image processing units that input the first intermediate data and sequentially transfer the first intermediate data while performing predetermined image processing on each of the first intermediate data;
A plurality of pass units that input the second intermediate data and sequentially transfer the second intermediate data in synchronization with the transfer of the first intermediate data between the image processing units are connected in series. Pass unit group,
The first intermediate data after image processing is performed by the image processing unit group and the second intermediate data sequentially transferred in the pass unit group are input , and the input intermediate data A data selector for selecting one of them,
A storage unit that sequentially stores the intermediate data selected by the data selector; and an output image generation unit that generates an output image using the intermediate data stored in the storage unit .
The intermediate data generation unit is
Averaged data generating means for generating data with reduced resolution of the pixel group by averaging the pixel values of the pixels constituting the pixel group as the first intermediate data;
Edge determination means for determining whether or not an edge is included in the pixel group;
Edge data generating means for generating data representing the form of the edge as the second intermediate data when it is determined that the pixel group includes an edge;
Dummy data generating means for generating dummy data as the second intermediate data when it is determined that an edge is not included in the pixel group;
Flag information output means for outputting flag information indicating whether or not an edge is included in the pixel group to the pass unit group together with the second intermediate data;
The image processing unit group includes, as the image processing, a color conversion process for converting a color space of the first intermediate data from an RGB format to a CMYK format, and a level for correcting a gradation value of the first intermediate data. An image processing unit that performs at least one of the tone correction processing,
The data selector acquires the flag information together with the second intermediate data, and if the flag information indicates that the pixel group includes an edge, selects the second intermediate data. An image output device that selects the first intermediate data when the flag information indicates that the pixel group does not include an edge . The image output device according to claim 1 ,
The image processing unit transmits a request signal for requesting data reception to another image processing unit to which the first intermediate data is transferred, and the other image processing unit receives the request signal. Then, the first intermediate data transferred from the image processing unit is received, and when the reception of the first intermediate data is completed, a confirmation indicating that the data reception is completed is given to the image processing unit. An image output apparatus that transfers the first intermediate data by transmitting a signal. The image output apparatus according to claim 2 ,
The pass unit is
The image processing unit provided corresponding to the pass unit branches and inputs the confirmation signal to be transmitted to another image processing unit that is a transfer source of the first intermediate data. When the input is detected, the second intermediate data is input from another path unit that is a transfer source of the second intermediate data;
The image processing unit provided corresponding to the pass unit is transmitted from another image processing unit that transfers the first intermediate data to the image processing unit provided corresponding to the pass unit. When the confirmation signal is branched and input, and the input of the confirmation signal is detected, the second intermediate data is output to another path unit to which the second intermediate data is transferred, An image output apparatus that transfers the second intermediate data in synchronization with the transfer of the first intermediate data between the image processing units. The image output device according to any one of claims 1 to 3 ,
The image output device, wherein the edge determination unit of the intermediate data generation unit determines that an edge is included when the pixel group includes white and black pixels. The image output device according to claim 4 ,
The edge data generation means of the intermediate data generation unit generates data obtained by binarizing the pixel group in accordance with the arrangement of white and black pixels in the pixel group as data representing the form of the edge. Image output apparatus. An image output apparatus according to any one of claims 1 to 5 ,
Each of the pass units is an image output device configured with a predetermined number of FIFO memories. The image output device according to any one of claims 1 to 6 ,
The output image generation unit generates the output image by individually performing different halftone processing on the first intermediate data and the second intermediate data stored in the storage unit. Output device.

Images