JP4475069B2 - Semiconductor module non-defective product judgment method - Google Patents

Description

It relates good determination method of the present invention is a semiconductor module, comprising in particular to non-defective judging process of isolated power module power semiconductor element is mounted on the insulating substrate of the heat radiating base plate, by various stresses received in the manufacturing process The present invention relates to a non- defective product determination method for confirming whether or not a crack has occurred in an insulating substrate at the final stage of the manufacturing process.

  As a method for detecting whether or not a ceramic substrate included in a semiconductor module is cracked, for example, in Japanese Patent Laid-Open No. 2000-234993 (Patent Document 1), the periphery of a semiconductor device is covered with silicone gel and the silicone gel is cured. A method is disclosed in which vacuum degassing or heating is performed after the heating. In this method, a crack generated in the ceramic substrate is detected by causing bubbles confined in the crack to appear in the silicone gel.

In addition, as a final product test of the semiconductor module, a screening test for selecting a semiconductor module including an insulating substrate in which a crack has occurred is conventionally performed. In this screening test, if an alternating high voltage is applied to the semiconductor module and the value of the current flowing through the semiconductor module is equal to or greater than a specified value, it is determined that the insulating substrate has a crack.
Japanese Unexamined Patent Publication No. 2000-234993 (page 3, [0001] to [0002], FIGS. 1 and 2)

  In the method of confirming the presence or absence of air bubbles in the silicone gel, it is an essential condition for the test that the inside of the semiconductor module can be seen through. However, in the current semiconductor module, the upper part of the case is sealed with epoxy resin. Therefore, since the inside of the semiconductor module cannot be confirmed, the method for confirming bubbles cannot be applied to mass-produced products. In addition, the process of filling the sealed container with silicone gel and depressurizing requires a long time, and there is a problem that it is not practical as an inspection method for mass-produced products.

  On the other hand, in the conventional AC high voltage application test method, it is necessary to increase the applied voltage in order to increase the sensitivity for detecting cracks in the insulating substrate. However, when the applied voltage is increased, dielectric breakdown occurs in the insulating substrate due to causes other than cracks. This dielectric breakdown is creeping breakdown caused by creeping discharge. Therefore, the AC high voltage application test method has a problem that the yield of the product may decrease due to creepage failure.

The present invention has been made to solve the above-described problems, and it is possible to increase the crack detection sensitivity of an insulating substrate while being a simple method applicable to mass-produced products. The object is to obtain a non- defective determination method for a semiconductor module that can prevent creeping damage.

In summary, the present invention is a non- defective method for determining a semiconductor module having an insulating substrate having a front electrode and a back electrode, a base plate connected to the back electrode, and a semiconductor chip mounted on the front electrode. A step of heating the semiconductor module to a predetermined temperature; a step of applying a negative voltage lower than the voltage of the base plate to the surface electrode and the pad of the semiconductor chip; and a step of applying a negative voltage to the insulating substrate. Measuring a flowing current, and determining that the semiconductor module is non-defective when the measurement result is equal to or lower than the upper limit value.

According to the non- defective product determination method of the present invention, the negative DC voltage is applied to the semiconductor module in a high-temperature environment to increase the sensitivity of detecting cracks, so that it becomes possible to detect cracks at a lower voltage than before. This makes it possible to prevent damage caused to the creeping surface of the insulating substrate due to creeping discharge.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same reference numerals indicate the same or corresponding parts.

[Embodiment 1]
FIG. 1 is a diagram showing a specific example of a non- defective product determination method for a semiconductor module according to the first embodiment.

  Referring to FIG. 1, a semiconductor module 1 is connected to a high voltage power supply 2 and an ammeter 3. The high voltage power supply 2 applies a negative DC voltage to the semiconductor module 1. The conditions for applying the negative DC voltage will be described later. The ammeter 3 measures the current flowing through the semiconductor module 1. The semiconductor module 1 is sorted using the measurement result. If the measurement result is less than or equal to the upper limit value, the semiconductor module 1 is determined to be non-defective. When the insulating substrate included in the semiconductor module 1 has a crack, the measurement result exceeds the upper limit value, so that the semiconductor module 1 is determined as a defective product.

  The semiconductor module 1 is preheated in a high-temperature bath (not shown) or the like, and is installed on the hot plate 4 during testing. The hot plate 4 heats the semiconductor module 1 at a predetermined temperature.

The semiconductor module 1 includes a base plate 11, an insulating substrate 12, and solder 13. The base plate 11 is made of a material having excellent conductivity and thermal conductivity such as copper and aluminum. The insulating substrate 12 includes a ceramic 122 made of alumina (Al ₂ O ₃ ), aluminum nitride (AlN), or the like and having excellent insulation and thermal conductivity, and a front electrode 121 and a back electrode 123 joined to the ceramic 122. . The back electrode 123 is electrically and mechanically connected to the base plate 11 by the solder 13.

  The semiconductor module 1 further includes a semiconductor chip 14 that is a main component of the semiconductor module 1, a wire 15 made of, for example, aluminum, an external electrode terminal 16, and a case 17. The semiconductor chip 14 is, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), a bipolar transistor, or the like.

  The semiconductor chip 14 is mounted on the front electrode 121 by solder (not shown). The front electrode 121 is an electrode for setting the substrate voltage of the semiconductor chip 14. The external electrode terminal 16 is electrically connected to a pad (not shown) or the surface electrode 121 formed on the surface of the semiconductor chip 14 by a wire 15. After the base plate 11 on which the insulating substrate 12 and the semiconductor chip 14 are mounted and the case 17 are assembled, the inside of the case 17 is sealed with a sealing resin 18 such as silicone gel or epoxy resin for electrical insulation. The

The semiconductor module 1 has a plurality of external electrode terminals. Some of the plurality of external electrode terminals are connected to the surface electrode 121, and some are connected to pads of the semiconductor chip 14. In the non- defective product determination method of the present invention, a high voltage is applied between the front electrode 121 and the back electrode 123 in order to detect cracks in the insulating substrate 12. Therefore, it is necessary to prevent damage to the semiconductor chip 14 when a high voltage is applied.

  In the first embodiment, each of the plurality of external terminals is collectively connected to the negative electrode side of the high voltage power supply 2. In FIG. 1, for convenience of explanation, a plurality of external electrode terminals that apply a negative voltage to the surface electrode 121 and the pad of the semiconductor chip 14 are collectively shown as the external electrode terminal 16. Since the same voltage is applied to the front electrode 121 and the pad of the semiconductor chip 14, no voltage difference is generated between the front surface and the back surface of the semiconductor chip 14. Therefore, damage to the semiconductor chip 14 can be prevented.

  Further, since the base plate 11 is connected to the positive electrode side of the high voltage power supply 2, the voltage applied to the surface electrode 121 and the pad of the semiconductor chip 14 is lower than the voltage applied to the base plate 11. Hereinafter, the voltage applied to the external electrode terminal 16 will be described using the voltage applied to the base plate 11 as a reference voltage.

  The semiconductor module 1 is affected by a thermal history in a manufacturing process such as solder bonding. In this case, the crack 20 may occur in the ceramic 122 which is a brittle material. Therefore, a screening test for detecting cracks generated in the insulating substrate is commonly used in the final product process. In a conventional screening test, a method of applying an AC high voltage at a commercial frequency has been used.

In the non- defective product determination method of the present invention, the semiconductor module 1 is heated by the hot plate 4 and a negative DC voltage is applied by the high voltage power source 2. Although the temperature at the time of heating is set to a temperature higher than room temperature, it is more preferably set to 125 ° C. or higher. Since the crack 20 existing in the insulating substrate 12 can be detected with a voltage lower than the AC voltage conventionally used, creeping damage that occurs in the insulating substrate 12 can be prevented. Furthermore, the applied voltage can be further reduced by setting the heating temperature to room temperature or higher.

  Hereinafter, problems that may occur in the conventional screening test will be described first, and then the effects obtained by the first embodiment will be described.

  FIG. 2 is a diagram illustrating a difference generated in the AC breakdown voltage of the semiconductor module 1 of FIG. 1 due to the difference in presence or absence of cracks.

  Referring to FIG. 2, the horizontal axis indicates the breakdown voltage when an AC voltage is applied, and the vertical axis indicates the cumulative breakdown probability. The breakdown voltage is a voltage at the time when an overcurrent flows by stepping up the voltage stepwise. The unit of the horizontal axis is kVp, and the unit of the vertical axis is%. Characteristics A1 and A2 indicate changes in the cumulative breakdown probability with respect to the breakdown voltage in each case where the insulating substrate has a crack and when there is no crack.

  1 was generated in the ceramic 122 in the insulating substrate 12 by forcibly applying mechanical strain to the semiconductor module 1 from the outside. The frequency of the AC voltage to be applied (applied) is 60 Hz. Further, the temperature for heating the semiconductor module 1 is 125 ° C.

  When there is no crack in the insulating substrate as indicated by the characteristic A2, the average breakdown voltage is 12 kVp. In this case, the dielectric breakdown is caused by creeping breakdown of the insulating substrate. On the other hand, as shown in the characteristic A1, when the insulating substrate has a crack, the average breakdown voltage is 9.6 kVp.

  When an AC voltage is applied to detect cracks, a voltage of about 10 kVp is required. However, when a voltage of about 10 kVp is applied to the semiconductor module 1, creeping damage occurs on the insulating substrate of the semiconductor module with a low probability. In other words, the product may break. Therefore, when an AC voltage is applied, there arises a problem that the yield of products decreases.

  FIG. 3 is a diagram showing a breakdown voltage when a negative DC voltage is applied to the semiconductor module 1 of FIG. 1 under the same conditions as FIG.

  Referring to FIG. 3, the horizontal axis represents the breakdown voltage when a DC voltage is applied, and the vertical axis represents the cumulative breakdown probability. Characteristics A3 and A4 indicate changes in the cumulative breakdown probability with respect to the breakdown voltage in each case where the insulating substrate has a crack and no crack.

  When there is no crack in the insulating substrate as indicated by the characteristic A4, the average breakdown voltage is 23 kVp. In this case, the dielectric breakdown is caused by an external flash (flashover) of the semiconductor module 1 of FIG. The “outer flash of the semiconductor module 1” means discharging from the external electrode terminal 16 to the base plate via the case creeping surface. The index “F / O” shown in FIG. 3 indicates that the characteristic A4 is a result depending on the flashover.

  On the other hand, when the insulating substrate 12 has a crack, the average breakdown voltage is 6.5 kVp. The index “BD” shown in FIG. 3 indicates that the characteristic A3 is a result depending on a dielectric breakdown (breakdown) due to a crack.

  As shown in FIG. 3, by using a negative DC voltage as a crack detection voltage, a voltage lower than the AC voltage can be set, and creeping damage occurs on the insulating substrate 12 of a normal module having no crack. No longer.

  The reason why the negative DC voltage is used in the first embodiment will be described below. In the process from creeping discharge to dielectric breakdown of the insulating substrate, the progress of creeping discharge becomes slower when a negative voltage is applied than when a positive voltage is applied. In other words, the negative DC voltage has a higher creepage breakdown voltage of the insulating substrate than the positive voltage.

  This will be described in more detail below. When a plate-like electrode is connected to a surface with an insulator and a small electrode is connected to the other surface and a voltage is applied between the two electrodes, creeping discharge may occur. In this case, it is generally known that creeping discharge is less likely to occur when a negative voltage is applied to a small electrode than when a positive voltage is applied.

  As shown in FIG. 1, the entire surface of the back electrode 123 is connected to the base plate 11. That is, the back electrode 123 corresponds to the plate electrode described above. On the other hand, when a voltage is applied between the front electrode 121 and the back electrode 123, there is a portion where a high electric field is locally formed between the end of the front electrode 121 and the back electrode 123. This portion corresponds to the small electrode described above. Therefore, creeping discharge is less likely to occur when a negative voltage is applied to the surface electrode than when a positive voltage is applied. When an AC voltage is applied to the surface electrode and a dielectric breakdown test is performed by creeping discharge, in most cases, creeping occurs when a positive voltage is applied. This confirms that the discharge is difficult to progress.

  Also, as shown in FIGS. 2 and 3, it is preferable to apply a DC voltage rather than an AC voltage in order to prevent creeping breakdown of the insulating substrate. Therefore, if a negative DC voltage is applied, the possibility of damaging the insulation performance on the creeping surface of the insulating substrate is reduced.

  2 and 3, the temperature when heating the semiconductor module is set to 125 ° C. The reason for this will be described below.

  FIG. 4 is a diagram showing a change in breakdown voltage with respect to the temperature of the semiconductor module 1 of FIG.

  Referring to FIG. 4, the horizontal axis indicates the temperature of the semiconductor module 1, and the vertical axis indicates the breakdown voltage when a negative DC voltage is applied. The unit of the horizontal axis is ° C., and the unit of the vertical axis is kVp. Characteristics A5 and A6 respectively show changes in breakdown voltage with respect to temperature when the insulating substrate has no crack and when there is a crack. Both characteristics A5 and A6 indicate average values of the actually measured data. On the other hand, the characteristic A7 shows the temperature change of the lowest value of the measured data for the breakdown voltage when the insulating substrate has a crack.

  As shown in the characteristic A5, when there is no crack in the insulating substrate, the breakdown voltage hardly changes even if the temperature for heating the semiconductor module 1 is increased. On the other hand, when there is a crack in the insulating substrate as indicated by the characteristic A6, the breakdown voltage rapidly decreases as the temperature of the semiconductor module 1 increases. When the temperature exceeds 125 ° C., the measured breakdown voltage varies between 4 kV and 8 kV, and the minimum value corresponds to the thickness of the insulating substrate 12 (in the case of FIG. 3, the thickness of the insulating substrate is 0.635 mm). The gap drops to near the theoretical breakdown voltage (3.5 kV).

  When cracks are inherent in the insulating substrate as shown in FIG. 4, the negative DC breakdown voltage in the semiconductor module decreases as the temperature of the semiconductor module rises from room temperature. Therefore, the difference from the negative DC breakdown voltage of a normal semiconductor module (where there is no crack in the insulating substrate) increases. That is, if the temperature at which the semiconductor module is heated is higher than room temperature, the applied voltage for detecting cracks generated in the insulating substrate can be lowered. More preferably, it is desirable to apply a voltage by setting the temperature for heating the semiconductor module to 125 ° C. or higher.

  The reason why the breakdown voltage decreases when the temperature of the semiconductor module is raised will be described below. The dielectric breakdown in the crack is caused by the progress of the avalanche due to the repeated collision of electrons accelerated by the electric field applied between the electrodes. When cracks are inherent in the ceramic 122 of FIG. 1, when the temperature of the semiconductor module 1 is increased, the crack width is expanded by the expansion of the front electrode 121 and the back electrode 123 made of, for example, copper or aluminum. When the crack width is narrow, the electrons are trapped by the wall surface of the crack, so that the progress is prevented. However, when the crack width is sufficient, the progress of the discharge leading to the final dielectric breakdown occurs. Therefore, the breakdown voltage decreases with increasing temperature.

  As described above, according to the first embodiment, by applying a negative DC voltage to the semiconductor module, it is possible to reliably detect a crack inherent in the insulating substrate at a voltage lower than a conventionally used AC voltage. Can do.

  In addition, according to the first embodiment, since the negative DC breakdown voltage is reduced by spreading cracks inherent in the insulating substrate due to heating, it is normal to set a low voltage to be applied to detect the cracks. It is possible to prevent dielectric breakdown of the insulating substrate.

[Embodiment 2]
FIG. 5 is a diagram illustrating a specific example of a non- defective product determination method for a semiconductor module according to the second embodiment.

  Referring to FIG. 5, high voltage power supply 2A generates a negative voltage and a positive voltage by amplifying an arbitrary waveform generator 21 that generates a DC voltage or a voltage of an arbitrary frequency and an output of arbitrary waveform generator 21. 1 is different from the high voltage power supply 2 in FIG. The other parts shown in FIG. 5 are the same as those in FIG. 1, and thus the description thereof will not be repeated. The arbitrary waveform generator 21 is, for example, SG-4115 manufactured by Iwasaki Tsushinki. The high voltage amplifier 22 is, for example, TREK MODEL 610D or Matsusada Precision HEOP-10B2.

In the non- defective product determination method of the second embodiment, similarly to the first embodiment, the high voltage power supply 2 </ b > A applies a negative DC voltage to the semiconductor module 1 in order to detect the crack 20. The temperature of the semiconductor module 1 is set to a temperature higher than room temperature (more preferably 125 ° C. or higher).

  In the case of applying a DC voltage, it is well known that a charging phenomenon occurs in which charges are accumulated in an insulator by applying a voltage to the insulator such as the ceramic 122 and the charges remain in the insulator even after the voltage is applied. In the second embodiment, after the presence or absence of the crack 20 is detected, it is possible to prevent the influence caused by the charging phenomenon such as damage to the semiconductor chip.

  FIG. 6 is a diagram illustrating an example of a voltage waveform output from the high voltage amplifier 22 of FIG.

  Referring to FIG. 6, waveforms B1, B2, and B3 corresponding to application conditions are shown. One scale on the vertical axis of each waveform indicates 5 kV, and one scale on the horizontal axis indicates 2 seconds. Waveform B1 is a voltage waveform when a DC voltage of −8.5 kV is applied for 3 seconds. A waveform B2 is a voltage waveform when a DC voltage of −8.5 kV is applied for 3 seconds and then a DC voltage of +4.25 kV is applied for 3 seconds. A waveform B3 is a voltage waveform when a DC voltage of −8.5 kV is applied for 3 seconds and then a DC voltage of +4.25 kV is applied for 6 seconds.

  FIG. 7 is a diagram illustrating a charging potential that appears at the external electrode terminal 16 after the applied voltage indicated by the waveforms B1 to B3 in FIG. 6 is applied to the semiconductor module 1 in FIG.

  Referring to FIG. 7, the horizontal axis represents the elapsed time when the time when the external electrode terminal 16 was opened was set to 0, and the vertical axis was measured by measuring the electrode voltage of the charged external electrode terminal 16 with a non-contact surface potentiometer. Results are shown. The unit of the horizontal axis is minutes, and the unit of the vertical axis is V. Characteristics A8 to A10 indicate changes in the electrode voltage generated at the external electrode terminal 16 after the voltage indicated by the waveforms B1 to B3 in FIG. 6 is applied to the semiconductor module 1 in FIG. 5 and the external electrode terminal 16 is opened.

  As shown by the characteristic A8, the electrode voltage reaches a peak value (−220 V) about 3 minutes after the external electrode terminal 16 is opened. The electrode voltage gradually attenuates after reaching the peak value.

  For example, assume that the semiconductor chip 14 of FIG. 5 is an IGBT, and the gate breakdown voltage of the IGBT is about 40V. In the crack detection test, each of the gate terminal, the emitter terminal, and the collector terminal is batched, and a negative voltage is applied between the batched terminal and the base plate. When each terminal is opened after the test and the voltage at the collector terminal changes as shown in characteristic A8, the change in the voltage at the gate terminal and the emitter terminal is almost the same as the change in the voltage at the collector terminal.

  When the peak value of the electrode voltage reaches −220 V, each terminal may come into contact with the measurement jig (ground potential) during the module characteristic test performed in the next step of the crack detection test. At this time, a voltage of 220 V is applied between the gate terminal and the emitter terminal, which may cause gate breakdown (gate failure).

  In order to solve such a problem, in the second embodiment, after the negative DC voltage is applied, the positive DC voltage is applied to the semiconductor module. As shown in the characteristic A9, the peak voltage after the external electrode terminal 16 is opened by applying a voltage having a polarity opposite to the test voltage is reduced to -75V. Further, when the positive DC voltage application time is set longer as shown in the characteristic A10, the peak voltage of the external electrode terminal 16 is further lowered to ± 20V.

  As described above, if only a negative DC voltage is applied to the semiconductor module, charges are accumulated in the external electrode terminals and a negative potential remains, which may cause damage such as a gate failure in the semiconductor chip. In the second embodiment, by adding a neutralization method in which a positive DC voltage having a reverse polarity is applied after applying a negative DC voltage, the residual potential is greatly reduced, and a gate failure of the semiconductor chip can be avoided.

  As described above, according to the second embodiment, the potential remaining in the external electrode terminal is greatly reduced by further applying a reverse polarity voltage after applying the negative voltage in the crack detection test. Chip damage can be avoided.

[Embodiment 3]
The third embodiment is a semiconductor module capable of avoiding damage to the semiconductor chip more effectively than the second embodiment by optimally setting the application condition of the positive DC voltage used for neutralizing the charging potential. This is a non-defective product determination method.

A specific example of the non- defective semiconductor module determination method according to the third embodiment is similar to the example shown in FIG. In the third embodiment, as in the second embodiment, the negative DC voltage and the positive DC voltage are applied to the semiconductor module 1 of FIG. The temperature for heating the semiconductor module 1 is set to room temperature or higher (more preferably 125 ° C. or higher).

  FIG. 8 is a diagram illustrating the charging potential of the external electrode terminal 16 with respect to the negative DC voltage applied to the semiconductor module 1 of FIG. 5 and the application time.

  Referring to FIG. 8, the horizontal axis represents the product of the applied voltage and the application time, and the vertical axis represents the peak value (induced peak voltage) of the charged potential induced in the external electrode terminal 16.

  As shown by the characteristic A11, the peak voltage is determined depending on the product of the applied voltage and time in a wide range on the horizontal axis. Therefore, in order to neutralize the charged charge after applying the negative DC voltage, the product of the positive DC voltage and the application time should be equal to the product of the negative DC voltage and the application time of the negative DC voltage. And the application time of the positive direct current voltage and the positive direct current voltage may be set.

  Further, the absolute value of the reverse polarity voltage (positive DC voltage) for neutralization is lower than the absolute value of the negative voltage with respect to the creepage of the insulator (particularly, the insulating substrate 12 in FIG. 5) included in the semiconductor module. Effective in reducing damage. For example, if the absolute value of the positive polarity voltage is ½ of the absolute value of the negative polarity DC voltage and the application time of the positive polarity voltage is twice as long as the application time of the negative polarity DC voltage, the test time is greatly increased. Therefore, the charging potential can be effectively reduced.

  The peak voltage tends to increase as the capacitance of the insulating substrate increases. Therefore, the peak value may differ depending on the number of insulating substrates (capacitance) mounted on the module even under the same voltage and application time for a certain application condition. For example, characteristic A8 in FIG. 7 is a result obtained by a semiconductor module including six insulating substrates, and characteristic A11 is a result obtained by a semiconductor module including one small-area insulating substrate. According to the third embodiment, the potential charged to the external electrode terminal can be effectively neutralized even when the peak voltages are different as described above.

  As described above, according to the third embodiment, there is a possibility of causing damage to the semiconductor chip in the semiconductor module by optimally setting the voltage value and application time of the positive voltage according to the application condition of the negative voltage. Since it becomes possible to make the charged potential of a certain external electrode terminal the lowest, it becomes possible to effectively detect cracks in the insulating substrate and prevent damage to the semiconductor chip.

[Embodiment 4]
In the non- defective product determination method according to the fourth embodiment, a positive DC voltage is applied to the semiconductor module after a negative voltage is applied, as in the second and third embodiments. However, the non- defective product determination method of the fourth embodiment is different from the second and third embodiments in that a low-frequency voltage is applied instead of the DC voltage.

A specific example of the non- defective semiconductor module determination method according to the fourth embodiment is the same as the example shown in FIG. Further, in the non- defective product determination method of the fourth embodiment, the heating condition is set to room temperature or higher (more preferably 125 ° C. or higher) as in the first to third embodiments. Hereinafter, the conditions of the voltage applied to the semiconductor module 1 will be described.

  FIG. 9 is a diagram illustrating an example of an applied voltage waveform in the fourth embodiment.

  Referring to FIG. 9, one scale on the vertical axis indicates 5 kV, and one scale on the horizontal axis indicates 2 seconds. The amplitude of the waveform B4 is ± 8.5 kVp, and the frequency is 0.1 Hz. The application time is one cycle. The applied voltage changes in the negative direction in the first 0.5 cycle, and changes in the positive direction in the next 0.5 cycle. The negative voltage is used to detect cracks, and the positive voltage is used to neutralize the charging potential.

  Hereinafter, the optimum voltage application conditions in the fourth embodiment will be described.

  FIG. 10 is a diagram showing a change with time of the charging potential appearing at the external electrode terminal 16 when a low frequency voltage is applied to the semiconductor module 1 of FIG.

  Referring to FIG. 10, characteristics A12 to A16 indicate temporal changes in the residual voltage generated at the external electrode terminal after the low frequency voltage is applied. Each of the characteristics A12 to A16 is a time change of the residual voltage generated at the external electrode terminal when the frequency of the low frequency voltage is 0.05 Hz, 0.1 Hz, 0.2 Hz, 0.5 Hz, and 1 Hz. The amplitude of each applied voltage is ± 8.5 kVp, and the application time is one cycle.

  As shown in FIG. 10, the peak value of the residual voltage increases as the frequency decreases. Therefore, the lower the frequency, the higher the possibility that a gate failure will occur in the semiconductor chip 14. For example, as shown in the characteristics A12 and A13, when the frequency of the applied voltage is 0.1 Hz or less, the charging potential is significantly increased.

  For example, as described above, it is assumed that the semiconductor chip is an IGBT and the gate breakdown voltage is 40V. Considering the possibility of gate failure, if the frequency of the applied voltage is set to 0.2 Hz or more and 1 Hz or less, the crack detection test and subsequent neutralization of the charged potential can be effectively realized.

  As described above, according to the fourth embodiment, by applying the low frequency voltage that changes in the negative direction and the positive direction, the crack detection voltage is set in the same manner as when the negative DC voltage and the positive DC voltage are added. Since the electrode potential is reduced and the charged potential of the electrode is neutralized, it is possible to prevent creeping destruction of the insulating substrate and damage to the semiconductor chip.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

It is a figure which shows the specific example of the non- defective item determination method of the semiconductor module by Embodiment 1. FIG. It is a figure which shows the difference which arises in the alternating current breakdown voltage of the semiconductor module 1 of FIG. 1 by the difference in the presence or absence of a crack. It is a figure which shows the breakdown voltage at the time of applying a negative DC voltage to the semiconductor module 1 of FIG. 1 on the same conditions as FIG. It is a figure which shows the change of the breakdown voltage with respect to the temperature of the semiconductor module 1 of FIG. It is a figure which shows the relationship between the temperature of the semiconductor module 1 of FIG. 1, and a breakdown voltage. It is a figure which shows the specific example of the non- defective item determination method of the semiconductor module by Embodiment 2. It is a figure which shows the example of the voltage waveform output from the high voltage amplifier 22 of FIG. FIG. 7 is a diagram illustrating a charging potential that appears at an external electrode terminal 16 after the applied voltage indicated by the waveforms B1 to B3 in FIG. 6 is applied to the semiconductor module 1 in FIG. 5. It is a figure which shows the charging potential of the external electrode terminal 16 with respect to the negative direct current voltage applied to the semiconductor module 1 of FIG. 5, and application time. FIG. 10 is a diagram showing an example of an applied voltage waveform in the fourth embodiment. It is a figure which shows the time change of the charging potential which appears in the external electrode terminal 16 when a low frequency voltage is applied to the semiconductor module 1 of FIG.

  DESCRIPTION OF SYMBOLS 1 Semiconductor module, 2, 2A high voltage power supply, 3 Ammeter, 4 Hot plate, 11 Base plate, 12 Insulating substrate, 14 Semiconductor chip, 15 Wire, 16 External electrode terminal, 17 Case, 18 Sealing resin, 20 Crack, 21 Arbitrary waveform generator, 22 High voltage amplifier, 121 Front electrode, 122 Ceramic, 123 Back electrode, A1-A16 characteristic, B1-B3 waveform.

Claims (9)

An insulating substrate having a front electrode and a back electrode, a base plate connected to the back electrode, and a non- defective method for determining a semiconductor module having a semiconductor chip mounted on the front electrode,
Heating the semiconductor module to a predetermined temperature;
Applying a negative voltage lower than the voltage of the base plate to the surface electrode and the pad of the semiconductor chip;
Wherein a current flowing through the insulating substrate to measure a negative polarity voltage when applying, when the measurement result is less than the upper limit value and a determining that said semiconductor module is a non-defective, non-defective determination method of the semiconductor module . The semiconductor module non- defective product determination according to claim 1, further comprising a step of applying a positive voltage higher than a voltage of the base plate to the surface electrode and the pad of the semiconductor chip after applying the negative voltage. Method. 3. The semiconductor module non- defective product determination method according to claim 2, wherein the negative voltage and the positive voltage are output using an arbitrary waveform generator and a high-voltage amplifier that amplifies the output of the arbitrary waveform generator. The predetermined temperature is higher than room temperature,
The semiconductor module non- defective product determination method according to claim 2, wherein the negative voltage and the positive voltage are DC voltages. The product of the positive voltage and the time for applying the positive voltage is equal to the product of the negative voltage and the time for applying the negative voltage, and the absolute value of the positive voltage is the negative voltage. The semiconductor module non- defective product determination method according to claim 4, wherein the positive voltage and the time during which the positive voltage is applied are set so as to be equal to or less than an absolute value. The predetermined temperature is higher than room temperature,
The non- defective product determination method for a semiconductor module according to claim 2, wherein the negative voltage and the positive voltage are low-frequency voltages that change at a frequency of 0.05 Hz or more and 1 Hz or less. The semiconductor module non- defective method determination method according to claim 6, wherein the frequency is a frequency of 0.2 Hz or more and 1 Hz or less. The predetermined temperature is higher than room temperature,
The semiconductor module non- defective product determination method according to claim 1, wherein the negative voltage is a DC voltage. The semiconductor module non- defective product determination method according to claim 8, wherein the predetermined temperature is a temperature of 125 ° C. or higher.

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