JP4471578B2 - Fluorescent display tube drive circuit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a fluorescent display tube driving circuit that improves the reliability of a fluorescent display tube.
[0002]
[Prior art]
A fluorescent fluorescent display (hereinafter referred to as VFD) emits thermoelectrons by applying a voltage to a directly heated cathode called a filament to generate heat by heating the filament in a vacuum vessel. Is a self-luminous display device that displays a desired pattern by accelerating the light with a grid electrode and causing the phosphor on the anode (segment) electrode to collide and emit light. VFD has excellent features such as visibility, multiple colors, low operating voltage, and reliability (environmental resistance), and is used in various applications and fields such as automobiles, home appliances, and consumer use. Has been.
[0003]
Here, in the VFD, when a short circuit or disconnection occurs with respect to the filament or its wiring, or when a short circuit occurs between the filament or its wiring and the wiring of another electrode (grid electrode or segment electrode), or the filament is driven. If an abnormal state relating to the filament is left unattended in a case where an element to be damaged fails, the filament may be damaged or the filament may be ignited. For this reason, there is a demand for a mechanism for quickly detecting an abnormal state related to the filament with respect to the VFD and quickly performing a predetermined process at the time of abnormality (for example, stopping driving of the filament).
[0004]
FIG. 6 is a diagram for explaining a conventional mechanism for detecting an abnormality of the filament pulse voltage applied to the filament 11 as one of the mechanisms described above. In the figure, as a method of applying a voltage to the filament 11, a pulse driving method of applying a pulse voltage (hereinafter referred to as a filament pulse voltage) obtained by chopping a DC voltage considerably higher than the normal rated voltage of the filament is used. The example used is shown. That is, in the pulse driving method, when an abnormality occurs such that the filament pulse voltage is fixed on the high potential side, the filament driving method is different from the other methods (direct current (DC) driving method, alternating current (AC) driving method). Since the progress of damage, ignition, etc. is fast, it is required to promptly detect abnormality of the filament pulse voltage.
[0005]
In FIG. 6, an external controller 40 such as a microcomputer outputs a pulse drive signal set to a desired duty ratio to the filament drive circuit 110. Then, the filament driving circuit 110 generates a filament pulse voltage from the power supply voltage for driving the filament 11 and applies it to the filament 11 by a switching operation based on the pulse driving signal received from the external controller 110.
[0006]
Here, the external controller 40 includes, for example, detection means for detecting the pulse width and voltage level of the filament pulse voltage with respect to the filament pulse voltage applied to the filament 11. The external controller 40 performs feedback control such as adjusting the setting of the duty ratio of the pulse drive signal output to the filament drive circuit 110 according to the pulse width and voltage level of the filament pulse voltage detected by the detection means. .
[0007]
The conventional mechanism as described above is disclosed in, for example, Patent Document 1 shown below.
[0008]
[Patent Document 1]
JP 2002-108263 A
[0009]
[Problems to be solved by the invention]
In the conventional mechanism for detecting an abnormality in the filament pulse voltage, the external controller 40 detects the pulse width, voltage level, etc. of the filament pulse voltage, and performs desired feedback control on the filament pulse voltage according to the detected value. It is carried out. However, this has been a factor that increases the processing load on the external controller 40. Further, the external controller 40 has a problem that it takes a considerable time to detect the abnormality of the filament pulse voltage due to an increase in its processing load, leading to damage to the filament 11 or ignition. .
The present invention has been made on the basis of the above-described circumstances, and is to provide a VFD driving circuit that improves the reliability of the VFD.
[0010]
[Means for Solving the Problems]
A main aspect of the present invention for solving the above-mentioned problems is that a filament drive for pulse-driving the filament with a pulsed filament pulse voltage is applied to a fluorescent display tube having a filament, a grid electrode, and a segment electrode. A fluorescent display tube driving circuit comprising: means; grid driving means for driving the grid electrodes; and segment driving means for driving the segment electrodes,
Detecting means for detecting that the level of the filament pulse voltage is fixed, and outputting a detection signal representing the detected result;
Control means for controlling the output of the filament driving means, the grid driving means, and the segment driving means so as to stop the driving of at least one of the filament, the grid electrode or the segment electrode based on the detection signal; A fluorescent display tube driving circuit comprising:
[0011]
The “detection means” described above is an “abnormality detection means” described later, and outputs an “abnormality detection signal” described later as the “detection signal” described above.
[0012]
The fluorescent display tube driving circuit according to the present invention has the above-described characteristics, so that the abnormality detection processing of the filament pulse voltage applied to the filament of the fluorescent display tube is intervened with the processing of the external controller as in the prior art. Without being performed in the fluorescent display tube driving circuit. This makes it possible to quickly perform the filament pulse voltage abnormality detection process, and to suppress the progress of filament damage and ignition.
[0013]
In the above-described feature of the present invention, the case where only the filament driving means is stopped corresponds to, for example, a case where a short circuit or disconnection occurs in the filament or its wiring as the cause of the filament pulse voltage abnormality. Further, when only the grid driving means or the segment driving means is stopped, for example, although the filament pulse driving is stopped as a cause of the abnormality of the filament pulse voltage, an abnormality occurs in the grid voltage or the segment voltage, This corresponds to the case where the wiring of the grid electrode or the segment electrode is short-circuited with the filament or the wiring.
[0014]
Thus, the fluorescent display tube driving circuit according to the present invention can improve the reliability of the fluorescent display tube (particularly, the reliability of the fluorescent display tube with respect to the filament).
[0015]
Other features of the present invention will become apparent from the accompanying drawings and the description of this specification.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
=== Summary of Disclosure ===
The following disclosure will reveal at least the following.
Filament driving means for driving the filament with a pulsed filament pulse voltage for a fluorescent display tube having a filament, a grid electrode, and a segment electrode, and a grid for driving the grid electrode A fluorescent display tube driving circuit having a driving means and a segment driving means for driving the segment electrode, and detecting that the level of the filament pulse voltage is fixed, and representing the detected result Detection means for outputting a detection signal; and, based on the detection signal, the filament driving means, the grid driving means, and the segment driving means so as to stop driving of at least one of the filament, the grid electrode, or the segment electrode And a control means for controlling the output.
[0017]
The “detection means” described above is an “abnormality detection means” described later, and outputs an “abnormality detection signal” described later as the “detection signal” described above.
[0018]
In the fluorescent display tube driving circuit according to the present invention, the abnormality detection processing of the filament pulse voltage applied to the filament of the fluorescent display tube is performed in the fluorescent display tube driving circuit without intervention of the processing of the external controller as in the prior art. Can do. This makes it possible to quickly perform the filament pulse voltage abnormality detection process, and to suppress the progress of filament damage and ignition.
[0019]
In the above-described feature according to the present invention, the case where only the filament driving means is stopped corresponds to, for example, a case where a short circuit or disconnection occurs in the filament or its wiring as the cause of abnormality of the filament pulse voltage. The case of stopping only the grid driving means or the segment driving means is, for example, a voltage for driving the grid electrode (grid voltage) although the pulse driving of the filament is stopped as a cause of abnormality of the filament pulse voltage. Or a voltage for driving the segment electrode (segment voltage) is abnormal, and the wiring of the grid electrode or the segment electrode is short-circuited with the filament or the wiring.
[0020]
Thus, the fluorescent display tube driving circuit according to the present invention can improve the reliability of the fluorescent display tube (particularly, the reliability of the fluorescent display tube with respect to the filament).
[0021]
With respect to the second aspect of the present invention, the control means has at least one level of the filament pulse voltage, the voltage for driving the grid electrode, or the voltage for driving the segment electrode based on the detection signal. The output of the filament driving means, the grid driving means, and the segment driving means is controlled so as to reach a level on the drive stop side.
In this manner, the fluorescent display tube driving circuit according to the present invention can quickly perform the abnormality detection processing of the filament pulse voltage, and can suppress the progress of filament damage and ignition. That is, the reliability of the fluorescent display tube can be improved.
[0022]
In the third aspect of the present invention, the control means sets at least one output of the filament driving means, the grid driving means or the segment driving means to a high impedance state based on the detection signal.
In this manner, the fluorescent display tube driving circuit according to the present invention can quickly perform the abnormality detection processing of the filament pulse voltage, and can suppress the progress of filament damage and ignition. That is, the reliability of the fluorescent display tube can be improved.
In addition, the fluorescent display tube driving circuit according to the present invention can protect its own internal circuit against at least one abnormality of the filament pulse voltage, the grid voltage, or the segment voltage that causes the abnormality of the filament pulse voltage. it can.
[0023]
According to a fourth aspect of the present invention, the fluorescent display tube driving circuit has means for outputting a signal for notifying that the level of the filament pulse voltage is fixed based on the detection signal.
Here, the aforementioned “signal for notifying that the level of the filament pulse voltage has been fixed” is data of an “abnormality detection flag ANF” output to an external controller described later.
Thus, the fluorescent display tube driving circuit according to the present invention can improve the observability of the filament pulse voltage abnormality detection process by transmitting the signal to the external controller.
[0024]
In the fifth aspect of the present invention, the fluorescent display tube driving circuit is a semiconductor integrated circuit, and a switching element that generates the filament pulse voltage based on an output of the filament driving means can be connected to the outside.
The above-mentioned “switching element” is, for example, a Pch-MOS type FET or an Nch-MOS type FET, and the fluorescent display tube driving circuit according to the present invention enables such a switching element to be connected to the outside. An interface (an FPCON terminal described later) may be provided.
[0025]
A sixth aspect of the present invention includes a switching element that generates the filament pulse voltage based on the output of the filament driving means.
[0026]
As described above, in the present invention, various application circuits (for example, fluorescent display tube modules) using the fluorescent display tube driving circuit may be provided with the switching elements as described above. Preferably, in the seventh aspect of the present invention, the fluorescent display tube driving circuit is a semiconductor integrated circuit, and the switching element may be connected to the outside. In the eighth aspect of the present invention, The display tube driving circuit may be a semiconductor integrated circuit in which the switching elements are integrated.
[0027]
=== Example ===
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[0028]
<System configuration>
FIG. 1 is a schematic configuration diagram of a system including a VFD driving circuit 20 according to an embodiment of the present invention. In the VFD drive circuit 20 shown in the figure, a pulse drive system is adopted as a system for applying a voltage to the filament 11. The pulse driving method is a method in which a pulse voltage (hereinafter referred to as a filament pulse voltage) obtained by chopping a DC voltage that is considerably higher than the normal rated voltage of the filament 11 is applied to the filament 11.
[0029]
Further, the VFD drive circuit 20 shown in the figure employs a dynamic drive system for driving the grid electrode 12 and the segment electrode 13, and sets the number of display digits by the grid electrode 12 to “2” digits (such grid electrode 12 The form is called "1/2 duty"), and the number of segments is "90". Note that the VFD driving circuit 20 according to the present invention is not limited to the number of grids (two digits) and the number of segments (90 segments) described above, and the driving of the grid electrodes 12 and the segment electrodes 13 is dynamic driving. A driving method combining at least one of a method and a static driving method may be used. For example, when the static drive method is adopted, all the digits are displayed by the segment electrodes 13 and one grid electrode 12 corresponding to the number of segments. In this case, a constant voltage (grid voltage) is applied to one grid electrode 12.
[0030]
An outline of the dynamic drive method and the static drive method is described in, for example, “Display Technology Series Fluorescent Display Tube 8.2 Basic Drive Circuit (pages 154 to 158)” issued by Sangyo Tosho.
[0031]
Next, regarding the peripheral circuits of the VFD driving circuit 20, the VFD 10, the external oscillator 30, the external controller 40, and the switching element 50 will be described in order.
The VFD 10 includes a filament 11, a grid electrode 12, and a segment (anode) electrode 13. The filament 11 is heated by applying a filament pulse voltage from the VFD drive circuit 20 via the switching element 50, and emits thermoelectrons. The grid electrode 12 acts as an electrode for selecting a digit, and accelerates or blocks the thermal electrons emitted from the filament 11. The segment electrode 13 functions as a segment selection electrode. The surface of the segment electrode 13 is coated with a phosphor in the shape of a pattern to be displayed. The thermoelectrons accelerated by the grid electrode 12 are caused to collide with the phosphor to emit light. Will be displayed.
[0032]
Further, in the VFD 10, lead wires are independently drawn from the grid electrode 12 for each digit independently, while the segments corresponding to each digit are internally connected in common from the segment electrode 13 to lead out the lead wires. It is. The lead wires drawn out from the grid electrode 12 and the segment electrode 13 are respectively connected to corresponding output terminals of the VFD drive circuit 20 (the grid output terminals are G1 to G2 and the segment output terminals are S1 to S45).
[0033]
The external oscillator 30 is RC oscillating means constituted by a resistor R, a capacitive element C, and the like, and constitutes an RC oscillating circuit by being connected to an oscillator terminal (OSCI terminal, OSCO terminal) of the VFD driving circuit 20. . The external oscillator 30 may be a crystal resonator or a ceramic resonator having a specific oscillation frequency, and may constitute a crystal or ceramic oscillation circuit as a free-running oscillation means. In addition, the external oscillator 30 may be a separate oscillation means for supplying a clock signal for other oscillation to the VFD drive circuit 20.
[0034]
The external controller 40 is a microcomputer or the like that does not include a VFD drive element, and is connected to the VFD drive circuit 20 via a data bus for serial data transfer, in order to drive the VFD 10 in a predetermined data transfer format. Necessary signals are transmitted to the VFD driving circuit 20. The data transfer between the external controller 40 and the VFD drive circuit 20 is not limited to the serial data transfer described above, and may be a parallel data transfer.
[0035]
The switching element 50 is a Pch MOS type FET, and its gate terminal is connected to the FPCON terminal of the VFD drive circuit 20 that outputs a pulse drive signal described later. The switching element 50 is not limited to a Pch MOS type FET. For example, the switching element 50 may be configured by an Nch MOS type FET, or may be configured by combining an Nch MOS type FET and a Pch MOS type FET. . In addition, the switching element 50 is turned on / off (switching) in accordance with a pulse drive signal supplied from the FPCON terminal of the VFD drive circuit 20, so that the power supply voltage VFL for driving the filament 11 is changed to the filament 11 of the VFD 10. A filament pulse voltage to be applied is generated.
[0036]
The FPR terminal of the VFD drive circuit 20 shown in FIG. 1 is an input terminal for setting the polarity of the pulse drive signal output from the FPCON terminal according to the input / output characteristics of the switching element 50. For example, as shown in FIG. 1, when a Pch-MOS type FET is adopted as the switching element 50, the power supply voltage VDD ("H" fixed) is connected to the FPR terminal. When an Nch-MOS type FET is adopted as the switching element 50, the FPR terminal is grounded (fixed to “L”).
[0037]
FIG. 2 is a timing chart regarding a data transfer format between the external controller 40 and the VFD driving circuit 20. As shown in the figure, the data transfer format includes a sequence related to the grid electrode G1 (hereinafter referred to as G1 sequence) and a sequence related to the grid electrode G2 (hereinafter referred to as G2 sequence). The data transfer format is not limited to the format described above, and for example, the G1 sequence and the G2 sequence may be executed in a single sequence.
[0038]
Hereinafter, the G1 sequence will be schematically described. Since the G2 sequence is basically the same as the G1 sequence, the description thereof is omitted.
First, the external controller 40 transmits the bus address (8 bits) given to the VFD driving circuit 20 together with the synchronous clock signal CL to the VFD driving circuit 20. The VFD drive circuit 20 identifies whether or not the received bus address is a bus address assigned to itself. When the bus address is identified, the control command (such as control data described later) transmitted along with the bus address received from the external controller 40 is accepted as a control command to itself. As described above, the bus address is a unique address given to each IC. In the embodiment in which the external controller 40 and a plurality of ICs are connected on the same bus line, the external controller 40 This is used to control a plurality of ICs on the same bus line.
[0039]
Next, the external controller 40 asserts the chip enable signal CE (sets it to the H level) to enable (select) the VFD drive circuit 20, and subsequently, 45-bit display data (D1 to D45) related to the grid electrode G1. ), 16-bit control data used for each control of the VFD drive circuit 20 is transmitted. The 16-bit control data includes 10-bit dimmer adjustment data (DM0 to DM9) as brightness adjustment data for VFD10 display, grid identifier DD (for example, “1” for grid electrode G1, grid electrode G2) In the case of “0”).
[0040]
Thereafter, the external controller 40 negates the chip enable signal CE (sets it to the L level), disables the VFD drive circuit 20 (non-selection), stops transmission of the synchronous clock signal CL, and executes the G1 sequence. It will be completed.
[0041]
<VFD drive circuit>
FIG. 3 is a block diagram of the VFD driving circuit 20 according to the present invention.
The VFD driving circuit 20 includes an interface unit 201, an oscillation circuit 202, a frequency dividing circuit 203, a timing generator 204, a shift register 205, a control register 206, a latch circuit 207, a multiplexer 208, a segment driver 209, a grid driver 210, and a dimmer control unit. 211, filament pulse control means 212, and abnormality detection means 213.
[0042]
The interface unit 201 is interface means for performing data transmission / reception as shown in FIG. 2 with the external controller 40.
The oscillation circuit 202 generates a reference clock signal related to the VFD drive circuit 20 by connecting the external oscillator 30 to the oscillator terminals (OSCI, OSCO). This reference clock signal is frequency-divided into a predetermined frequency by the frequency divider 203 and supplied to the timing generator 204.
The timing generator 204 is a signal (hereinafter referred to as an internal signal) that determines the timing of a signal for driving the grid electrodes G1 to G2 (hereinafter referred to as a grid drive signal) based on the signal supplied from the frequency dividing circuit 203. A clock signal A), and a filament pulse control means 212 outputs a signal for determining the timing of the pulse drive signal (hereinafter referred to as an internal clock signal B).
[0043]
The shift register 205 converts 45-bit display data (D1 to D45 or D46 to D90) and 16-bit control data received by the interface unit 201 for each G1 or G2 sequence described above into parallel data. 206, the latch circuit 207, the filament pulse control means 212, and the like.
[0044]
The control register 206 stores 32 (16 bits × 2) bits of control data supplied from the shift register 205. The control data stored in the control register 206 stores dimmer adjustment data (DM0 to DM9). The timer adjustment data (DM0 to DM9) is supplied to the dimmer control means 211.
[0045]
The latch circuit 207 holds 45-bit display data (D1 to D45) related to the grid electrode G1 and 45-bit display data (D46 to D90) related to the grid electrode G2 supplied from the shift register 205. That is, the latch circuit 207 holds 90-bit display data (D1 to D90) for each repetition period related to driving of the grid electrodes G1 to G2.
[0046]
The multiplexer 208 relates to the grid electrode G1 or G2 to be driven out of the 90-bit display data (D1 to D90) held by the latch circuit 207 at the timing of driving the grid electrodes G1 to G2. 45-bit display data is selected and supplied to the segment driver 209.
[0047]
The segment driver 209 forms a signal for driving the segment electrodes S1 to S45 based on the 45-bit display data selected and supplied by the multiplexer 208, and outputs the signal to the segment electrodes S1 to S45. The signal for driving the segment electrodes S1 to S45 may be a voltage applied to the segment electrodes S1 to S45 (hereinafter referred to as segment voltage), or a drive element between the segment driver 209 and the segment electrodes S1 to S45. May be used as a control signal supplied to the drive element (hereinafter, the segment voltage and the control signal are collectively referred to as a segment drive signal).
[0048]
The grid driver 210 forms a grid drive signal based on the internal clock signal A supplied from the timing generator 204 and outputs it to the grid electrodes G1 to G2. The signal for driving the grid electrodes G1 to G2 may be a voltage applied to the grid electrodes G1 to G2 (hereinafter referred to as a grid voltage), or a drive element between the grid driver 210 and the grid electrodes G1 to G2. And a control signal supplied to the drive element (hereinafter, the grid voltage and the control signal are collectively referred to as a grid drive signal).
[0049]
The dimmer control means 211 can adjust the duty ratio of the grid drive signal and the segment drive signal based on the dimmer adjustment data (DM0 to DM9) supplied from the control register 206.
[0050]
The filament pulse control means 212 forms a pulse drive signal for driving the filament 11 based on the internal clock signal B supplied from the timing generator 204, and the pulse drive signal generation means 80 forms the pulse drive signal via the FPCON terminal. And output to the switching element 50. Further, the filament pulse control means 212 can set the polarity of the pulse drive signal based on the signal supplied from the FPR terminal.
[0051]
The abnormality detection means 213 detects that the level of the filament pulse voltage is fixed, and outputs an abnormality detection signal indicating the detected result. The level of the abnormality detection signal is “1” if the filament pulse voltage is normal, and is “0” if it is detected that the filament pulse voltage level is fixed.
[0052]
As such an abnormality detection means 213, for example, the number of pulses per predetermined period (for example, a period for driving each grid electrode G1 to G2) of the filament pulse voltage input from the DETIN terminal is counted, and the counted pulses If the number is equal to or less than the reference pulse number (about several pulses), it may be a means for detecting that the level of the filament pulse voltage is fixed.
[0053]
Further, the abnormality detection unit 213 measures a period in which the level of the DC voltage obtained by integrating the filament pulse voltage is a level indicating that the level of the filament pulse voltage is fixed. When the measured period exceeds a predetermined period (for example, “408 / 3072≈0.133” times the period for driving the grid electrodes G1 to G2, respectively), the level of the filament pulse voltage is fixed. It is good also as a means to detect as a thing. In this case, a low-pass filter (not shown) as integrating means is connected between the output terminal of the filament pulse voltage in the switching element 50 and the DETIN terminal of the VFD drive circuit 20.
[0054]
By the way, the VFD drive circuit 20 in the figure has a BLK terminal for turning on or off the VFD display. The BLK terminal is connected so that data is supplied from the external controller 40. For example, when “0” is supplied from the external controller 40 to the BLK terminal, the VFD display can be turned off.
[0055]
The VFD drive circuit 20 according to the present invention includes a segment driver 209, a grid, and a grid driver 209 so that the drive of at least one of the segment electrode 13, the grid electrode 12 or the filament 11 is stopped based on the output (abnormality detection signal) of the abnormality detection means 213. The driver 210 has control means for controlling the output of the filament pulse control means 212.
Therefore, hereinafter, the operations of the segment driver 209, the grid driver 210, and the filament pulse control unit 212, which are the control targets of the control unit as described above, will be described.
[0056]
<Output control of grid driver or segment driver>
First, the operation of the segment driver 209 or the grid driver 210 based on the abnormality detection signal (the output of the abnormality detection unit 213) will be described with reference to FIG. Hereinafter, the description of the grid driver 210 that performs the same operation as the segment driver 209 is omitted.
[0057]
The segment driver 209 includes a level shift unit 120, an inverter unit 130, and a drive signal output unit 140, as shown in FIG. In addition to the above-described components, the segment driver 209 generates means SX for generating a signal SX for driving the segment electrode 13 based on the display data (D1 to D90) selected and supplied by the multiplexer 208. (Shown). Further, the generation means sets the level of the signal SX to “0” when the level of the abnormality detection signal as the output of the abnormality detection means 213 becomes “0”, that is, when the level of the filament pulse voltage is fixed. To do.
[0058]
The level shift unit 120 outputs a signal obtained by shifting the level of the signal SX from the power supply voltage VDD for internal operation of the VFD drive circuit 20 to a level corresponding to the power supply voltage VFL for driving the filament 11 to the inverter unit 130.
The inverter unit 130 inverts the polarity of the signal SX input from the level shift unit 120 and outputs the inverted signal to the drive signal output unit 140.
The drive signal output unit 140 has a configuration in which a resistance element is connected between the Pch-MOS type FET and the Nch-MOS type FET, and outputs a segment drive signal from a terminal on the Pch-MOS type FET side of the resistance element. .
[0059]
Here, an abnormality detection signal as an output of the abnormality detecting means 213 is inputted to the Nch-MOS type FET gate terminal. Therefore, the Nch-MOS FET is turned on when the level of the abnormality detection signal is “1” (that is, normal), and when the level of the abnormality detection signal is “0” (that is, the filament pulse voltage). When it is detected that the level is fixed), it is turned off.
[0060]
On the other hand, the output signal of the inverter 130 is input to the gate terminal of the Pch-MOS FET. Therefore, the Pch-MOS FET is switched between the on state and the off state in accordance with the level of the signal obtained by inverting the polarity of the signal SX by the inverter unit 130. When the level of the abnormality detection signal is “0”, “1” obtained by inverting the level “0” of the signal SX through the inverter 130 is input to the gate terminal of the Pch-MOS type FET. Therefore, the Pch-MOS type FET is turned off.
[0061]
That is, when the abnormality detection means 213 detects that the filament pulse voltage is fixed, the drive signal output unit 140 turns off both the Pch-MOS type FET and the Nch-MOS type FET, and the level of the segment drive signal Can be brought into a high impedance state.
[0062]
In this way, the VFD driving circuit 20 according to the present invention causes the filament pulse voltage level to be reduced due to an abnormality in the grid voltage or the segment voltage because the wiring of the grid electrode 12 or the segment electrode 13 is short-circuited with the filament 11 or the wiring thereof. When it is fixed, as the abnormality detection process, at least one level of the grid drive signal or the segment drive signal is set to a high impedance state.
[0063]
Such an abnormality detection process can be quickly performed in the VFD drive circuit 20 without intervention of the process of the external controller 40 as in the prior art. That is, the VFD drive circuit 20 according to the present invention can quickly perform the filament pulse voltage abnormality detection process, and can suppress the progress of filament damage and ignition. Further, the reliability of the VFD 10, particularly the reliability of the VFD 10 with respect to the filament 11 can be improved.
[0064]
In the above-described embodiment, the segment driver 209 (or the grid driver 210) stops driving the segment electrode 13 (or the grid electrode 12) when it is detected that the filament pulse voltage is fixed. A segment drive signal (or grid drive signal) at a level (for example, L level) may be output. Here, in order to set the segment drive signal (or segment drive signal) to the L level, for example, in the drive signal output unit 140 described above, the Nch-MOS type FET may be always turned on.
[0065]
<Output control of filament pulse control means>
Next, the operation of the filament pulse control unit 212 based on the abnormality detection signal (the output of the abnormality detection unit 213) will be described with reference to FIG.
The filament pulse control unit 212 includes a pulse drive signal generation unit 80, a pulse drive signal polarity setting unit 100, and the like as shown in FIG.
[0066]
The pulse drive signal generating means 80 is a signal for driving the filament 11 having a predetermined duty ratio (pulse width / pulse period) (hereinafter referred to as pulse) based on the internal clock signal B supplied from the timing generator 204. A driving signal).
[0067]
As such a pulse drive signal generating means 80, for example, a counting means for performing a counting operation for each period of a predetermined pulse period based on the internal clock signal B, and a count value as an output of the counting means are set to a predetermined pulse. The configuration (not shown) includes comparison means for comparing with a count value corresponding to the width, and edge forming means for forming an edge of the pulse drive signal based on the output of the count means and the comparison means. .
[0068]
The pulse drive signal generation means 80 receives an abnormality detection signal as an output of the abnormality detection means 213, and when the level of the abnormality detection signal is "0", the level of the pulse drive signal turns off the switching element 50. The level is controlled so as to be at the level (H level in the figure).
[0069]
The pulse drive signal polarity setting means 100 sets the polarity of the pulse drive signal generation means 80 output (pulse drive signal) based on the level of the signal supplied from the FPR terminal. In the example shown in FIG. 5, an Ex-OR element is employed as the pulse drive signal polarity setting means 100.
[0070]
Here, in the Ex-OR element, the switching element 50 (in the figure, in the same figure) is obtained by exclusive OR of the output (pulse drive signal) of the pulse drive signal generation means 80 and the signal level “1” supplied from the FPR terminal. A pulse drive signal corresponding to the switching characteristics of the Pch-MOS type FET) is output to the switching element 50 via the FPCON terminal. Therefore, when the level of the abnormality detection signal is “0”, the exclusive OR “1” of the level “0” of the pulse drive signal and the signal level “1” supplied from the FPR terminal is the switching element 50 ( In this figure, the switching element 50 is turned off by being inputted to the gate terminal of the Pch-MOS type FET).
[0071]
Thus, the VFD driving circuit 20 according to the present invention performs pulse driving of the filament 11 as an abnormality detection process when the filament pulse voltage level is fixed by short-circuiting the filament 11 or its wiring. Stop.
[0072]
Such an abnormality detection process can be quickly performed in the VFD drive circuit 20 without intervention of the process of the external controller 40 as in the prior art. That is, the VFD drive circuit 20 according to the present invention can quickly perform the filament pulse voltage abnormality detection process, and can suppress the progress of filament damage and ignition. Further, the reliability of the VFD 10, particularly the reliability of the VFD 10 with respect to the filament 11 can be improved.
[0073]
In the above-described embodiment, the filament pulse control unit 212 sets the level of the pulse drive signal for driving the filament 11 to a high impedance state when it is detected that the filament pulse voltage is fixed. It may be. In this case, for example, a tristate output element is connected to the output side of the pulse drive signal polarity setting means 100 described above, and the output of the tristate output element is set to a high impedance state based on the abnormality detection signal. Also good.
[0074]
=== Other Embodiments ===
In the above-described embodiment, the abnormality detection flag ANF for notifying that the level of the filament pulse voltage is fixed based on the abnormality detection signal as the output of the abnormality detection means 213 (for example, “1” at normal time) , “0” at the time of abnormality may be output to the external controller 40 via the DO terminal.
In this way, the VFD driving circuit 20 according to the present invention can improve the observability of the filament pulse voltage abnormality detection process by transmitting the abnormality detection flag ANF to the external controller 40.
[0075]
In the above-described embodiment, the switching element 50 may be provided for various application circuits (for example, a fluorescent display tube module) using the VFD drive circuit 20 according to the present invention. Preferably, the VFD drive circuit 20 may be a semiconductor integrated circuit, and the switching element 50 may be connected to the outside, or may be a semiconductor integrated circuit that includes the integrated switching element 50.
[0076]
【The invention's effect】
ADVANTAGE OF THE INVENTION According to this invention, the fluorescent display tube drive circuit which improves the reliability of a fluorescent display tube can be provided.
[Brief description of the drawings]
FIG. 1 is a schematic configuration diagram of a system including a fluorescent display tube driving circuit according to an embodiment of the present invention.
FIG. 2 is a timing chart regarding a data transfer format between an external controller and a fluorescent display tube driving circuit according to an embodiment of the present invention.
FIG. 3 is a block diagram of a fluorescent display tube driving circuit as an embodiment according to the present invention.
FIG. 4 is a block diagram of a grid driver or a segment driver as an embodiment according to the present invention.
FIG. 5 is a block diagram of filament pulse control means as one embodiment according to the present invention.
FIG. 6 is a diagram for explaining a conventional mechanism for detecting an abnormality in a filament pulse voltage.
[Explanation of symbols]
10 VFD
11 Filament
12 Grid electrodes
13 segment electrode
20 VFD drive circuit
201 Interface section
202 Oscillator circuit
203 frequency divider
204 Timing generator
205 Shift register
206 Control register
207 Latch circuit
208 multiplexer
209 Segment driver
210 Grid driver
211 Dimmer control means
212 Filament pulse control means
213 Abnormality detection means
30 External oscillator
40 External controller
50 switching elements
80 Pulse drive signal generating means
100 Pulse drive signal polarity setting means
110 Filament drive circuit
120 level shift section
130 Inverter part
140 Drive signal output unit

Claims (6)

Filament driving means for driving the filament with a pulsed filament pulse voltage for a fluorescent display tube having a filament, a grid electrode, and a segment electrode, and a grid for driving the grid electrode A fluorescent display tube driving circuit comprising: driving means; and segment driving means for driving the segment electrodes,
A low-pass filter as an integration means, integrating the filament pulse voltage with the low-pass filter, detecting that the filament pulse voltage is fixed according to the obtained integral value, and detecting the detection result Detection means for outputting a detection signal representing;
Based on the detection signal, the at least one level of the filament pulse voltage, the voltage for driving the grid electrode, or the voltage for driving the segment electrode is set to one level at which driving is stopped. A fluorescent display tube driving circuit comprising: filament driving means; grid driving means; and control means for controlling the output of the segment driving means .   2. The fluorescent display tube according to claim 1, wherein the control means sets at least one output of the filament driving means, the grid driving means or the segment driving means to a high impedance state based on the detection signal. Driving circuit. 3. The fluorescence according to claim 2 , wherein the fluorescent display tube driving circuit is a semiconductor integrated circuit, and a switching element that generates the filament pulse voltage based on an output of the filament driving means can be connected to the outside. Display tube drive circuit. The fluorescent display tube driving circuit according to claim 3 , further comprising a switching element that generates the filament pulse voltage based on an output of the filament driving means. 5. The fluorescent display tube driving circuit according to claim 4 , wherein the fluorescent display tube driving circuit is a semiconductor integrated circuit, and the switching element is connected to the outside. 6. The fluorescent display tube driving circuit according to claim 5 , wherein the fluorescent display tube driving circuit is a semiconductor integrated circuit in which the switching elements are integrated.

Images