JP4460841B2 - Display device using organic light emitting element - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
  The present inventionFor example,A driving semiconductor circuit that outputs a current for use in a display device that performs gradation display according to the amount of current, such as an organic electroluminescent elementUsing organic light-emitting elementsAbout.
[0002]
[Prior art]
Since the organic light emitting element is a self light emitting element, a backlight required for a liquid crystal display device is unnecessary, and it is expected as a next generation display device from the advantages such as a wide viewing angle.
[0003]
Unlike organic light-emitting devices, the light emission intensity of the device and the electric field applied to the device are not proportional, and the light emission intensity of the device and the current density flowing through the device are proportional. In contrast to the variation in signal value, the variation in emission intensity can be reduced by performing gradation display by current control (see, for example, Patent Document 1).
[0004]
[Patent Document 1]
JP 2000-276108 A
[0005]
[Problems to be solved by the invention]
In the organic light emitting device, the luminance is proportional to the current and not the voltage. Therefore, in order to perform gradation display, a current corresponding to gradation data is generally supplied to the organic light emitting element.
[0006]
An example of a passive matrix display device using a current-driven element such as an organic light emitting element is shown in FIG.
[0007]
Display is made by arranging the organic light emitting element 204 at each pixel which is an intersection of the segment signal line 232 and the common signal line 233 and controlling the segment driver 17 and the common driver 24.
[0008]
Display is performed by line sequential scanning, and a low level voltage is applied to the common signal line 233 in the selected row, and a higher level signal than the anode signal line 232 is applied from the power source 234 to the non-selected row. As a result, the organic light emitting elements 204 in the non-selected rows are turned off, and the organic light emitting elements 204 in the selected rows emit light with a luminance corresponding to the amount of current output from the segment driver 17. In the example of FIG. 23, the second row is selected. One frame is formed by selecting rows in order from the first row to the last row by the common driver 24.
[0009]
As described above, in the display device using the organic light emitting element, the segment driver 17 needs to be a current output type driver IC.
[0010]
Examples of active matrix display devices are shown in FIGS.
[0011]
In the example of FIG. 20, a current copier circuit is formed in the pixel 208. When a row is selected, the transistors 202c and 202d are turned on by operating the gate signal line 1 (205), and the current flowing through the source signal line 201 is changed to the pixel 208. 208. A gate voltage corresponding to the current flowing through 202a is stored in the storage capacitor 203. In the non-selection period, the gate signal lines 205 and 206 are operated, the transistors 202c and 202d are turned off, and the battery 202b is turned on. A current based on the charge previously stored in the storage capacitor 203 flows to the transistor 202a. A current is supplied to the organic light emitting element 204 through the conductive 202b. That is, a current corresponding to the current flowing through the source signal line 201 flows through the organic light emitting element 204. Therefore, the source driver 17 needs to be a current output type driver IC.
[0012]
Similarly in the example of FIG. 21, the current flowing through the source signal line 201 is taken into the pixel 208 by the control of the gate driver 24, and the current flows through the transistor 212e. A current flows through the organic light emitting element 204 by 212a that forms a current mirror with 212e. Since the current flowing through the current mirror ratio × source signal line flows through the organic light emitting element, the source driver 17 is still a current output type IC.
[0013]
In the case of a current output type IC, a current (reference current) serving as a source for determining a current to flow per gradation is provided.
[0014]
The driver IC 17 includes two reference current generation units 10 and a current output stage 14.
[0015]
  An example of the current output stage 14 is shown in FIG. The current output stage has a role of outputting the current value determined by the reference current 19 and the gradation data 35 from the current output 34 to the outside of the driver IC 17 and is used in a liquid crystal or the like.RudenDigital in pressure output driver−It corresponds to an analog conversion unit.
[0016]
  Specifically, the reference current 19 is distributed by a current mirror configuration including transistors 32 and 33. The transistor 33 serves as a gradation display current source, and at least the gradation display number.−One transistor is prepared.
[0017]
The switch 38 that is turned on / off according to the gradation data 35 changes the number of the gradation display current sources 33 connected to the current output 34, whereby the current value corresponding to the input gradation data is supplied to the current output 34. Is output.
[0018]
In the example of FIG. 3, at the time of gradation 0, no current source 33 is connected to the output 34, and current 0 is output. At the time of gradation 1, only the switch 38 connected to D0 [0] is turned on, and a current corresponding to one current source is output. The same can be said for the gradations 2 to 7. In this example, the description has been given with the 3-bit input, but the same can be realized with a general M-bit input.
[0019]
When the display as shown in FIG. 33 is performed using the current driver IC 17 configured as described above, the row indicated by 334 has higher luminance than the white display of the other rows, and the portion indicated by 335 indicates the other The phenomenon that the luminance is lower than that of the white display of the line is likely to occur.
[0021]
[Means for Solving the Problems]
  The inventor, for example, reduces the variation in the reference current between the driver ICs 17 arranged adjacent to each other, and the variation in the current output to the source signal line at the halftone display in the adjacent pixels between the ICs 17 having different current output sources.TheThe configuration of the reference current generator was considered so as to be within 1%.
  The first aspect of the present invention isA plurality of gradation display transistors provided for each output;
At least one distribution mirror transistor connected to the plurality of gradation display transistors in a current mirror configuration in order to control a current flowing through the plurality of gradation display transistors;
A plurality of first switching units for selecting whether to output the current of the gradation display transistor to a source signal line of a display unit having an organic light emitting element, based on a video signal;
A current path forming transistor in which at least one gate electrode-drain electrode is short-circuited;
And at least one second switching unit that selects whether to output the current of the gradation display transistor to the current path forming transistor, or
For each output,
The first switching unit corresponding to the number of bits of the video signal is formed,
At least one of the gradation display transistors is connected to the first switching unit;
The output of at least one of the gradation display transistors is connected in parallel with the first switching unit and the second switching unit corresponding to the gradation display transistor, and the corresponding first The switching unit and the second switching unit operate complementarily to each other.
It is characterized byA display device using an organic light emitting element.
  According to a first aspect of the present invention, one or a plurality of distribution mirror transistors (FIGS. 3 and 32) for distributing an input current to at least two or more outputs of a driving semiconductor circuit by a current mirror. When,
  A plurality of gradation display transistors (FIG. 3, 33a to 33c);
  A switching unit (FIG. 3, 38a to 38c) for selecting whether to output the current flowing through the gradation display transistors (33a to 33c) to the outside or not,
  Current-driven display in which the drain and gate electrodes of all the distributing mirror transistors (32) and all the gradation display transistors (33a to 33c) are connected by a common gate line (FIGS. 3 and 37). In the semiconductor circuit for driving the device,
  The total channel area of the distribution mirror transistor (32) is the channel area of the gradation display transistors (33a to 33c) connected to the distribution mirror transistor (32) and the common gate line (37). This is a driving semiconductor circuit that is 0.01 to 0.5 times the sum.
[0022]
  Also related to the present inventionSecondDepartureSpecifically, the plurality of gradation display transistors are (1) gradation display transistors whose number is greater than or equal to the number of bits of the input video signal, or (2) gradation display whose number is one less than the display gradation number. For transistorRelated to the present inventionFirstDepartureThis is a bright driving semiconductor circuit.
[0023]
  Also related to the present inventionThirdDepartureTo be clear, the total channel area of the distribution mirror transistor is 0.05 times or more and 0.5 times the total channel area of the gradation display transistors connected to the distribution mirror transistor and the common gate line. IsRelated to the present inventionFirstDepartureThis is a bright driving semiconductor circuit.
[0024]
  Also related to the present invention4thDepartureAs for the light, a plurality of gradation display transistors (FIGS. 40, 33a to 33c) in which the current flowing by the gate voltage value is controlled,
  Whether the current flowing through the gradation display transistors (33a to 33c) is output to the outsideDo not outputSwitching units (FIGS. 40 and 113) of the same number as the number of bits of the input video signal for selecting
  Comprising at least one current path forming transistor (FIG. 40, 401) in which the source and drain are short-circuited,
  The gradation display transistors (33a to 33c) output a current to the outside via the switching unit (113), and the switching unit (113) and the one current path forming transistor (401). One second switching unit (FIG. 40, 403) whose state is opposite is connected,
  According to the number of the current path forming transistors (401), the second switching unit (403) sequentially sets the floors of the switching unit (113) in the number prepared from the most significant bit of the input video signal. By being connected to a terminal connected to the gradation display transistors (33a to 33c), the gradation display transistors (33a to 33c) are driving semiconductor circuits in which a drain current corresponding to the gate voltage always flows. .
[0025]
  Also related to the present invention5thDepartureSpecifically, the plurality of gradation display transistors are (1) gradation display transistors whose number is greater than or equal to the number of bits of the input video signal, or (2) gradation display whose number is one less than the display gradation number. For transistorRelated to the present invention4thDepartureThis is a bright driving semiconductor circuit.
[0026]
  Also related to the present invention6thDepartureTo be clear, the at least one current path forming transistor is the same number of current path forming transistors as the number of bits of the input video signal.Related to the present invention4thDepartureThis is a bright driving semiconductor circuit.
[0027]
  Also related to the present invention7thDepartureAs for the light, a plurality of gradation display transistors (FIGS. 43 and 33a to 33c) in which the current flowing by the gate voltage value is controlled,
  Whether the current flowing through the gradation display transistors (33a to 33c) is output to the outsideDo not outputSwitching units (FIGS. 43 and 113) of the same number as the number of bits of the input video signal for selecting
  Comprising at least one resistance element (FIGS. 43 and 431) having one end connected to a positive power source;
  The gradation display transistors (33a to 33c) output a current to the outside via the switching unit (113), and the state of the switching unit (113) is in the state with respect to the at least one resistance element (431). One second switching unit (FIG. 40, 403) which is the opposite is connected,
  The second switching unit (403) performs the gradation display of the switching unit (113) in order of the number prepared from the most significant bit of the input video signal according to the number of the resistive elements (431). By being connected to terminals connected to the transistors (33a to 33c), the gradation display transistors (33a to 33c) are driving semiconductor circuits in which a drain current corresponding to the gate voltage always flows.
[0028]
  Also related to the present invention8thDepartureSpecifically, the plurality of gradation display transistors are (1) gradation display transistors whose number is greater than or equal to the number of bits of the input video signal, or (2) gradation display whose number is one less than the display gradation number. For transistorRelated to the present invention7thDepartureThis is a bright driving semiconductor circuit.
[0029]
  Also related to the present invention9thDepartureAs a matter of fact, the at least one resistance element is the same number of resistance elements as the number of bits of the input video signal.Related to the present invention7thDepartureThis is a bright driving semiconductor circuit.
[0030]
  Also related to the present invention10thDepartureMing has one or more distributing mirror transistors (FIGS. 3 and 32) for distributing the input current to at least two or more outputs of the driving semiconductor circuit by a current mirror;
  A plurality of gradation display transistors (FIG. 3, 33a to 33c);
  Whether the current flowing through the gradation display transistors (33a to 33c) is output to the outsideDo not outputIn a driving semiconductor circuit including a switching unit (FIG. 3, 38a to 38c) for selecting
  In the driving semiconductor circuit, the channel width / channel length values of the plurality of gradation display transistors (33a to 33c) are 0.01 or more and 0.6 or less.
[0031]
  Also related to the present inventionEleventhDepartureSpecifically, the plurality of gradation display transistors are (1) gradation display transistors whose number is greater than or equal to the number of bits of the input video signal, or (2) gradation display whose number is one less than the display gradation number. For transistorRelated to the present invention10thDepartureThis is a bright driving semiconductor circuit.
[0032]
  Also related to the present invention12thDepartureAkiraRelated to the present inventionFirstDepartureThis is a display device using a driving semiconductor circuit in which a bright driving semiconductor circuit is used for a display panel using an organic light emitting element.
[0033]
DETAILED DESCRIPTION OF THE INVENTION
The driver IC 17 includes two reference current generation units 10 and a current output stage 14.
[0034]
  An example of the current output stage 14 is shown in FIG. The current output stage has a role of outputting the current value determined by the reference current 19 and the gradation data 35 from the current output 34 to the outside of the driver IC 17 and is used in a liquid crystal or the like.RudenDigital in pressure output driver−It corresponds to an analog conversion unit.
[0035]
  Specifically, the reference current 19 is distributed by a current mirror configuration including transistors 32 and 33. The transistor 33 serves as a gradation display current source, and at least the gradation display number.−One transistor is prepared.
[0036]
The switch 38 that is turned on / off according to the gradation data 35 changes the number of the gradation display current sources 33 connected to the current output 34, whereby the current value corresponding to the input gradation data is supplied to the current output 34. Is output.
[0037]
In the example of FIG. 3, at the time of gradation 0, no current source 33 is connected to the output 34, and current 0 is output. At the time of gradation 1, only the switch 38 connected to D0 [0] is turned on, and a current corresponding to one current source is output. The same can be said for the gradations 2 to 7. In this example, the description has been given with the 3-bit input, but the same can be realized with a general M-bit input.
[0038]
Further, the current mirrors 32 and 33 do not necessarily have a one-to-one relationship, and an arbitrary mirror ratio can be taken. In FIG. 3, the distribution mirror transistor 32 is written as one, but it may be composed of a plurality of transistors.
[0039]
FIG. 3 shows an example in which three outputs are performed by the three digital-analog converters 36. In general, in the case of an M-channel output driver IC, M may be arranged.
[0040]
On the other hand, as a method of generating the reference current 19, a constant current circuit as shown in FIG. 5 is generally used. The current value output to the signal line 19 is a value obtained by dividing the potential difference between the power supply 51 and the reference voltage signal line 15 by the resistance value of the resistance element 11.
[0041]
By using the configuration as described above, the current driver IC 17 that outputs a current value according to the reference current and the input data can be obtained.
[0042]
In general, the driver IC is often arranged at the frame portion of the panel as shown in FIG. 2 and, in addition, in order to reduce the frame size, the driver IC is generally formed in an elongated shape. The side where the output pads are arranged is the long side. Therefore, the digital / analog converting section 36 shown in FIG. Therefore, there is a high possibility that a transistor serving as a current mirror is arranged at a location away from the distribution mirror transistor 32. In this case, the mobility and threshold voltage may be different in the pair of transistors forming the mirror, and the actual mirror ratio is different from the design value. The driver IC is generally made of crystal silicon, and the characteristics of the transistor are considered to change gently on the wafer surface. For example, the distribution of threshold voltages in the chip as indicated by reference numerals 261 to 263 in FIG. Due to this distribution, even if the same digital-analog converters are arranged as shown in FIG. 26B, the output current changes from 261b to 263b. At this time, when a configuration in which two drivers are arranged as shown in FIG. 1 is considered, a large deviation occurs in the output current at the boundary of the driver IC 17 as shown in FIG. 27, which affects the display as block unevenness. .
[0043]
Therefore, the current driver IC 17 used in FIG. 1 prepares the reference current source 10 at both ends of the chip, supplies the reference current from both ends of the chip as shown in FIG. 4, and the common gate line 37 has a resistance between the two transistors 32. The wiring was made to be about several kilo ohms to several mega ohms.
[0044]
As a result, the mirror transistor 32b is disposed in the vicinity of the Nth output (IoutN, 34c) that is farthest from the distributing mirror transistor 32a.
[0045]
  In the case of the threshold voltage distribution as shown in FIG. 28A, when the current I1 flows from 19a and 19b, the gate voltages of 32a and 32b are different from each other, and (the gate voltage of 32a) <(the gate of 32b) Voltage). These voltage values are Vg1 and Vg2, respectively. By increasing the resistance of the common gate line 37, the potential difference between both ends of the common gate line 37 can be generated without losing the input reference currents 19a and 19b. As shown in FIG.closeThe gate line voltage can be Vg1, and the gate line voltage close to IoutN can be Vg2. The output current value is as shown in FIG. 28C, and at least the output current values at both ends of the chip can be set to a substantially equal value I1.
[0046]
By using the configuration of the current output stage 14 as described above, when two driver ICs 17 are arranged as shown in FIG. 1, if the inputs of the reference currents 19b and 19c are the same, the output currents of IoutN and Iout (N + 1) Is I1 when all white, so that display without block unevenness is possible.
[0047]
That is, in order to suppress the occurrence of block unevenness, it is important that the variation in the reference current 19 adjacent between different ICs is small.
[0048]
In order to reduce the variation of the reference current 19, the configurations of FIGS. 1 and 12 have been devised.
[0049]
The first method, FIG. 1, will be described.
[0050]
In the method of FIG. 1, in order to form two reference current sources in the chip, two components shown in FIG. 5 are incorporated in the chip. The resistance element 11 is divided into two parts, and there are four parts in total. Usually, the resistor is often externally attached due to the problem of accuracy of the resistance value, but in the present invention, it is configured to be built-in. External parts can be reduced, and the cost and mounting area can be reduced.
[0051]
When one driver IC 17 is used or when a plurality of chips are used, when not adjacent to another driver IC, the current source is configured as shown in 10a of FIG.
[0052]
The configuration of the current source when the two driver ICs 17 are in contact with each other is the configuration of the two current sources shown in the center portion of FIG. One of the two required resistance elements 11 is taken in from a different IC 17 by the external wiring 16. FIG. 9A shows a constant current source circuit at the right end of the driver 17a, and FIG. 9B shows a constant current source circuit at the left end of the driver 17b. The numbers assigned to the components in FIG. 9 correspond to those in FIG.
[0053]
One resistive element 11 is brought from both adjacent ICs 17. In FIG. 9A, 11d is from the IC 17a and 11e is from the IC 17b. In FIG. 9B, 11c is from the IC 17a, and 11f is from the IC 17b. When the resistance value of the resistance element 11 is defined as shown in FIG. 9, the current (I19b) flowing through 19b is Vstd1 / (R1 + R2), and the current (I19c) flowing through 19c is Vstd2 / (R3 + R4). Since the reference voltage signal lines 15a and 15b are connected outside the IC 17, Vstd1 = Vstd2. Therefore, the reason why I19b and I19c are different is due to variations in the four resistance elements 11. In order to create a resistor inside the IC 17, there are a diffused resistor and a polysilicon resistor. In order to create a resistor with less variation, it is better to use a polysilicon resistor, and when including chips and lots, the variation is about 5%. However, when two resistance elements 11 are formed close to each other in the same chip, the variation in resistance value is about 0.1%. Accordingly, the variation between the resistance elements 11c and 11d (R3 and R2) and between the resistance elements 11c and 11f (R1 and R4) shown in FIGS. 1 and 9 is suppressed to 0.1%. Therefore, the variation between (R1 + R2) and (R3 + R4), which causes variation between I19b and I19c, is 0.14%, which is the mean square of 0.1.
[0054]
In this way, by taking the resistances that determine the current value from two adjacent chips, it becomes irrelevant to the variation between chips and between lots, and even a polysilicon resistance having a variation of about 5% can be used. Therefore, it is possible to realize a driver IC 17 that does not have built-in resistors and block unevenness.
[0055]
Although the description has been made with two driver ICs 17 in FIG. 1, the present invention can be similarly implemented when M driver ICs are generally arranged. An example is shown in FIG.
[0056]
FIG. 13 shows a second embodiment.
[0057]
The difference from FIG. 1 is the connection method of the resistance element 11. In all four resistance elements, the terminal opposite to the external connection end is connected to the power source.
[0058]
A circuit diagram of the reference current generator is shown in FIG. Here, the reference voltage signal line 15 is connected outside the IC chip.
[0059]
The variation in the reference current 19 is determined by the variation in the resistance value as in the first embodiment. Since R21 and R22 and R31 and R32 are in the same chip, the variation between them is about 0.1%. Therefore, the variation between Rb, which is the combined resistance of R22 and R31, and Rc, which is the combined resistance of R21 and R32, is 0.14%.
[0060]
Even in this case, since the influence of the variation between chips is apparently eliminated, even if the polysilicon resistor is used, a display without block unevenness is possible.
[0061]
In the above description, the reference voltage signal line 15 has been described as an example in which an analog voltage is input from the outside. However, the configuration of FIG. 5 is configured as shown in FIG. Good. In FIG. 6, the on / off state of the switch 62 changes according to the control data 63, and the value of the reference voltage 15 changes. In accordance with the control data 63, the value of the reference current 19 and thus the luminance of the display panel can be changed. In the first embodiment, the configuration is as shown in FIG. 7, and in the second embodiment, the configuration is as shown in FIG. When a plurality of driver ICs 17 are used as shown in FIG. 1, the circuit shown in FIG. 7 may be individually operated for each IC 17. However, as shown in FIG. 15 may be controlled by one voltage adjusting unit 65. In this way, by configuring the reference current 19 inside the IC 17 so that, for example, in a portable information terminal as shown in FIG. 30, when the button 302 is operated to improve the battery life, It is possible to display at normal luminance and to decrease the luminance after a certain period. Specifically, information is transferred to the CPU 312 when an input is generated at the button 302. The CPU sends a signal to the controller 313, and the controller 313 rewrites the control data in the driver IC 17 and sets the reference voltage 15 to a predetermined default value. On the other hand, the CPU 312 counts a certain time, and after a certain time, sends a signal to the controller 313 again. The controller 313 rewrites the control data of the driver IC 17 to reduce the voltage of the reference voltage signal line 15, thereby increasing the luminance. Lower. In an extreme case, the reference voltage 15 may be set by the voltage adjustment unit 65 so that the reference current hardly flows. As a result, the value of the current flowing through the driver IC 17 can be reduced, and further, the current flowing through the display element can be reduced, thereby reducing the power consumption.
[0062]
In addition, the use of an optical sensor instead of the button 302 in FIG. 31 has an advantage that the luminance can be adjusted according to the surrounding environment (brightness of the surroundings) of the display panel. In the organic light emitting device in which the driver IC 17 is mainly used, the visibility is high in the dark, and the visibility is low in bright outside light (for example, in sunlight). Therefore, when the ambient illuminance is high by the optical sensor, a large amount of the reference current of the driver IC 17 is allowed to flow under the control of the CPU and the controller, and when the ambient illuminance is low, the reference current of the driver IC 17 is decreased. It is possible. There is an advantage that it is possible to control the display with the luminance that is most visible according to the surrounding environment.
[0063]
When a plurality of driver ICs 17 are used and the first embodiment shown in FIG. 1 is implemented, the configuration is as shown in FIG. Here, only one constant current source circuit is described, but a plurality of constant current source circuits may be controlled by one voltage adjusting unit 65. For example, a configuration as shown in FIG. 10 can be considered.
[0064]
As a method for reducing power consumption, a configuration as shown in FIG. 25 can be adopted. In contrast to the configuration of FIG. 1, a switch 251 is provided on the reference current line 19. By making the switch 251 non-conductive, the reference current can be set to 0 and the power consumed in the IC 17 can be reduced.
[0065]
In a display device using a display element having temperature characteristics as a display unit, a function for compensating for temperature characteristics is required. For example, there is an element in which current-luminance characteristics change with temperature, and the luminance changes for the same current input.
[0066]
In order to keep the luminance constant, the reference current may be changed according to the temperature. For example, there is a method of connecting the temperature compensation element 61 shown in FIG. Thereby, the combined resistance value changes with temperature, and the reference current 19 also changes. By changing this change in a direction that compensates for temperature characteristics, a display device that is resistant to temperature changes can be realized.
[0067]
When temperature characteristic compensation is performed in the configuration of FIG. 1, a temperature compensation element 121 may be attached as shown in FIG. Since the resistance value that determines the reference current varies depending on the temperature, temperature characteristic compensation is possible.
[0068]
The variation in polysilicon resistance is about 0.1% in the vicinity of the chip, and about 5% between the chips and between the lots. Within this range, block unevenness can be eliminated by using the present invention. However, variations may increase due to process problems. When the variation becomes large, it becomes a defective product, and the yield of the driver IC 17 decreases. Therefore, as shown in FIG. 8, by providing a function that can adjust the resistance value of the resistance element 11, a driver IC that is out of the variation range can be made non-defective by setting the value within the variation range. It becomes possible.
[0069]
Specifically, the resistance element 11 is divided into a plurality of parts. Some parts of the plurality of parts are short-circuited. In order to increase the resistance value of the resistance element 11a, the short-circuited wiring 81 may be pattern-cut by FIB or the like. How much the resistance value is increased can be adjusted by the number 81 of pattern cuts. The same applies to the resistance element 11b, and can be applied to all the resistance elements 11 used in the present invention.
[0070]
By adopting a configuration in which more driver ICs can be made non-defective in this way, a yield can be increased, and a display device with low cost and less unevenness can be realized.
[0071]
When the current output stage 14 has the configuration shown in FIGS. 3 and 4, as described above, when a wafer having a threshold characteristic as shown in FIG. Output with an inclination. With the configuration of FIG. 4, the current values at the left and right ends can be made substantially the same, but it is difficult to make them uniform over all output terminals. In general, if the output variation between adjacent areas is within 1%, there is no problem in display, and the slope of the threshold characteristic may be within that range. However, depending on process variations at the time of IC creation, the state of the film forming apparatus, etc., the inclination may become steep. In such a case, it is possible that the corresponding IC becomes defective and the yield deteriorates.
[0072]
Therefore, in the present invention, a method of realizing a configuration capable of realizing uniform display regardless of the inclination as shown in FIG. 26 (a) and a method of preventing block unevenness when a plurality of ICs are used have been devised.
[0073]
In order to realize uniform display, the reference current is distributed to each output, and gradation display is performed based on the reference current provided for each output. 16 and 17 show a method for performing current distribution, and FIG. 11 shows the configuration of the output stage.
[0074]
Distribution of the reference current to each output is performed in three stages. First, current is distributed from one reference current source 161 (parent current source) to N current sources 162 (child current sources). Further, the current of the child current source 162 is distributed to M current sources 32 (grandchild current sources). As a result, the current can be distributed to M × N from one reference current.
[0075]
In this figure, when distributing one current source to M × N, current distribution is performed in two steps. The number of distributions can be realized once or three times or more, but it is best to perform the division in two to three times.
[0076]
The current variation in each distribution unit affects the output current variation as the number of distributions increases. Since the output is affected as the mean square of the dispersion at each distribution stage, in order to keep the dispersion of adjacent outputs within 1%, the number of distributions is reduced or the dispersion in one distribution is reduced. There is a need. In order to reduce the variation in one distribution, generally, the transistor size must be increased. The increase in the transistor size also leads to an increase in the chip area, resulting in a disadvantage that the chip of the IC 17 becomes larger. In addition, the greater the number of distributions, the greater the number of transistors, which also increases the chip area. Therefore, the number of distributions is about 3 at most.
[0077]
On the other hand, distribution to all outputs at one time is effective when the number of outputs is 30 or less, but is difficult to apply to driver ICs exceeding 100 outputs. In order to distribute the current by the number of outputs in one distribution, it is necessary to form a current mirror composed of at least the number of outputs + 1 transistors. In general, current mirrors are mirrored by making use of the fact that transistors that form mirrors are arranged close to each other, and that transistor characteristics are almost equal in proximity. When a current mirror with the number of outputs + 1 is formed, a mirror source transistor and a mirror destination transistor are distant from each other, so that it is difficult to accurately mirror. It is desirable that the number distributed at one time is about 30 at most.
[0078]
FIG. 17 shows a current distribution method. The reference current 19 is distributed to N currents by the parent current source 161 and the transistor 171. At this time, the transistor sets 174 and 161 are arranged close to each other so that the N currents do not vary. Next, each distributed current is further distributed to M currents. Also at this time, the transistors 162 and 175 are arranged close to each other to suppress current variation due to characteristic variation. The reference current could be distributed for each output. Based on the distributed current 115 (grandchild reference current), a current corresponding to the input gradation data is output from the output line 114 with the configuration shown in FIG. (In this example, an appropriate amount of current is output according to 6-bit data.) M and N are preferably 2 or more and 30 or less.
[0079]
The driver IC 17 is often formed in a rectangular shape, and output pads are often arranged on the long side. Each output of the current output stage 14 is often placed near the output pad because of the effective use of the chip area. Therefore, in an M × N output driver IC, the first output stage and the M × Nth output stage are often separated by about 10 to 25 mm. When distributing one reference current to M × N, the routing to each output is also important. In the configuration of FIG. 17, a current mirror is formed, and a portion that passes information in the form of voltage is disposed close to the portion where information is passed in the form of current so that it is drawn to the vicinity of the output stage. I made it. By doing in this way, it becomes possible to distribute to an output 10 to 25 mm apart with little variation.
[0080]
When displaying using a plurality of driver ICs 17 having output current stages as described above, it is necessary to supply the same amount of reference current to each IC in order to prevent block unevenness.
[0081]
FIG. 18 shows a configuration in which the variation in the reference current 19 is reduced between the two driver ICs 17.
[0082]
The reference voltage 15 that determines the reference current value is connected externally, so that the same voltage is supplied. Next, the resistance element 11 is divided into two as in the first and second embodiments, and one is an adjacent IC, and one is incorporated in the IC, thereby combining 11b and 11c. The variation between the resistance value and the combined resistance value of 11a and 11d is about 0.14%, which is the root mean square of 0.1%, which is the in-chip variation of the built-in polysilicon resistor. The reference current can vary by 0.14%. This is equivalent to Examples 1 and 2.
[0083]
In the current output stage in the present invention, the variation in the transistors used in the digital-analog converter 36 needs to be 0.5% or less, considering that the variation in the reference current 19 is 0.14%. is there. Under these conditions, the variation between adjacent terminals in the chip is 0.5% or less, and the variation between adjacent terminals in the chip is 0.72% = (0.14 ^ 2 + 0.5 ^ 2 + 0.5 ^ 2) or less. It is possible to realize a variation of 1% or less between all adjacent terminals. For this purpose, the transistor size of the gradation display current source 33 is required to be 33 square μm or more from the relationship between the transistor size and the output current variation shown in FIG.
[0084]
When the display as shown in FIG. 33 is performed using the current driver IC 17 configured as described above, the row indicated by 334 has higher luminance than the white display of the other rows, and the portion indicated by 335 indicates the other The phenomenon that the luminance is lower than that of the white display of the line is likely to occur.
[0085]
A portion 334 where the luminance is increased (referred to as a bright line here) occurs in a row where the number of terminals that output black signals at the terminals of the driver IC 17 is reduced, and a portion 335 where the luminance is decreased (referred to herein as a black line). Occurs in a row where the number of terminals that output a black signal is large at the terminals of the driver IC 17.
[0086]
In the display device having the pixel configuration as shown in FIG. 20 or FIG. 21, the voltage of the source signal line connected to the output terminal of the driver IC 17 is the signal line indicated by 336 and the signal line indicated by 337 in FIG. The voltage waveform is as shown in FIG. Here, Vb is a voltage when the pixel displays black, and Vw is a voltage when the pixel displays white.
[0087]
As shown in FIG. 34A, the voltage waveform of the source signal line corresponding to the column 336 indicates black in the period 341 and white in the period 342 corresponding to the image shown in FIG. In the period 343, a voltage indicating black is output.
[0088]
On the other hand, as shown in FIG. 34B, the voltage waveform of the source signal line corresponding to the column 337 outputs a voltage indicating white in all periods of one frame. At this time, in the display period of the row indicated by 334, a hazard is generated in the direction in which the voltage decreases, and the luminance is further increased. In the display period of the row indicated by 335, a hazard is generated in the direction in which the voltage increases, and the luminance is further lowered. As a result, in 334 in FIG. 33, the luminance is higher than that in the other white display, and thus a bright line is generated. In 335, the luminance is lower than in the other white display, and thus a black line is generated.
[0089]
The cause of the hazard in such source signal line voltage will be described.
[0090]
FIG. 35 shows a circuit when the output stage circuit of the driver IC 17 is connected to the pixel 208 of the display panel unit. In this example, only two columns corresponding to 336 and 337 are shown. Here, the description is given when the gradation data is 2 bits, but the same description can be generally made with N bits.
[0091]
  In the period corresponding to 338 in FIG. 33, gradation data 353a outputs black data, and 353b outputs white data.YouThe As a result, the switches 38a and 38b are turned off and the switches 38c and 38d are turned on. Thereby, the drain voltage of the transistor 33 becomes a value close to the ground potential of the driver IC 17 in 351a and 351b (voltage Vdb shown in FIG. 36), and 351c and 351d become equal to the potential Vw of the source signal line 201b. The potential of the source signal line 201a is Vb. If black is written in the pixel 208a, the switches 38a and 38b are in a non-conductive state, so that the source signal line 201a is disconnected from the driver IC. On the other hand, in the pixel 208a, the transistors 202c and 202d are turned on and the transistor 202b is turned off by operating the gate signal lines 205 and 206. All other pixels connected to the source signal line 201a are electrically disconnected from the source signal line by the operation of the gate signal line. The source signal line 201a is connected to the power source 207 through the transistor 202a. Since there is no path for current to flow through the transistor 202a, the transistor 202a raises the drain potential so that no current flows. Therefore, the voltage Vb is substantially equal to the power supply voltage 207.
[0092]
In this state, only the gradation data 353a is set as a white signal as shown in FIG. Then, the switches 38a and 38b are turned on. At that moment, the potentials of 351a and 351b rise to the potential of the source signal line 201a. This change propagates to the common gate signal line 37 as capacitive coupling through the capacitor 352 parasitic to the transistor 33. As a result, a period in which the gate voltage rises in a hazard manner occurs as indicated by reference numeral 361 in FIG. Since all the output transistors 33 output current based on the voltage of the same common gate signal line 37, the hazard of the gate signal line affects all the driver outputs 18. Since the data 353b does not change, the state of the switches 38c and 38d does not change. However, since the voltage of the gate signal line 37 changes as indicated by 361, the output current changes as indicated by 362. When the period 363 in which a current value different from the predetermined current value Iow is output is longer than one horizontal scanning period, the current written in the pixel 208 defined when the pixel circuit is separated from the source signal line by the gate signal line 205 Since the value is larger than Iow, higher luminance than the predetermined luminance is output from the EL element 204.
[0093]
Similarly, even when the gradation data 353a changes from white to black, as soon as the switches 38a and 38b are closed, the voltages of 351a and 351b change from Vdw to Vdb, and this change is common through the stray capacitance 352. By propagating to the gate signal line 37, the gate voltage decreases as in 364, and the current flowing through 18b also decreases. As a result, similarly, when this hazard occurs for one horizontal scanning period or more, the pixels corresponding to the period in which the hazard occurred are displayed with a lower luminance than the predetermined luminance.
[0094]
Therefore, in the present invention, three methods are mainly described as methods for eliminating bright lines and black lines. The first method is a method of suppressing the fluctuation of the gate signal line 37. As a second method, the drain potential of the transistor 33 at the time of black display is increased, and the voltage change amount at the time of data change causing the fluctuation of the gate signal line 37 is reduced. As a third method, the change in the output current is made small with respect to the change in the voltage of the gate signal line 37 so that the output is not affected even if the gate signal line fluctuates. Hereinafter, the three methods will be described with reference to the drawings in order.
[0095]
FIG. 37 shows an example of the first method. Compared with FIG. 4, the number of distribution mirror transistors 32 for determining the potential of the gate signal line 37 is increased. Since this changes the mirror ratio, the current value of the reference current input 19 is also increased correspondingly.
[0096]
FIG. 38 is an enlarged view of the gate potential hazard portion 361 shown in FIG. In the configuration of FIG. 4, there is a change in the gate voltage as indicated by 381, and it does not return to a predetermined voltage within one horizontal scanning period. Here, when the number of mirror transistors 32 is increased, the curve becomes 382, and when the number is further increased, a curve as indicated by 383 is obtained. In the case of the curve indicated by 383, since a predetermined voltage value is returned within the horizontal scanning period, a predetermined current value is written in the pixel.
[0097]
In addition, instead of increasing the number of distribution mirror transistors 32, the same can be realized by increasing the transistor size.
[0098]
The size of the distribution mirror transistor 32 is preferably in the range indicated by 391 in FIG. The rate of change of the gate voltage is below the allowable level. This allowable level indicates a voltage fluctuation level in which the change in the output current is within 1% in consideration of the fact that the luminance difference with the other rows cannot be visually recognized if the change amount in the output current is within 1%. Since the voltage fluctuation is generated through the stray capacitance of the transistor 33, it is determined by the channel area and the number of current sources for gradation display. Therefore, the total size of 32 is defined by the ratio to the total size of 33.
[0099]
As a result of creating and evaluating various distribution transistor sizes and numbers this time, (total channel area of distribution mirror transistor 32) / (total channel area of gradation display current source 33) and gate change rate The relationship is represented by the curve shown in FIG.
[0100]
According to this graph, if the total channel area of the distribution mirror transistor 32 is 1% or more, preferably 5% or more of the total channel area of the gradation display current source 33, the bright line and the black line disappear. On the other hand, if it is 50% or more, the change rate of the gate voltage is not reduced. Therefore, if it is 50% or more, any area is not affected by the hazard. From the viewpoint of making the chip area small, it is preferably made 50% or less. Therefore, the total channel area of the distribution mirror transistor 32 is designed to be 1% to 50%, preferably 5% to 50%, of the total channel area of the gradation display current source 33, as indicated by 391. You just have to do it.
[0101]
In order to suppress the variation in the ratio of the reference current to a certain gradation output current between chips, the distribution mirror transistor 32 and the gradation display current source 33 can be designed with the same size and the same layout. desirable. The above area ratio is preferably realized by increasing or decreasing the number of transistors. Thereby, even in a display device using a plurality of driver ICs 17 side by side, a display without block unevenness can be realized.
[0102]
For example, in the case of a driver IC having 160 gradations and 160 outputs, 63 transistors 33 are arranged for one output. The 63 output stages arranged in series are prepared as 160 outputs. Further, nine output stages are prepared at both ends of 160 outputs, and 63 mirror transistors 32 are formed by short-circuiting between the drain gates of the transistors. In this way, since the current mirror can be formed with substantially the same layout and the same channel size, variation in the mirror ratio between chips can be reduced. In this case, the ratio of the total channel area of the distribution mirror transistor to the total channel area of the gray scale display current source is 18/160 = 0.11, and no bright black line is generated.
[0103]
Next, the second method will be described.
[0104]
  The second method is a method of reducing the amount of change in the drain voltage of the gradation display current source 33 that causes the voltage of the common gate line 37 to fluctuate. Changes due to capacitive coupling by reducing the amount of changeCommonThe change amount of the gate line 37 can also be reduced.
[0105]
FIG. 40 shows a circuit of the digital-analog converter 36 and the distributing transistor for one output. In this example, the gradation data is 6 bits. It is a feature of the present invention that a circuit indicated by 402 is added. By operating the switches 113f and 403 in a complementary manner, the node 116 is connected to the source signal line or the transistor 401, so that a current can always flow through the gradation display current source 33.
[0106]
In the conventional method, when the switch 113 is in a non-conductive state, the transistor 33 tries to pass a current even though there is no current path flowing through the transistor 33, so the drain voltage is lowered. As a result, the potential of 116 decreases to the ground potential of the driver IC in the lowest case.
[0107]
On the other hand, in the embodiment of the present invention, even when the switch 113 is non-conductive, the switch 403 is conductive and current is supplied from the power sources 404 to 33 through the transistor 401. The voltage 116 at this time depends on the channel size of the transistor 401 and the voltage of the power supply 404, but can be increased to the potential Vb1 as shown in FIG. (Conventionally, Vdb, where Vb1> Vdb) Thus, the potential change of the common gate line 37 that fluctuates via the stray capacitance can be reduced by reducing the potential change of the node 116 due to the on / off of the switch 113. It becomes.
[0108]
It is more effective if the gate voltage-drain current characteristics of the diode-connected transistor 401 are the same as those of the driving transistor 202a used for the pixel 208, or the transistor size is such that the gate potential becomes lower.
[0109]
  When current is supplied to the pixel 208 from the source driver IC 17, the equivalent circuit of the pixel is as shown in FIG. 42 by operating the gate signal lines 205 and 206. The drain electrode of the driver IC 17 is connected to the power source 207 via the source signal line 201 and the driving transistor 202a. At this time, it can be seen that the circuit indicated by 402 and the circuit of the pixel 208 have the same configuration. Therefore, the power supply 404207 and transistors 202a and 401 can be formed with the same characteristics, the potential of the node 116 can be expected to be substantially equal. (When the switch part from 111a to 111e is non-conductive)
  The potential of the source signal line varies depending on the gradation, the minimum voltage is white (maximum gradation), the maximum voltage is gradation 1, and the potential varies between them depending on the gradation. To do. Therefore, if the potential of 116 when the switch 113f is non-conductive and the potential of 403 is within the range of the voltage change of the source signal line, the potential change when the switch 113f is conductive can be reduced. . In the case of FIG. 40, the transistor size 401 is designed so that the voltage 116 is within the change range of the source signal line when the current corresponding to the gradation 32 flows to 401.
[0110]
In FIG. 40, the case where the additional circuit 402 is connected to the most significant bit in the case of 6-bit gradation data has been described. In general, the transistor size of the transistor 401 in the additional circuit 402 is the same as that of the additional circuit 402. When a current of gradation (here, K) that matches the number of transistors connected to the signal line flows to 401, the gate voltage of the transistor 401 falls within the voltage variable range that the source signal line 201 can take. If designed in this way, it is possible to suppress a change in drain voltage of a transistor that generally outputs a gradation K of J-bit gradation data.
[0111]
Therefore, even in the case of FIG. 40, a circuit like 402 may be used for the signal lines D [0] to D [4].
[0112]
  Also, FIG.3As shown in FIG. 6, the same can be realized by using a resistance element 431 instead of the transistor 401. In addition, even if the switch 113f is in a non-conductive state, elements other than resistors and transistors may be used as long as a circuit configuration in which current always flows through the transistor 33 can be obtained.
[0113]
Next, the third method will be described.
[0114]
When the channel width / channel length (hereinafter referred to as W / L) of the mirror transistor 32 for distributing the reference current is changed, the drain current vs. gate voltage characteristics change. As shown in FIG. 44, when W / L is reduced, the change in drain current with respect to the change in gate voltage is reduced.
[0115]
Now, let the value of the reference current 19 be Id1. At this time, it is assumed that the common gate line 37 (here, coincides with the gate voltage of the transistor 32) changes by ΔVg at the change point of the gradation data. As shown in FIG. 44, the change in drain current is smaller when W / L = 0.3 than when W / L = 1. Since the transistor 32 and the transistor 33 form a current mirror, the change in the drain current corresponds to the change in the output current of the transistor 33. If the change of the drain current is small, even if the voltage of the common gate signal line 37 changes, the bright line black line can be prevented.
[0116]
Therefore, as shown in FIG. 45, the change rate of the output current with respect to the difference in W / L was measured. (The channel area is constant) As a result, when W / L is 0.6 or less, the output current change is within 1% with respect to the voltage fluctuation of the gate line 37. If the amount of current change is within 1%, the luminance change cannot be visually recognized. Therefore, since the luminance difference between white in the portion indicated by 334 in FIG. 33 and other portions is not known, the bright line cannot be seen. The same applies to the black line.
[0117]
When the value of W / L is reduced, the gate voltage required to obtain the same drain current increases. When W / L is 0.01 or less, the gate voltage exceeds 1.5V. The curves 463 and 464 in FIG. 46 show the characteristics of the drain current versus the source-drain voltage of the gradation display current source 33 (when the current flowing through one gradation display current source 33 is about 10 nA to 100 nA). In order to output a constant current regardless of the output load, it is necessary to operate the transistor 33 in the saturation region indicated by 462 on the right side of the dotted line portion. In order to operate the transistor 33 in the saturation region, a drain voltage higher than the gate voltage of the transistor 33 is required. Therefore, in FIG. 45, when W / L is 0.01 or less and the gate voltage is required to be 1.5V or more, the drain voltage is also required to be 1.5V. In consideration of the operating margin, about 2V is required. Further, the source signal line voltage (= 33 drain voltage) differs depending on the gradation signal, and the amplitude required for the white to black level is about 2V. In addition, there is voltage loss due to wiring resistance and switch ON resistance. In total, the required voltage is about 5V. The driver IC 17 needs a withstand voltage of this level.
[0118]
On the other hand, a fine process is used to reduce the chip size of the driver IC 17. For cellular phones, the driver IC 17 is further provided with memory and controller functions. Since a fine process is used, the withstand voltage cannot be increased, and can only be raised to about 5V in reality.
[0119]
From such a viewpoint, the lower limit value of W / L is determined by the withstand voltage of the IC and cannot be made smaller than 0.01. The range that W / L can take is desirably 0.01 or more and 0.6 or less as indicated by 451 in FIG. Within this range, bright black lines are not generated, and a chip size reduction effect due to the fine rule can be expected.
[0120]
In addition, you may implement combining the above 1st to 3rd method. By combining them, there is an effect that the operation margin is widened, and the bright line black line is more difficult to be generated.
[0121]
In the above description, the driver is described as a monochrome output driver. However, the present invention can also be applied to a multi-color output driver. It is sufficient to prepare the same circuit for the number of display colors. For example, in the case of three-color output of red, green, and blue, three identical circuits may be placed in the same IC and used for red, green, and blue, respectively.
[0122]
In the above description, the case where a transistor used for a pixel is a p-type transistor has been described. However, the present invention can be similarly implemented even when a pixel circuit is formed using an n-type transistor as shown in FIG. . This is because only the difference in the direction of the current flowing through the source signal line 201 is reversed. FIG. 32 shows a diagram corresponding to FIG. 1 at this time. As for the current output stage 14, if the current mirror is made of p-type transistors, the direction of the current can be reversed.
[0123]
In the above embodiment, an organic light emitting element is used as the light emitting element. However, the present invention is not limited to this, and an element such as a light emitting diode whose luminance changes in proportion to the current may be used as the light emitting element.
[0124]
【The invention's effect】
As described above, in the current output type driver IC that distributes the reference current to all the outputs through the gate line, the size of the distribution source transistor that distributes the reference current by the current mirror is increased or the number of the transistors is set. The fluctuation of the gate signal line is suppressed, or the drain potential of the transistor 33 during black display is increased to reduce the amount of voltage change at the time of data change causing the fluctuation of the gate signal line 37. Alternatively, by reducing the channel width / channel length value of the transistor on the receiving side of the current mirror and reducing the change in the output current with respect to the change in the gate signal line voltage, the horizontal emission line due to the fluctuation of the gate signal line The generation of horizontal black lines has been eliminated.
[Brief description of the drawings]
FIG. 1 is a diagram showing a first embodiment of the present invention.
FIG. 2 is a diagram showing a display device using a plurality of driver ICs.
FIG. 3 is a diagram showing an example of a current output stage of a driver IC.
FIG. 4 is a diagram showing an example of a current output stage when a reference current is supplied from both sides of a driver IC.
FIG. 5 is a diagram of a constant current source circuit
FIG. 6 is a diagram showing a constant current source circuit that allows a current value to be varied by an electronic volume and can also perform temperature correction.
7 is a diagram showing a case where resistors of different driver ICs are also used in the constant current source circuit shown in FIG.
FIG. 8 is a diagram showing a circuit when the constant current circuit shown in FIG. 7 has a function that allows the resistance value to be changed by a trimming operation;
FIG. 9 shows two different ICs in FIG.
FIG. 10 is a diagram showing a connection example of a reference current generation unit using an electronic volume when a plurality of driver ICs are used.
11 is a diagram showing a block for outputting a current corresponding to input gradation data in the configurations of FIGS. 16 and 17. FIG.
12 is a diagram showing a case where a temperature compensation function is provided in the configuration of FIG.
FIG. 13 is a diagram showing a second embodiment;
FIG. 14 is a diagram showing a circuit of one reference current generation unit in the second embodiment.
FIG. 15 is a diagram illustrating a circuit example in which variations of two reference currents are reduced in two reference current generation units when the second embodiment is implemented using a plurality of driver ICs;
FIG. 16 is a diagram showing the concept of distributing a reference current to each output
FIG. 17 is a diagram showing a circuit for distributing a reference current
FIG. 18 is a diagram showing a connection relationship of a plurality of driver ICs in an embodiment in which a reference current is distributed to each output.
FIG. 19 is a graph showing the relationship between transistor size and output variation.
FIG. 20 is a diagram showing an active matrix display device using a current copier pixel configuration;
FIG. 21 is a diagram showing an active matrix display device using a pixel configuration of a current mirror.
FIG. 22 is a diagram showing a pixel circuit using a current copier when an n-type transistor is used.
FIG. 23 is a diagram showing a simple matrix display device using organic light-emitting elements.
FIG. 24 is a diagram showing a television using at least one of the embodiments of the present invention.
FIG. 25 is a diagram showing a method of reducing power consumption by cutting off a reference current from the first embodiment of the present invention.
FIG. 26 is a diagram showing an example in which the transistor characteristics and the output current change according to the distance from the distributing mirror transistor.
FIG. 27 is a diagram showing a change in output current for each terminal of a source signal line of a display device when two driver ICs in a conventional example are connected;
FIG. 28 is a diagram showing that the output current can be made substantially equal at the left and right ends by arranging reference current sources at both ends of the chip in the present invention.
FIG. 29 is a diagram showing connection of external wiring when four or more ICs are connected in the first embodiment of the present invention;
FIG. 30 is a portable information terminal provided with a display panel embodying the present invention, an antenna, and key input;
31 is a block diagram for controlling the driver IC of the present invention by button input of the portable information terminal shown in FIG.
FIG. 32 is a diagram showing a schematic circuit of a driver IC of the present invention in a display device in which an n-type transistor is applied to a pixel.
FIG. 33 is a diagram showing an example of a display image for showing a place where bright lines and black lines are generated.
34 is a diagram showing source signal line voltage waveforms in columns 336 and 337 when the image display shown in FIG. 33 is performed.
FIG. 35 is a diagram showing a connection between an output stage of a driver IC and a pixel circuit.
FIG. 36 is a diagram showing voltage and current waveforms of each part of the output stage of the driver IC corresponding to input data.
FIG. 37 is a diagram when the number of mirror transistors for distributing the reference current source is increased.
FIG. 38 is a diagram showing that the hazard at 361 in FIG. 36 varies depending on the number of mirror transistors.
FIG. 39 is a diagram showing the relationship between the total channel area of the distributing mirror transistor / the total channel area of the grayscale display current source and the gate voltage change rate;
FIG. 40 is a diagram showing a digital-to-analog converter when a transistor is added to suppress the potential change amount of the node 116.
41 is a graph showing the relationship between the potential of the switch 113f and the node 116. FIG.
FIG. 42 is a diagram showing an equivalent circuit of a pixel circuit when current is written to the pixel circuit from a source signal line.
FIG. 43 is a diagram in the case where a resistor is used instead of a transistor in FIG.
FIG. 44 is a diagram showing the relationship between the gate voltage and the drain current of the transistor 32 having the gate and drain electrodes connected to each other.
FIG. 45 is a graph showing the relationship between the rate of change in output current and the gate signal line voltage with respect to the channel width / channel length of a transistor.
FIG. 46 is a graph showing the relationship between the voltage between the source and drain of the transistor 33 versus the drain current.
[Explanation of symbols]
11 resistance elements
12 operational amplifier
13 transistors
14 Current output stage
15 Reference voltage signal line
16 External wiring
17 Driver IC
18 Current output
19 Reference current line

Claims (9)

A plurality of gradation display transistors provided for each output;
At least one distribution mirror transistor connected to the plurality of gradation display transistors in a current mirror configuration in order to control a current flowing through the plurality of gradation display transistors;
A plurality of first switching units for selecting whether to output the current of the gradation display transistor to a source signal line of a display unit having an organic light emitting element, based on a video signal ;
A current path forming transistor in which at least one gate electrode-drain electrode is short-circuited;
And at least one second switching unit that selects whether to output the current of the gradation display transistor to the current path forming transistor, or
For each output,
The first switching unit corresponding to the number of bits of the video signal is formed,
At least one of the gradation display transistors is connected to the first switching unit;
The output of at least one of the gradation display transistors is connected in parallel with the first switching unit and the second switching unit corresponding to the gradation display transistor, and the corresponding first A display device using an organic light emitting element, wherein the switching unit and the second switching unit operate complementarily to each other . The second switching unit is characterized in that it is formed with respect to the first switching unit corresponding to the most significant bit of the video signal, a display device using an organic light emitting device according to claim 1, wherein. The second switching unit is characterized in that it is formed with respect to the first switching unit for all bits of the video signal, a display device using an organic light emitting device according to claim 1, wherein. The channel size of the current path forming transistor is such that the drain voltage of the gray scale display transistor is applied when a current output from the gray scale display transistor connected via the second switching unit is applied. , a display device using an organic light emitting device according to claim 1, characterized in that within the voltage change range in the gradation display state of the source signal line. Use relation between the gate voltage and the drain current of the current path forming transistor, an organic light-emitting device according to claim 1, characterized in that matches the relationship between the drain current to the gate voltage of the driving transistor provided in the pixel Display device. A plurality of gradation display transistors provided for each output;
At least one distribution mirror transistor connected to the plurality of gradation display transistors in a current mirror configuration in order to control a current flowing through the plurality of gradation display transistors;
A plurality of first switching units for selecting whether to output the current of the gradation display transistor to a source signal line of a display unit having an organic light emitting element, based on a video signal ;
At least one resistive element having one end connected to a power source ;
Including at least one second switching unit for selecting whether or not to output the current of the gradation display transistor to the other end of the resistance element;
For each output,
The first switching unit corresponding to the number of bits of the video signal is formed,
At least one of the gradation display transistors is connected to the first switching unit;
The output of at least one of the gradation display transistors is connected in parallel with the first switching unit and the second switching unit corresponding to the gradation display transistor, and the corresponding first A display device using an organic light emitting element, wherein the switching unit and the second switching unit operate complementarily to each other .   The display device using an organic light emitting element according to claim 6, wherein the second switching unit is formed with respect to the first switching unit corresponding to the most significant bit of the video signal.   The display device using an organic light emitting device according to claim 6, wherein the second switching unit is formed for the first switching unit for all bits of the video signal.   The resistance value of the resistance element is such that the drain voltage of the gradation display transistor is the source when the current output from the gradation display transistor connected via the second switching unit is applied. 7. A display device using an organic light-emitting element according to claim 6, wherein the voltage change range is within a signal line gradation display.

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