JP4457642B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

  The present invention relates to a semiconductor device, a semiconductor substrate, and a manufacturing method thereof, and more particularly, to a semiconductor device in a form called a system in package (SiP) in which passive elements such as inductors and capacitors are provided on a semiconductor substrate, and the semiconductor device. The present invention relates to a semiconductor substrate to be formed and a manufacturing method thereof.

  The demand for downsizing, thinning, and weight reduction of portable electronic devices such as digital video cameras, digital mobile phones, and notebook personal computers is increasing. While 70% reduction has been achieved year by year, how to improve the mounting density of components on the mounting board (printed wiring board) even in an electronic circuit device in which such a semiconductor device is mounted on the printed wiring board Research and development has been made as an important issue.

  For example, as a package form of a semiconductor device, a transition from a lead insertion type such as DIP (Dual Inline Package) to a surface mounting type is performed, and furthermore, bumps (projection electrodes) made of solder, gold, or the like are provided on a pad electrode of a semiconductor chip. A flip-chip mounting method has been developed in which a face-down connection is made to the wiring board via bumps.

Furthermore, development is progressing into a package of a complicated form called a system in package (SiP) configured by combining a semiconductor chip having an active element and a passive element.
In the above SiP, an inductor, a capacitor or the like constituting a high frequency LSI filter as a passive element may be formed on a semiconductor substrate. In this case, the specific resistivity of silicon used in the LSI is about 10 to 15 Ω · cm. As a result, the parasitic capacitance of the inductor constituting the filter with the silicon substrate increases, and the Q value, which is a performance characteristic index, decreases, which makes it difficult to perform high-frequency operation.

Therefore, as a countermeasure against the above in the prior art, a method of reducing the parasitic capacitance by using an SOI (Silicon on Insulator) substrate and increasing the distance between the silicon substrate and the inductor by an insulating film is performed.
FIG. 11 is a schematic cross-sectional view of a semiconductor device having the above-described SOI substrate configuration.
For example, an interlayer insulating film 101 made of silicon oxide having a thickness of 1 to 5 μm is formed on a silicon substrate 100 having a thickness of 250 to 725 μm, and a silicon layer (SOI layer) 102 having an SOI structure is formed thereon. ing.
For example, a passive element such as an inductor formed on the SOI layer 102 is farther away from the silicon substrate 100 due to the presence of the interlayer insulating film 101 than when the SOI structure is not used, and parasitic capacitance can be reduced.

A method for manufacturing the SOI structure substrate will be described.
First, as shown in FIG. 12A, a first silicon substrate 100 which is a base substrate of an SOI structure is prepared.
On the other hand, as shown in FIG. 12B, a second silicon substrate 100 ′ to be an SOI layer having an SOI structure is prepared, and an entire surface of the second silicon substrate 100 ′ is formed by an oxidation process such as a thermal oxidation method. A silicon oxide layer 101 ′ is formed.
Next, as shown in FIG. 12C, the first silicon substrate 100 and the second silicon substrate 100 ′ are overlaid and subjected to a heat treatment for 2 hours at a temperature of 1100 ° C. in an oxygen atmosphere, for example, to form silicon oxide. Two silicon substrates are bonded via the layer 101 ′.
Next, as shown in FIG. 12 (d), the second silicon substrate 100 ′ is formed from the surface opposite to the side bonded to the first silicon substrate 100 until, for example, the remaining film thickness is about 20 μm. Grinding is performed to leave the silicon layer (SOI) 102 on the interlayer insulating film 101 made of silicon oxide. Alternatively, the second silicon substrate 100 ′ is peeled off from the bonding surface between the first silicon substrate 100 and the second silicon substrate 100 ′ while leaving a certain thickness, and the above state is obtained.
Further, the SOI layer 102 is ground and polished until a predetermined film thickness of, for example, about 1 μm is obtained, so that an SOI substrate in the state shown in FIG. 11 is obtained.

However, in the SOI substrate described above, the thickness of the interlayer insulating film cannot be increased so much that the parasitic capacitance cannot be sufficiently reduced.
Further, as described above, the manufacturing process of the SOI substrate is complicated, and it is difficult to reduce the manufacturing cost.

On the other hand, as shown in FIG. 13, in the method in which a thick insulating film 111 is formed on a silicon substrate 110 and a passive element such as an inductor is formed thereon, a passive element such as an inductor is formed according to the thickness of the insulating film 111. Can be kept away from the silicon substrate 110.
However, due to the difference in elastic modulus and thermal expansion coefficient between the insulating film and the silicon substrate, the wafer (silicon substrate 110) is warped during the formation of the insulating film, which becomes a residual stress, which is caused by thermal stress in the process process. As a result, stress on the wiring is generated and reliability is lowered. In combination with the above reason and the deposition rate of the silicon oxide film as low as about 15 nm / hour, the thickness of the insulating film is limited to 15 μm as the silicon oxide film.

  In addition, for silicide and alumina whose thermal expansion coefficient is close to that of silicon, a method of forming a thick insulating film by plasma spraying with silicon or the like has been studied. In this method, silicon is prevented in order to prevent cracking. It is necessary to form a bond metal on the top, and since this bond metal is a conductor, the function of the filter composed of passive elements formed on the insulating film is reduced.

Thus, that can not be sufficiently reduced parasitic capacitance can not be sufficiently ensured passive elements and the distance of the substrate, such as an inductor formed by an insulating film on a silicon substrate.

  The semiconductor device of the present invention includes a semiconductor substrate, a dummy layer formed on the semiconductor substrate, and an insulating film formed on the dummy layer, and the dummy layer is removed in the passive element formation region. A dielectric layer is formed in a portion where the dummy layer is removed, and in the passive element formation region, passive elements are formed on the insulating film, on the dielectric layer and / or in the dielectric layer. Is formed.

In the semiconductor device of the present invention, a dummy layer and an insulating film are stacked on a semiconductor substrate, and the dummy layer is removed in the passive element formation region.
Here, the dielectric layer is formed in the portion where the dummy layer is removed, and the passive element is formed on the insulating film, on the dielectric layer and / or in the dielectric layer in the passive element forming region. It has a configuration.

  The semiconductor substrate of the present invention is a semiconductor substrate having a dummy layer and an insulating layer laminated on the surface, wherein the dummy layer is removed in the passive element formation region, and the dummy layer is removed at the portion where the dummy layer is removed. A dielectric layer is formed, and in the passive element formation region, a passive element is formed on the insulating film, on the dielectric layer, and / or in the dielectric layer.

The semiconductor substrate of the present invention described above is a semiconductor substrate having a dummy layer and an insulating layer laminated on the surface, and has a configuration in which the dummy layer is removed in the passive element formation region.
A dielectric layer is formed in the portion where the dummy layer has been removed, and a passive element is formed and used on the insulating film, on the dielectric layer, and / or in the dielectric layer in the passive element formation region.

  The method for manufacturing a semiconductor device of the present invention includes a step of forming a dummy layer on a semiconductor substrate, a step of forming an insulating layer on the dummy layer, and a step of removing the dummy layer in the passive element formation region. A dielectric layer is formed in the passive element forming region where the dummy layer is removed, and in the passive element forming region, on the insulating film, on the dielectric layer and / or in the dielectric layer. And forming a passive element.

In the semiconductor device manufacturing method of the present invention, first, a dummy layer is formed on a semiconductor substrate, an insulating layer is formed on the upper layer of the dummy layer, and the dummy layer in the passive element formation region is removed.
Next, a dielectric layer is formed in the passive element formation region where the dummy layer is removed, and in the passive element formation region, the passive element is formed on the insulating film, on the dielectric layer, and / or in the dielectric layer. To do.

  The method for manufacturing a semiconductor substrate of the present invention includes a step of forming a dummy layer on the semiconductor substrate, a step of forming an insulating layer on the dummy layer, and a step of removing the dummy layer in the passive element formation region. A dielectric layer is formed in the portion where the dummy layer is removed, and in the passive element formation region, a passive element is formed on the insulating film, on the dielectric layer, and / or in the dielectric layer. A semiconductor substrate on which is formed is manufactured.

In the semiconductor substrate manufacturing method of the present invention, a dummy layer is formed on the semiconductor substrate, an insulating layer is formed on the dummy layer, and the dummy layer in the passive element formation region is removed.
A dielectric layer is formed in the portion from which the dummy layer is removed, and a semiconductor substrate is used in which a passive element is formed on the insulating film, on the dielectric layer and / or in the dielectric layer in the passive element formation region. .

  The semiconductor device of the present invention can secure a sufficient distance between the substrate and a passive element such as an inductor or a capacitor formed on the substrate via an insulating film, and can reduce the parasitic capacitance of the passive element.

  The semiconductor substrate of the present invention can secure a sufficient distance between a passive element such as an inductor and a capacitor formed on the substrate via an insulating film and the substrate, and can reduce the parasitic capacitance of the passive element.

  The method for manufacturing a semiconductor device of the present invention can manufacture a semiconductor device that can secure a sufficient distance between the substrate and a passive element such as an inductor or a capacitor formed on the substrate via an insulating film and reduce the parasitic capacitance of the passive element. .

  The method of manufacturing a semiconductor substrate of the present invention manufactures a semiconductor substrate that can secure a sufficient distance between the substrate and a passive element such as an inductor or a capacitor formed on the substrate via an insulating film and reduce the parasitic capacitance of the passive element. it can.

  Embodiments of a semiconductor device and a method for manufacturing the same according to the present invention will be described below with reference to the drawings.

First Embodiment FIG. 1 is a schematic sectional view of a semiconductor substrate according to this embodiment.
An etching stopper layer 11 made of silicon oxide having a thickness of 200 to 300 nm, for example, is formed on an n-type or p-type silicon semiconductor substrate 10, and a dummy layer made of polysilicon having a thickness of 10 μm, for example, is formed thereon. 12 is formed, and an insulating film made of a silicon nitride layer 13 having a thickness of 600 nm and a silicon oxide layer 14 having a thickness of 25 μm, for example, is formed thereon.
The insulating film composed of the silicon nitride layer 13 and the silicon oxide layer 14 has an opening P ₁ penetrating through the insulating film, and the dummy layer 12 is removed through the opening P ₁ in the passive element formation region X. Thus, a void P ₂ is formed.

In the semiconductor substrate, a dielectric layer is formed in the void portion P ₂ from which the dummy layer 12 is removed. In the passive element forming region X, the dielectric layer is formed on the insulating film (13, 14), on the dielectric layer, and / or on the dielectric. A passive element is formed in the layer.
The passive element thus formed can be formed away from the semiconductor substrate 10 by about 35 μm, which is the total thickness of the dummy layer 12 and the insulating films (13, 14). Therefore, according to the semiconductor substrate described above, a sufficient distance can be secured between the substrate and a passive element such as a capacitor formed on the semiconductor substrate via the insulating film, and the parasitic capacitance of the passive element can be reduced.

FIG. 2 is a schematic cross-sectional view of a semiconductor device in which a capacitor C is formed in a passive element formation region using the semiconductor substrate of the present embodiment.
An insulating film composed of an etching stopper layer 11, a dummy layer 12, a silicon nitride layer 13 and a silicon oxide layer 14 is formed on the silicon semiconductor substrate 10, and the insulating film composed of the silicon nitride layer 13 and the silicon oxide layer 14 An opening P ₁ penetrating therethrough is formed, and in the passive element formation region X, the dummy layer 12 is removed through the opening P ₁ to form a void P ₂ .
Further, the dielectric layer 15 is formed in the opening portion formed in the insulating film composed of the silicon nitride layer 13 and the silicon oxide layer 14 from the gap portion P ₂ from which the dummy layer 12 is removed, and the insulating films (13, 14). The upper electrode 16b and the lower electrode 16c are connected to the conductive layer 16a so as to be embedded in the dielectric layer 15 so as to face each other with the dielectric layer 15 interposed therebetween, and the capacitor C as a passive element is configured. Has been.

The capacitor, which is a passive element in the semiconductor device, is formed about 35 μm away from the semiconductor substrate 10, which is the total thickness of the dummy layer 12 and the insulating films (13, 14). Therefore, according to the semiconductor device described above, a sufficient distance can be secured between a passive element such as a capacitor formed on the semiconductor substrate via the insulating film and the semiconductor substrate, and the parasitic capacitance of the passive element can be reduced.
For example, as described above, the passive element can be sufficiently reduced by 35 μm away from the semiconductor substrate, and the parasitic capacitance can be sufficiently reduced, and even if the specific resistivity of the semiconductor fluctuates in the range of 10 Ω · cm to 5 kΩ · cm, it is hardly affected. . Considering the influence from the semiconductor substrate, it is preferable that the separation is 35 μm or more in the case of high frequency. However, the semiconductor device of this embodiment has a configuration that can solve this problem without growing the silicon oxide layer by 35 μm.

Next, a method for manufacturing the semiconductor device will be described with reference to the drawings.
First, as shown in FIG. 3A, an n-type or p-type silicon semiconductor substrate 10 is prepared. The silicon semiconductor substrate 10 has a resistivity of about 10 Ω · cm to about 5 kΩ · cm, for example.

  Next, as shown in FIG. 3B, a silicon oxide film having a thickness of 200 to 300 nm is formed on the semiconductor substrate 10 by, for example, a CVD (Chemical Vapor Deposition) method or a thermal oxidation method, and an etching stopper layer is formed. 11 is formed.

Next, as shown in FIG. 4A, for example, polysilicon having a thickness of 10 μm is deposited on the etching stopper layer 11 by a CVD method to form the dummy layer 12.
Polysilicon has a higher deposition rate than silicon oxide and can be deposited in a short time even if it is as thick as about 10 μm.

  Next, as shown in FIG. 4B, a silicon nitride layer 13 having a thickness of 600 nm is formed on the dummy layer 12 by, eg, sputtering.

  Next, as shown in FIG. 5, two semiconductor substrates (A, B) on which the etching stopper layer 11 to the silicon nitride layer 13 are formed as described above are anodic bonded on the surface opposite to the dummy layer. Alternatively, bonding is performed through a bonding layer 20 such as porous silicon oxide by a technique such as glass frit bonding.

Next, as shown in FIG. 6, with the two semiconductor substrates (A, B) bonded together, for example, a reactive gas containing silicon such as (SiH ₄ + H ₂ + O ₂ ) is supplied into a heat treatment furnace. The silicon oxide layer 14 having a thickness of 25 μm is formed on the silicon nitride layer 13 in each of the two semiconductor substrates (A, B) by the pyrogenic thermal oxidation treatment performed.
In the film forming process of the silicon oxide layer 14, a high film forming speed of 30 nm / hour can be achieved.
Further, even when a silicon oxide film having a thickness of 25 μm is formed, since the two semiconductor substrates (A, B) are bonded together, there is no residual stress due to film formation, and further, thermal oxidation is used. A uniform oxide film can be formed.
In addition, since the oxide film forming process, which is a relatively slow process, can be simultaneously performed on two semiconductor substrates, the process time can be shortened and the manufacturing cost can be reduced.
In this way, an insulating film composed of the silicon nitride layer 13 and the silicon oxide layer 14 is formed.

Next, as shown in FIG. 7, mechanical separation is performed at the bonding layer 20 portion made of porous silicon oxide, and an excess oxide film is removed by polishing or etching.
As a result, the semiconductor substrate (A, B) is separated again, and the silicon oxide layer 14 is formed on the silicon nitride layer 13 in each of them.

  Next, as shown in FIG. 8A, a resist film R having a pattern opening in the insulating film composed of the silicon nitride layer 13 and the silicon oxide layer 14 is formed by a photolithography process.

Next, as shown in FIG. 8B, an opening P penetrating the insulating film composed of the silicon nitride layer 13 and the silicon oxide layer 14 is formed by etching such as reactive ion etching (RIE) using the resist film as a mask. Open ₁ Thereafter, the resist film is peeled off.

Next, the dummy layer 12 in the passive element formation region X is removed through the opening P ₁ by etching such as wet etching with KOH or TMAH (tetramethylammonium hydroxide) aqueous solution using the opening P ₁ as a mask. A void P ₂ is formed. Etching at this time stops at the etching stopper layer 11 and only the dummy layer 12 can be removed.
With the above, the semiconductor substrate according to the present embodiment shown in FIG. 1 can be manufactured.

For example, the gap P ₂ and the opening P ₁ are embedded in the semiconductor substrate with an insulating material (dielectric material) having a high relative dielectric constant such as epoxy resin, polyimide resin, acrylic resin, or BCB. The conductive layer is formed so as to be embedded in the dielectric layer 15 on the insulating film composed of the silicon nitride layer 13 and the silicon oxide layer 14 in the passive element forming region X together with the formation of the dielectric layer 15. The capacitor C, which is a passive element, is formed by forming the upper electrode 16b and the lower electrode 16c so as to be opposed to each other with the dielectric layer 15 interposed therebetween, and the semiconductor device shown in FIG. 2 can be obtained.

  According to the semiconductor substrate manufacturing method of the present embodiment, the passive element can be formed away from the semiconductor substrate 10 by about 35 μm, which is the total thickness of the dummy layer 12 and the silicon oxide layer 14. ing. Accordingly, it is possible to manufacture a semiconductor substrate that can secure a sufficient distance between a passive element such as a capacitor formed on the semiconductor substrate via an insulating film and the semiconductor substrate and reduce the parasitic capacitance of the passive element.

  According to the semiconductor device manufacturing method of the present embodiment, the passive element can be formed away from the semiconductor substrate 10 by about 35 μm, which is the total thickness of the dummy layer 12 and the silicon oxide layer 14. In addition, a sufficient distance between a passive element such as a capacitor and the semiconductor substrate can be secured, and a semiconductor device with reduced parasitic capacitance of the passive element can be manufactured.

  According to the above embodiment, the passive element is formed on the thick oxide film formed by thermal oxidation, and a strong dense insulating film excellent in leakage, withstand voltage, and etching resistance can be obtained by thermal oxidation. For example, the application is expanded to MEMS such as a diaphragm, a pressure sensor, a gyroscope, an acceleration sensor, and an infrared sensor.

Second Embodiment FIG. 9 is a schematic cross-sectional view of a semiconductor device in which an inductor L is formed in a passive element formation region according to this embodiment.
Although substantially the same as the semiconductor device shown in FIG. 2, an inductor L made of a conductor 16 d processed into a planar spiral is used as a passive element from the silicon nitride layer 13 and the silicon oxide layer 14 instead of the capacitor C. Formed on the insulating film.
Similar to the first embodiment, the dummy layer 12 is removed in a region where the inductor L is formed, and is embedded with a dielectric layer 15. The inductor, which is a passive element, is formed at a distance of about 35 μm, which is the total thickness of the dummy layer 12 and the insulating films (13, 14), from the semiconductor substrate 10, and is formed on the semiconductor substrate via the insulating film. A sufficient distance between the passive element and the semiconductor substrate can be secured, and the parasitic capacitance of the passive element can be reduced. As a result, leakage due to electromagnetic induction between the semiconductor substrate and the inductor can be prevented, and the high frequency characteristics of the inductor can be improved.

Third Embodiment FIG. 10 is a schematic cross-sectional view of a semiconductor device in which a capacitor C and an inductor L are formed in a passive element formation region according to this embodiment.
2 is substantially the same as the semiconductor device shown in FIG. 2, but a capacitor C is formed as a passive element so as to be connected to the conductive layer 16e so that the upper electrode 16f and the lower electrode 16g face each other with the dielectric layer 15 in between. On the insulating film made of the silicon nitride layer 13 and the silicon oxide layer 14, the inductor L made of the conductor 16 h processed into a planar spiral shape and the conductive layer 16 i connected thereto are embedded in the dielectric layer 15. Is formed.
Similar to the first embodiment, the dummy layer 12 is removed and buried with the dielectric layer 15 in the region where the capacitor C and the inductor L are formed. Capacitors and inductors, which are passive elements, are formed at a distance of about 35 μm, which is the combined thickness of the dummy layer 12 and the silicon oxide layer 14, from the semiconductor substrate 10, and are formed on the semiconductor substrate via an insulating film. A sufficient distance between the passive element such as the semiconductor substrate can be secured, and the parasitic capacitance of the passive element can be reduced.

The present invention is not limited to the above description.
For example, as a semiconductor device only needs a passive element such as a capacitor or an inductor is one form may have a plurality of types are formed.
Passive elements such as capacitors and inductors may be formed away from the semiconductor substrate by a thickness substantially equal to the total thickness of the dummy layer and the silicon oxide layer constituting the insulating film, and are formed on the insulating film. Alternatively, it may be formed so as to be embedded in the dielectric layer formed by filling the opening formed in the insulating film and the gap formed in the dummy layer. Further, it may be formed on a dielectric layer.
The semiconductor substrate 10 may be formed with an active element such as a complementary metal-oxide-semiconductor (CMOS) transistor or a bipolar transistor.
In addition, various modifications can be made without departing from the scope of the present invention.

The semiconductor device of the present invention can be applied to a semiconductor device in a system-in-package form. For example, the use expands to MEMS such as a diaphragm, a pressure sensor, a gyroscope, an acceleration sensor, and an infrared sensor.
The semiconductor substrate of the present invention can be used as a substrate constituting the above semiconductor device.
The semiconductor device manufacturing method of the present invention can be applied to manufacture a semiconductor device in a system-in-package form.
The method for manufacturing a semiconductor substrate according to the present invention can be applied to manufacturing a semiconductor substrate constituting the semiconductor device.

FIG. 1 is a schematic cross-sectional view of a semiconductor substrate according to the first embodiment. FIG. 2 is a schematic cross-sectional view of the semiconductor device according to the first embodiment. 3A and 3B are schematic cross-sectional views illustrating manufacturing steps of the method for manufacturing the semiconductor device according to the first embodiment of the present invention. FIGS. 4A and 4B are schematic cross-sectional views illustrating manufacturing steps of the method for manufacturing a semiconductor device according to the first embodiment of the present invention. FIG. 5 is a schematic cross-sectional view showing a manufacturing process of the manufacturing method of the semiconductor device according to the first embodiment of the present invention. FIG. 6 is a schematic cross-sectional view showing a manufacturing process of the manufacturing method of the semiconductor device according to the first embodiment of the present invention. FIG. 7 is a schematic cross-sectional view showing a manufacturing process of the manufacturing method of the semiconductor device according to the first embodiment of the present invention. FIGS. 8A and 8B are schematic cross-sectional views illustrating manufacturing steps of the method for manufacturing a semiconductor device according to the first embodiment of the present invention. FIG. 9 is a schematic cross-sectional view of a semiconductor device according to the second embodiment. FIG. 10 is a schematic cross-sectional view of a semiconductor device according to the third embodiment. FIG. 11 is a schematic cross-sectional view of a semiconductor substrate according to a first conventional example. 12 (a) to 12 (d) are schematic cross-sectional views illustrating manufacturing steps of a method for manufacturing a semiconductor substrate according to a first conventional example. FIG. 13 is a schematic cross-sectional view of a semiconductor substrate according to a second conventional example.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 10 ... Semiconductor substrate, 11 ... Etching stopper film, 12 ... Dummy layer, 13 ... Silicon nitride layer, 14 ... Silicon oxide layer, 15 ... Dielectric layer, 16a ... Conductive layer, 16b ... Upper electrode, 16c ... Lower electrode, 16d ... Conductor processed into a planar spiral shape, 16e ... Conductive layer, 16f ... Upper electrode, 16g ... Lower electrode, 16h ... Conductor processed into a planar spiral shape, 16i ... Conductive layer, 100 ... (first) Silicon substrate, 100 '... second silicon substrate, 101 ... interlayer insulating film, 101' ... silicon oxide layer, 102 ... SOI layer, 110 ... silicon substrate, 111 ... insulating film, X ... passive element formation region, C ... capacitor , L: Inductor.

Claims (9)

A silicon semiconductor substrate;
A silicon oxide film functioning as an etching stopper formed on the silicon semiconductor substrate;
A polysilicon layer having a thickness of at least 10 μm formed on the silicon oxide film;
A silicon nitride layer formed on the polysilicon layer;
At least a 25 μm silicon oxide layer formed on the silicon nitride layer in a state where the two substrates on which the polysilicon layer and the silicon nitride layer are formed are bonded together; ,
An etching opening formed in an insulating film composed of the silicon nitride layer and the silicon oxide layer;
A gap where the polysilicon layer is removed by etching only in a region corresponding to a region where a passive element is formed through the etching opening,
A dielectric layer formed in the opening and the gap,
A semiconductor device in which a total thickness of the polysilicon layer, the silicon nitride layer, and the silicon oxide layer is at least 35 μm . The dielectric layer is formed beyond the insulating film, and the dielectric layer formed beyond the insulating film has the dielectric layer as a dielectric and has electrodes formed opposite to each other Is formed as the passive element
The semiconductor device according to claim 1. An inductor is formed as the passive element in a spiral shape on the insulating film around the etching opening.
The semiconductor device according to claim 1. The dielectric layer is formed beyond the insulating film, and the dielectric layer formed beyond the insulating film has the dielectric layer as a dielectric and has electrodes formed opposite to each other Is formed as the passive element,
The semiconductor device according to claim 1, wherein an inductor is formed as the passive element in a spiral shape on the insulating film around the etching opening . Forming a silicon oxide film on the silicon semiconductor substrate;
Forming a polysilicon layer having a thickness of at least 10 μm on the silicon oxide film;
Forming a silicon nitride layer on the polysilicon layer;
Bonding the two silicon semiconductor substrates through a bonding layer on a surface opposite to the polysilicon layer;
Forming a silicon oxide layer having a thickness of at least 25 μm on the silicon nitride layer;
Separating the two silicon semiconductor substrates in the bonding layer portion;
Forming an etching opening in an insulating film composed of the silicon nitride layer and the silicon oxide layer ;
Using the silicon oxide film as an etching stopper, removing the polysilicon layer by etching only a region corresponding to a region where a passive element is formed through the opening, and forming a void;
Forming a dielectric layer in the opening and the gap . Wherein in the step of bonding via a layer laminated in the surface opposite to the two of the silicon semiconductor substrate the polysilicon layer, according to claim 5, wherein the bonding through the silicon oxide layer of porous as the bonding layer Semiconductor device manufacturing method. Forming the dielectric layer beyond the insulating film;
In the step of forming the dielectric layer, a capacitor is formed by forming the dielectric layer as a dielectric and forming electrodes facing each other as the passive element in the dielectric layer formed beyond the insulating film. Further comprising the step of:
A method for manufacturing a semiconductor device according to claim 5 or 6. The passive element further includes a step of forming an inductor in a spiral shape on the insulating film around the etching opening.
A method for manufacturing a semiconductor device according to claim 5 or 6. Forming the dielectric layer beyond the insulating film;
In the step of forming the dielectric layer, a step of forming a capacitor in the dielectric layer formed beyond the insulating film by using the dielectric layer as a dielectric and opposingly forming electrodes; and
And a step of forming an inductor in a spiral shape on the insulating film around the etching opening.
A method for manufacturing a semiconductor device according to claim 5 or 6.

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