JP4445248B2 - Digital frequency converter - Google Patents

Description

  The present invention relates to a digital frequency converter that converts the frequency of a signal using digital signal processing.

  Conventionally, there is a processing method called an EER (Envelope Elimination and Restoration) method for the purpose of improving the efficiency of transmission processing of a linear modulation signal such as an SSB (Single Side Band) modulation signal and reducing the power consumption (for example, Patent Documents). 1). This method converts the linear modulation signal into polar coordinate phase information and amplitude information and processes them independently. Therefore, although this method is treated as an effective transmission method with low distortion and efficiency, it is analog. In signal processing, practical processing is considered difficult due to problems such as large processing errors when converting linear modulation signals to polar coordinate signals, or inability to combine power information efficiently when combining phase information and amplitude information. I came.

However, in recent years, with the development of digital signal processing, it has become possible to execute high-speed digital signal processing, so that linear modulation signals can be converted into polar coordinate signals with accurate processing with small errors, and further, class D. With the development of class E and class F power efficient amplifiers, it has become possible to put to practical use an EER system that realizes low distortion characteristics and high power efficiency characteristics (for example, Patent Document 2). reference.).
In addition, when a rectangular coordinate signal quantized by A / D conversion is converted into a polar coordinate signal in order to execute a part of the EER method by digital signal processing, the band-limited orthogonal coordinate signal is converted to Since the polar coordinate signal has a wider band, a high sampling frequency is required so that aliasing does not occur in the converted polar coordinate signal.Therefore, before converting to a polar coordinate signal, the orthogonal coordinate signal is interpolated to obtain the sampling frequency. Some convert to a high sampling frequency (see, for example, Patent Document 3).

  Furthermore, in the technique described in Patent Document 3, frequency conversion is performed by analog signal processing in a phase modulator (PHASE MODULATOR 63), whereas, for example, as shown in FIG. 9, frequency conversion is performed using complex processing by digital signal processing. Some perform the conversion. Specifically, FIG. 9 shows a digital frequency converter that performs frequency conversion using complex processing based on digital signal processing. From a modulated signal (MOD_I, MOD_Q) input through a filter 51, a phase detector 52 is shown. The phase information is extracted by the above, and the NCO (Numerically Controlled Oscillator) 53 is controlled using the extracted phase information to generate a phase modulation signal in the orthogonal coordinate format.

Then, after upsampling Np times by the interpolator 54, the complex mixer 56 performs frequency conversion based on the signal output from the NCO (numerically controlled oscillator) 55 based on the desired frequency data, and the orthogonality at the desired frequency is obtained. Coordinate format phase modulation signals (Phase_I, Phase_Q) are output. The amplitude information Amp is extracted from the modulated signals (MOD_I, MOD_Q) input through the filter 51 by the amplitude detector 57 and output.
U.S. Pat. No. 4,176,319 US Pat. No. 5,705,959 US Pat. No. 4,972,440

  By the way, if the sampling frequency of the signal is increased to the sampling frequency of the D / A converter (DAC) by interpolation as in the technique described in Patent Document 3, the power consumption associated with the conversion to the polar coordinate signal The problem arises that increases. Specifically, even if the conversion process of amplitude information and phase information is executed using ROM (Read Only Memory) as in the technique described in Patent Document 3, the process is executed at a high sampling frequency. However, there is a problem that the increase in power consumption accompanying this cannot be ignored. Furthermore, when phase information is output at a high IF frequency or RF frequency, a higher sampling frequency is required, and there is a problem that power consumption is greatly increased.

  As shown in FIG. 9, when performing frequency conversion using complex processing by digital signal processing, multiplication for multiplying real axis signals, imaginary axis signals, and real axis signals and imaginary axis signals. Since a total of four units and an adder or subtracter for synthesizing the output of the multiplier are necessary, there is a problem that the circuit scale and power consumption increase. And the increase in circuit scale and power consumption has a problem that the power efficiency with high EER is lowered and offset.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a digital frequency converter that can be reduced in size and power consumption even if digital signal processing is used as part of EER processing. To do.

  In order to solve the above-mentioned problems, a digital frequency converter according to the invention of claim 1 is a modulation signal conversion means for converting an input modulation signal into phase information and amplitude information in a polar coordinate format (for example, a phase of an embodiment described later). Detector 22 and amplitude detector 23), sampling frequency conversion means for converting the sampling frequency of the phase information output from the modulation signal conversion means (for example, an interpolator 28 in an embodiment described later), and the sampling frequency conversion means output Phase modulation signal generation means (for example, a wrap circuit 31, and COS_ROM 32 and SIN_ROM 33 in the embodiments described later) for generating a phase modulation signal based on the phase information to be output, and output the amplitude information and the phase modulation signal It is characterized by.

  The digital frequency converter having the above configuration converts the input modulation signal into phase information and amplitude information in polar coordinate format by the modulation signal converting means, and also sampling frequency of phase information in polar coordinate format by the sampling frequency converting means. After converting the sampling frequency, the phase information in the polar coordinate format is converted into a phase modulation signal by the phase signal conversion means, so that when the sampling frequency conversion is performed on the phase information of the input modulation signal, Compared with the case where the sampling frequency of the phase modulation signal in the coordinate format is converted, the sampling frequency can be easily converted by at least half the processing.

  A digital frequency converter according to a second aspect of the present invention is a modulation signal converting means for converting an input modulation signal into phase information and amplitude information in a polar coordinate format (for example, a phase detector 22 and an amplitude detector 23 in the embodiments described later). ), Phase calculation means for accumulating phase data corresponding to the desired conversion frequency (for example, an accumulator 27 in the embodiment described later), and output of the phase calculation means to phase information output by the modulation signal conversion means Phase conversion means (for example, an adder 24 in an embodiment to be described later) that generates phase information when the modulation signal is subjected to frequency conversion by adding and subtracting the signal, and sampling of phase information output by the phase conversion means Sampling frequency converting means for converting the frequency (for example, interpolator 28 in the embodiment described later) and the phase output by the sampling frequency converting means Phase modulation signal generation means (for example, a wrap circuit 31, and a COS_ROM 32, SIN_ROM 33, which will be described later) that generates a phase modulation signal based on the information, and outputs the amplitude information and the phase modulation signal. And

  The digital frequency converter having the above configuration converts the input modulation signal into phase information and amplitude information in polar coordinate format by the modulation signal conversion means, and outputs the phase information to the converted phase information. When performing phase conversion on the phase information of the input modulation signal by adding / subtracting the cumulative addition value of phase data corresponding to the desired conversion frequency using the phase conversion means, the phase modulation signal of the orthogonal coordinate format is used. Frequency conversion can be easily performed only by using a simple adder / subtracter without using a multiplier necessary for frequency conversion.

  Furthermore, the sampling frequency conversion means converts the sampling frequency of the phase information in polar coordinate format, converts the sampling frequency, and then converts the polar coordinate format phase information into a phase modulation signal by the phase modulation signal generation means. When the sampling frequency conversion is performed on the phase information of the modulated signal, the sampling frequency conversion can be easily performed with at least half the processing compared to the case where the sampling frequency of the phase modulation signal in the orthogonal coordinate format is converted. Further, since the frequency conversion of the phase information is executed by the phase conversion unit before the sampling frequency is converted, the phase conversion unit does not increase the operating frequency more than necessary if the frequency relationship is such that aliasing does not occur. Can perform frequency conversion of information.

  A digital frequency converter according to a third aspect of the present invention is a modulation signal converting means for converting an inputted modulation signal into phase information and amplitude information in a polar coordinate format (for example, a phase detector 22 and an amplitude detector 23 in the embodiments described later). ), Phase calculation means for accumulating phase data corresponding to the desired conversion frequency (for example, accumulator 30 in the embodiment described later), and sampling for converting the sampling frequency of the phase information output from the modulation signal conversion means When the frequency conversion is performed on the modulation signal by adding / subtracting the output signal of the phase calculation means to / from the phase information output by the frequency conversion means (for example, the interpolator 28 of the embodiment described later) and the sampling frequency conversion means Phase conversion means for generating phase information (for example, an adder 29 in an embodiment to be described later) and a phase output by the phase conversion means Phase modulation signal generation means (for example, a wrap circuit 31, and a COS_ROM 32, SIN_ROM 33, which will be described later) that generates a phase modulation signal based on the information, and outputs the amplitude information and the phase modulation signal. And

  The digital frequency converter having the above configuration converts the input modulation signal into phase information and amplitude information in polar coordinate format by the modulation signal converting means, and also sampling frequency of phase information in polar coordinate format by the sampling frequency converting means. Therefore, when sampling frequency conversion is performed on the phase information of the input modulation signal, sampling is easily performed with at least half the processing compared to the case of converting the sampling frequency of the phase modulation signal in the orthogonal coordinate format. Frequency conversion can be performed. Further, the phase modulation information output from the sampling frequency conversion means is added to or subtracted from the phase data by the cumulative addition value of the phase data corresponding to the desired conversion frequency output from the phase calculation means, thereby inputting the modulated signal. When frequency conversion is performed on the phase information, the frequency conversion is easily performed by using a simple adder / subtracter without using a multiplier necessary for converting the frequency of the phase modulation signal in the orthogonal coordinate format. be able to.

  According to a fourth aspect of the present invention, there is provided a digital frequency converter for modulating signal conversion means for converting an input modulation signal into phase information and amplitude information in polar coordinate format (for example, a phase detector 22 and an amplitude detector 23 in the embodiments described later). ) And P phase (where P is a positive integer) phase data corresponding to the desired conversion frequency, and first phase calculation means for accumulating the lower Q digits (where Q is a positive integer) of phase data (E.g., an accumulator 27 in an embodiment described later) and second phase calculation means for accumulating upper (PQ) digit phase data of the P digit phase data corresponding to a desired conversion frequency. (For example, an accumulator 30 in an embodiment to be described later) and the phase information output from the modulation signal conversion means, by adding / subtracting the output signal of the first phase calculation means to the lower Q digits to the modulation signal Frequency variation based on phase data First phase conversion means (for example, an adder 24 in the embodiment described later) for generating phase information when the signal is applied, and sampling frequency conversion for converting the sampling frequency of the phase information output from the first phase conversion means By adding / subtracting the output signal of the second phase calculating means to the phase information output from the means (for example, the interpolator 28 of the embodiment described later) and the sampling frequency converting means, the P-digit phase is added to the modulation signal. Second phase conversion means (for example, an adder 29 in an embodiment to be described later) for generating phase information when frequency conversion based on data is performed, and phase based on phase information output from the second phase conversion means Phase modulation signal generation means for generating a modulation signal (for example, a wrap circuit 31, and a COS_ROM 32 and a SIN_ROM 33 in an embodiment described later) are provided. And outputting the said phase-modulated signal and the amplitude information.

  The digital frequency converter having the above configuration converts the input modulation signal into phase information and amplitude information in a polar coordinate format by the modulation signal converting means, and also converts P digit phase data corresponding to a desired conversion frequency. By adding / subtracting the signal obtained by accumulating the lower Q digits of the phase data by the first phase calculation means to the phase information using the first phase conversion means, the signal is lower than the desired conversion frequency. Frequency conversion corresponding to the lower Q digit phase data of the P digit phase data is executed. On the other hand, the sampling frequency of the output signal of the first phase conversion means is up-sampled by the sampling frequency conversion means, and the upper (PQ) digit phase data of the P digit phase data corresponding to the desired conversion frequency Can be completely converted by the first phase conversion means by adding / subtracting the signal obtained by cumulative addition to the upsampled signal using the second phase conversion means. The remaining frequency conversion for the desired conversion frequency corresponding to the upper (PQ) digit phase data of the P digit phase data is executed, and the frequency conversion based on the P digit phase data is executed for the modulation signal. To do.

  As a result, when performing frequency conversion and sampling frequency conversion on the phase information of the input modulation signal, in the frequency conversion performed in two stages, the conversion frequency for the phase information using the first phase conversion means is desired. Since the frequency is lower than the conversion frequency, by setting the sampling frequency of the output signal of the first phase conversion means to be low based on the conversion frequency by the first phase conversion means, the modulation signal conversion means and the first phase are set. The operating frequency in the calculating means and further in the first phase converting means can be set to a low frequency based on the sampling frequency of the output signal of the first phase converting means.

  A digital frequency converter according to a fifth aspect of the present invention is the digital frequency converter according to the fourth aspect, wherein the second phase converting means is a signal of higher order (PQ) digit of the output signal of the sampling frequency converting means. Further, the output signal of the second phase calculating means is added or subtracted.

  The digital frequency converter having the above configuration adds or subtracts the output signal of the second phase calculating means to the higher order (PQ) digit signal of the output signal of the sampling frequency converting means in the second phase converting means. Thus, when performing frequency conversion and sampling frequency conversion on the phase information of the input modulation signal, the arithmetic word length of the arithmetic unit for the signal after the sampling frequency conversion for which the sampling frequency must be increased can be reduced. it can.

  A digital frequency converter according to a sixth aspect of the present invention is the digital frequency converter according to any one of the first to fifth aspects, wherein the input sampling frequency converting means (for example, described later) converts the sampling frequency of the input modulation signal. And an interpolator 21) according to an embodiment for converting the sampling frequency of the modulation signal, and then converting the modulation signal into phase information and amplitude information in a polar coordinate format.

  The digital frequency converter having the above configuration is obtained by up-sampling the input modulation signal by the input sampling frequency conversion means and then converting the phase information and the amplitude information in the polar coordinate format by the modulation signal conversion means. When converting the modulation signal into phase information and amplitude information in the polar coordinate format, the frequency band of the modulation signal into which the converted phase information in the polar coordinate format and the frequency bandwidth of the amplitude information are input at the output of the modulation signal conversion means Even if it is wider than the width, it is possible to prevent aliasing from occurring in the phase information and amplitude information in the polar coordinate format.

According to the digital frequency converter of claim 1, when the sampling frequency conversion is performed on the phase information of the input modulation signal, at least as compared with the case of converting the sampling frequency of the orthogonal modulation format phase modulation signal. Sampling frequency conversion can be easily performed with half the processing.
Therefore, as a result of reducing the sampling frequency conversion processing, the amount of calculation necessary for sampling frequency conversion for the input modulation signal is reduced, thereby reducing the circuit scale of the digital frequency converter and reducing power consumption. The effect that can be reduced is obtained.

  According to the digital frequency converter of claim 2 and claim 3, when performing frequency conversion on the phase information of the input modulation signal, multiplication necessary for converting the frequency of the phase modulation signal in the orthogonal coordinate format. The frequency conversion can be easily performed only by using a simple adder / subtracter without using a device. Also, when sampling frequency conversion is performed on the phase information of the input modulation signal, the sampling frequency conversion is easily performed with at least half the processing compared to the case where the sampling frequency of the phase modulation signal in the orthogonal coordinate format is converted. be able to. In particular, according to the digital frequency converter of the second aspect, since the phase conversion means performs the frequency conversion of the phase information before converting the sampling frequency, if the frequency relation is such that aliasing does not occur, the phase conversion The frequency conversion of the phase information can be performed without increasing the operating frequency of the means more than necessary.

  Therefore, as a result of performing the frequency conversion on the phase information in a process that does not require a multiplier, the amount of calculation required for the frequency conversion is reduced, thereby reducing the circuit scale of the digital frequency converter and reducing the power consumption. The effect that can be reduced is obtained. In addition, if the operating frequency of the process of converting the phase information frequency can be reduced, it is possible to further reduce the circuit scale of the digital frequency converter and reduce the power consumption. In addition, as a result of reducing the sampling frequency conversion processing, the amount of calculation necessary for sampling frequency conversion for the input modulation signal is reduced, thereby reducing the circuit scale and consumption of the digital frequency converter. The effect that electric power can be reduced is obtained.

According to the digital frequency converter of claim 4, when the frequency conversion and the sampling frequency conversion are performed on the phase information of the input modulation signal, the operating frequency in the first phase calculation means and the first phase conversion means Can be made as low as possible in accordance with the sampling frequency of the output signal.
Therefore, as a result of executing the processing by reducing the operating frequency even in a part of the processing, it is possible to reduce the circuit scale of the digital frequency converter and reduce the power consumption.

According to the digital frequency converter of claim 5, when performing frequency conversion and sampling frequency conversion on the phase information of the input modulation signal, an operation is performed on the signal after the sampling frequency conversion in which the sampling frequency must be increased. The operation word length of the device can be reduced.
Therefore, as a result of reducing the arithmetic word length of the arithmetic unit and executing the frequency conversion and sampling frequency conversion processing at least in part, the circuit scale of the digital frequency converter can be reduced and the power consumption can be reduced. The effect is obtained.

According to the digital frequency converter of claim 6, even if the frequency bandwidth of the converted polar coordinate phase information and amplitude information is wider than the frequency bandwidth of the input modulation signal, the phase information and amplitude of the polar coordinate format It is possible to prevent aliasing from occurring in information.
Therefore, even if the digital frequency converter has a reduced circuit scale and reduced power consumption, it is possible to obtain an output with less characteristic deterioration such as conversion error and noise.

  Embodiments of the present invention will be described below with reference to the drawings.

(Configuration of transmitter)
FIG. 1 is a block diagram showing a configuration of an EER (Envelope Elimination and Restoration) type transmitter including a digital frequency converter according to an embodiment of the present invention.
In FIG. 1, the quantized modulation signals “MOD_I (t), MOD_Q (t)” output from the modulator 1 that generates a signal such as a π / 4 shift QPSK signal as shown in FIG. , Input to the digital frequency converter 2 of the present embodiment, frequency conversion to a desired IF frequency signal is performed, and amplitude information “Amp (t)” and a phase modulation signal “Phase_I (t) in orthogonal coordinate format, Phase_Q (t) ”. 2 shows the spectrum of the modulated signals “MOD_I (t), MOD_Q (t)” (π / 4 shift QPSK signal) expressed by 8 times sampling, the horizontal axis: frequency [MHz], and the vertical axis: large. It is the figure shown as [dB].

  The separated amplitude information “Amp (t)” is converted into an analog signal by a D / A converter (DAC) 3 and then frequency band limited by a simple LC low-pass filter 4 composed of a coil, a capacitor and the like. Is given. The input / output characteristics are amplified by the linear power amplifier 5 to generate amplitude information in the output signal of the transmitter.

On the other hand, the phase modulation signals “Phase_I (t) and Phase_Q (t)” are converted into analog signals by D / A converters (DACs) 6 and 7, respectively, and then a simple LC band composed of coils, capacitors, and the like. Frequency bands are limited by the pass filters 8 and 9. Then, by the quadrature modulator 10 including the mixers 10a and 10b and the adder 10c, the "COS wave" output from the PLL oscillator 11 and the "-SIN wave" whose phase is advanced by 90 [degrees] from the "COS wave". By performing quadrature modulation, the signal is converted into a phase modulation signal of a transmission frequency (RF frequency) represented by a real axis signal, and input / output characteristics are input to the nonlinear power amplifier 12 having nonlinearity.
Further, in the nonlinear power amplifier 12, the amplitude information is transmitted to the phase modulation signal of the transmission frequency represented by the real axis signal output from the quadrature modulator 10 based on the amplitude information in the output signal of the transmitter output from the linear power amplifier 5. , And a transmission signal is generated and transmitted from the antenna 13.

(Configuration of digital frequency converter)
Next, the configuration of the digital frequency converter 2 of the present embodiment will be described with reference to the drawings. FIG. 3 is a block diagram showing details of the digital frequency converter 2 of the present embodiment. As an example, the phase information of the input modulation signal between the input and output of the digital frequency converter 2 includes the desired conversion frequency f1. An example in the case of performing frequency conversion and sampling frequency upsampling will be described.
In FIG. 3, modulation signals “MOD_I (t) and MOD_Q (t)” of sampling frequency Fs2 (where Fs2 = Fs1 × MC1) sampled twice at the symbol rate Fs1 output from the modulator 1 are The signal is converted into a modulation signal “MOD_I2 (t), MOD_Q2 (t)” of the sampling frequency Fs3 (where Fs3 = Fs2 × MC2) by the interpolator 21 that upsamples the sampling frequency of the signal to MC2 times. Each is input to the detector 23.

  Here, the sampling frequency of the signal is upsampled to MC2 times the input signal of the digital frequency converter 2 because the phase information and the amplitude information are detected by the phase detector 22 and the amplitude detector 23 in the subsequent stage, respectively. This is because the bandwidth of the detected phase information and amplitude information is wider than the input signal, so that aliasing may occur in the phase information and amplitude information.

  On the other hand, in the phase detector 22, the arc tangent of the vector formed by the real axis signal and the imaginary axis signal of the modulation signals “MOD_I2 (t), MOD_Q2 (t)” on the complex plane based on the following equation (1). Is obtained to calculate the phase information θ1 (t). FIG. 4 is a diagram showing the spectrum of the phase information θ1 (t) expressed by 16-times sampling, with the horizontal axis: phase [π] and the vertical axis: size [dB]. The spectrum of the phase information θ1 (t) has a signal component in the vicinity of ¼ of the sampling frequency, that is, around 0.5 [π] of the phase, but has a signal component. There is a possibility that signal distortion due to aliasing and insufficient suppression of unnecessary frequency band signals due to filters may occur.

  Further, in the phase detector 22, the phase information θ1 (t) calculated based on the following equation (1) is discontinuous phase information represented by an angle from 0 to 2π. As a result, the phase information θ1 (t) is converted into continuous phase information θ2 (t). Note that the number of quantization bits in the phase detector 22 depends on the type and content of the input modulation signal so that the phase information θ2 (t) does not become discontinuous phase information due to the number of quantization bits in the phase detector 22. Shall be determined based on

  The amplitude detector 23 squares and adds the real axis signal and the imaginary axis signal of the modulation signals “MOD_I2 (t), MOD_Q2 (t)” based on the following equation (2). The amplitude information Amp (t) is calculated by obtaining the square root of the result, and the calculated amplitude information Amp (t) is output to the D / A converter 3 of the transmitter as the amplitude information output of the digital frequency converter 2. Entered. The amplitude information Amp (t) may be output as amplitude information after changing the sampling frequency. FIG. 5 is a diagram showing the spectrum of the amplitude information Amp (t) expressed by 16-times sampling with the horizontal axis: frequency [MHz] and the vertical axis: size [dB]. The amplitude information Amp (t) is the same as the phase information θ1 (t). If the sampling frequency is low, signal distortion due to aliasing and unnecessary suppression of unnecessary frequency band signals due to filters may occur.

  On the other hand, the phase information θ2 (t) calculated in the phase detector 22 is input to the adder 24, and a phase change based on the frequency conversion phase data PD corresponding to the desired conversion frequency f1 is given. Then, the frequency conversion by the desired conversion frequency f1 for the modulation signal “MOD_I2 (t), MOD_Q2 (t)” of the sampling frequency Fs2 is executed in the form of addition (addition / subtraction) of phase change to the phase information θ2 (t).

  Specifically, the phase data PD for frequency conversion is obtained by quantifying the phase change of the signal corresponding to the desired conversion frequency f1 as the phase change width for each sampling data of the signal output from the digital frequency converter 2. Thus, the angular frequency 2πf1 corresponding to the desired conversion frequency f1 is obtained by sampling at the sampling frequency Fs3p of the signal output from the digital frequency converter 2. The frequency conversion phase data PD is a number represented by a power of 2.

However, the frequency conversion by the desired conversion frequency f1 is performed by the frequency conversion by the conversion frequency f2 (however, the conversion frequency f2 <the conversion frequency f1) and the remaining conversion frequency f3 (however, the conversion frequency). f3 = conversion frequency f1−conversion frequency f2) and two-step frequency conversion with frequency conversion.
That is, the signal after frequency conversion with the desired conversion frequency f1 needs a high sampling frequency corresponding to the conversion frequency f1, but the signal after frequency conversion with the conversion frequency f2 is the signal after frequency conversion with the conversion frequency f1. Since the frequency is lower, by dividing and executing the frequency conversion in two stages, the sampling frequency can be lowered in the portion where the frequency of the signal to be handled is low. Therefore, the circuit scale and power consumption can be reduced at the portion where the sampling frequency is lowered.

Therefore, in the adder 24, first, a phase change for realizing frequency conversion by the conversion frequency f2 that can be set in fine frequency steps is given. Here, it is assumed that the sampling frequency Fs2 of the signal output from the adder 24 is (1 / MP1) times the sampling frequency Fs3p of the signal output from the digital frequency converter 2.
Therefore, P digit (bit) (P is a positive integer) frequency conversion phase data PD corresponding to the desired conversion frequency f1 is calculated based on the sampling frequency Fs3p of the signal output from the digital frequency converter 2. In this case, the phase data of the signal output from the phase detector 22 is obtained by multiplying the lower Q digits (bits) (Q is a positive integer) of the phase data PD for frequency conversion by MP1. The phase change width.

  Specifically, from the frequency conversion phase data PD, the data separation unit 25 separates the lower Q digits (bits) of phase data, and the data amplification unit 26 converts the lower Q digits (bits) of phase data into MP1. Double. Then, the frequency is set at a frequency step of “conversion frequency f1 / (2 to the power of P)” by accumulating this in an accumulator 27 having a register 27a and an adder 27b and operating at the sampling frequency Fs2. The phase change in the frequency conversion of the conversion frequency f2 corresponding to the possible frequency conversion, that is, the lower Q digits (bits) of the phase data PD for frequency conversion can be calculated.

Then, in the adder 24 operating at the sampling frequency Fs2, the phase change in the frequency conversion of the calculated conversion frequency f2 is added to the phase information θ2 (t) output from the phase detector 22 for each sample data. To generate phase information θ3 (t).
Thereby, the phase information of the signal when the frequency of the modulation signals “MOD_I2 (t), MOD_Q2 (t)” is increased by the conversion frequency f2 can be obtained as the phase information θ3 (t) output from the adder 24. . Note that the phase information of the signal when the frequency of the modulation signals “MOD_I2 (t), MOD_Q2 (t)” is lowered is changed to the subtractor, and the phase information θ2 ( It can be obtained by subtracting the phase change data output from the accumulator 27 from t).

The phase information θ3 (t) output from the adder 24 is then phase information θ4 (sampling frequency Fs3p (where Fs3p = Fs2 × MP1)) by the interpolator 28 that upsamples the sampling frequency of the signal to MP1 times. t) and input to the adder 29.
In the adder 29, a phase change for realizing the frequency conversion by the remaining conversion frequency f3 is given to the frequency conversion of the conversion frequency f2 executed in the adder 24.

That is, the phase data of the upper (PQ) digits (bits) of the P digit (bit) (where P is a positive integer) frequency conversion phase data PD corresponding to the desired conversion frequency f1 is converted into the interpolator 28. Is the phase change width for each sampling of the signal output. Therefore, the phase data of higher order (PQ) digits (bits) is separated from the frequency conversion phase data PD by the data separator 25.
Then, this is cumulatively added in an accumulator 30 including a register 30a and an adder 30b and operating at the sampling frequency Fs3p, so that a frequency step of "conversion frequency f1 / {2 to the (PQ) power}" The phase change in the frequency conversion of the conversion frequency f3 corresponding to the high-order (PQ) digit (bit) of the frequency conversion capable of setting the frequency, that is, the phase data PD for frequency conversion can be calculated.

  Then, in the adder 29 operating at the sampling frequency Fs3p, the phase change in the frequency conversion of the calculated conversion frequency f3 is added to the phase information θ4 (t) output from the interpolator 28 for each sample data. Information θ5 (t) is generated. The phase change in the frequency conversion of the conversion frequency f3 output from the accumulator 30 is a signal corresponding to the signal of the upper (PQ) digit (bit) of the phase information θ4 (t) output from the interpolator 28. Therefore, the addition in the adder 29 is performed by the (PQ) digit output by the accumulator 30 to the upper (PQ) digit (bit) signal of the phase information θ4 (t) output from the interpolator 28. It is assumed that the (bit) phase change is added.

  Thus, the phase information output from the adder 29 is the phase information of the signal after frequency conversion when the frequency of the modulation signals “MOD_I2 (t), MOD_Q2 (t)” is increased by the conversion frequency f1 (= f2 + f3). It can be obtained as θ5 (t). Note that the phase information of the signal when the frequency of the modulation signals “MOD_I2 (t), MOD_Q2 (t)” is lowered is obtained by changing the adder 29 to the subtractor as described above and calculating the phase information calculated by the interpolator 28. This can be obtained by subtracting the phase change data output from the accumulator 30 from θ4 (t).

  Then, the phase information θ5 (t) of the signal when the frequency of the modulation signals “MOD_I2 (t), MOD_Q2 (t)” is increased by the conversion frequency f1 (= f2 + f3) is subjected to wrap processing by the wrap circuit 31 and 0 COS {θ (t)} and SIN {with respect to the phase information θ (t) represented by an angle from 0 to 2π, while being converted into discontinuous phase information θ6 (t) represented by an angle from ˜2π. By inputting the phase information θ6 (t) to the COS_ROM 32 and the SIN_ROM 33 respectively storing θ (t)}, a phase modulation signal Phase_I (t) = COS {θ6 (t)} and Phase_Q (t ) = SIN {θ6 (t)}.

  The generated phase modulation signals “Phase_I (t), Phase_Q (t)” are input to the D / A converters 6 and 7 of the transmitter as the phase information output of the digital frequency converter 2, respectively. If a transmitter that does not use a complex signal other than the transmitter described above is used, only Phase_I (t) = COS {θ6 (t)} among the phase-modulated signals in the orthogonal coordinate format may be output. .

  Further, when a fixed value is accumulated as in the accumulator 27, a spectrum having a large peak near phase 0 is obtained on the phase spectrum. This peak increases in proportion to the fixed value to be cumulatively added, that is, the size of the phase data for frequency conversion. For example, FIG. 6 shows the spectrum of the phase information θ3 (t) after performing the frequency conversion of the normalized frequency 0.402666489 with the sampling frequency set to 1 with respect to the phase information θ1 (t) shown in FIG. It is the figure shown as horizontal axis | shaft: phase [(pi)] and vertical axis | shaft: magnitude | size [dB]. The spectrum shown in FIG. 6 has a large peak in the vicinity of phase 0, unlike the spectrum shown in FIG.

When the spectrum has such a large peak, the operation word length required when the interpolator 28 performs sampling frequency conversion of the phase information θ3 (t) becomes long, and the power consumption of the interpolator 28 increases. Further, since a very large stopband attenuation is required for the filter for suppressing the unnecessary frequency band after upsampling in the interpolator 28, a high-order filter is required, and the power consumption further increases.
Therefore, the conversion frequency f2 is not increased by the phase processing for the frequency conversion of the conversion frequency f2 performed by the adder 24 and the accumulator 27, and the operation word length and the filter order in the interpolator 28 are not increased. The numerical value should not be greatly changed between when the phase is processed and when it is not processed.

  In the above-described embodiment, when a modulated signal not subjected to roll-off filtering is input from the modulator 1 to the digital frequency converter 2, a roll-off filter is provided after the interpolator 21, and the input modulation is performed. The signal waveform may be shaped by a roll-off filter, and then phase information and amplitude information may be detected by the phase detector 22 and the amplitude detector 23, respectively.

  In the above-described embodiment, when the QPSK signal is input from the modulator 1 to the digital frequency converter 2, the phase information of the QPSK signal is rapidly attenuated but not greatly attenuated as shown in FIG. As shown in FIG. 8, the amplitude information of the QPSK signal does not attenuate the signal even when the sampling frequency is reduced to half, so that the sampling frequency conversion ratio by the interpolator 21 is higher than when the π / 4 shift QPSK signal is input. It is necessary to provide a filter at the input stage of the digital frequency converter 2 that increases or suppresses the spurious near half of the sampling frequency by knowing the deterioration of the modulation characteristic. FIG. 7 is a diagram showing the spectrum of the phase information of the QPSK signal expressed by 16 times sampling, with the horizontal axis: phase [π] and the vertical axis: magnitude [dB]. FIG. 8 is a diagram showing the spectrum of the amplitude information of the QPSK signal expressed by 16 times sampling, with the horizontal axis: frequency [MHz] and the vertical axis: size [dB].

  Further, in the above-described embodiment, before and after the interpolator 28, the phase conversion corresponding to the frequency conversion of the conversion frequency f2 executed in the adder 24 and the frequency conversion of the conversion frequency f3 executed in the adder 29 are supported. The phase conversion corresponding to the frequency conversion by the desired conversion frequency f1 was executed in two steps, the phase conversion corresponding to the desired conversion frequency f1, but the phase conversion corresponding to the frequency conversion by the desired conversion frequency f1 was realized by either process You may do it.

  As described above, according to the digital frequency converter of the present embodiment, the sampling frequency of the input modulation signal is upsampled by the interpolator 21 and the phase information in the polar coordinate format is obtained by the phase detector 22 and the amplitude detector 23. The amplitude information is used as the amplitude information output of the digital frequency converter. On the other hand, by adding the phase change output from the accumulator 27 to the phase information output from the phase detector 22 using the adder 24, the frequency step of “conversion frequency f1 / (2 to the power of P)” is obtained. The phase change in the frequency conversion that can set the frequency, that is, the frequency conversion of the conversion frequency f2 corresponding to the lower Q digits (bits) of the phase data PD for frequency conversion is added to the phase information output by the phase detector 22.

  Further, the sampling frequency of the phase information output from the adder 24 is upsampled by the interpolator 28, and the phase change output from the accumulator 30 is added to the phase information output from the interpolator 28 using the adder 29. Thus, frequency conversion that can be set with a frequency step of “conversion frequency f1 / {2 to the power of (PQ)}”, that is, in the upper (PQ) digit (bit) of the phase data PD for frequency conversion. The phase change in the frequency conversion of the corresponding conversion frequency f3 is added to the phase information output from the interpolator 28. Then, the phase information output from the adder 29 is converted into discontinuous phase information represented by an angle from 0 to 2π by the wrap circuit 31, and the phase modulation in the orthogonal coordinate format is performed using the COS_ROM 32 and the SIN_ROM 33. The signals Phase_I (t) and Phase_Q (t) are generated and used as the phase information output of the digital frequency converter.

  Thereby, in the digital frequency converter of the present embodiment, the phase information output from the adder 29 is the phase information of the signal after frequency conversion when the frequency of the input modulation signal is increased by the conversion frequency f1 (= f2 + f3). Information can be obtained and output from the digital frequency converter as phase modulation signals Phase_I (t) and Phase_Q (t) in the form of orthogonal coordinates. In addition, in order to obtain the phase information of the signal after frequency conversion when the frequency of the input modulation signal is lowered, the adder 24 and the adder 29 are used as subtracters, and the phase change or the frequency change in the conversion frequency f2 is converted. What is necessary is just to subtract the phase change in the frequency conversion of conversion frequency f3 from phase information.

  As described above, the digital frequency converter according to the present embodiment can easily perform frequency conversion on the phase information of the input modulation signal only by using a simple adder / subtracter without using a multiplier. Specifically, when converting the frequency of a phase modulation signal in the rectangular coordinate format, a total of four multipliers, an adder and a subtractor are required, but frequency conversion can be easily performed only by using a simple adder / subtractor. Can be applied. Therefore, as a result of reducing the number of multipliers, the calculation amount necessary for frequency conversion for the phase information of the input modulation signal is reduced, thereby reducing the circuit scale of the digital frequency converter and reducing the power consumption. The effect that it can reduce is acquired.

  Further, the digital frequency converter of this embodiment performs frequency conversion in two steps before and after the interpolator 28 that upsamples the sampling frequency to MP1 times, thereby changing the operating frequency of the circuit preceding the interpolator 28 to the sampling frequency. Can be lowered to match. Specifically, when the frequency conversion for increasing the frequency is executed at a time, the sampling frequency must be determined in accordance with the signal after the frequency conversion, so that the sampling frequency of the signal is naturally increased, and the frequency converter However, when the frequency conversion is performed twice before and after the interpolator 28, the operation frequency of the adder 24 and the accumulator 27 can be reduced to 1 / MP1. .

Also, when the P-digit (bit) (P is a positive integer) frequency conversion phase data PD corresponding to the desired conversion frequency f1 is calculated based on the sampling frequency Fs3p of the signal output from the digital frequency converter Since the lower Q digit (bit) phase data is separated from the frequency conversion phase data PD by the data separating unit 25 and the lower Q digit (bit) phase data is multiplied by MP1 by the data amplifying unit 26, In the calculator 27, the operation word length can be reduced at a rate of one digit (bit) per double.
Therefore, by reducing the operating frequency and operation word length, it is possible to reduce the circuit scale of the digital frequency converter and reduce the power consumption.

  Further, the digital frequency converter of this embodiment is inputted by converting the phase information in the polar coordinate format into the phase modulation signal in the orthogonal coordinate format after converting the sampling frequency of the phase information in the polar coordinate format by the interpolator 28. When the sampling frequency conversion is performed on the phase information of the modulated signal, the sampling frequency conversion can be easily performed with at least half the processing compared to the case where the sampling frequency of the phase modulation signal in the orthogonal coordinate format is converted. Specifically, when converting the sampling frequency of a phase modulation signal in the rectangular coordinate format, a filter for suppressing unnecessary frequency bands required for converting the sampling frequency processes a baseband signal. However, two are required for processing the real axis signal and the imaginary axis signal, and four filters are required when processing signals of IF frequency.

On the other hand, when converting the sampling frequency of the phase information in the polar coordinate format, the phase information of the real axis signal is processed regardless of whether the baseband signal is processed or the IF frequency signal is processed. Therefore, only one filter is required to suppress the unnecessary frequency band that is necessary when converting the sampling frequency.
Therefore, when processing an IF frequency signal, the computation amount of the filter is 1/4 when the processing is performed in the orthogonal coordinate format, and even when processing the baseband signal, the computation amount of the filter is processed in the orthogonal coordinate format. As a result, the circuit size of the digital frequency converter can be reduced and the power consumption can be reduced by reducing the amount of calculation.

In the digital frequency converter according to the present embodiment, the adder 29 adds the output signal of the accumulator 30 to the signal of the higher order (PQ) digit (bit) of the output signal of the interpolator 28, thereby inputting the signal. When performing frequency conversion and sampling frequency conversion on the phase information of the modulated signal, it is possible to reduce the operation word length of the adder 29 for the signal after sampling frequency conversion in which the sampling frequency must be increased.
Therefore, by reducing the operation word length, it is possible to reduce the circuit scale of the digital frequency converter and reduce the power consumption.

Further, the digital frequency converter of the present embodiment up-samples the sampling frequency of the input modulation signal by the interpolator 21, so that the phase information and amplitude in the polar coordinate format converted by the phase detector 22 and the amplitude detector 23 are obtained. Even if the frequency bandwidth of the information is wider than the frequency bandwidth of the input modulation signal, it is possible to prevent aliasing from occurring in the phase information and amplitude information in the polar coordinate format.
Therefore, even if the digital frequency converter has a reduced circuit scale and reduced power consumption, it is possible to obtain an output with less characteristic deterioration such as conversion error and noise.

  The digital frequency converter of this embodiment can be used for any modulation system including an analog system.

It is a block diagram which shows the structure of the transmitter of the EER system provided with the digital frequency converter of one Example of this invention. It is a figure which shows the spectrum of the (pi) / 4 shift QPSK signal input into the digital frequency converter of the Example represented by 8 time sampling. It is a block diagram which shows the detail of the digital frequency converter of the Example. It is a figure which shows the spectrum of the phase information (theta) 1 (t) represented by 16 time sampling. It is a figure which shows the spectrum of amplitude information Amp (t) represented by 16 time sampling. It is a figure which shows the spectrum of phase information (theta) 3 (t) after performing frequency conversion with respect to phase information (theta) 1 (t) shown in FIG. It is a figure which shows the spectrum of the phase information of the QPSK signal represented by 16 time sampling. It is a figure which shows the spectrum of the amplitude information of the QPSK signal represented by 16 time sampling. It is a block diagram which shows the digital frequency converter of a prior art example.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Modulator 2 Digital frequency converter 3, 6, 7 D / A converter 4 LC low pass filter 8, 9 LC band pass filter 5 Linear power amplifier 10 Quadrature modulator 10a, 10b Mixer 10c Adder 11 PLL oscillator 12 Nonlinear power amplifier 13 Antenna 21 Interpolator (Input sampling frequency conversion means)
22 Phase detector (modulation signal conversion means)
23 Amplitude detector (modulation signal conversion means)
24 Adder (phase conversion means, first phase conversion means)
25 data separation unit 26 data amplification unit 27 accumulator (phase calculation means, first phase calculation means)
27a register 27b adder 28 interpolator (sampling frequency conversion means)
29 Adder (phase conversion means, second phase conversion means)
30 accumulator (phase calculation means, second phase calculation means)
30a register 30b adder 31 wrap circuit (phase signal conversion means)
32 COS_ROM (phase signal conversion means)
33 SIN_ROM (phase signal conversion means)

Claims (4)

First sampling frequency conversion means for converting the sampling frequency of the input modulation signal;
Modulation signal conversion means for converting the signal output from the first sampling frequency conversion means into phase information and amplitude information in a polar coordinate format;
The phase data corresponding to the conversion frequency of the desired respective first and second phase calculation means for cumulative addition,
First phase conversion means for adding and subtracting the output signal of the first phase calculation means to the output signal of the modulation signal conversion means;
Second sampling frequency conversion means for converting the sampling frequency of the phase information output by the first phase conversion means ;
A second phase converting means for outputting signals with subtraction output of the second phase calculation means to an output signal of said second sampling frequency converting means,
Phase modulation signal generation means for generating a phase modulation signal based on the phase information output by the second phase conversion means,
A digital frequency converter that outputs the amplitude information and the phase modulation signal. Modulation signal conversion means for converting the input modulation signal into phase information and amplitude information in a polar coordinate format;
First phase calculation means for accumulating the lower Q digits (where Q is a positive integer) of phase data of P digits (where P is a positive integer) according to a desired conversion frequency;
Second phase calculation means for accumulating upper (PQ) digit phase data of the P digit phase data corresponding to a desired conversion frequency;
Phase information when the modulation signal is subjected to frequency conversion based on the lower-order Q-digit phase data by adding / subtracting the output signal of the first phase calculation unit to / from the phase information output by the modulation signal conversion unit First phase conversion means for generating
Sampling frequency conversion means for converting the sampling frequency of the phase information output by the first phase conversion means;
The phase information when the modulation signal is subjected to frequency conversion based on the P-digit phase data by adding / subtracting the output signal of the second phase calculation means to the phase information output by the sampling frequency conversion means. Second phase conversion means to generate;
Phase modulation signal generation means for generating a phase modulation signal based on the phase information output by the second phase conversion means,
A digital frequency converter that outputs the amplitude information and the phase modulation signal. Claim 2 wherein the second phase conversion means, the upper (P-Q) digit signal of the output signal of the sampling frequency converting means, characterized by subtracting the output signal of the second phase calculation means A digital frequency converter as described in 1. Input sampling frequency conversion means for converting the sampling frequency of the input modulation signal;
4. The digital frequency converter according to claim 2 , wherein the modulation signal is converted into phase information and amplitude information in a polar coordinate format after converting the sampling frequency of the modulation signal. 5.

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