JP4433904B2 - Balun filter - Google Patents

Description

The present invention relates to a balun filter. For more information, in which the low-pass filter consisting of a stack-type inductor and the wavelength shortening capacitor, provided between the unbalanced terminal and the unbalanced transmission line balun filter.

  With the spread of telephone systems such as mobile phones and wireless LAN (local area network) systems, such as communication systems that use microwave and millimeter wave high frequency radio waves as carriers, it is easy to use in various places such as home and outdoors. In addition, various data can be transmitted and received without using a relay device or the like.

  In an apparatus used in such a communication system, as shown in FIG. 15, an integrated circuit for high-frequency signal processing for processing a signal obtained by receiving high-frequency radio waves, generating a signal to be transmitted as high-frequency radio waves, and the like. 80 (hereinafter referred to as “RFIC”) is provided. A balun 90, a band pass filter (BPF) 95, and the like are provided between the input / output terminal 85 connected to the antenna and the RFIC 80. The balun 90 performs balanced / unbalanced conversion. A differential amplifier 80a of the RFIC 80 is connected to the balanced side of the balun 90, and a band-pass filter 95 is connected to the unbalanced side.

  The balun 90 is shown in Patent Document 1, for example. FIG. 16 shows an equivalent circuit of a conventional balun, and a coupled line is constituted by one microstrip line 90ubl and two microstrip lines 90bl-a and 90bl-b parallel to the microstrip line 90ubl. One end of the microstrip line 90ubl is connected to the unbalanced terminal TP1, and the other end is opened. At this time, the microstrip line 90ubl becomes an open stub. Further, in the microstrip lines 90bl-a and 90bl-b, the end part located on the end part side of the microstrip line 90ubl is grounded, and the end part located on the center side of the microstrip line 90ubl is the balanced side terminal TP2, Connected with TP3. At this time, the microstrip lines 90bl-a and 90bl-b are short stubs. Since the microstrip line 90ubl and the microstrip lines 90bl-a and 90bl-b are wired in parallel to each other, the combination of the microstrip line 90ubl and the microstrip line 90bl-a, and the microstrip line 90ubl and the microstrip line 90bl-b Each combination becomes a resonator. Here, when the wavelength with respect to the center frequency of the operation band of the balun 90 is λ, the line length of the microstrip line 90ubl is λ / 2 and the microstrip lines 90bl-a, 90bl so that resonance occurs at the center frequency of the operation band. The line length of -b is set to λ / 4.

  In the balun 90 configured as described above, when a signal is input to the microstrip line 90ubl, for example, the phase of the signal output from the microstrip line 90bl-a is advanced by 90 degrees and output from the microstrip line 90bl-b. The signal phase is delayed by 90 degrees. That is, the phase difference between the output of the microstrip line 90bl-a and the output of the microstrip line 90bl-b is 180 degrees, and a balanced output can be obtained.

JP 2002-232215 A

  By the way, the conventional balun is difficult to miniaturize because the line length of the microstrip line 90ubl must be set to λ / 2 and the line lengths of the microstrip lines 90bl-a and 90bl-b must be set to λ / 4. Further, as described above, a band-pass filter is required, and a matching circuit is also required when impedances are different. Therefore, the communication system cannot be easily downsized.

  Accordingly, the present invention provides a balun filter that can contribute to downsizing of a communication system at low cost.

The balun filter according to the present invention is provided on the first conductor layer, connected to the unbalanced terminal at one end and grounded at the other end, and to the first conductor layer. The first conductor layer is provided on the second conductor layer via the first dielectric layer, and is provided in parallel with the unbalanced transmission line. One end is grounded and the other end is connected to the first balanced terminal. A balanced transmission line, a second conductor layer, and provided in parallel with the unbalanced transmission line, one end of which is grounded and the other end is connected to the second balanced terminal. a balanced-side transmission line, and a low-pass filter consisting of a stack-type inductor and the wavelength shortening capacitor constituted by the inductor pattern spiral shape provided between the unbalanced terminal and the unbalanced-side transmission line, spiral The inductor pattern of the shape is centered on the reference line When the central radius of the semicircular shape above the reference line is Ra (n), the radius of the innermost peripheral pattern is Rin, the pattern width is WL, the pattern interval is SP, and the natural number is n, Ra (n ) = Rin + (WL + SP) × (n−1), and Rb (n) = Rin + (WL + SP) / 2 × n where Rb (n) is the center radius of the semicircular shape below the reference line It is set by .

  In the present invention, for example, a stack type inductor whose inductance is set so that impedance is matched with a circuit connected to the unbalanced terminal, and a line of the unbalanced transmission line set according to the center frequency of the passband. A low-pass filter is configured using a wavelength shortening capacitor provided to shorten the length, and is provided between the unbalanced terminal and the unbalanced transmission line. A stack type inductor has a spiral-shaped inductor pattern formed in a conductor layer, and an inductor pattern formed in another conductor layer so that the direction of the spiral is opposite to the inductor pattern and is superimposed on the inductor pattern. Are connected so that the directions of the flowing currents are equal.

According to the present invention, since the low-pass filter including the stack type inductor and the wavelength shortening capacitor is provided between the unbalanced side terminal and the unbalanced side transmission line, the filter characteristics of the balun filter can be made steep.

Further, stacked inductor, one end of the stacked inductor wherein connected to the unbalanced terminal is the other end of the stack type inductor is connected to the unbalanced-side transmission line. Because the circuit and the impedance connected to the unbalanced-side terminal is Ru is set inductance to match, it is not necessary to provide a matching circuit for matching the impedance, can be miniaturized devices.

Further, the stack-type inductor, and the inductor pattern spiral shape formed on the conductor layer, is formed on the other conductor layer as the inductor pattern and the spiral direction is superimposed on and the inductor pattern symmetrical opposite The inductor pattern is connected so that the direction of the flowing current is equal. For this reason, the coupling between the inductor patterns becomes strong, and the inductance can be increased without increasing the substrate occupation area of the inductor. For this reason , it can prevent that a balun filter will become large.

Furthermore, since the wavelength shortening capacitor provided for shortening the line length of the unbalanced transmission line is used for the low-pass filter , it is not necessary to provide a capacitor separately.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 shows a part of the configuration of a device using a balun filter 10 of the present invention. A balun filter 10 in which a filter function and the like are mixed in an unbalanced balance conversion function is connected to an RFIC 80 and, for example, an antenna. It is provided between the input / output terminal 85.

  FIG. 2 is an equivalent circuit of a resonator filter using electromagnetic coupling. In the resonator filter 50, the resonance electrode PRa having one end connected to the terminal TPa and the other end grounded, and the resonance having one end connected to the terminal TPb and the other end grounded. The electrode PRb is provided in parallel. The line length of the resonant electrodes PRa and PRb is λ / 4 where λ is the wavelength at the center frequency of the pass band. The resonant electrodes PRa and PRb are configured using distributed constant lines, that is, microstrip lines and strip lines.

  When the resonator filter 50 is configured in this way, when the frequency of the signal input to the resonance electrode PRa becomes the center frequency of the pass band, a signal having the center frequency is output from the resonance electrode PRb by the electromagnetic coupling M. That is, the resonator filter 50 operates as a band pass filter. If the wavelength shortening capacitor Ca is provided between the terminal TPa and the ground, and the wavelength shortening capacitor Cb having the same capacitance as the capacitor Ca is provided between the terminal TPb and the ground, the resonance electrodes PRa and PRb are provided. Even if the length is shorter than λ / 4, the signal of the center frequency can be passed.

  FIG. 3 is a diagram for explaining a derivation process of the balun filter. Consider the balun unbalanced transmission line PRubl and balanced transmission line PRbl-a as shown in FIG. 3A. The unbalanced transmission line PRubl, the balanced transmission line PRbl-a, and the balanced transmission line PRbl-b described later are distributed constant lines, that is, microstrip lines and strip lines.

  One end of the unbalanced transmission line PRubl is connected to the unbalanced terminal TP1, and the other end of the unbalanced transmission line PRubl is grounded. The balanced transmission line PRbl-a wired in parallel to the unbalanced transmission line PRubl is grounded at one end and connected to the balanced terminal TP2 at the other end. For example, the end of the unbalanced transmission line PRubl connected to the unbalanced terminal TP1 is grounded, and the center side of the unbalanced transmission line PRubl is connected to the balanced terminal TP2.

  Here, as shown in FIG. 3B, when a capacitor C1 is provided between the unbalanced terminal TP1 and the ground, and a capacitor C2 is provided between the balanced terminal TP2 and the ground, the equivalent circuit at this time is shown in FIG. It becomes equal to the equivalent circuit of the filter 50, and a band pass filter can be configured. The capacitors C1 and C2 correspond to the wavelength shortening capacitors, and when the line length of the balanced transmission line PRbl-a is, for example, 1/2 times that of the unbalanced transmission line PRubl, the capacitor C2 is static. Let the capacitance be twice the capacitance of the capacitor C1.

  Next, as shown in FIG. 3C, consider the unbalanced transmission line PRubl and the balanced transmission line PRbl-b. The balanced transmission line PRbl-b wired in parallel to the unbalanced transmission line PRubl has one end grounded and the other end connected to the balanced terminal TP2. For example, the grounded end side of the unbalanced transmission line PRubl is grounded, and the center side of the unbalanced transmission line PRubl is connected to the balanced terminal TP3.

  Also in this case, as shown in FIG. 3D, if a capacitor C1 is provided between the unbalanced terminal TP1 and the ground, and a capacitor C3 is provided between the balanced terminal TP3 and the ground, the equivalent circuit becomes equal to the equivalent circuit of the bandpass filter. A band pass filter can be constructed. The capacitors C1 and C3 correspond to the wavelength shortening capacitors, and when the line length of the balanced transmission line PRbl-b is, for example, 1/2 times that of the unbalanced transmission line PRubl, the capacitor C3 is static. The electric capacity is twice that of the capacitor C1.

  3B and 3D are combined into the equivalent circuit shown in FIG. 3E, and the capacitors C2 and C3 provided between the balanced terminals TP2 and TP3 and the ground are connected to the balanced terminal TP2 and the balanced terminal TP3 as shown in FIG. 3F. It can be replaced by a capacitor C23 provided therebetween. The capacitance of the capacitor C23 is ½ times the capacitance of the capacitor C2 or the capacitor C3. By configuring the balun filter in this way, the balanced output in which the band pass filter processing is performed between the balanced side terminals TP2 and TP3, or the unbalanced in which the band pass filter processing is performed between the unbalanced side terminal TP1 and the ground. Output can be obtained.

  Further, as in the equivalent circuit shown in FIG. 4, impedance conversion is performed without providing a matching circuit by adding inductors L1, L2, and L3 between the terminal and the resonance electrode to widen the impedance conversion rate. Can do. Here, the inductors L1, L2, and L3 are stacked inductors in which spiral-shaped inductor patterns are stacked so that a large inductance can be obtained even if the inductors are reduced in size. As described above, by using the stack type inductor, the inductance can be increased without increasing the number of spiral turns on one surface, so that the area occupied by the substrate of the inductor is not increased, and the inductor can be downsized. Further, an inductor L4 is provided between the unbalanced terminal TP1 and the capacitor C1, and the low-pass filter 101 is constituted by the inductors L1, L4 and the capacitor C1, and the notch frequency is set in the stop band of the bandpass filter. That is, if the notch frequency is set to be slightly higher than the pass band of the band pass filter, the filter characteristics of the balun filter can be made steep. The configuration of the low-pass filter 101 shown in the equivalent circuit of FIG. 4 shows a case where the unbalanced side terminal TP1 is used as a signal output terminal, and the circuit configuration of the low-pass filter 101 is that shown in FIG. It is not limited to.

  5 is a plan view of the balun filter 10 of the equivalent circuit shown in FIG. 4, FIG. 6 is a schematic cross-sectional view at the position AA ′ in FIG. 5, and FIG. 7 is a schematic cross-sectional view at the position BB ′ in FIG. FIG. 8 is an exploded perspective view of the balun filter 10.

  A first conductor layer 11 as a ground conductor layer is formed on the back surface side of the first dielectric layer (insulating layer) 12, and a second conductor layer 13 is formed on the front surface side. Further, the first dielectric layer 12 is provided with a conductor layer connecting portion (hereinafter simply referred to as “via”) 121 such as a via hole or a through hole, and the first conductor layer is formed by the via 121. 11 and the second conductor layer 13 are electrically connected.

  A third dielectric layer 15 is formed on the second conductor layer 13, and a third conductor layer 16 is formed on the third dielectric layer 15. The third conductor layer 16 includes a ground pattern 161 and a connection pattern 162. The third dielectric layer 15 is provided with a via 151, and the ground pattern 161 of the second conductor layer 13 and the third conductor layer 16 is electrically connected by the via 151.

  On the third conductor layer 16, a fifth dielectric layer 18 for forming a flattened surface used as a buildup forming surface is formed. A dielectric is formed on the fifth dielectric layer 18 on the capacitor electrode 189-c1 of the capacitor C1, the capacitor electrode 189-c23 of the capacitor C23, and the capacitor electrodes 189-c1, 189-c23, and then the fourth conductor layer. 19 is formed.

  The fourth conductor layer 19 includes ground patterns 191, 196, a line pattern 192a that becomes the balanced transmission line PRbl-a, a line pattern 192b that becomes the balanced transmission line PRbl-b, an inductor pattern 193-L1, which constitutes the inductor L1, Inductor pattern 193-L2 constituting inductor L2, inductor pattern 193-L3 constituting inductor L3, inductor pattern 193-L4 constituting inductor L4, connection patterns 194-a and 194-b, capacitor electrode 195- of capacitor C1 c1 and a capacitor electrode 195-c23 of the capacitor C23. The line patterns 192a and 192b and the inductor patterns 193-L1, 193-L2, 193-L3, and 193-L4 have a spiral shape. The ground pattern 191 is formed so that a part of the ground pattern 191 is connected to the capacitor electrode 189-c1 of the capacitor C1.

  The fifth dielectric layer 18 is provided with vias 181 to 186 for electrically connecting the third conductor layer 16 and the fourth conductor layer 19. The via 181 connects the ground patterns 191 and 196 of the fourth conductor layer 19 and the ground pattern 161 of the third conductor layer 16. The via 182 connects the spiral outer peripheral end of the inductor pattern 193 -L 1 and the connection pattern 162 of the third conductor layer 16. The connection pattern 162 is connected to the connection pattern 194a through the via 183. The via 184 connects the spiral inner peripheral end of the line pattern 192 a of the fourth conductor layer 19 and the ground pattern 161 of the third conductor layer 16. The via 185 connects the spiral inner peripheral end of the line pattern 192 b of the fourth conductor layer 19 and the ground pattern 161 of the third conductor layer 16. The via 186 connects the connection pattern 194 b of the fourth conductor layer 19 and the ground pattern 161 of the third conductor layer 16.

  A fifth conductor layer 22 is formed on the fourth conductor layer 19 via a sixth dielectric layer 20. The fifth conductor layer 22 includes ground patterns 221 and 226, a line pattern 222 that becomes the unbalanced transmission line PRubl, an inductor pattern 223-L1 that constitutes the inductor L1 and the unbalanced terminal TP1, and an inductor pattern 193 that constitutes the inductor L2. -L2, inductor pattern 223-L3 constituting inductor L3, inductor pattern 223-L4 constituting inductor L4, pattern 224a serving as balanced side terminal TP2, and pattern 224b serving as balanced side terminal TP3.

  The sixth dielectric layer 20 is provided with vias 201 to 214 for electrically connecting the fourth conductor layer 19 and the fifth conductor layer 22. The via 201 connects the ground patterns 191 and 196 of the fourth conductor layer 19 and the ground patterns 221 and 226 of the fifth conductor layer 22. The via 202 connects the spiral outer peripheral end of the inductor pattern 193-L4 and the unbalanced side terminal TP1 side of the inductor pattern 223-L1. The via 203 connects the spiral inner peripheral end of the inductor pattern 193-L4 and the spiral inner peripheral end of the inductor pattern 223-L4. The via 204 connects the capacitor electrode 195-c1 and the spiral outer peripheral end of the inductor pattern 223-L4. The via 205 connects the inner spiral end of the inductor pattern 193-L1 and the inner spiral end of the inductor pattern 223-L1. The via 206 connects the end of the connection pattern 194a and the line pattern 222 on the unbalanced terminal TP1 side. At this time, the end of the line pattern 222 on the unbalanced side terminal TP1 side is connected to the inductor L1 via the connection pattern 194a and the connection pattern 162. The via 207 connects the spiral outer peripheral end of the line pattern 192a and the spiral outer peripheral end of the inductor pattern 223-L2. The via 208 connects the spiral inner peripheral end of the inductor pattern 193-L2 and the spiral inner peripheral end of the inductor pattern 223-L2. The via 209 connects the outer peripheral end of the inductor pattern 193-L2 and the pattern 224a. The via 210 connects the connection pattern 194 b and the end of the line pattern 222 on the ground side. At this time, the end on the ground side in the line pattern 222 is connected to the ground pattern 161 via the connection pattern 194a. The via 211 connects the spiral outer peripheral end of the line pattern 192b and the spiral outer peripheral end of the inductor pattern 223-L3. The via 212 connects the inner spiral end of the inductor pattern 193-L3 and the inner spiral end of the inductor pattern 223-L3. The via 213 connects the spiral outer peripheral end of the inductor pattern 193-L3 and the pattern 224b. The via 214 connects the capacitor electrode 195-c23 and the pattern 224b.

  In the third conductor layer 16, a region where the resonator is formed by the line pattern 222 and the line patterns 192a, 192b, a region where the inductors L1, L2, L3, L4 are formed, and a region where the capacitors C1, C23 are formed. The region corresponding to is a slot and the fourth dielectric layer 17 is provided. Further, also in the second conductor layer 13, a region where the resonator is formed by the line pattern 222 and the line patterns 192a, 192b, a region where the inductors L1, L2, L3, L4 are formed, and capacitors C1, C23 are formed. The region corresponding to the region is formed as a slot, and the second dielectric layer 14 is provided. By providing the slot in this way, no other conductor layer is provided between the pattern for configuring the resonator and the inductor and the first conductor layer 11, and therefore the resonator and the inductor are formed by the other conductor layer. The balun filter 10 having desired characteristics can be formed without being affected.

Here, the stack type inductor constituted by the inductor patterns provided in the fourth conductor layer 19 and the fifth conductor layer 22 forms a spiral-shaped inductor pattern so that electromagnetic field coupling is strengthened. FIG. 9 shows an example of a spiral inductor pattern forming method. In the upper region Ua with respect to the reference line SP L ref, a semicircular pattern is formed around the position CTA on the reference line SPLref . Further, in the lower region Ub with respect to the reference line SPLref , a semicircular pattern connected to the upper inductor pattern is formed around the position CTB offset from the position CTA in the direction of the reference line SPLref . Specifically, when the pattern width WL, the pattern interval SP, and the radius of the innermost peripheral pattern are Rin, the center radius Ra (n) obtained from the equation (1) with the position CTA as the center above the reference line SPLref. A semicircular pattern is provided. Note that n is a natural number.
Ra (n) = Rin + (WL + SP) × (n−1) (1)

On the lower side of the reference line, a semicircular pattern having a center radius obtained from Expression (2) is provided with the position CTB offset by (WL + SP) / 2 from the position CTA as the center.
Rb (n) = Rin + (WL + SP) / 2 × n (2)

In this manner, a spiral inductor pattern can be formed by connecting the upper semicircular pattern and the lower semicircular pattern.

  FIG. 10 shows a planar type inductor and a stack type inductor. As shown in FIGS. 10A and 10B, the planar inductor is formed by forming a spiral inductor pattern PLb on a linear lead pattern PLa via a dielectric layer (not shown), and The end portion is connected to the end portion on the spiral inner peripheral side of the inductor pattern PLb. Here, since the current flowing in the lead pattern PLa and the current flowing in the spiral inductor pattern PLb are orthogonal as shown in FIG. 10C, the influence on the magnetic field is small. However, since the lead pattern PLa and the inductor pattern PLb intersect, there is a parasitic capacitance between the patterns, and the inductor characteristics are affected by this parasitic capacitance.

  On the other hand, as shown in FIGS. 10D and 10E, the stack type inductor has a spiral-shaped inductor pattern PLc formed in one conductor layer, and this inductor pattern PLc is symmetrical with the spiral direction reversed. A spiral inductor pattern PLd is formed on another conductor layer so as to be superimposed on PLc via a dielectric layer (not shown), and connected so that the directions of flowing currents are equal. For example, an inductor pattern PLc extending in the clockwise direction from the center of the spiral and an inductor pattern PLd extending in the counterclockwise direction symmetrical to the inductor pattern PLc are superposed via a dielectric layer, so that The ends are connected. At this time, since the current flowing through the inductor pattern PLc and the current flowing through the inductor pattern PLd are in the same direction as shown in FIG. 10F, the magnetic field is strengthened and the inductance can be increased compared to the planar type inductor. Furthermore, a difference of [(n−1) +0.5] turns is provided in the number of spiral turns of the inductor pattern PLc and the inductor pattern PLd. At this time, since signal input / output is performed at positions on the outermost peripheral side of the spiral inductor pattern and in opposite directions, the lead pattern intersects with the inductor pattern or the lead patterns are parallel to each other. Therefore, the influence of the inductor characteristics due to the parasitic capacitance between patterns can be reduced.

  Next, the generation procedure of the balun filter 10 will be described. The balun filter 10 uses a so-called printed wiring board as a base board. For example, a printed wiring board in which a conductor layer is provided on both surfaces of a dielectric (insulating) substrate is used as the base substrate.

  One conductor layer of the base substrate is a first conductor layer 11, and the other conductor layer is a second conductor layer 13. The first conductor layer 11 and the second conductor layer 13 are electrically connected by, for example, a via 121 provided in the first dielectric layer 12. In the via 121, a hole penetrating the first dielectric layer 12 is formed in a part of the first dielectric layer 12 by drilling, laser processing, plasma etching processing, or the like. A conductive film made of copper can be formed in the hole thus formed by via plating, for example, electrolytic plating using a copper sulfate solution.

  The first dielectric layer 12 is preferably formed of a material with low dielectric loss (low tan δ), that is, a material excellent in high frequency characteristics. Examples of such materials include polyphenylethylene (PPE), bismaleidotriazine (BT-resin), polytetrafluoroethylene, polyimide, liquid crystal polymer (LCP), polynorbornene (PNB), and other organic materials, ceramics, or Examples thereof include a mixed material of ceramic and organic material. The first dielectric layer 12 is preferably formed of a material having heat resistance and chemical resistance in addition to the above-described materials, and an inexpensive epoxy substrate is used as a dielectric substrate made of such a material. FR-5 etc. can be mentioned. In this way, by using an inexpensive organic material as the first dielectric layer 12, the cost can be reduced compared to the case where a relatively expensive Si substrate or glass substrate is used. ing.

  Slots are formed in the second conductor layer 13. For example, the conductor in the slot portion is removed using an etching method. On the second conductor layer 13 in which the slot is formed, an insulating film using an insulating material having a high dielectric constant, for example, an epoxy resin is formed. After the insulating film is formed, the insulating film formed on the second conductor layer 13 is polished until the second conductor layer 13 is exposed. Thereby, the second dielectric layer 14 can be formed in the slot region, and the step between the second conductor layer 13 and the second dielectric layer 14 is eliminated. A third dielectric layer 15 and a third conductor layer 16 are formed on the second conductor layer 13 and the second dielectric layer 14.

  The third dielectric layer 15 and the third conductor layer 16 are made of, for example, RCC (Resin Coated Copper), and a ground pattern 161 and a connection pattern 162 are formed on the third conductor layer 16. A via 151 is provided in the third dielectric layer 15 to connect the ground pattern 161 of the third conductor layer 16 to the second conductor layer 13.

On the third conductor layer 16, an insulating film using an insulating material having a high dielectric constant, for example, an epoxy resin is formed. After the insulating film is formed, an insulating film formed on the third conductive layer 1 6 is polished until the third conductive layer 1 6 is exposed. Thereby, the fourth dielectric layer 17 can be formed in the slot region, and the step between the third conductor layer 16 and the fourth dielectric layer 17 is eliminated. A fifth dielectric layer 18 is formed on the third conductor layer 16 and the fourth dielectric layer 17 to form a planarized surface used as a buildup formation surface.

  The fifth dielectric layer 18 is preferably formed of a material having a low dielectric loss (low tan δ), that is, an organic material having excellent high frequency characteristics, and is formed of an organic material having heat resistance and chemical resistance. It is preferable. Examples of such an organic material include benzocyclbutene (BCB), polyimide, polynorbornene (PNB), liquid crystal polymer (LCP), epoxy resin, and acrylic resin. The fifth dielectric layer 18 is made of such an organic material using a method excellent in coating uniformity and film thickness control, such as a spin coat method, a curtain coat method, a roll coat method, or a dip coat method. It can be formed with high accuracy on the build-up forming surface.

Capacitors C 1 and C 23 are formed on the fifth dielectric layer 18. As the capacitors C1 and C23, for example, tantalum oxide capacitors using tantalum oxide (Ta ₂ O ₅ ) as a dielectric are used. In the tantalum oxide capacitor, a tantalum nitride (TaN) film is formed on capacitor electrodes 189-c1 and 189-c23 which are one electrode. The tantalum nitride film can be formed by CVD (Chemical Vapor Deposition), sputtering, or vapor deposition. The surface layer portion of the tantalum nitride film is anodized to form a tantalum oxide (Ta ₂ O ₅ ) film that is a high dielectric constant and low loss high dielectric material.

  Further, the fourth conductor layer 19 is formed by a thin film forming technique or a thick film forming technique used in the semiconductor process. The fourth conductor layer 19 is formed by forming a conductive film made of, for example, nickel or copper on the fifth dielectric layer 18 over the entire surface, and then forming a pattern using a photolithography technique or the like. For example, a conductive film made of copper of about several μm is formed by electrolytic plating using a copper sulfate solution. Thereafter, each pattern of the fourth conductor layer 19 is formed by etching the conductive film using a photoresist patterned in a predetermined shape as a mask. At this time, the capacitor electrode of the capacitor C1 is connected to the ground pattern 191, and the capacitor electrode of the capacitor C23 is connected to the inductor pattern 193-L2. Further, a capacitor electrode 195-c1 is formed on the tantalum oxide film of the capacitor C1, and a capacitor electrode 195-c23 is formed on the tantalum oxide film of the capacitor C23.

  Similar to the fifth dielectric layer 18, the sixth dielectric layer 20 is configured using the organic material described above. The fifth conductor layer 22 is formed with a conductive film over the entire surface in the same manner as the fourth conductor layer 19, and then each pattern of the fifth conductor layer 22 is formed using a photolithography technique or the like. Further, vias 181 to 186 are provided in the fifth dielectric layer 18 to connect the pattern of the third conductor layer 16 and the pattern of the fourth conductor layer 19. Further, vias 201 to 214 are provided in the sixth dielectric layer 20 to connect the pattern of the fourth conductor layer 19 and the pattern of the fifth conductor layer 22.

  Thus, by providing the low-pass filter 101 on the open end side of the unbalanced transmission line, the filter characteristics can be made steep. Further, as the low-pass filter 101 and the inductor provided for impedance conversion, the balun filter can be reduced in size by using a stack type inductor in which spiral-shaped inductor patterns are laminated. Further, since the wavelength shortening capacitor provided for shortening the line length of the unbalanced transmission line and the balanced transmission line is used as the capacitor of the low-pass filter 101, it is not necessary to provide a separate capacitor, and the balun It is possible to prevent the filter from becoming large.

  The first conductor layer 11, the second conductor layer 13, and the third conductor layer 16 of the balun filter 10 have a layer thickness of 10 to 20 μm, and the fourth conductor layer 19 and the fifth conductor layer 22 have a layer thickness of 1 to 10 μm. The first dielectric layer 12 has a relative dielectric constant of 3.1, a layer thickness of 200 μm, the second dielectric layer 14 has a relative dielectric constant of 3.8, a layer thickness of 10 to 20 μm, and the third dielectric layer 15 has a relative dielectric constant of 2. 8, layer thickness 60 μm, the fourth dielectric layer 17 has a relative dielectric constant of 3.8, layer thickness 10-20 μm, the fifth dielectric layer 18 has a relative dielectric constant 2.6, layer thickness 10-20 μm, sixth dielectric The layer 20 has a relative dielectric constant of 2.6 and a layer thickness of 10 to 20 μm. In order to protect the multilayer substrate, a resist layer having a layer thickness of 20 μm and a relative dielectric constant of 4.3 is provided on both surfaces of the multilayer substrate.

  Here, the spiral-shaped inductor pattern has a center radius Rin = 120 μm, a pattern width WL = 30 μm, a pattern interval SP = 30 μm, and a slot diameter SL = 100 μm at a portion where the spiral-shaped inductor pattern is provided. The number of spiral turns is 3.5. In this case, the inductance of the planar type inductor has a characteristic indicated by a broken line in FIG. 11 and is about 2.8 nH at 1 GHz. Further, the stack type inductor having two layers (the number of spiral turns in the lower layer is 3) has the characteristics shown by the solid line in FIG. 11 and is about 7.1 nH at 1 GHz. That is, the inductance can be increased 2.5 times without increasing the substrate occupation area of the inductor. The Q value of the planar inductor is the characteristic indicated by the broken line in FIG. 12, and the Q value of the stacked inductor is the characteristic indicated by the solid line in FIG. 12. The Q value of 1 GHz is substantially the same value for the planar inductor and the stacked type. It was.

  Next, an embodiment of a balun filter using a stack type inductor will be described. Two stack type inductors L1 and L4 are connected from the unbalanced side terminal TP1 to a wiring having a 50Ω line and a line width of about 40 μm. The inductor L1, L4 and the inductor pattern of the inductors L2, L3 have a wiring width of about 20 μm and a spacing of about 20 μm. The inductor L1 is connected to the resonance electrode, and the inductor L4 is connected to the capacitor C1 of 0.5 to 100 pF. The line widths of the line patterns 192a, 192b, and 222 serving as resonant electrodes are about 40 μm and the interval is about 10 μm.

  Here, the capacitances of the capacitors C1 and C23 and the electrode length of the resonance electrode are adjusted so that the center frequency of the bandpass filter is about 0.6 GHz. Further, the inductors L2 and L3 are set so that impedance matching with the balanced line connected to the balanced side terminals TP2 and TP3 is achieved. Further, a low-pass filter is constituted by the inductors L1, L4 and the capacitor C1, and the notch frequency is set to about 0.9 GHz. The filter characteristic at this time is the characteristic indicated by the solid line in FIG. For this reason, the blocking characteristic can be made steeper than the filter characteristic indicated by the broken line when no low-pass filter is provided.

  As described above, the balun filter according to the present invention is useful when performing unbalanced / balanced conversion on a high-frequency signal having a desired frequency, and is applied to miniaturization of equipment using the high-frequency signal.

It is a figure which shows a part of structure of the apparatus using a balun filter. It is a figure which shows the equivalent circuit of a resonator filter. It is a figure which shows the derivation | leading-out process of a balun filter. It is a figure which shows the equivalent circuit of the balun filter of this invention. It is a top view which shows schematic structure of a balun filter. It is the cross-sectional schematic of A-A 'position. It is a cross-sectional schematic diagram of a B-B 'position. It is a disassembled perspective view of a balun filter. It is a figure for demonstrating the spiral-shaped inductor pattern formation method. It is a figure which shows a planar type | mold inductor and a stack type | mold inductor. It is a figure which shows the inductance value of a stack type inductor. It is a figure which shows Q value of a stack type inductor. It is a figure which shows the filter characteristic of an Example. It is a figure which shows a part of structure of the apparatus used with a communication system. It is a figure which shows the equivalent circuit of the conventional balun.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Balun filter, 11 ... 1st conductor layer, 12 ... 1st dielectric layer, 13 ... 2nd conductor layer, 14 ... 2nd dielectric layer, 15 ... 1st 3 dielectric layers, 16 ... third conductor layer, 17 ... fourth dielectric layer, 18 ... fifth dielectric layer, 19 ... fourth conductor layer, 20 ... sixth dielectric Body layer, 22 ... fifth conductor layer, 50 ... resonator filter, 80 ... RFIC, 80a ... differential amplifier, 85 ... input / output terminal, 90 ... balun, 90bl- a, 90bl-b, 90ubl ... microstrip line, 95 ... band pass filter, 101 ... low pass filter, 121, 151, 181-186, 201-214 ... via, 161, 191, 196, 221 ... ground pattern, 162, 194a, 194b ... connection pattern, 189-c1, 189-c 23,195-c1,195-c23... Capacitor electrode, 192a, 192b, 222... Line pattern, 193-L1, 193-L2, 193-L3, 223-L1, 223-L2, 223-L3,. ..Inductor patterns

Claims (4)

An unbalanced transmission line provided on the first conductor layer and having one end connected to the unbalanced terminal and the other end grounded;
The first conductor layer is provided on the second conductor layer via the first dielectric layer, and is provided in parallel with the unbalanced transmission line. One end is grounded and the other end is the first conductor layer. A first balanced transmission line connected to one balanced terminal;
A second balanced transmission line provided on the second conductor layer and provided in parallel with the unbalanced transmission line, one end grounded and the other end connected to a second balanced terminal; ,
A stack type inductor composed of a spiral-shaped inductor pattern provided between the unbalanced side terminal and the unbalanced side transmission line, and a low-pass filter comprising a wavelength shortening capacitor ;
The spiral-shaped inductor pattern is
Ra (n) is the center radius of the semicircular shape above the reference line and centered on the reference line.
Let Rin be the radius of the innermost pattern,
The pattern width is WL,
The pattern interval is SP,
When the natural number is n,
Ra (n) = Rin + (WL + SP) × (n−1)
Set in
When the center radius of the semicircular shape below the reference line is Rb (n),
Rb (n) = Rin + (WL + SP) / 2 × n
Balun filter set in . The stacked inductor is
The balun filter according to claim 1, wherein one end of the stacked inductor is connected to the unbalanced side terminal, and the other end of the stacked inductor is connected to the unbalanced transmission line. The stacked inductor is
A spiral-shaped inductor pattern formed on the first or second conductor layer, and the first or second conductor so that the direction of the inductor pattern and the spiral is opposite and symmetric and is superimposed on the inductor pattern The balun filter according to claim 1, wherein the inductor pattern formed in the layer is connected so that directions of flowing currents are equal.   The balun filter according to claim 1, wherein the wavelength shortening capacitor is provided between the first balanced side terminal and the second balanced side terminal.

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