JP4428801B2 - Signal processing apparatus and method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a signal processing apparatus and method, and more particularly to image signal synthesis processing.
[0002]
[Prior art]
Conventionally, a video camera integrated digital VTR (hereinafter referred to as a camcorder) is known as such a device.
[0003]
Some camcorders have a function of multiplexing a title image stored in a built-in memory with an image taken by a camera or an image reproduced from a tape.
[0004]
[Problems to be solved by the invention]
However, in general, most camcorders have a function of only synthesizing a title as a title synthesizing function, and do not have various title editing functions such as title scrolling, for example.
[0005]
In addition, the amount of information in the title image data is often compressed due to memory limitations, and the image is often not clear at the edge portion of the title.
[0006]
In order to synthesize the title clearly, it may be possible to reduce the compression rate of the title image data and increase the resolution. However, this increases the amount of information in the title image data and requires a large capacity memory. .
[0007]
In addition, a dedicated editing device is required to realize various synthesis functions such as scrolling.
[0008]
An object of the present invention is to solve the above-described problems.
[0009]
Another object of the present invention is to realize a variety of title editing functions without requiring a special device.
[0010]
Still another object of the present invention is to realize a high-definition title composition function.
[0011]
[Means for Solving the Problems]
The present invention provides a converting means for converting a binary image signal into a multi-value image signal, a combining means for combining an image signal related to the binary image signal and an input image signal, and the multi-value image signal using the multi-value image signal. Control means for controlling the composition operation of the composition means.
[0012]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the embodiment described below, a case where the present invention is applied to the above-described digital camcorder will be described.
[0013]
FIG. 1 is a diagram showing a configuration of a digital camcorder 100 to which the present invention is applied.
[0014]
First, the operation of each circuit in FIG. 1 will be described.
[0015]
In FIG. 1, an image pickup circuit 101 includes a known optical system, CCD, and the like, picks up a subject image, and outputs a digital image signal to the combining circuit 105. Reference numeral 103 denotes an image signal input / output circuit, which converts an image signal output from an external device into a digital signal having a predetermined form and outputs the digital signal to the combining circuit 105 and outputs the image signal output via the combining circuit 105 to a predetermined signal. Convert to form and output.
[0016]
As will be described later, the synthesis circuit 105 synthesizes the title image signal with the reproduced image signals from the imaging circuit 101, the image signal input / output circuit 103, and the signal processing circuit 109. Reference numeral 107 denotes a monitor that displays an image relating to an image signal output via the synthesis circuit 105. Reference numeral 109 denotes a signal processing circuit. During recording, the image signal output from the synthesis circuit 105 is subjected to high-efficiency encoding processing using well-known block encoding or the like to compress the amount of information and reproduce it. In some cases, the amount of information is expanded by performing a decoding process corresponding to the time of recording.
[0017]
Reference numeral 111 denotes a recording / reproducing circuit which records the image signal from the signal processing circuit 109 on the tape T by the rotary head, and reproduces the image signal from the tape T and outputs it to the signal processing circuit 109.
[0018]
Reference numeral 113 denotes a still image processing circuit. As will be described later, in the still image recording mode, the still image signal output via the synthesis circuit 105 is encoded and output to the still image recording / reproducing circuit 115. Decodes the still image signal output from the still image recording / reproducing circuit 115 and outputs it to the synthesis circuit 105. Further, the still image processing circuit 113 converts the binary title image signal output from the still image recording / reproducing circuit 115 into a multi-value signal according to the composite pattern from the control circuit 119 and outputs it to the memory 117.
[0019]
A still image recording / reproducing circuit 115 records a still image signal from the still image processing circuit 113 on the memory card M, and reads a still image signal and a title image signal recorded on the memory card M to read out the still image processing circuit. It outputs to 119. The memory card M has a semiconductor memory chip and can store several tens to several hundreds of still image signals and binary title image signals. The memory card M can be replaced as appropriate.
[0020]
Reference numeral 117 denotes a memory that stores the title image signal converted into the multi-value signal output from the still image processing circuit 113 and outputs the title image signal to the synthesis circuit 105 in accordance with the control signal from the control circuit 119.
[0021]
A control circuit 119 controls the synthesis circuit 105, the still image processing circuit 113, and the memory 117 according to an operation mode switching instruction, recording / playback instruction, title composition instruction, and the like from the operation switch 121.
[0022]
In the apparatus of FIG. 1, in the camera recording mode, the synthesis circuit 105 is controlled by the control circuit 119 and selects an image signal from the imaging circuit 101. At this time, when there is a title composition instruction from the control circuit 119, the composition circuit 105 performs title composition processing on the image signal from the imaging circuit 101 in accordance with the title image signal stored in the memory 117, and the monitor 107, the signal Output to the processing circuit 109. Thereafter, the signal processing circuit 109 and the recording / reproducing circuit 111 perform processing as described above to record an image signal on the tape T.
[0023]
In the case of the external recording mode, the synthesis circuit 105 selects the image signal from the image signal input / output circuit 103 according to the control signal from the control circuit 119. At this time, when there is a title composition instruction from the control circuit 119, the composition circuit 105 performs title composition processing on the image signal from the imaging circuit 101 in accordance with the title image signal stored in the memory 117, and the monitor 107, the signal Output to the processing circuit 109. Thereafter, the signal processing circuit 109 and the recording / reproducing circuit 111 perform processing as described above to record an image signal on the tape T.
[0024]
In the moving image reproduction mode, the recording / reproducing circuit 111 reproduces an image signal from the tape T and outputs it to the signal processing circuit 109. The signal processing circuit 109 decodes the reproduced image signal and outputs it to the synthesis circuit 105. The synthesis circuit 105 selects the image signal from the signal processing circuit 109 in accordance with the control signal from the control circuit 119. At this time, when there is a title composition instruction from the control circuit 119, the composition circuit 105 performs title composition processing on the image signal from the imaging circuit 101 in accordance with the title image signal stored in the memory 117, and the monitor 107, image The signal is output to the signal input / output circuit 103. The image signal input / output circuit 103 converts the reproduced image signal from the synthesis circuit 105 into a predetermined form and outputs it.
[0025]
Next, in the still image recording mode, the image signal output from the imaging circuit 101 is output to the monitor 107 through the synthesis circuit, and the captured image is displayed. The user confirms the image displayed on the monitor 107 and instructs the still image recording by the operation switch 121.
[0026]
The control circuit 119 controls the still image processing circuit 113 in response to a still image recording instruction from the operation switch 121, encodes one frame of image signal output from the synthesis circuit 105 at that time, and stores the still image recording / reproducing circuit 115. Output to. The still image recording / reproducing circuit 115 records one frame of the still image signal from the still image processing circuit 113 on the memory card M.
[0027]
In the still image reproduction mode, the still image recording / reproducing circuit 115 reproduces a still image signal from the memory card M and outputs it to the still image processing circuit 113. The still image processing circuit 113 decodes the reproduced still image signal and stores it in an internal memory (not shown). Then, in response to an instruction from the control circuit 119, the still image signal stored in the memory is repeatedly read and output to the synthesis circuit 105. When there is an instruction for title synthesis from the control circuit 119, the synthesis circuit 105 synthesizes the image signal related to the title image signal stored in the memory 117 and the reproduced still image signal, and the monitor 107, image signal input / output circuit To 103.
[0028]
As described above, in this embodiment, the title image can be synthesized by the synthesis circuit 105 in any of the camera recording mode, the external recording mode, the moving image reproduction mode, the still image recording mode, and the still image reproduction mode.
[0029]
Next, the title composition process will be described.
[0030]
FIG. 2 is a diagram showing a configuration of a main part of the still image processing circuit 113 shown in FIG.
[0031]
The still image processing circuit 113 includes a compression / decompression circuit 201 and a conversion circuit 203.
[0032]
As described above, the compression / decompression circuit 201 encodes the still image signal output from the synthesis circuit 105 and outputs the encoded still image signal to the still image recording / reproducing circuit 115, and the reproduced still image signal output from the still image recording / reproducing circuit 115. Decode and output to the synthesis circuit 105.
[0033]
The memory card M records a normal still image signal and a title image signal in which one pixel (one sample) is a 1-bit digital signal (hereinafter, binary signal). The still image recording / reproducing circuit 115 outputs the still image signal reproduced from the memory card M to the compression / decompression circuit 201 according to the attribute information added to the still image signal and the title image signal, and also outputs the title image signal to the conversion circuit 203. Output.
[0034]
The conversion circuit 203 converts the binary title image signal reproduced from the memory card M into a digital signal of 1 sample (1 pixel) and n bits (n is an integer of 2 or more) and outputs the digital signal to the memory 117. At this time, the conversion circuit 203 determines the value of each sample in one screen of the title image as described later according to the composite pattern from the control circuit 119, and assigns the image data having the determined value to each sample.
[0035]
Next, the synthesis circuit 105 will be described.
[0036]
FIG. 3 is a diagram showing the configuration of the synthesis circuit 105.
[0037]
In FIG. 3, image signals from the imaging circuit 101, the image signal input / output circuit 103, the signal processing circuit 109, and the still image processing circuit 113 are input to the selection circuit 301. The selection circuit 301 selects each image signal according to the mode information from the control circuit 119 and outputs it to the switch 305. A signal generation circuit 303 generates an image signal having predetermined luminance and color and outputs the image signal to the switch 305.
[0038]
The switch 305 selectively outputs the image signal from the selection circuit 301 and the image signal from the signal generation circuit 303 in accordance with the control signal from the determination circuit 311, so that the image image signal selected by the selection circuit 301 is output. Synthesize title image signal.
[0039]
The image signal output from the switch 305 is output to the switching circuit 307 and the monitor 107. The switching circuit 307 outputs the image signal from the switch 305 to the image signal input / output circuit 103, the signal processing circuit 109, and the still image processing circuit 113 according to the mode information.
[0040]
On the other hand, the multi-value title image signal stored in the memory 107 as described above is output to the determination circuit 311. The determination circuit 311 compares the value of the image data of each pixel (sample) read from the memory 107 with the value of the threshold data from the threshold setting circuit 309 when there is an instruction for composition processing from the control circuit 119. A control signal is generated and output to the switch 305. That is, the determination circuit 311 generates a control signal that becomes 1 (high level) when the value of the image data from the memory 117 is larger than the value of the threshold data. The switch 305 selects the image signal from the signal generation circuit 303 when the control signal from the determination circuit 311 is 1 (high level), and selects the image signal from the selection circuit 301 when the control signal is 0 (low level).
[0041]
The threshold setting circuit 309 determines the value of the threshold data according to the composite pattern information from the control circuit 119 and outputs it to the determination circuit 311.
[0042]
Next, the composition processing of this embodiment will be described using a specific title example.
[0043]
Now, consider a case where a binary title image signal as shown in FIG. 4 is read from the memory card M, and the title image signal is synthesized with a synthesis pattern that gradually disappears from the left side of the screen.
[0044]
In this case, first, the control circuit 119 outputs the composite pattern information to the still image processing circuit 113 in accordance with the composite pattern instruction from the operation switch 121. The still image processing circuit 113 converts the binary title image signal of FIG. 4 read from the memory card M into a multi-valued image signal as shown in FIG. 5 according to the synthesis pattern information from the control circuit circuit 119.
[0045]
In FIG. 5, the image data is converted into 4-bit image data having a value of 0 to 8 per pixel, and the title image is divided into a plurality of areas according to the composite pattern information, and the value of the image data is determined for each area. First, the value of each pixel is assigned to the title image portion, that is, the portion that is “1” in FIG. 4 so that the value gradually increases from the left side of the screen as shown in FIG. In addition, 0 is assigned as it is to a portion that is “0” in FIG. 4, that is, a portion other than the title image.
[0046]
The title image signal thus converted and written in the memory 107 is read from the memory 107 in synchronization with the output timing of the image signal from the selection circuit 301 and output to the determination circuit 311. As described above, the determination circuit 311 compares the value of the threshold data from the threshold setting circuit 309 with the value of the title image signal of each pixel read from the memory 107.
[0047]
At this time, for example, by setting the value of the threshold data to “0”, as shown in FIG. 6A, a control signal that becomes 1 in all parts of the title image in FIG. Will be. That is, when the value of the threshold data is 0, all the title images in FIG. 4 are combined with the image from the selection circuit 301.
[0048]
For example, when the value of the threshold data is “2”, a control signal that is 1 at a pixel portion having a value of 3 or more in FIG. 5 is output from the determination circuit 311. In other words, when the threshold data value is 2, as shown in FIG. 6B, the left part of the title image in FIG. 4 is combined with the image from the selection circuit 301. It will be.
[0049]
Hereinafter, similarly, by setting the value of the threshold data between 0 and 8, it is possible to change the synthesized portion of the title image data in FIG.
[0050]
The threshold setting circuit 309 increases the value of the threshold data from 0 to 8, for example, one frame at a time in accordance with the composite pattern information from the control circuit 119. By changing the value of the threshold data in this way, as shown in FIG. 6, the title image can be synthesized with a synthesis pattern in which the title image gradually disappears from the left side of the screen during the 8-frame period. it can. Further, by increasing the period for changing the value of the threshold data to 2 frames and 3 frames, the title image can be controlled to disappear in the 16 frame period and the 24 frame period, respectively. The user can also set this change period with the operation switch 121, and the threshold setting circuit 309 determines the timing for changing the value of the threshold data according to the change period set by the user.
[0051]
FIG. 7 shows how the title “birthday” is synthesized in the same manner as the synthesis pattern of FIG. Also in this case, by devising the value of each sample assigned in the conversion circuit 203, the title image can be synthesized with the same synthesis pattern as in the case shown in FIGS.
[0052]
As described above, according to the present embodiment, when the binary title image signal stored in the memory card M is combined with another image signal, the binary title image signal is converted into a multi-value image signal according to the combination pattern. Then, the multi-value image signal is compared with the threshold data, and the title image signal is switched and output according to the comparison result. Therefore, simply changing the value of the threshold data according to the composite pattern allows simple configuration. You can synthesize title images with various patterns.
[0053]
Further, since the title image signal to be synthesized is not compressed, a high-definition title image signal can be synthesized.
[0054]
Further, since the synthesis pattern of the title image is determined when the conversion circuit 203 converts the binary image signal into the multi-value image signal, one title image stored in the memory card M is converted into various synthesis patterns. Can be synthesized.
[0055]
For example, a composite pattern that changes in an oblique direction can be realized by assigning the value of each pixel of the multi-value image signal so that the value gradually increases from the lower left portion of the screen of the title image portion. Also, for example, by assigning the value of each pixel of the multi-value image signal so that the value gradually increases concentrically from the screen center portion of the title image portion, The pattern which goes to can be realized.
[0056]
For example, as shown in FIG. 8, when a title image “athletic meet” is synthesized in a pattern that gradually disappears from the top of the screen, a binary title image signal is converted into a multi-valued image signal in the conversion circuit 203. When converting to, the upper value of the title image portion is set to 1, and the value of each pixel may be assigned so as to gradually increase downward.
[0057]
Then, the threshold value setting circuit 309 can synthesize the title image with the pattern shown in FIG. 8 by increasing the value of the threshold data by 1 from 0 to 8 for each frame.
[0058]
4 to 6, the binary title image signal is converted into a 4-bit multi-value image signal, but the number of bits per pixel may be more than this. By increasing the number of bits per pixel, a memory having a larger capacity is required as the memory 107, but it is possible to realize a combined pattern in which the combined portion changes in a finer range. Further, in this case, the change period of the composite pattern can be arbitrarily set by appropriately setting the change amount of the threshold data instead of one.
[0059]
In this embodiment, when the value of the image signal from the memory 107 is larger in the determination circuit 311, the image signal from the signal generation circuit 303 is selected. Conversely, the value of the image signal from the memory 107 is selected. When the signal is smaller, the image signal from the signal generation circuit 303 may be selected.
[0060]
In this case, when assigning the value of each pixel in the conversion circuit 203, 1 is assigned to the pixel assigned “8” in FIG. Further, the threshold data values output from the threshold setting circuit 309 are also output in the reverse order of FIG.
[0061]
As the title image signal, not only a luminance signal but also a luminance and color difference signal or an RGB signal may be used.
[0062]
Further, in the present embodiment, the case where the title image signal stored in the replaceable memory card M as shown in FIG. 1 is synthesized has been described. It is also possible to store the title image signal and perform the same processing on the title image signal.
[0063]
In this embodiment, the case where the present invention is applied to a digital camcorder has been described. However, the present invention can also be applied to a configuration in which a title image signal is synthesized with an input image signal. is there.
[0064]
【The invention's effect】
As described above, according to the present invention, an image signal related to a binary image signal can be combined with an input image signal with a simple configuration.
[0065]
In addition, according to another invention of the present application, various title synthesis processes for captured image signals can be realized with a simple configuration.
[Brief description of the drawings]
FIG. 1 is a diagram showing a configuration example of a video camera integrated digital VTR to which the present invention is applied.
FIG. 2 is a diagram illustrating a configuration of a main part of a still image processing circuit of the apparatus of FIG. 1;
FIG. 3 is a diagram showing a configuration of a synthesis circuit of the apparatus of FIG. 1;
FIG. 4 is a diagram illustrating a state of a title image signal handled by the apparatus of FIG.
FIG. 5 is a diagram for explaining a synthesis process of the circuit of FIG. 3;
6 is a diagram for explaining a synthesis process of the circuit of FIG. 3; FIG.
FIG. 7 is a diagram illustrating a state of combining title images.
FIG. 8 is a diagram illustrating a state of another synthesis pattern of a title image.

Claims (14)

Conversion means for converting a binary image signal into a multi-value image signal;
Combining means for combining the image signal related to the binary image signal and the input image signal;
A signal processing apparatus comprising: a control unit that controls a combining operation of the combining unit using the multi-value image signal.   2. The signal processing apparatus according to claim 1, wherein the control unit includes a comparison unit that compares the multi-value image signal and a threshold signal, and controls the synthesis unit in accordance with a comparison result of the comparison unit. .   3. The signal processing apparatus according to claim 2, wherein the control means includes threshold generation means for generating the threshold signal, and controls the combining operation of the combining means by changing the value of the threshold signal.   4. The signal processing apparatus according to claim 3, wherein the control unit generates combined pattern information indicating a combined pattern by the combining unit, and the threshold generating unit changes the value of the threshold signal according to the combined pattern information. .   5. The signal processing apparatus according to claim 4, wherein the threshold value generating means determines a change period of the threshold signal according to the combined pattern information, and changes the value of the threshold signal for each change period.   The said control means produces | generates the synthetic pattern information which shows the synthetic | combination pattern by the said synthetic | combination means, The said conversion means converts the said binary image signal into a multi-value image signal according to the said synthetic pattern information. The signal processing apparatus according to 1.   7. The signal according to claim 6, wherein the converting means converts the binary image signal into a multi-value image signal so that the value of the multi-value image signal changes in a direction according to the composite pattern information within one screen. Processing equipment.   The synthesizing means is a generating means for generating an image signal having a predetermined luminance, and a selection for selectively outputting the input image signal and the image signal generated by the generating means in response to a control signal from the control means. The signal processing apparatus according to claim 1, further comprising: means. An apparatus for synthesizing an input image signal and a title image signal obtained by an imaging means,
Reading means for reading out a binary image signal indicating the title image signal from a memory;
Conversion means for converting the binary image signal into a multi-value image signal;
Storage means for storing a multi-value image signal output from the conversion means;
Image signal generating means for generating an image signal having a predetermined luminance;
Selecting means for selectively outputting the input image signal and the predetermined image signal generated by the generating means;
A signal processing apparatus comprising: a comparison unit that compares a multi-value image signal read from the storage unit with a threshold signal and controls a selection operation of the selection unit based on the comparison result. An assigning means for dividing one screen of a title image signal into a plurality of areas and assigning image data having different values to each area;
Generating means for comparing the image data with a threshold signal and generating a control signal according to the comparison result;
A signal processing apparatus comprising: a selection unit that synthesizes the input image signal and the title image signal by selectively outputting an image signal having a predetermined luminance and an input image signal according to the control signal.   The title image signal is a digital signal of 1 bit per sample, and the assigning unit divides the input image signal into the plurality of areas for each sample, and n bits (n is an integer of 2 or more) for each sample 11. The signal processing apparatus according to claim 10, wherein the digital data is assigned as the image data.   11. The signal processing according to claim 10, further comprising generating means for generating composite pattern information indicating a composite pattern of the title image signal, wherein the assigning means assigns each image data value in accordance with the composite pattern information. apparatus.   Threshold generation means for generating the threshold signal is provided, wherein the threshold generation means determines a change period of the threshold signal according to the composite pattern information, and changes the value of the threshold signal for each change period. The signal processing device according to claim 12. A conversion step of converting a binary image signal into a multi-value image signal;
A synthesis step of synthesizing the image signal related to the binary image signal and the input image signal;
And a control step of controlling the synthesis operation using the multi-value image signal.

Images