JP4424008B2 - Program, data processing apparatus and method thereof - Google Patents

Description

  The present invention relates to a program, a data processing apparatus, and a method used for three-dimensional computer graphics and the like.

3D computer graphics (3-Dimensional Computer Graphics, hereinafter referred to as 3D-CG) is a technology that expresses a 3D presence such as a space or a solid as a numerical value, and projects and draws it on a computer screen by calculation. .
Real-time 3D-CG is a technique for realizing animation by continuously performing the above drawing at a speed that cannot be recognized by the user, and is widely used in fields such as games and virtual reality. Further, in the future, it is considered that applications using real-time 3D-CG will be widely used in mobile devices such as mobile phones and home appliances such as set-top boxes.

In order to perform real-time 3D-CG, a high computer processing capability is generally required. Recently, however, not all processing is performed by a CPU (Central Processing Unit), but graphics that exclusively perform 3D-CG calculation processing. It has become common to improve the operation speed by using hardware together.
These graphics hardware functions can be used from applications via API (Application Program Interface) such as Microsoft's DirectX Graphics and OpenGL Architecture Review Board (ARB), which is standardizing work. These APIs are a set of commands having a low abstraction level for operating hardware, and programming using these APIs requires high skills.
In this situation, higher-level (higher-level abstraction) libraries aimed at improving programming productivity have been developed. Many of them support a function called scene graph data. Scene graph data represents a group of objects in a three-dimensional space to be rendered as tree structure data. Examples of 3D-CG libraries that employ scene graphs include OpenInventor from SGI and Java3D from Sun Microsystems.
Generally, in these libraries, an application constructs a 3D model to be drawn as a scene graph, and drawing is performed on the library side, thereby reducing the complexity of programming. Hereinafter, the operation of constructing the 3D model as a data structure is referred to as modeling, and the process of actually drawing it is referred to as rendering.

On the other hand, the drawing order of nodes cannot be specified in the scene graph data as described above. In many graphics hardware, when semi-transparent objects overlap, a correct image cannot be obtained unless the objects are drawn in order from the viewpoint, which is a great limitation.
Therefore, scene graph data with priority on the drawing order of nodes has been developed. An example of a library that supports such a scene graph is Mobile 3D Graphics API (JSR-184) that is being standardized by the standardization organization JCP (Java Community Process).
In JSR-184, each node has an integer value called a layer value, and drawing is performed in order from the smallest value regardless of the position in the scene graph data. As an example of the usage method of the layer, a usage such as assigning a small value (for example, “−1”) to the node group expressing the background in the scene graph can be considered.

  In a conventional system based on such scene graph data, for example, every time the CPU draws each layer value, it traverses (scans) all the nodes constituting the scene graph data, and the layer value Is searched for, and a drawing process is performed on the searched node.

  However, in the conventional system described above, every time the layer value is drawn, the CPU traverses all the nodes constituting the scene graph data, which causes a problem that the processing amount increases and the processing time is long. .

  The present invention has been made in view of the above-mentioned problems of the prior art, and processing is assigned to a plurality of nodes constituting a tree, and the processing assigned to the node is assigned to each of the nodes among a plurality of processing stages. Execution stage data indicating which process stage is executed is associated, the plurality of process stages are selected in order, and the execution stage data indicating the selected process stage is selected in the selected process stage. An object of the present invention is to provide a program, a data processing apparatus, and a method thereof that can reduce the amount of processing and the processing time when performing control so that the processing assigned to the associated node is executed. To do.

Program of the first invention, the drawing process to a plurality of nodes constituting the tree is assigned, to each of the nodes, the drawing processing assigned to the node in any of the processing stages of the plurality of processing stages Execution stage data indicating whether or not to execute is associated, the plurality of processing stages are selected in order, and the node associated with the execution stage data indicating the selected processing stage in the selected processing stage A program executed by a data processing device that controls the drawing processing assigned to the data processing device, wherein the data processing device executes pre-processing means for pre-processing the drawing processing, and executes the drawing processing. It has an execution control means for the said preprocessing means, based on the execution stage data, at least the tree of the plurality of nodes constituting the tree For each node where the lower node on a first procedure for associating the index data indicating whether or not to execute the drawing process of the lower layer node by the selected processing stage to the node, the execution control unit but selecting the plurality of processing stages in order, in the selected process step, the tree from the root node to the search towards the leaf nodes, and reaches the node in the process of the search, the first to the node if the indicator data associated with the procedure indicates that executes the drawing process of the lower layer node in the selected process step, searches said lower node of the node reached by the search among the nodes, the drawing process the execution stage data associated with the node allocated to the node indicating the selected processing stage Determining the line start, if not indicated to perform the drawing process of the lower layer node to execute the second procedure to skip search for the lower nodes of the node, to the data processing device.

In the data processing device of the second invention, a drawing process is assigned to a plurality of nodes constituting a tree, and the drawing process assigned to the node is assigned to each of the nodes. Execution stage data indicating whether to execute in stages is associated, the plurality of processing stages are sequentially selected, and the selected processing stage is associated with the execution stage data indicating the selected processing stage. A data processing device for controlling the drawing process assigned to the node to be executed, wherein a lower layer node on at least the tree among the plurality of nodes constituting the tree based on the execution stage data For each of the nodes in which there is an index data indicating whether to execute the drawing processing of the lower layer node in the selected processing stage The preprocessing means to be applied and the plurality of processing stages are selected in order, and in the selected processing stage, the tree is searched from the root node toward the leaf node. When the processing unit indicates that the index data associated with the node performs the drawing process of the lower layer node in the selected processing stage, the lower layer node of the node is searched, and the search The execution stage data associated with the node is determined to start the drawing process assigned to the node indicating the selected processing stage, and the drawing process of the lower layer node is executed. If it does not indicate that, the execution control means for skipping the search for the lower node of the node.

In a data processing method according to a third aspect of the present invention, a drawing process is assigned to a plurality of nodes constituting a tree, and the drawing process assigned to the node is assigned to each of the nodes. Execution stage data indicating whether to execute in stages is associated, the plurality of processing stages are sequentially selected, and the selected processing stage is associated with the execution stage data indicating the selected processing stage. A data processing method controlled by a data processing apparatus so that the drawing process assigned to the node is executed, wherein the data processing apparatus includes pre-processing means for performing pre-processing of the drawing process, and the drawing process Execution control means for executing, and based on the execution stage data, the preprocessing means at least the tree among the plurality of nodes constituting the tree. A first step of associating index data indicating whether or not the processing of the lower layer node is executed in the selected processing stage with respect to each of the nodes having lower layer nodes, and the execution control means; The plurality of processing stages are selected in order, and in the selected processing stage, the tree is searched from a root node toward a leaf node, and when the node is reached in the search process, the first process is performed on the node. If the index data associated in step (b) indicates that the drawing process of the lower layer node is to be executed in the selected processing stage, the lower node of the node is searched, and the node reached by the search The execution stage data associated with the node is the drawing process assigned to the node indicating the selected processing stage Determining the start, if not indicate that executes the drawing process of the lower layer node has a second step of skipping the searching of the lower nodes of the node, the.

  According to the present invention, a process is assigned to a plurality of nodes constituting a tree, and in each of the nodes, the process assigned to the node is executed in which of the plurality of process stages. The execution stage data shown is associated, the plurality of processing stages are selected in order, and the selected processing stage is assigned to the node associated with the execution stage data indicating the selected processing stage When performing control so that the processing is executed, it is possible to provide a program, a data processing apparatus, and a method thereof that can reduce the amount of processing and the processing time.

Embodiments of the present invention will be described below with reference to the drawings.
<Related art of the present invention>
Prior to describing embodiments of the present invention, the related art of the present invention will be described.
FIG. 1 is a diagram schematically showing an example of scene graph data.
This scene graph data represents a robot model.
In FIG. 1, each node is represented by a circle, and a tree is configured with the root node root as a base point.
Each node includes information on the shape and appearance data of the components of the robot and model conversion (position, posture, and enlarged scale).
Among the information held by each node, model transformation is defined hierarchically from the root to the end, and the position, posture, and scaled value held by a node are based on its parent node. It is a thing.
Therefore, for example, in FIG. 1, the position in the three-dimensional space where the right hand of the robot is finally drawn is expressed as “the position of the node torso + the position of the node right_arm + the position of the node right_hand”.
Actually, the model transformation of each node is expressed by a 4 × 4 matrix M, and the position, orientation, and enlargement / reduction at which the node right_hand is drawn are “M (torso) · M (right_arm) · M (right_hand)”. Can be defined by calculation.

Such matrix multiplication is suitable to be supported by the above-described graphics hardware, and high-speed processing can be expected.
In actual scene graph data rendering, if the above matrix multiplication is repeated while scanning the tree from the root toward the leaf (the end of the tree) (hereinafter referred to as traverse), the model conversion of each node is obtained. Can be efficient.

FIG. 2 schematically shows how the scene graph data of FIG. 1 is traversed.
The scene graph data is scanned along the arrows in the figure. The numbers in the circles representing the nodes represent the order in which the nodes are drawn.
Constructing a three-dimensional space with such a hierarchical structure has an effect of facilitating modeling.
For example, in order to rotate the shoulder of the robot, only the posture information of the node right_arm needs to be updated, and there is no need to recalculate the position and posture information of the node right_hand.

  Incidentally, the scene graph data shown in FIGS. 1 and 2 is often expressed using a root node root, branch nodes 101 to 110, and leaf nodes 121 to 130, as shown in FIG.

In the scene graph data shown in FIG. 3, for example, an image object torso that defines the appearance of the body is assigned to the leaf node 130, and a matrix M (torso) that defines the position, orientation, and enlargement / reduction of the image object torso to the branch node 101. Is assigned.
In addition, an image object right_arm that defines the appearance of the right arm is assigned to the leaf node 121, and a matrix M (right_arm) that defines the position, orientation, and enlargement / reduction of the image object right_arm is assigned to the branch node 102.
Further, an image object right_hand that defines the appearance of the right hand is assigned to the leaf node 122, and a matrix M (right_hand) that defines the position, orientation, and enlargement / reduction of the image object right_hand is assigned to the branch node 103.

As described above, the 3D-CG library using the scene graph data has advantages that modeling is easy and rendering is efficiently performed by the library. Application designers and programmers can focus on what kind of 3D space to express, and leave complicated rendering to the library.
By the way, the drawing order of nodes cannot be specified in the above-mentioned scene graph data. For this reason, in many graphics hardware, when semi-transparent objects overlap, a correct image cannot be obtained unless rendering is performed in order from the viewpoint, which is a great limitation.
Therefore, scene graph data having a priority related to the drawing order of nodes is used.
In an example of a library that supports such scene graph data, each node has an integer value called a layer, and drawing is performed in ascending order of the value regardless of the position in the scene graph data.
As an example of the usage method of the layer, it is conceivable to use a small value (for example, “−1”) for a node group expressing the background in the scene graph data.

There is a range of possible values for the layer, and the default is “0”. The layer value may be duplicated at a plurality of nodes. Furthermore, the object for which the layer value is set is limited to the node at the end of the tree.
Hereinafter, for distinction, a node located at the end of the tree is referred to as a leaf node, a node located at the root of the tree is referred to as a root node, and other nodes located at branches are referred to as branch nodes.
When drawing such scene graph data, if the scene is simply traversed as described above, the priority specified by the layer value is not correctly reflected.
As one of the methods for correctly drawing according to the layer value, it is conceivable to repeatedly traverse the scene graph data for all the possible values of the layer value.

Hereinafter, this method will be described with reference to FIGS. FIG. 4 is an example of scene graph data with layer values. Circles in the figure are scene graph data SCEN nodes, “L” represents a leaf node, “B” represents a branch node, and “R” represents a root node.
That is, the scene graph data SCEN includes a root node (R), leaf nodes 41 to 54, and branch nodes 60 to 67.
The numerical value shown at the lower left of the node is the layer value VL, and the range is “−2” to “2”. In the present specification, it is assumed that the priority increases as the layer value VL decreases, that is, the drawing order becomes earlier.

FIG. 5 is a flowchart showing this method.
For example, “−2” that is the minimum value “layerMin” that can be taken as a layer value is set in the variable layer (step ST1), and traversing of the scene graph is started from the root node (step ST2).
When the leaf is reached through the node (steps ST2 to ST6), the layer value VL associated with the leaf is compared with the variable layer (step ST7), and if they match, the leaf is drawn. (Step ST8).
On the other hand, when the traversal of all nodes is completed (the root node is reached) (step ST9), “1” is added to the variable layer (step ST10), and the scene graph is traversed again based on this. This is repeated until “2” which is the maximum value that the variable layer can take.

Considering the example of FIG. 4, to create one image, traversing is performed five times from layer “2” to “−2”. Since there is no leaf node having a layer value VL of “−2”, the traversal is being performed at all times, and the right half of the scene graph is all the layer value VL being “0”. , Repeatedly traverse.
As described above, this method requires a lot of redundant processing and is not practical from the viewpoint of drawing speed.
In addition, as preprocessing for rendering, it is conceivable to arrange the nodes in the drawing order by some sort algorithm.
However, since the layer value may be dynamically changed, sorting must be performed every time a scene graph is drawn, and the overhead of the sorting process itself must be taken into consideration. In particular, there may be a case where a sufficient drawing speed cannot be obtained in an environment where the CPU processing speed cannot be expected so much, such as a mobile phone.

Hereinafter, the data processing apparatus of the present embodiment will be described using the scene graph data SCEN shown in FIG. 4 as an example of the processing target of the library program.
<First Embodiment>
FIG. 6 is a configuration diagram of the data processing apparatus 1 according to the embodiment of the present invention.
As shown in FIG. 6, the data processing apparatus 1 includes, for example, an input unit 10, a graphic accelerator 11, a monitor 12, a memory 13, and a CPU 14, which are connected via a data line 18.
In FIG. 6, the library program LIB corresponds to the program of the present invention, and the CPU 14 executes processing according to the library program LIB, thereby realizing each means of the data processing apparatus of the present invention.
The graphic accelerator 11 corresponds to the execution means of the data processing apparatus of the present invention.

The input unit 10 is, for example, an operation button such as a keyboard, a touch panel, and the like, and inputs operation data corresponding to a user operation or data from the outside of the data processing device 1.
The graphic accelerator 11 receives matrix data used for drawing from the CPU 14, performs an operation based on the matrix data, and displays a three-dimensional image on the monitor 12 according to the progress of a program PRG such as a game by the CPU 14.

The memory 13 stores a program PRG that defines graphic processing such as a game, a library program LIB, and various data used for processing by the CPU 14.
The CPU 14 executes the program PRG and the library program LIB read from the memory 13 and executes these various defined processes.

FIG. 7 is a diagram for explaining a processing procedure in the data processing apparatus 1 shown in FIG.
As shown in FIG. 7, in the data processing apparatus 1, for example, the CPU 14 executes a program PRG and a library program LIB.
In accordance with the execution of the program PRG, the CPU 14 generates the scene graph data SCEN shown in FIG. 4 and provides it to the library program LIB.
Then, according to the execution of the library program LIB, the CPU 14 outputs matrix data MIX for displaying each object constituting the three-dimensional image to the graphic accelerator 11 in the drawing order based on the scene graph data SCEN received from the program PRG. .
The graphic accelerator 11 performs an operation based on the matrix data MIX to which the library program LIB is input, and writes the display data in a VRAM (Video RAM) or the like. Then, a three-dimensional image corresponding to the written display data is displayed on the monitor 12.

FIG. 8 is a flowchart for explaining a procedure of processing executed by the CPU 14 in accordance with the library program LIB.
In FIG. 8, step ST2 corresponds to the first procedure of the program of the present invention, and step ST3 corresponds to the second procedure of the program of the present invention.
Further, the preprocessing means of the data processing apparatus of the present invention is realized by the CPU 14 executing the process of step ST2, and the execution control means of the data processing apparatus of the present invention is realized by the CPU 14 executing the process of step ST3. Is done.

As shown in FIG. 8, the CPU 14 inputs scene graph data SCEN from the program PRG (step ST1).
Next, the CPU 14 corresponds to the root node and the branch node constituting the scene graph data SCEN with the mask data MSK used for determining whether or not to traverse the lower layer node in the processing stage of each layer value VL. The attached scene graph data SCENa is generated.
(Step ST2).
Next, for each of the plurality of layer values, the CPU 14 traces branch nodes and leaf nodes constituting the tree on the basis of the master data MSK defined by the scene graph data SCENa, and draws matrix data MIX of objects to be drawn. Is output to the graphic accelerator 11 (step ST3).

Hereinafter, the mask data generation process (step ST2) and the matrix data MIX generation process (step ST3) shown in FIG. 8 will be described in detail.
[Mask Data Generation Processing (Step ST2)]
As described above, the CPU 14 performs a master data generation process based on the library program LIB as described below.
The CPU 14 sets the range of the layer value VL to layerMin (minimum) to layerMax (maximum).
The CPU 14 sets the bit of the corresponding layer to “1” (first logical value) based on the bit string of (layerMax-layerMin + 1) bits, and sets the other bits to “0” (second logical value). Define the layer value VL.
For example, in this embodiment, since layerMax is “2” and layerMin is “−2”, the CPU 14 defines a 5-bit layer value VL.
For example, the CPU 14 defines the layer values VL of “−2” to “2” as shown below.

(Equation 1)
VL = -2: 10000
VL = -1: 01000
VL = 0: 00100
VL = 1: 00010
VL = 2: 00001

The CPU 14 represents the layer value VL assigned to the leaf node (L) in the scene graph data SCEN shown in FIG. 4 with 5 bits as shown in FIG.
The CPU 14 traverses all the nodes of the scene graph data SCEN shown in FIG. 4, and for each root node (R) and each branch node (B), a leaf node (L) (lower layer node) located below the node. Is generated with which layer value LV is to be drawn, and the mask data MSK is associated with the root node (R) and the corresponding branch node (B).
Specifically, as shown in FIG. 10, the CPU 14 uses the mask data MSK of the root node and each branch node (B) as the branch node (B) and the leaf node (L ) Of the mask data MSK and the layer value LV.
For example, the mask data MSK of the branch node 61 is “01000” that is the logical sum of “01000”, “01000”, and “01000” that are the layer values VL of the leaf nodes 41, 42, and 43.
Further, the mask data MSK of the branch node 60 is “01011” which is a logical sum of “01000”, “00011”, and “00010” that are the mask data MSK of the branch nodes 61, 62, and 63.
The CPU 14 performs the above-described operation recursively for the root node (R) and all branch nodes (B) constituting the scene graph data SCEN, and as shown in FIG. 10, the root node (R) and all branches. The mask data MSK of the node (B) is generated and assigned to the corresponding root node (R) and branch node (B), thereby generating new scene graph data SCENa shown in FIG.

[Matrix Data MIX Generation Processing (Step ST3)]
As described above, the CPU 14 generates the matrix data MIX as described below based on the scene graph data SCENa shown in FIG. 10 generated in step ST2 in accordance with the library program LIB.
The CPU 14 selects and sets layerMax (maximum) from layerMin (minimum) of the layer value VL in order to the variable layer.
Each time the CPU 14 sets the layer value VL in the variable layer, the CPU 14 traverses the scene graph data SCENa shown in FIG.
That is, the CPU 14 starts traversing the scene graph data SCENa shown in FIG. 10 from the root node (R).
When the bit corresponding to the layer value VL (selected layer) indicated by the variable layer in the mask data MSK associated with the root node (R) indicates the logical value “1”, the CPU 14 determines the layer value VL. Traverse about.
Then, the CPU 14 selects the layer value VL (selected layer) indicated by the variable layer in the mask data MSK associated with the branch node (B) and leaf node (L) that are children of the root node (R). ) In which the bit corresponding to the logical value “1” is selected.

Then, the CPU 14 traverses the branch node (B) and the leaf node (L) below the selected branch node (B).
On the other hand, the CPU 14 does not traverse the branch node (B) and the leaf node (L) below the branch node (B) that is not selected (that is, skips traverse). This eliminates the need to traverse all leaf nodes (L) each time the variable layer is updated, thereby reducing processing load and processing time.

  Specifically, when the scene graph data SCENa shown in FIG. 10 is a processing target, the CPU 14 sets variables from “−2” to “2” in order in the variable layer as shown below. Traverse.

First, when “−2” indicating the earliest drawing order is set in the variable layer, the CPU 14 looks at “01111” which is the mask data MSK of the root node (R), and sets the value “−2” of the variable layer. Since the fifth bit corresponding to “” is the logical value “0”, the traversal for the set value “−2” is not performed (skipped).
Next, the CPU 14 sets “−1” in the variable layer.

FIG. 11 is a diagram for explaining traversing processing by the CPU 14 when “−1” is set in the variable layer.
As shown in FIG. 11, for example, the CPU 14 looks at “01011” and “00100” that are mask data MSK of the branch nodes 60 and 65 that are children of the root node (R), and sets the value “−” of the variable layer. The branch node 60 in which the fourth bit corresponding to “1” indicates the logical value “1” is selected, and the branch node 65 is not selected. That is, the traversal of the node below the branch node 65 is skipped.
Next, the CPU 14 looks at the mask data MSK “01000”, “00011”, “00010” of the branch nodes 61, 62, 64 that are children of the selected branch node 60, and sets the set value “ The branch node 61 in which the fourth bit corresponding to “−1” indicates the logical value “1” is selected, and the branch nodes 62 and 64 are not selected. That is, the traversal of the lower node of the branch nodes 62 and 64 is skipped.
Next, the CPU 14 looks at the layer values “01000”, “01000”, and “01000” of the leaf nodes 41, 42, and 43 that are children of the selected branch node 61, and sets the value “−” of the variable layer. Leaf nodes 41, 42, and 43 in which the fourth bit corresponding to “1” indicates the logical value “1” are selected.
Next, the CPU 14 corresponds to the matrix indicating the image object data assigned to the selected leaf nodes 41, 42, and 43 and the branch nodes 60 and 61 located on the route from the leaf node to the root node (R). A matrix indicating the added operation is output to the graphic accelerator 11 as matrix data MIX.
Next, the CPU 14 sets “0” in the variable layer.

FIG. 12 is a diagram for explaining traversing processing by the CPU 14 when “0” is set in the variable layer.
As illustrated in FIG. 12, for example, the CPU 14 looks at “01011” and “00100” that are mask data MSK of the branch nodes 60 and 65 that are children of the root node (R), and sets the value “0” of the variable layer. A branch node 65 in which the third bit corresponding to “” indicates a logical value “1” is selected, and the branch node 60 is not selected. That is, the traversal of the node below the branch node 60 is skipped.
Next, the CPU 14 looks at “00100” and “00100” which are the mask data MSK of the branch nodes 66 and 67 which are children of the selected branch node 65 and corresponds to the set value “0” of the variable layer. Branch nodes 66 and 67 whose bit bits indicate a logical value “1” are selected.
Next, the CPU 14 looks at the layer values “00100”, “00100”, “00100”, “00100”, which are the child nodes of the selected branch node 66, and sets the variable Leaf nodes 49, 50, 51, and 52 in which the third bit corresponding to the layer setting value “0” indicates the logical value “1” are selected.
Next, the CPU 14 looks at “00100” and “00100” that are the layer values of the leaf nodes 53 and 54 that are children of the selected branch node 67, and corresponds to the set value “0” of the variable layer. The leaf nodes 53 and 54 whose eyes indicate the logical value “1” are selected.
Next, the CPU 14 corresponds to the matrix indicating the image object data assigned to the selected leaf nodes 49 to 54 and the branch nodes 65, 66, and 67 located on the route from the leaf node to the root node (R). A matrix indicating the added operation is output to the graphic accelerator 11 as matrix data MIX.
Next, the CPU 14 sets “1” in the variable layer.

FIG. 13 is a diagram for explaining traversing processing by the CPU 14 when “1” is set in the variable layer.
As shown in FIG. 13, for example, the CPU 14 looks at “01011” and “00100” that are mask data MSK of the branch nodes 60 and 65 that are children of the root node (R), and sets the value “1” of the variable layer. A branch node 60 in which the second bit corresponding to “” indicates a logical value “1” is selected, and the branch node 65 is not selected. That is, the traversal of the node below the branch node 65 is skipped.
Next, the CPU 14 looks at the mask data MSK “01000”, “00011”, “00010” of the branch nodes 61, 62, 64 that are children of the selected branch node 60, and sets the set value “ Branch nodes 62 and 64 in which the second bit corresponding to “1” indicates a logical value “1” are selected. That is, the traverse of the lower node of the branch node 61 is skipped.
Next, the CPU 14 looks at “00011” which is the mask data MSK of the branch node 63 which is a child of the selected branch node 62, and the second bit corresponding to the set value “1” of the variable layer is the logical value “ This is selected because “1”.
Next, the CPU 14 sees the layer values VL “00010” and “00001” of the leaf nodes 44 and 45 that are children of the selected branch node 63, and corresponds to the setting value “1” of the variable layer. The leaf node 44 whose bit is the logical value “1” is selected, and the leaf node 45 is not selected.
On the other hand, the CPU 14 sees the layer values VL “00010” and “00010” of the leaf nodes 46 and 47 that are children of the selected branch node 62, and 2 bits corresponding to the setting value “1” of the variable layer Since the eye has a logical value “1”, these are selected.
Further, the CPU 14 looks at “00010” which is the layer value VL of the leaf node 48 which is a child of the selected branch node 64, and the second bit corresponding to the setting value “1” of the variable layer is the logical value “1”. This is selected.
Next, the CPU 14 selects a matrix indicating the image object data assigned to the selected leaf nodes 44, 46, 47, and 48, and branch nodes 60 and 62 located on the route from the leaf node to the root node (R). , 63, and 64 are output to the graphic accelerator 11 as matrix data MIX.
Next, the CPU 14 sets “2” in the variable layer.

FIG. 14 is a diagram for explaining traversing processing by the CPU 14 when “2” is set in the variable layer.
As illustrated in FIG. 14, for example, the CPU 14 looks at “01011” and “00100” that are the mask data MSK of the branch nodes 60 and 65 that are children of the root node (R), and sets the value “2” of the variable layer. The branch node 60 in which the first bit corresponding to “” indicates the logical value “1” is selected, and the branch node 65 is not selected. That is, the traversal of the node below the branch node 65 is skipped.
Next, the CPU 14 looks at the mask data MSK “01000”, “00011”, “00010” of the branch nodes 61, 62, 64 that are children of the selected branch node 60, and sets the set value “ The branch node 62 in which the first bit corresponding to “2” indicates the logical value “1” is selected, and the branch nodes 61 and 64 are not selected. That is, the traversal of the lower node of the branch nodes 61 and 64 is skipped.
Next, the CPU 14 looks at “00011” that is the mask data MSK of the branch node 63 that is a child of the selected branch node 62, and the first bit corresponding to the setting value “2” of the variable layer is the logical value “ This is selected because “1”.
Next, the CPU 14 looks at the layer values VL “00010” and “00001” of the leaf nodes 44 and 45 that are children of the selected branch node 63, and corresponds to the setting value “2” of the variable layer. The leaf node 45 whose bit is the logical value “1” is selected, and the leaf node 44 is not selected.
On the other hand, the CPU 14 looks at “00010” and “00010” which are the layer values VL of the leaf nodes 46 and 47 which are children of the selected branch node 62, and 1 bit corresponding to the setting value “2” of the variable layer. Since the eyes are not the logical value “1”, these are not selected.
Next, the CPU 14 is associated with the matrix indicating the image object data assigned to the selected leaf node 45 and the branch nodes 60, 62, and 63 located on the route from the leaf node to the root node (R). The matrix indicating the calculated operation is output to the graphic accelerator 11 as matrix data MIX.

FIG. 15 is a flowchart for explaining the traversing process by the CPU 14.
Hereinafter, each step shown in FIG. 15 will be described.
Step ST21:
The CPU 14 sets layerMin, which is the minimum value of the layer value VL, in the variable layer.
Step ST22:
The CPU 14 determines whether the bit corresponding to the set value of the variable layer of the mask data MSK assigned to the root node (R) of the scene graph data SCENa shown in FIG. 10 is the logical value “1”. If the value is “1”, the process proceeds to step ST23, and if not, the process proceeds to step ST32.
Step ST23:
The CPU 14 starts traversing the lower node of the root node R in the scene graph data SCENa.

Step ST24:
The CPU 14 reaches the node by the traverse.
Step ST25:
The CPU 14 determines whether or not the node reached in step ST24 is a branch node (B). If the node is a branch node (B), the process proceeds to step ST27. If not, the process proceeds to step ST26.
Step ST26:
The CPU 14 determines whether or not the node reached in step ST24 is the root node (R). If the node is the root node (R), the process proceeds to step ST32. If not, the process proceeds to step ST29.

Step ST27:
The CPU 14 determines whether or not the bit corresponding to the set value of the variable layer among the mask data MSK of the branch node (B) reached in step ST24 indicates the logical value “1”, and sets the logical value “1”. In the case shown, the process proceeds to the traverse of the lower node of the branch node (B).
On the other hand, when the CPU 14 determines that the bit corresponding to the set value of the variable layer does not indicate the logical value “1”, the CPU 14 proceeds to step ST28.
Step ST28:
The CPU 14 does not perform (skip) the traverse of the lower layer node of the branch node (B) reached in step ST24.
After completing the process in step ST28, the CPU 14 again traverses nodes other than the skipped lower layer node in the scene graph data SCENa.

Step ST29:
The CPU 14 determines that the node reached in step ST24 is a leaf node (L).
Step ST30:
The CPU 14 determines whether or not the bit corresponding to the set value of the variable layer value is the logical value “1” in the layer value VL associated with the leaf node (L) reached in step ST24. If the value is “1”, the process proceeds to step ST31. If not, the process returns to step ST23.
Step ST31:
The CPU 14 indicates a matrix indicating the image object data assigned to the leaf node (L) reached in step ST24 and an operation associated with the branch node located on the route from the leaf node to the root node (R). The matrix is output to the graphic accelerator 11 as matrix data MIX. That is, the CPU 14 causes the graphic accelerator 11 to perform drawing processing corresponding to the leaf node (L).

Step ST32:
The CPU 14 determines whether or not the set value of the variable layer is layerMax which is the maximum value of the layer value VL. If so, the process ends with respect to the scene graph data SCENa. Proceed to ST33.
Step ST33:
The CPU 14 adds “1” to the variable layer to update the variable layer, and then proceeds to the processing of step ST22.

As described above, according to the data processing apparatus 1, the CPU 14 skips the traversal of the scene graph data SCEN as necessary according to the library program LIB, so that the scene graph data is obtained for each layer value VL. Compared to a conventional system that traverses all nodes in SCEN, the amount of processing accompanying traversing can be reduced, and the processing time can be shortened. For this reason, it can be introduced into a device such as a mobile phone having low CPU performance.
Further, according to the data processing device 1, by defining the generation of the mask data MSK by the logical sum operation as described above, the processing can be performed in a short time.

<Second Embodiment>
The data processing apparatus of the present embodiment is the same as the data processing apparatus 1 of the first embodiment except for the processing of the CPU based on the library program.
As illustrated in FIG. 6, the data processing device 1a includes, for example, an input unit 10, a graphic accelerator 11, a monitor 12, a memory 13a, and a CPU 14a.
In FIG. 6, the input unit 10, the graphic accelerator 11, and the monitor 12 denoted by the same reference numerals as those in the first embodiment are the same as those described in the first embodiment.
The memory 13a of the data processing device 1a stores a program PRG and a library program LIBa.

Based on the library program LIBa read from the memory 13a, the CPU 14a performs a process for generating a mark value MARK and a process for generating matrix data MIX.
FIG. 16 is a flowchart for explaining a procedure of processing executed by the CPU 14a in accordance with the library program LIBa.
As shown in FIG. 16, the CPU 14a inputs scene graph data SCEN from the program PRG (step ST51).
Next, the CPU 14a generates scene graph data SCENb by associating the mark value MARK with the root node (R) and the branch node (B) constituting the scene graph data SCEN (step ST52).
Next, the CPU 14a traces branch nodes and leaf nodes constituting the scene graph data SCENb based on the mark value MARK of the scene graph data SCENb, and generates matrix data MIX of an object to be drawn, which is generated as a graphic accelerator. 11 (step ST3).

The mark value MARK generation process (step ST52) and the matrix data MIX generation process (step ST53) shown in FIG. 16 will be described in detail below.
[Generation processing of mark value MARK (step ST52)]
As described above, the CPU 14a generates the mark value MARK based on the library program LIBa as described below.
The CPU 14a sets the range of the layer value VL to layerMin (minimum) to layerMax (maximum).
The CPU 14a traverses the scene graph data SCEN shown in FIG. 4, and determines the mark value MARK for the root node (R) and each branch node (B) from the order close to the leaf node (L).
For each branch node (B), the CPU 14 is the smallest (highest priority) of the layer values VL assigned to the leaf node (L) and the branch node (B) that are children of the branch node (B). The layer value VL is specified, and the mark value MARK indicating the specified layer value VL is associated with the branch node (B).
Similarly, the CPU 14a associates the mark value MARK with the root node (R).
Specifically, as shown in FIG. 17, the CPU 14a associates the mark value MARK of the root node (R) and each branch node (B).

For example, the mark value MARK of the branch node 61 is “−1” because the layer values VL of the leaf nodes 41, 42, and 43 are all “−1”.
Further, the mark value MARK of the branch node 60 is the smallest “−1” because the mark values MARK of the branch nodes 61, 62, and 63 are “−1”, “1”, and “1”, respectively.
The CPU 14a performs the above-described operation recursively for the root node (R) and all branch nodes (B) constituting the scene graph data SCEN, and as shown in FIG. 17, the root node (R) and all branches. A mark value MARK of the node (B) is generated and assigned to the corresponding root node (R) and branch node (B) to generate new scene graph data SCENb shown in FIG.

[Matrix Data MIX Generation Processing (Step ST53)]
As described above, the CPU 14a performs generation processing of the matrix data MIX as described below based on the scene graph data SCENb shown in FIG. 17 generated in step ST52 in accordance with the library program LIBa.
The CPU 14a sequentially selects and sets layerMax (maximum) from layerMin (minimum) of the layer value VL to the variable layer.
Each time the CPU 14a sets the layer value VL in the variable layer, the CPU 14a traverses the scene graph data SCENb shown in FIG.
That is, the CPU 14a starts traversing the scene graph data SCENb shown in FIG. 17 from the root node (R).
Among the branch nodes (B) that are children of the root node (R), the CPU 14b matches the mark value MARK assigned to the branch node (B) with the layer value VL (selected layer) indicated by the variable layer. The branch node (B) to be selected is selected.

Then, the CPU 14a traverses the branch node (B) and the leaf node (L) below the selected branch node (B).
On the other hand, the CPU 14a does not traverse the branch node (B) and the leaf node (L) below the branch node (B) not selected (that is, skips the trace). This eliminates the need to traverse all leaf nodes (L) each time the variable layer is updated, thereby reducing processing load and processing time.
After the CPU 14a outputs the matrix data MIX corresponding to the selected leaf node (L) to the graphic accelerator 11 by the traverse, the CPU 14a uses the mark value MARK associated with the selected leaf node (L) as the variable layer. The value is updated to a value larger than the set range, for example, “100”.

Hereinafter, a traverse process performed by the CPU 14a by sequentially setting “−2” to “2” in the variable layer will be described.
When "-2" is set in the variable layer:
The CPU 14a sees “−1”, which is the mark value MARK of the root node (R), and does not match the set value “−1” of the variable layer, and therefore skips the traversal of the lower layer node.
Next, the CPU 14a sets “−1” in the variable layer.

When "-1" is set in the variable layer:
When “−1” is set in the variable layer, the CPU 14a, for example, “−1”, “0” that are the mark values MARK of the branch nodes 60 and 65 that are children of the root node (R) shown in FIG. ”, The branch node 60 that matches the set value“ −1 ”of the variable layer is selected, and the branch node 65 is not selected. That is, the traversal of the node below the branch node 65 is skipped.
Next, the CPU 14a looks at the mark values MARK "-1", "1", "1" of the branch nodes 61, 62, 64 that are children of the selected branch node 60, and sets the value of the variable layer The branch node 61 that matches “−1” is selected, and the branch nodes 62 and 64 are not selected. That is, the traversal of the lower node of the branch nodes 62 and 64 is skipped.
Next, the CPU 14a looks at the layer values “−1”, “−1”, and “−1” of the leaf nodes 41, 42, and 43 that are children of the selected branch node 61, and sets the variable layer. Leaf nodes 41, 42, and 43 that match the value “−1” are selected.
Next, the CPU 14a corresponds to the matrix indicating the image object data assigned to the selected leaf nodes 41, 42, and 43, and the branch nodes 60 and 61 located on the route from the leaf node to the root node (R). A matrix indicating the added operation is output to the graphic accelerator 11 as matrix data MIX.
Then, as illustrated in FIG. 18, the CPU 14 a updates the mark value MARK of the branch node 61 in which all the leaf nodes (L) located in the lower layers are selected to “100”.

When “0” is set in the variable layer:
When “0” is set in the variable layer, the CPU 14a sets “1”, “1”, which are the mark values MARK of the branch nodes 60, 65 that are children of the root node (R) of the scene graph data SCENb shown in FIG. Looking at “0”, the branch node 65 that matches the set value “0” of the variable layer is selected, and the branch node 60 is not selected. That is, the traversal of the node below the branch node 60 is skipped.
Next, the CPU 14a looks at “0” and “0” which are the mark values MARK of the branch nodes 66 and 67 which are children of the selected branch node 65, and matches the set value “0” of the variable layer. , Both branch nodes 66 and 67 are selected.
Next, the CPU 14a looks at the layer values “0”, “0”, “0”, “0” of the leaf nodes 49, 50, 51, 52 that are children of the selected branch node 66, and sets the variable All of these are selected because they match the set value “0” of the layer.
Next, the CPU 14a looks at the layer values “0” and “0” of the leaf nodes 53 and 54 that are children of the selected branch node 67 and matches the set value “0” of the variable layer. Select all of these.
Next, the CPU 14a corresponds to the matrix indicating the image object data assigned to the selected leaf nodes 49 to 54 and the branch nodes 65, 66, and 67 located on the route from the leaf node to the root node (R). A matrix indicating the added operation is output to the graphic accelerator 11 as matrix data MIX.
Then, as illustrated in FIG. 19, the CPU 14 a updates the mark value MARK of the branch nodes 65, 66, and 67 in which all the leaf nodes (L) located in the lower layers are selected to “100”.

When “1” is set in the variable layer:
When “1” is set in the variable layer, the CPU 14a, for example, “1” that is the mark value MARK of the branch nodes 60 and 65 that are children of the root node (R) of the scene graph data SCENb shown in FIG. , “100”, the branch node 60 that matches the set value “1” of the variable layer is selected, and the branch node 65 is not selected. That is, the traversal of the node below the branch node 65 is skipped.
Next, the CPU 14 a looks at the mark values MARK “100”, “1”, “1” of the branch nodes 61, 62, 64 that are children of the selected branch node 60, and sets the value “ Since it matches “1”, the branch nodes 62 and 64 are selected, and the branch node 61 is not selected. That is, the traverse of the lower node of the branch node 61 is skipped.
Next, the CPU 14a looks at “1” which is the mark value MARK of the branch node 63 which is a child of the selected branch node 62, and selects the branch node 63 because it matches the set value “1” of the variable layer. To do.
Next, the CPU 14a looks at the layer values VL “1” and “2” of the leaf nodes 44 and 45 that are children of the selected branch node 63, and matches the set value “1” of the variable layer. Node 44 is selected and leaf node 45 is not selected.
On the other hand, the CPU 14a looks at “1” and “1” that are the layer values VL of the leaf nodes 46 and 47 that are children of the selected branch node 62 and matches the set value “1” of the variable layer. Leaf nodes 46 and 47 are selected.
Further, the CPU 14a looks at “1” that is the layer value VL of the leaf node 48 that is a child of the selected branch node 64, and matches the set value “1” of the variable layer, and therefore selects the leaf node 48. .
Next, the CPU 14a displays a matrix indicating the image object data assigned to the selected leaf nodes 44, 46, 47, and 48, and branch nodes 60 and 62 located on the route from the leaf node to the root node (R). , 63, and 64 are output to the graphic accelerator 11 as matrix data MIX.
Then, as illustrated in FIG. 20, the CPU 14 a updates the mark value MARK of the branch node 64 in which all the leaf nodes (L) located in the lower layers are selected to “100”.

When “2” is set in the variable layer:
When “2” is set in the variable layer, the CPU 14a, for example, “2” that is the mark value MARK of the branch nodes 60 and 65 that are children of the root node (R) of the scene graph data SCENb shown in FIG. , “100”, the branch node 60 that matches the set value “2” of the variable layer is selected, and the branch node 65 is not selected.
Next, the CPU 14 a looks at the mark values MARK “100”, “2”, “100” of the branch nodes 61, 62, 64 that are children of the selected branch node 60, and sets the variable layer set value “ The branch node 62 that matches “2” is selected, and the branch nodes 61 and 64 are not selected. That is, the traversal of the lower node of the branch nodes 61 and 64 is skipped.
Next, the CPU 14a looks at “2” that is the mark value MARK of the branch node 63 that is a child of the selected branch node 62, and selects it because it matches the set value “2” of the variable layer.
Next, the CPU 14a looks at “1” and “2” that are the layer values VL of the leaf nodes 44 and 45 that are children of the selected branch node 63, and matches the set value “2” of the variable layer. Node 45 is selected and leaf node 44 is not selected.
On the other hand, since the CPU 14a sees “1” and “1” which are the layer values VL of the leaf nodes 46 and 47 which are children of the selected branch node 62, it does not match the set value “2” of the variable layer. Do not select these.
Next, the CPU 14a is associated with the matrix indicating the image object data assigned to the selected leaf node 45 and the branch nodes 60, 62, 63 located on the route from the leaf node to the root node (R). The matrix indicating the calculated operation is output to the graphic accelerator 11 as matrix data MIX.
Then, as shown in FIG. 21, the CPU 14a updates the mark value MARK of the root node (R) and branch nodes 60, 62, and 63 where all the leaf nodes (L) located in the lower layer are selected to “100”. .

FIG. 22 is a flowchart for explaining traversing processing by the CPU 14a. Hereinafter, each step shown in FIG. 22 will be described.
Step ST81:
The CPU 14a sets the mark value MARK associated with the root node (R) and the layerMin in the variable layer.
Step ST82:
The CPU 14a starts traversing the lower node of the root node R in the scene graph data SCENb shown in FIG.

Step ST83:
The CPU 14a reaches the node by the traverse.
Step ST84:
The CPU 14a determines whether or not the node reached in step ST83 is a branch node (B). If the node is a branch node (B), the process proceeds to step ST87, and if not, the process proceeds to step ST85.
Step ST85:
The CPU 14a determines whether or not the node reached in step ST83 is the root node (R). If the node is the root node (R), the process proceeds to step ST92. If not, the process proceeds to step ST86.
Step ST86:
The CPU 14a determines that the node reached in step ST83 is a leaf node (L).
Step ST87:
The CPU 14a determines whether or not the mark value MARK of the node reached in step ST83 matches the set value of the variable layer. If they match, the process proceeds to step ST89, and if they do not match, the process proceeds to step ST88.

Step ST88:
The CPU 14a does not perform (skip) the traverse of the lower layer node of the branch node (B) reached in step ST83.
After completing the process in step ST88, the CPU 14a again traverses nodes other than the skipped lower layer node in the scene graph data SCENb.
Step ST89:
The CPU 14a proceeds to the traverse below the node (branch node (B)) reached in step ST83.

Step ST90:
The CPU 14a determines whether or not the mark value MARK associated with the leaf node (L) reached in step ST83 matches the set value of the variable layer value. If they match, the process proceeds to step ST91.
On the other hand, the CPU 14a proceeds to step ST82 and traverses other lower-layer nodes when they do not match.
Step ST91:
The CPU 14a indicates a matrix indicating the image object data assigned to the leaf node (L) reached in step ST83, and an operation associated with the branch node located on the route from the leaf node to the root node (R). The matrix is output to the graphic accelerator 11 as matrix data MIX. That is, the CPU 14a causes the graphic accelerator 11 to perform drawing processing corresponding to the leaf node (L).

Step ST92:
The CPU 14a sets the mark value MARK of the root node (R) and branch node from which all the leaf nodes (L) located in the lower layer are selected to “100” based on the leaf node (L) that has finally drawn. Update.
Step ST93:
The CPU 14a determines whether or not the mark value MARK of the root node (R) is layerMax which is the maximum value of the layer value VL. If so, the process is finished for the scene graph data SCENb. If not, the process proceeds to step ST81.

According to the data processing device 1a of the present embodiment, the CPU 14a skips the traversal of the scene graph data SCEN as necessary according to the library program LIBa as described above, so that each layer value VL contains the scene graph data SCEN. Compared with the conventional system that traverses all the nodes, the amount of processing accompanying traversing can be reduced, and the processing time can be shortened. For this reason, it can be introduced into a device such as a mobile phone having low CPU performance.
Moreover, since the data processing device 1a does not involve bit operation, it can be implemented even in a program language that does not support bit operation.

In the first and second embodiments described above, for example, among the nodes included in the scene graph, the layer values of most of the nodes are the default values, and other values are locally set only in some of the nodes. If the number of layers used is small, or the layer values of all nodes are the default values, the sort graph may not be sorted depending on the configuration of the scene graph. Is good.
Furthermore, even when only a part of the scene graph is drawn, the same procedure may be used, and the program size can be reduced together with the simplicity of the algorithm. This is an effective implementation method for environments where the resources of computers such as mobile phones are limited.

  The present invention is applicable to, for example, a data processing apparatus that displays a three-dimensional image.

FIG. 1 is a diagram schematically showing an example of a scene graph. FIG. 2 schematically shows how the scene graph of FIG. 1 is traversed. FIG. 3 is a diagram for explaining an example of a scene graph using branch nodes. FIG. 4 is a diagram for explaining the related art of the present invention. FIG. 5 is a diagram for explaining the related art of the present invention. FIG. 6 is a configuration diagram of the data processing apparatus according to the first embodiment of the present invention. FIG. 7 is a diagram for explaining the processing procedure of the data processing apparatus shown in FIG. FIG. 8 is a flowchart for explaining a procedure of processing executed by the CPU shown in FIG. 6 according to the library program. FIG. 9 is a diagram for explaining a scene graph generated by the CPU shown in FIG. 6 based on the program RPG. FIG. 10 is a diagram for explaining scene graph data generated by the CPU shown in FIG. 6 based on the library program. FIG. 11 is a diagram for explaining the traversing process by the CPU shown in FIG. 6 when “−1” is set in the variable layer. FIG. 12 is a diagram for explaining the traversing process by the CPU shown in FIG. 6 when “0” is set in the variable layer. FIG. 13 is a diagram for explaining traversing processing by the CPU shown in FIG. 6 when “1” is set in the variable layer. FIG. 14 is a diagram for explaining the traversing process by the CPU shown in FIG. 6 when “2” is set in the variable layer. FIG. 15 is a flowchart for explaining traversing processing by the CPU shown in FIG. 6 in the first embodiment of the present invention. FIG. 16 is a flowchart for explaining the processing procedure of the data processing apparatus according to the second embodiment of the present invention. FIG. 17 is a diagram for explaining scene graph data generated by the data processing apparatus according to the second embodiment of the present invention in accordance with the library program. FIG. 18 is a diagram for explaining the mark values assigned to each node of the scene graph after the process for “−1” is completed for the variable layer in the second embodiment of the present invention. FIG. 19 is a diagram for explaining the mark values assigned to each node of the scene graph after the process for “0” is completed for the variable layer in the second embodiment of the present invention. FIG. 20 is a diagram for explaining the mark values assigned to each node of the scene graph after the processing for “1” is completed in the variable layer in the second embodiment of the present invention. FIG. 21 is a diagram for explaining the mark values assigned to each node of the scene graph after the process for “2” is completed in the variable layer in the second embodiment of the present invention. FIG. 22 is a flowchart for explaining traversing processing by the CPU in the second embodiment of the present invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,1a ... Data processing apparatus, 10 ... Input part, 11 ... Graphic accelerator, 12 ... Monitor, 13, 13a ... Memory, 14, 14a ... CPU, PRG ... Program, LIB, LIBa ... Library program

Claims (9)

Execution stage data indicating which drawing process is assigned to a plurality of nodes constituting the tree, and each of the nodes executes the drawing process assigned to the node in a plurality of processing stages. Is selected, and the drawing process assigned to the node associated with the execution stage data indicating the selected processing stage is selected in the selected processing stage. A program executed by a data processing device that controls to be executed,
The data processing device includes preprocessing means for performing preprocessing of the drawing processing, and execution control means for executing the drawing processing,
Based on the execution stage data , the pre-processing means is configured to select the lower layer node in the selected processing stage for each of the nodes in which at least a lower layer node exists on the tree among the plurality of nodes constituting the tree. A first procedure for associating index data indicating whether or not to execute the drawing process with the node;
The execution control means sequentially selects the plurality of processing steps, and in the selected processing step, searches for the tree from a root node toward a leaf node. when the identification information indicates that the index data associated with the first procedure is to perform the drawing process of the lower layer node in the selected process step, searches said lower node of the node, wherein Among the nodes reached by the search, the execution stage data associated with the node determines the start of the drawing process assigned to the node indicating the selected processing stage, and executes the drawing process of the lower node. If not, a second procedure for skipping the search for the lower node of the node ;
For causing the data processing apparatus to execute the program. In the first procedure , the pre-processing means includes , for each of the plurality of nodes constituting the tree, a plurality of bits associated with each of the plurality of processing stages, and the lower layer of the node Generating the index data in which the bit associated with the execution stage indicated by the execution stage data associated with the node is set to a first logical value and the other bits are set to a second logical value The index data is associated with the node,
In the second procedure , when the execution control means reaches the node by the search, the execution control means selects the selected one of the plurality of bits constituting the index data associated with the node in the first procedure . The program according to claim 1, wherein the lower layer node of the node is searched on condition that the first logical value is set in the bit associated with a processing stage. In the first procedure , the preprocessing means is the earliest of the execution stages indicated by the execution stage data associated with the lower node of the node for each of the plurality of nodes constituting the tree. Associating the indicator data indicating the execution stage,
In the second procedure , when the execution control means reaches the node by the search, the index data associated with the node in the first procedure indicates the selected processing stage. The lower layer node of the node is searched, the selected processing stage is determined to start execution of the drawing process assigned to the node indicated by the execution stage data, and the execution start is associated with the already determined node. The program according to claim 1, wherein the execution stage data is updated to indicate non-execution, and the index data of an upper layer node located in an upper layer of the node is updated to reflect the update result. The node is assigned calculation data or attribute data that defines the rendering process assigned to the node,
2. The program according to claim 1, wherein in the second procedure, the execution control unit outputs the calculation data or the attribute data assigned to the node that has decided to start the execution to an execution destination of the drawing process. . The node is assigned with at least one of an image object assigned to the node, a display position of the image object on the screen, and an operation for specifying a posture or enlargement / reduction when the image object is displayed on the screen. The program according to claim 4. Execution stage data indicating which drawing process is assigned to a plurality of nodes constituting the tree, and each of the nodes executes the drawing process assigned to the node in a plurality of processing stages. Is selected, and the drawing process assigned to the node associated with the execution stage data indicating the selected processing stage is selected in the selected processing stage. A data processing device that controls to be executed,
Based on the execution stage data, the drawing process of the lower layer node is executed in the selected processing stage for each of the nodes in which the lower level node exists on the tree among the plurality of nodes constituting the tree. Preprocessing means for associating index data indicating whether or not to the node;
The plurality of processing steps are selected in order, and in the selected processing step, the tree is searched from the root node toward the leaf node, and when the node is reached in the search process, the preprocessing means corresponds to the node. when attached has the index data indicates that executes the drawing process of the lower layer node in the selected process step, searches said lower node of the node, among the nodes that have reached by the search, When the execution stage data associated with the node does not indicate that the drawing process assigned to the node indicating the selected processing stage is to be started and the lower layer node is to be executed. Execution control means for skipping the search for the lower node of the node ;
A data processing apparatus. The node is assigned with at least one of an image object assigned to the node, a display position of the image object on the screen, and an operation for specifying a posture or enlargement / reduction when the image object is displayed on the screen. The data processing apparatus according to claim 6. The node is assigned calculation data or attribute data that defines the drawing process assigned to the node,
The execution control means further includes execution means for executing a drawing process assigned to the node determined to start execution,
The execution control means outputs the calculation data or the attribute data assigned to the node that has determined the execution start to the execution means,
The data processing apparatus according to claim 6, wherein the execution unit performs the process based on the calculation data or the attribute data input from the execution control unit. Execution stage data indicating which drawing process is assigned to a plurality of nodes constituting the tree, and each of the nodes executes the drawing process assigned to the node in a plurality of processing stages. Is selected, and the drawing process assigned to the node associated with the execution stage data indicating the selected processing stage is selected in the selected processing stage. A data processing method controlled by a data processing device to be executed,
The data processing device includes preprocessing means for performing preprocessing of the drawing processing, and execution control means for executing the drawing processing,
Based on the execution stage data , the pre-processing means is configured to select the lower layer node in the selected processing stage for each of the nodes in which at least a lower layer node exists on the tree among the plurality of nodes constituting the tree. A first step of associating index data indicating whether or not to execute the process with the node;
The execution control means sequentially selects the plurality of processing steps, and in the selected processing step, searches for the tree from a root node toward a leaf node. when the identification information indicates that the index data associated with said first step is to perform the drawing process of the lower layer node in the selected process step, searches said lower node of the node, wherein Among the nodes reached by the search, the execution stage data associated with the node determines the start of the drawing process assigned to the node indicating the selected processing stage, and executes the drawing process of the lower node. If not, a second step of skipping the search for the lower node of the node ;
A data processing method.

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