JP4406971B2 - Data processing apparatus, data processing method, and recording medium - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a data processing apparatus, a data processing method, and a recording medium, and in particular, transmits digital content via an IEEE1394 serial bus or the like so that recording can be performed by a nonstandard recording apparatus or the like. The present invention relates to a data processing apparatus, a data processing method, and a recording medium.
[0002]
[Prior art]
For example, communication according to the IEEE (Institute of Electrical and Electronics Engineers) 1394 standard, which is one of the serial bus standards, can perform isochronous transfer of data and must be reproduced in real time such as images and sounds. It is suitable for the transfer of digital data, and has received much attention due to the recent demand for multimedia communication.
[0003]
By the way, since digital contents such as digital video data and digital audio data can be copied many times without deteriorating the image quality and sound quality, it is necessary to protect the copyright holder from illegal copying. .
[0004]
Therefore, 5CDTCP is a standard for protecting digital contents when the digital contents are transmitted between devices connected via the IEEE1394 serial bus by five companies including Sony Corporation, the applicant of the present application. (Five Company Digital Transmission Content Protection) (hereinafter referred to as DTCP as appropriate) has been established.
[0005]
In DTCP, prior to transmission of non-copy-free digital content, the receiving side mutually authenticates whether or not copy control information for controlling copying can be handled correctly, and then the transmitting side encrypts the digital content. The encrypted digital content is decrypted at the receiving side.
[0006]
Encryption of digital content by DTCP is performed using a key that changes over time and that key. The encrypted digital content including the key used for the encryption is transmitted on the IEEE1394 serial bus, and on the receiving side, the encrypted digital content is decrypted using the key included therein. The
[0007]
Here, according to DTCP, precisely, an initial value of a key and a flag indicating a change timing of a key used for encrypting the digital content are encrypted digital content (hereinafter referred to as encrypted content as appropriate). ). On the receiving side, the key used for encryption is generated by changing the initial value of the key included in the encrypted content at the timing of the flag included in the encrypted content. The encrypted content is decrypted. In the present specification, since it may be considered that the encrypted content includes a key for decrypting the encrypted content, it will be considered as follows.
[0008]
[Problems to be solved by the invention]
From the above, for example, digital content received by a digital CS (Communication Satellite) tuner cannot be recorded by a non-standard DVCR (Digital Video Tape Recorder) or the like that cannot properly handle copy control information via an IEEE1394 serial bus. .
[0009]
However, in the future, it is expected that there will be an increasing need for usage forms in which digital content received by a digital CS tuner is transmitted to the DVCR via the IEEE1394 serial bus and recorded.
[0010]
Also, if the encrypted content output from the digital CS tuner is recorded as it is with the DVCR, the digital content can be protected from illegal copying, but the recorded encrypted content cannot be viewed. That is, conventionally, it has been difficult to reproduce encrypted content recorded by DVCR, input it to a digital CS tuner, and decrypt it.
[0011]
The present invention has been made in view of such circumstances, and is intended to protect digital contents from illegal copying and to record them with a non-standard DVCR or the like.
[0012]
[Means for Solving the Problems]
  Of the present inventionOne sideData processing deviceOr recording mediumA key extracting means for extracting a key contained in encrypted data, a storage means for storing the key in association with an index for specifying the key, and converting the encrypted data into data of a predetermined format First format converting means, index adding means for adding an index associated with the key to the position of the data in the predetermined format, and data in the predetermined format to which the index is added. A first output means for outputting to the outside, an index extracting means for extracting an index from data of a predetermined format supplied from the outside, and a second for converting the data of the predetermined format into encrypted data of the original format Format conversion means and the encrypted data at the position where the index was included Includes a key adding unit for adding the key associated with the index, the encrypted data key has been added, and a second output means for outputting to the outsideA data processing device or a recording medium on which a program for causing a computer to function as a data processing device is recorded.
[0016]
  A data processing method according to one aspect of the present invention includes:Data processing deviceA key extracting step for extracting a key included in the encrypted data; a storing step for storing the key in association with an index for specifying the key; and a step for converting the encrypted data into data of a predetermined format. 1 format conversion step, an index adding step for adding an index associated with the key to the position of the data in the predetermined format, and the data in the predetermined format to which the index is added A first output step for outputting data, an index extraction step for extracting an index from data of a predetermined format supplied from the outside, and a second format for converting the data of the predetermined format into encrypted data of the original format The conversion step and the index of the encrypted data Rare which was located, including a key adding step of adding the key associated with that index key is added to the encrypted data, and a second output step of outputting to the outsideData processing method.
[0018]
  Of the present inventionOne sideIn the data processing device, the data processing method, and the recording medium, the key included in the encrypted data is extracted, and the key is stored in association with the index for specifying the key. Furthermore, the encrypted data is converted into data of a predetermined format, and an index associated with the key is added to the position of the data of the predetermined format, which is output to the outside. On the other hand, an index is extracted from data of a predetermined format supplied from the outside, and the data of the predetermined format is converted into encrypted data of the original format. Then, a key associated with the index is added to the encrypted data at the position where the index was included, and the encrypted data is output to the outside.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows a configuration example of an embodiment of a digital satellite broadcast receiving system to which the present invention is applied.
[0020]
A digital satellite broadcast wave broadcast from a digital satellite broadcast station (not shown) is received by the antenna 1 and supplied to the digital CS tuner 2. The digital CS tuner 2 has a specification conforming to DTCP, detects a received signal in a predetermined frequency band from a signal supplied from the antenna 1, demodulates it, and uses it as an MPEG (Moving Picture Experts Group) transport stream. Further, the digital CS tuner 2 extracts a predetermined one channel out of TS packets (Transport Stream packets) constituting the transport stream, and performs MPEG2 encoding included in the extracted TS packets. Video data and audio data are MPEG2 decoded. Then, the video data or audio data obtained as a result of the decoding is supplied to the monitor 3 and is displayed or output as an image, respectively.
[0021]
Also, in the digital CS tuner 2, one or more channel TS packets are extracted from the transport stream and encrypted by a method compliant with DTCP. The encrypted TS packet (hereinafter referred to as an encrypted TS packet as appropriate) is supplied to the conversion device 4 via the IEEE1394 serial bus.
[0022]
Here, the conversion device 4 performs communication conforming to DTCP when exchanging digital content with the digital CS tuner 2 via the IEEE1394 serial bus. Therefore, the digital CS tuner 2 and the conversion device 4 both use the time-changing key after performing mutual authentication, encrypt the digital content, and use the resulting encrypted content for encryption. The key is output on the IEEE1394 serial bus.
[0023]
In the conversion device 4, the encrypted TS packet from the digital CS tuner 2 is format-converted into a DIF (Digital Interface) block of SD (Standard density) standard, and is supplied to the DVCR 5 via the IEEE1394 serial bus. In the DVCR 5 which is a DV (Digital Video) device, the DIF block from the conversion device 4 is recorded on a digital video tape (not shown).
[0024]
Here, the details of the DIF format are described in, for example, Specification of Consumer Use Digital VCRs compiled at the HD Digital VCR Conference.
[0025]
Further, in the DVCR 5, the DIF block recorded on the digital video tape is reproduced and supplied to the conversion device 4 via the IEEE1394 serial bus. In the conversion device 4, the format of the DIF block from the DVCR 5 is converted into the original encrypted TS packet and supplied to the digital CS tuner 2 via the IEEE1394 serial bus. In the digital CS tuner 2, the encrypted TS packet from the conversion device 4 is decrypted using the key included therein, and further MPEG decoded. Then, the video data or audio data obtained as a result of the decoding is supplied to the monitor 3 and is displayed or output as an image, respectively.
[0026]
Next, FIG. 2 shows a configuration example of the digital CS tuner 2 of FIG.
[0027]
A reception signal output when the antenna 1 receives a digital satellite broadcast wave is supplied to the front end unit 12.
[0028]
The front end unit 12 demodulates a reception signal from the antenna 1 to obtain a transport stream, and supplies the transport stream to the descrambler 13. The descrambler 13 unscrambles the transport stream from the front end unit 12 and supplies it to the switch 14. The switch 14 selects a transport stream supplied from the descrambler 13 and outputs the selected transport stream to a DEMUX (demultiplexer) 15.
[0029]
The DEMUX 15 extracts a TS packet of a predetermined channel from the transport stream supplied from the switch 14 under the control of the CPU 21 and supplies the TS packet to the AV decoder 16. The AV decoder 16 performs MPEG (Moving Picture Experts Group) decoding of the TS packet from the DEMUX 15 under the control of the CPU 21 and outputs the resulting video data and audio data to the OSD (On Screen Display) processing unit 17. To do. In the OSD processing unit 17, under the control of the CPU 21, predetermined necessary images (for example, display of volume, selected channel, etc.) are superimposed on the video data from the AV decoder 16, and D / A (Digtal / Analog) is output to the converter 18. The D / A converter 18 converts the digital content (here, video data and audio data) output from the OSD processing unit 17 into an analog signal by D / A conversion, and outputs the analog signal, for example, to the monitor 3 or the like.
[0030]
As described above, the digital content broadcast as the digital satellite broadcast is displayed on the monitor 3.
[0031]
On the other hand, when recording digital content broadcast as a digital satellite broadcast, the switch 14 selects a transport stream from the descrambler 13 and supplies it to a link IC (LINK Integrated Curcuit) 20. The link IC 20 performs processing of the link layer in the layer structure of the IEEE1394 serial bus under the control of the CPU 21 and encrypts the transport stream from the switch 14 in accordance with DTCP. That is, the link IC 20 encrypts the transport stream using an 8-byte key that is changed about every 30 seconds, and further, the key is moved to a position immediately before the first TS packet encrypted by the key. By inserting (adding), an encrypted TS packet is obtained. Then, the link IC 20 arranges this encrypted TS packet in an isochronous packet and supplies it to a PHY IC (PHY IC) 19. The phi IC 19 isochronously transfers the isochronous packet from the link IC 20 to the conversion device 4 via the IEEE1394 serial bus.
[0032]
As described above, TS packets as digital contents broadcast as digital satellite broadcasts are supplied to the conversion device 4 via the IEEE1394 serial bus, and the conversion device 4 converts them into DIF blocks and other processes. Is applied to the DVCR 5 via the IEEE1394 serial bus and recorded.
[0033]
Next, when the digital content recorded by the DVCR 5 is reproduced as described above, the DVCR 5 reproduces the DIF block as the digital content and supplies it to the conversion device 4 via the IEEE1394 serial bus. . In the conversion device 4, the DIF block from the DVCR 5 is converted into a TS packet and other processes. Further, in the conversion device 4, an isochronous packet in which TS packets are arranged is configured and is isochronously transferred to the digital satellite tuner 2 via the IEEE1394 serial bus.
[0034]
In the digital satellite tuner 2, the phi IC 19 receives the isochronous packet in which the TS packet (encrypted TS packet) is arranged from the conversion device 4 and supplies it to the link IC 20. The link IC 20 decrypts the encrypted TS packet arranged in the isochronous packet from the phi IC 19 under the control of the CPU 21 using the key added (included) there, and supplies the decrypted TS packet to the switch 14. . The switch 14 selects the TS packet from the link IC 20 and outputs it to the DEMUX 15, and thereafter, the DEMUX 15, the AV decoder 16, the OSD processing unit 17, and the D / A converter 18 perform the same processing as described above. Then, the image and sound as digital contents recorded by the DVCR 5 are output from the monitor 3.
[0035]
The link IC 20 outputs the packet received from the phi IC 19 to the switch 14 when AV data (video data, audio data) is arranged. Further, the link IC 20 outputs the packet received from the phi IC 19 to the CPU 21 when the command is arranged.
[0036]
The CPU 21 executes the program stored in the memory 22 to control the DEMUX 15, AV decoder 16, and OSD processing unit 17, as well as the transaction layer and serial bus management (Serial Bus) in the layer structure of the IEEE1394 serial bus. Management) processing.
[0037]
Further, the memory 22 stores a program (firmware) for causing the CPU 21 to control the DEMUX 15, the AV decoder 16, and the OSD processing unit 17, and to perform transaction layer and serial bus management processing. In addition, the memory 22 temporarily stores data necessary for the operation of the CPU 21.
[0038]
Next, FIG. 3 shows a configuration example of the conversion device 4 of FIG.
[0039]
The file IC 31 transmits and receives data exchanged with the digital CS tuner 2 via the IEEE1394 serial bus. That is, the phi IC 31 receives a packet transmitted from the digital CS tuner 2 via the IEEE1394 serial bus, supplies the packet to the MPEG link IC (MPEG-LINK-IC) 32, and transmits the packet from the MPEG link IC 32. The data is transmitted to the digital CS tuner 2 via the IEEE1394 serial bus.
[0040]
The MPEG link IC 32 supplies the encrypted TS packet supplied from the phi IC 31 to the packet dividing unit 33, extracts the key added to the encrypted TS packet, and supplies the extracted key to the CPU 35. It has become. Further, the MPEG link IC 32 receives the key supplied from the CPU 35, adds (inserts) the key to the original position of the encrypted TS packet supplied from the packet combining unit 46, and supplies the key to the phi IC 31. It is supposed to be.
[0041]
The packet dividing unit 33 converts the encrypted TS packet from the MPEG link IC 32 into a DIF block.
[0042]
That is, since the TS packet cannot be recorded by the DVCR 5 in the format as it is, the packet dividing unit 33 converts the TS packet into a DIF block that can be recorded by the DVCR 5.
[0043]
Specifically, the DIF block is configured with 80 bytes as shown in FIG. An ID (Identification) for identifying the DIF block is arranged in the first 3 bytes, and data is arranged in the remaining 77 bytes.
[0044]
On the other hand, a TS packet is generally composed of 188 bytes. For this reason, the packet dividing unit 33 converts the TS packet into a DIF block by dividing the TS packet and arranging it into three DIF blocks as shown in FIG. 4B.
[0045]
That is, an ID is arranged in the first 3 bytes of the three DIF blocks as shown in FIG. Further, in all three DIF blocks, 13-byte 0 as dummy data is arranged after 3-byte ID. In the three DIB blocks, the 188-byte TS packet is divided and arranged in the remaining 64 bytes after the dummy data. However, in the embodiment of FIG. 4, 64 bytes of the 188-byte TS packet (TRS) are arranged in the first and second DIF blocks of the three DIF blocks. In the block, the remaining 60 bytes of the 188-byte TS packet and a 4-byte time stamp (TS (Time Stamp)) output from a cycle timer 43 described later are arranged.
[0046]
Returning to FIG. 3, the computing unit 34 adds an index supplied from the CPU 35 to the DIF block from the packet dividing unit 33 and outputs it to the computing unit 38. That is, the CPU 35 associates an index that can identify the key, such as the current date and time, with the key added from the MPEG link IC 32 and added to the encrypted TS packet, and calculates the index. The computing unit 34 converts the index supplied from the CPU 35 in this way into the DIF in which the encrypted TS packet to which the key associated with the index is added is arranged. It is added to the block. Therefore, according to the index added to the DIF block, it is recognized at which position in the sequence of the encrypted TS packet output from the MPEG link IC 32 to the packet dividing unit 33 the key associated with the index is arranged. can do.
[0047]
Here, as shown in FIG. 5, the DIF block is transmitted to a DV device such as DVCR5 with 150 blocks as one unit, and among the 150 DIF blocks, the first DIF block (header section) 149 blocks (except for this) are recorded on one track of the digital video tape. In the computing unit 34, the index associated with the key used for decrypting the encrypted TS packet arranged in the DIF block constituting the unit as shown in FIG. 5 is, for example, the DIF block indicated by V0 in FIG. Are arranged in a predetermined DIF block.
[0048]
Returning again to FIG. 3, the CPU 35 performs various processes by executing the program stored in the memory 36.
[0049]
That is, as described above, the CPU 35 associates an index with the key added to the encrypted TS packet supplied from the MPEG link IC 32 and supplies the index to the calculator 34. Further, the CPU 35 supplies the associated index and key pair to the key memory 37 for storage. The CPU 35 receives an index from the index extraction unit 45, reads a key associated with the index from the key memory 37, and supplies the key to the MPEG link IC 32. Furthermore, the CPU 35 controls a FIFO (First In First Out) unit 39 and an SD link IC (SD-LINK-IC) 40.
[0050]
The memory 36 stores a program for causing the CPU 35 to perform the processing as described above. Further, the memory 36 temporarily stores data necessary for the operation of the CPU 35. The key memory 37 temporarily stores a set of an index and key memory supplied from the CPU 35. In DTCP, as described above, the 8-byte key used for encryption / decryption of the TS packet is updated about every 30 seconds. Therefore, every time one hour is recorded in the DVCR 5, the key memory 37 is updated. In this case, about 9800 bytes of keys and indexes associated with these keys are stored.
[0051]
The arithmetic unit 38 adds the time stamp output from the cycle timer 43 to the DIF block output from the arithmetic unit 34 and outputs it to the FIFO unit 39.
[0052]
The FIFO unit 39 temporarily stores the DIF block output from the SD link IC 40 during reproduction, temporarily stores the input FIFO 39A output to the comparison unit 44, and the DIF block output from the computing unit 38 during recording, and the SD link IC 40 And an output FIFO 39B that outputs to the output.
[0053]
Here, the data rate of the transport stream is generally 4 Mbps (Bit Per Second). On the other hand, if the DVCR 5 conforms to the SD standard, the recording rate is about 25 Mbps. Therefore, if the DIF block converted from the TS packet is recorded by the DVCR 5 without performing time axis control in particular, a large recording area of the digital video tape is not used, and the recording efficiency is poor. Therefore, the conversion device 4 temporarily stores the DIF block in the input FIFO 39A or the output FIFO 39B, thereby performing time-axis expansion or time-axis compression, respectively, between the transport stream data rate and the DVCR 5 recording rate. Thus, efficient recording can be performed in the DVCR5.
[0054]
In the output FIFO 39B, when the DIF block is recorded, the time axis compression is performed by temporarily storing the DIF block, but the original time interval between TS packets is lost by this time axis compression. Therefore, at the time of reproduction, it is necessary to restore the lost time interval. For this purpose, the calculator 38 adds a time stamp to the DIF block.
[0055]
As described above, the method of absorbing the difference between the data rate of the transport stream and the recording rate of the DVCR, performing efficient recording, and normally reproducing the data recorded as described above, The details are disclosed in Japanese Patent Application Laid-Open No. 11-74796 (Japanese Patent Application No. 9-231943) previously filed by the present applicant.
[0056]
The SD link IC 40 reads the DIF block stored in the output FIFO 39B of the FIFO unit 39 under the control of the CPU 35, arranges it in an isochronous packet, and supplies it to the phi IC (PHY-IC) 41. The SD link IC 40 receives the isochronous packet supplied from the phi IC 41 and supplies the DIF block arranged there to the input FIFO 39A of the FIFO unit 39. Furthermore, the SD link IC 40 supplies a 60 Hz clock to a PLL (Phase Lock Loop) circuit 42, for example.
[0057]
The phi IC 41 isochronously transfers the isochronous packet from the SD link IC 40 to the DVCR 5 via the IEEE1394 serial cable, and receives the isochronous packet that is isochronously transferred from the DVCR5 via the IEEE1394 serial bus. This is supplied to the link IC 40.
[0058]
The PLL circuit 42 outputs a predetermined clock to the cycle timer 43 in synchronization with the clock from the SD link IC 40. The cycle timer 43 counts the clock from the PLL circuit 42 and supplies the count value as a time stamp to the arithmetic unit 38 and the comparison unit 44.
[0059]
The comparison unit 44 compares the time stamp added to the DIF block stored in the input FIFO 39A with the time stamp output by the cycle timer 43, and the time stamp that matches the output of the cycle timer 43 is added. The DIF block is read from the input FIFO 39A and is output to the index extraction unit 45, so that the time interval between TS packets damaged by the time axis compression is restored as described above. It has become.
[0060]
The index extraction unit 45 extracts the index added to the DIF block from the comparison unit 44, outputs the index to the CPU 35, and outputs the DIF block to the packet synthesis unit 46.
[0061]
As shown in FIG. 4B, the packet combining unit 46 restores the TS packet divided and arranged in three DIF blocks by combining the three DIF blocks, and sends it to the MPEG link IC 32. It is designed to output.
[0062]
Next, with reference to the flowchart of FIG. 6, processing performed when the digital content is recorded by the DVCR 5 in the conversion device 4 will be described.
[0063]
When recording digital content with the DVCR 5, as described above, an isochronous packet in which an encrypted TS packet is arranged is transmitted from the digital CS tuner 2 to the conversion device 4 via the IEEE1394 serial bus. The isochronous packet is received by the phi IC 31. The phi IC 31 outputs the received isochronous packet to the MPEG link IC 32. When the MPEG link IC 32 receives the isochronous packet, the encrypted TS packet arranged in the isochronous packet is sent to the packet dividing unit 33 in step S1. Supply.
[0064]
In step S1, the packet dividing unit 33 divides the encrypted TS packet from the MPEG link IC 32, converts it into three DIF blocks as described with reference to FIG.
[0065]
In step S2, the CPU 35 determines whether or not a key has been added to the encrypted TS packet divided into the DIF blocks output from the packet dividing unit 33. That is, as described above, when a key is added to the encrypted TS packet received from the phi IC 31, the MPEG link IC 32 extracts the key and supplies it to the CPU 35. In step S2, the CPU 35 determines whether the key has been added to the encrypted TS packet divided into the DIF blocks output from the packet dividing unit 33 depending on whether or not the key has been supplied from the MPEG link IC 32. Determine if.
[0066]
If it is determined in step S2 that the key is not added to the encrypted TS packet, the calculator 34 outputs the DIF block obtained by converting the encrypted TS packet to the calculator 38, and steps S3 and S4. Is skipped and the process proceeds to step S5.
[0067]
If it is determined in step S2 that a key is added to the encrypted TS packet, the process proceeds to step S3, and the CPU 35 associates an index with the key, that is, the key supplied from the MPEG link IC 32. The index is output to the computing unit 34. The computing unit 34 adds the index from the CPU 35 to the DIF block from the packet dividing unit 33 and outputs it to the computing unit 38.
[0068]
Then, the process proceeds to step S4, and the CPU 35 supplies the key memory 37 with the set of the index output to the computing unit 34 and the key associated therewith, and the process proceeds to step S5.
[0069]
In step S5, the calculator 38 adds the time stamp output from the cycle timer 43 to the DIF block output from the calculator 34, proceeds to step S6, and outputs it to the output FIFO 39B of the FIFO unit 39. In the output FIFO 39B, the DIF block from the arithmetic unit 38 is stored. The DIF block stored in the output FIFO 39B is read in accordance with the control of the CPU 35, supplied to the DVCR 5 via the SD link IC 40 and the phi IC 41 and the IEEE 1394 serial bus, and stored therein.
[0070]
After the processing of step S6, the process proceeds to step S7, where it is determined whether or not the next encrypted TS packet has been transmitted from the digital CS tuner 2 via the IEEE1394 serial bus. The encrypted TS packet is received by the phi IC 31 and supplied to the packet dividing unit 33 via the MPEG link IC 32. And it returns to step S1 and the same process is repeated hereafter.
[0071]
If it is determined in step S7 that the next encrypted TS packet has not been transmitted from the digital CS tuner 2 via the IEEE1394 serial bus, that is, the transmission of the encrypted TS packet to be recorded is completed. If so, the process ends.
[0072]
As described above, in the conversion device 4 conforming to the DTCP standard, the key used for encryption and decryption included in the encrypted TS packet from the digital CS tuner 2 is extracted, and the key is specified. The encrypted TS packet is converted into a DIF block that can be recorded by the DVCR 5, and the key is included in the DIF block at the position where the key is included. Since the index is added and output to the external DVCR 5, the digital content can be protected from illegal copying and recorded by the DVCR 5 outside the DTCP standard.
[0073]
That is, in the IEEE1394 serial bus connecting the digital CS tuner 2 and the conversion device 4 and also in the IEEE1394 serial bus connecting the conversion device 4 and the DVCR 5, the data transferred there is encrypted. Digital content can be protected from illegal copying. Further, since the digital content output from the digital CS tuner 2 is supplied to the DVCR 5 via the conversion device 4 that conforms to the DTCP standard, the digital CS tuner 2 outputs the DVCR 5 that does not conform to the DTCP standard. Digital contents can be recorded.
[0074]
Next, with reference to the flowchart of FIG. 7, the process performed when the conversion apparatus 4 reproduces the digital content recorded by the DVCR 5 as described above will be described.
[0075]
The DIF block reproduced by the DVCR 5 is transferred to the conversion device 4 via the IEEE1394 serial bus. In the conversion device 4, the DIF block from the DVCR 5 is received by the phi IC 41 and supplied to the SD link IC 40. The SD link IC 40 sequentially supplies the DIF blocks from the phi IC 41 to the input 39A of the FIFO unit 39 for storage.
[0076]
In step S11, the comparison unit 44 compares the time stamp added to the oldest DIF block stored in the input FIFO 39A with the time stamp supplied from the cycle timer 43, and whether they are equal. Determine if. If it is determined in step S11 that the time stamp added to the DIF block is not equal to the time stamp of the cycle timer 43, the process returns to step S11.
[0077]
When it is determined in step S11 that the time stamp added to the DIF block is equal to the time stamp of the cycle timer 43, the process proceeds to step S12, and the comparison unit 44 adds the time stamp. The DIF block and the DIF block in which the other part of the encrypted TS packet partially arranged in the DIF block is read from the input FIFO 39A and output to the index extraction unit 45.
[0078]
In step S13, the index extraction unit 45 determines whether or not an index is added to the DIF block from the comparison unit 44. If not, the index extraction unit 45 outputs the DIF block to the packet synthesis unit 46. Skipping S14 and S15, the process proceeds to step S16.
[0079]
If it is determined in step S13 that an index is added to the DIF block from the comparison unit 44, the process proceeds to step S14, where the index extraction unit 45 extracts the index added to the DIF block. , Output to the CPU 35, and proceed to step S15.
[0080]
In step S <b> 15, the CPU 35 reads the key associated with the index from the index extraction unit 35 from the key memory 37 and outputs it to the MPEG link IC 32.
[0081]
In step S16, the packet synthesis unit 46 synthesizes the DIF block from the index extraction unit 45 into the original encrypted TS packet and outputs it to the MPEG link IC 32.
[0082]
If no key is supplied from the CPU 35, the MPEG link IC 32 outputs the encrypted TS packet from the packet combining unit 46 to the Phi IC 31. If the key is supplied from the CPU 35, the MPEG link IC 32 outputs a packet. The key is added to the encrypted TS packet from the synthesizer 46 and output to the phi IC 31. As a result, the encrypted TS packet in the same state as that transferred from the digital CS tuner 2 at the time of recording is transferred from the phi IC 31 to the digital CS tuner 2 via the IEEE1394 serial bus. Then, the digital content transferred from the DVCR 5 via the conversion device 4 in this way is displayed on the monitor 3 as described above.
[0083]
After the process of step S16, the process proceeds to step S17, and it is determined whether or not the DIF block is still stored in the input FIFO 39A. If it is determined in step S17 that the DIF block is still stored in the input FIFO 39A, the process returns to step S11, and the same processing is repeated thereafter.
[0084]
If it is determined in step S17 that the DIF block is not stored in the input FIFO 39A, that is, if the reproduction of the DVCR 5 is completed and all the DIF blocks obtained by the reproduction are processed, the process ends. .
[0085]
As described above, the conversion device 4 extracts the index from the DIF block reproduced by the external DVCR 5, converts the format of the DIF block into an encrypted TS packet, and converts the encrypted TS packet after the conversion. Since the key associated with the index is added to the position where the extracted index was included and output to the external digital CS tuner 2, the digital CS tuner 2 performs the above-described process. Thus, the encrypted TS packet can be decrypted to reproduce an image or sound as digital content.
[0086]
In the above-described case, the conversion device 4 processes the encrypted TS packet from the digital CS tuner 2 without decrypting it. However, the encrypted TS packet may be processed after being decrypted once. Is possible. That is, the encrypted TS packet is decrypted by the MPEG link IC 32 using the key included in the encrypted TS packet, converted to a DIF block, etc., and the SD link IC 40 encrypts the DIF block. From this, it is possible to record in DVCR5. In this case as well, digital contents can be protected from illegal copying and recorded by DVCR 5 outside the DTCP standard.
[0087]
In this case, however, at the time of reproduction, the SD link IC 40 decrypts the encrypted DIF block from the DVCR 5 and then converts it into a TS packet. The MPEG link IC 32 converts the TS packet to the key. It is necessary to output the data to the digital CS tuner 2 after encryption (encryption based on the DTCP standard).
[0088]
In DTCP, 2-bit EMI (Encryption Mode Indicator) is defined as copy control information for controlling copying. When EMI is 00B (B indicates that the previous value is a binary number), it indicates that the digital content is copy-free (Copy-freely), and when EMI is 01B. Indicates that the digital content cannot be copied any more (No-more-copies). Further, when the EMI is 10B, it means that the digital content can be copied only once (Copy-one-generation). When the EMI is 11B, the digital content is copied. Indicates that it is prohibited (Copy-never).
[0089]
The SD link IC 40 of the conversion device 4 (FIG. 3) detects the EMI as described above from the DIF block input thereto, and determines whether to output the DIF block to the external DVCR 5 based on the EMI. It is possible to limit. That is, for example, unless the EMI is Copy-freely, it is possible not to output the DIF block to the DVCR 5 which is a non-DTCP standard device.
[0090]
Furthermore, the SD link IC 40 can operate EMI within a range that does not violate the DTCP standard. That is, for example, when the EMI is 10B representing Copy-one-generation, when the DIF block is output to the external DVCR 5, the EMI is changed to 01B representing No-more-copies. Is possible. The EMI operation can be performed only when the digital content input to the conversion device 4 is output from a terminal other than the input terminal.
[0091]
In the conversion device 4, the CPU 35 checks the type of device connected to the Phi IC 41 via the IEEE1394 serial bus (what the device is) and the manufacturer, and the preset type and manufacturer. It is possible not to output the DIF block other than the above-mentioned apparatus. In this case, it is possible to prevent the output of the DIF block to a device manufactured for the purpose of illegal copying.
[0092]
Next, FIG. 8 shows a configuration example of another embodiment of a digital satellite broadcast receiving system to which the present invention is applied. In the figure, portions corresponding to those in FIG. 1 are denoted by the same reference numerals. That is, the digital satellite broadcast receiving system in FIG. 8 is configured in the same manner as in FIG. 1 except that a digital CS tuner 51 is provided instead of the digital CS tuner 2 and the conversion device 4.
[0093]
The digital CS tuner 51 has a function in which the digital CS tuner 2 and the conversion device 4 in FIG. 1 are integrated.
[0094]
That is, FIG. 9 shows a configuration example of the digital CS tuner 51 of FIG. In the figure, portions corresponding to those of the digital CS tuner 2 of FIG. 2 are denoted by the same reference numerals. That is, the digital CS tuner 51 of FIG. 9 is basically configured in the same manner as the digital CS tuner 2 of FIG. 2 except that a packet dividing unit 61, a packet combining unit 62, and a key memory 63 are newly provided. ing.
[0095]
Similar to the packet dividing unit 33 in FIG. 3, the packet dividing unit 61 converts the TS packet output from the switch 14 into a DIF block and outputs it to the link IC 20. Similar to the packet combining unit 46 of FIG. 3, the packet combining unit 62 converts the format of the DIF block output from the link IC 20 into the original TS packet and supplies it to the switch 14. Similar to the key memory 37 of FIG. 3, the key memory 63 stores a set of keys and indexes supplied from the CPU 21.
[0096]
9 stores a program for causing the digital CS tuner 51 to function as the conversion device 4 in addition to the program described with reference to FIG. The processing that is performed is also performed.
[0097]
In the digital CS tuner 51 configured as described above, the digital content broadcast as a digital satellite broadcast is displayed on the monitor 3 in the same manner as in FIG.
[0098]
On the other hand, when recording digital content broadcast as digital satellite broadcast, the switch 14 supplies the transport stream from the descrambler 13 to the packet division unit 61, and the packet division unit 61 uses the transport stream. Are converted into DIF blocks and supplied to the link IC 20.
[0099]
In the link IC 20, under the control of the CPU 21, the TS packet divided into DIF blocks is encrypted using a time-varying key in the same manner as in FIG. Further, in the link IC 20, the key is extracted from the encryption result and supplied to the CPU 21. The CPU 21 associates an index with the key from the link IC 20 and stores it in the key memory 63. Further, the CPU 21 supplies an index associated with the key to the link IC 20, and the index is added to the DIF block in the same way as in the calculator 34 of FIG. 3. Thereafter, in the link IC 20, under the control of the CPU 21, a time stamp is added to the DIF block, the time axis of the DIF block is compressed, and the like is output to the phi IC 19. The phi IC 19 transfers the DIF block from the link IC 20 to the DVCR 5 via the IEEE1394 serial bus, whereby the DIF block is recorded in the DVCR 5.
[0100]
Next, when the DIF block recorded as described above is reproduced by the DVCR 5, the reproduced DIF block is transferred to the digital CS tuner 51 via the IEEE1394 serial bus. In the digital CS tuner 51, the DIF block from the DVCR 5 is received by the phi IC 19 and supplied to the link IC 20. In the link IC 20, the time axis extension of the DIF block is performed, and then the index added to the DIF block is extracted. This index is supplied from the link IC 20 to the CPU 21. When the CPU 21 receives the index from the link IC 20, the key associated with the index is read from the key memory 3 and supplied to the link IC 20. In the link IC 20, the TS packet divided into DIF blocks is decoded using the key from the CPU 21, and is output to the packet combining unit 62.
[0101]
In the packet combining unit 62, the DIF block from the link IC 20 is combined with the original TS packet and supplied to the switch 14. Thereafter, the switch 14, the DEMUX 15, the AV decoder 16, the OSD processing unit 17, and the D / A converter 18 are subjected to the same processing as described above, whereby an image as digital content recorded by the DVCR 5 is obtained. And audio are output from the monitor 3.
[0102]
Next, the series of processes described above can be performed by hardware or software. When the series of processing is performed by software, a computer (CPU 35 in FIG. 3 or CPU 21 in FIG. 9) in which a program constituting the software is incorporated in the conversion device 4 or the digital CS tuner 51 as dedicated hardware. Installed on a general-purpose computer or the like.
[0103]
Therefore, with reference to FIG. 10, a recording medium on which the program for executing the above-described series of processes is installed in a computer and used to make the computer executable is described.
[0104]
The program can be recorded in advance in a hard disk 102 or a semiconductor memory 103 as a recording medium built in the computer 101, as shown in FIG.
[0105]
Alternatively, as shown in FIG. 10B, the program includes a floppy disk 111, a CD-ROM (Compact Disc Read Only Memory) 112, an MO (Magneto optical) disk 113, a DVD (Digital Versatile Disc) 114, a magnetic disk. 115, and can be stored (recorded) in a recording medium such as the semiconductor memory 116 temporarily or permanently. Such a recording medium can be provided as so-called package software.
[0106]
The program is installed in the computer from the recording medium as described above, and as shown in FIG. 10C, the program is wirelessly transmitted from the download site 121 to the computer 101 via the artificial satellite 122 for digital satellite broadcasting. The data can be transferred, or transferred to the computer 123 via a network 131 such as a LAN (Local Area Network) or the Internet, and installed in the built-in hard disk 102 or the like in the computer 101.
[0107]
Here, in the present specification, the processing steps for describing a program for causing the computer to perform various processes do not necessarily have to be processed in time series in the order described in the flowcharts, but in parallel or individually. This includes processing to be executed (for example, parallel processing or processing by an object).
[0108]
Further, the program may be processed by one computer or may be distributedly processed by a plurality of computers. Furthermore, the program may be transferred to a remote computer and executed.
[0109]
Next, FIG. 11 shows a configuration example of the computer 101 in FIG.
[0110]
As shown in FIG. 11, the computer 101 includes a CPU (Central Processing Unit) 142. An input / output interface 145 is connected to the CPU 142 via the bus 141, and the CPU 142 is operated via the input / output interface 145 by the user operating an input unit 147 including a keyboard, a mouse, and the like. When a command is input by the above, a program stored in a ROM (Read Only Memory) 143 corresponding to the semiconductor memory 103 of FIG. Alternatively, the CPU 142 may be a program stored in the hard disk 102, a program transferred from the satellite 122 or the network 131, received by the communication unit 148 and installed in the hard disk 102, or a floppy disk 111 installed in the drive 149. The program read from the CD-ROM 112, the MO disk 113, the DVD 114, or the magnetic disk 115 and installed in the hard disk 102 is loaded into a RAM (Random Access Memory) 144 and executed. Then, the CPU 142 outputs the processing result to the display unit 146 configured with an LCD (Liquid Crystal Display) or the like as needed via the input / output interface 145, for example.
[0111]
In the present embodiment, the case where the present invention is applied to a digital satellite broadcast receiving system that receives digital satellite broadcasts has been described. However, the present invention can be applied to other apparatuses that handle digital contents.
[0112]
In addition, the transport stream in this specification includes a stream composed of 188-byte TS packets, and is decoded by the same principle as that for decoding the TS packets. A stream composed of 130-byte packets used in (Direct Satellite System) is also included.
[0113]
【The invention's effect】
  As described above, the present inventionOne sideAccording to the data processing device, the data processing method, and the recording medium,DeDigital content can be protected from illegal copying and recorded and played back in a predetermined format.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration example of an embodiment of a digital satellite broadcast receiving system to which the present invention is applied.
2 is a block diagram illustrating a configuration example of a digital CS tuner 2 in FIG. 1. FIG.
FIG. 3 is a block diagram illustrating a configuration example of the conversion device 4 in FIG. 1;
4 is a diagram for explaining processing of a packet dividing unit 33 in FIG. 3; FIG.
FIG. 5 is a diagram for explaining processing of the computing unit 34 in FIG. 3;
6 is a flowchart for explaining processing of the conversion apparatus 4 in FIG. 3 when recording is performed by the DVCR 5. FIG.
7 is a flowchart for explaining processing of the conversion device 4 in FIG. 3 when reproduction is performed by the DVCR 5. FIG.
FIG. 8 is a block diagram showing a configuration example of another embodiment of a digital satellite broadcast receiving system to which the present invention is applied.
9 is a block diagram illustrating a configuration example of a digital CS tuner 51 in FIG. 8. FIG.
FIG. 10 is a diagram for explaining a recording medium to which the present invention is applied.
11 is a block diagram illustrating a configuration example of a computer 101 in FIG.
[Explanation of symbols]
1 antenna, 2 digital CS tuner, 3 monitor, 4 conversion device, 5 DVCR, 12 front end unit, 13 descrambler, 14 switch, 15 DEMUX, 16 AV decoder, 17 OSD processing unit, 18 D / A converter, 19 file IC, 20 link IC, 21 CPU, 22 memory, 31 phi IC, 32 MPEG link IC, 33 packet division unit, 34 computing unit, 35 CPU, 36 memory, 37 key memory, 38 computing unit, 39 FIFO unit, 39A input FIFO, 39B output FIFO, 40 SD link IC, 41 Phi IC, 42 PLL circuit, 43 cycle timer, 44 comparison unit, 45 index extraction unit, 46 packet synthesis unit, 51 digital CS tuner , 61 packet division unit, 62 packet synthesis unit, 63 key memory, 101 computer, 102 hard disk, 103 semiconductor memory, 111 floppy disk, 112 CD-ROM, 113 MO disk, 114 DVD, 115 magnetic disk, 116 semiconductor memory, 121 Download site, 122 satellites, 131 network, 141 bus, 142 CPU, 143 ROM, 144 RAM, 145 I / O interface, 146 display unit, 147 input unit, 148 communication unit, 149 drive

Claims (7)

A data processing device that processes encrypted data, which is data encrypted using a predetermined key,
Key extraction means for extracting the key contained in the encrypted data;
Storage means for storing the key in association with an index for specifying the key;
First format conversion means for converting the encrypted data into data of a predetermined format;
Index adding means for adding an index associated with the key to the position of the data in the predetermined format;
First output means for outputting the data of the predetermined format to which the index is added to the outside;
Index extracting means for extracting the index from data of the predetermined format supplied from the outside;
Second format conversion means for converting the data of the predetermined format into the encrypted data of the original format;
A key adding means for adding the key associated with the index to a position where the index is included in the encrypted data;
The encrypted data to which the key is added, the data processing device and a second output means for outputting to the outside. The encrypted data is a transport stream
The data processing apparatus according to 請 Motomeko 1. The predetermined format data is DIF (Digital Interface) format data.
The data processing apparatus according to 請 Motomeko 1. The first output means determines whether or not the data of the predetermined format depends on whether the encrypted data is permitted to be copied or the specifications of a device that receives the data of the predetermined format connected to the outside. Limit output
The data processing apparatus according to 請 Motomeko 1. The first output means operates copy control information for controlling copying of the data when outputting the data of the predetermined format.
The data processing apparatus according to 請 Motomeko 1. A data processing method of a data processing apparatus for processing encrypted data, which is data encrypted using a predetermined key,
The data processing device includes:
Key extraction means for extracting the key contained in the encrypted data;
Storage means for storing the key in association with an index for specifying the key;
First format conversion means for converting the encrypted data into data of a predetermined format;
Index adding means for adding an index associated with the key to the position of the data in the predetermined format;
First output means for outputting the data of the predetermined format to which the index is added to the outside;
Index extracting means for extracting the index from data of the predetermined format supplied from the outside;
Second format conversion means for converting the data of the predetermined format into the encrypted data of the original format;
A key adding means for adding the key associated with the index to a position where the index is included in the encrypted data;
Second output means for outputting the encrypted data to which the key is added to the outside;
Including
A key extracting step in which the key extracting means extracts the key included in the encrypted data;
A storage step in which the storage means stores the key in association with an index for specifying the key;
A first format conversion step in which the first format conversion means converts the encrypted data into data of a predetermined format;
The index adding means, wherein the data of a predetermined format, the key is included location, and index adding step of adding an index associated with that key,
A first output step in which the first output means outputs the data in the predetermined format to which the index is added;
The index extraction means for extracting the index from the data of the predetermined format supplied from the outside; and
A second format conversion step in which the second format conversion means converts the data of the predetermined format into the encrypted data of the original format;
The key adding unit, the encrypted data, the index is included position, a key adding step of adding the key associated with that index,
It said second output means, the data processing method comprising the encrypted data to which the key is added, and a second output step of outputting to the outside. A recording medium on which a program for causing a computer to process encrypted data, which is data encrypted using a predetermined key, is recorded.
Key extraction means for extracting the key contained in the encrypted data;
Storage means for storing the key in association with an index for specifying the key;
First format conversion means for converting the encrypted data into data of a predetermined format;
Index adding means for adding an index associated with the key to the position of the data in the predetermined format;
First output means for outputting the data of the predetermined format to which the index is added to the outside;
Index extracting means for extracting the index from data of the predetermined format supplied from the outside;
Second format conversion means for converting the data of the predetermined format into the encrypted data of the original format;
A key adding means for adding the key associated with the index to a position where the index is included in the encrypted data;
Second output means for outputting the encrypted data to which the key is added to the outside;
To, record medium having a program for causing a computer is recorded.

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