JP4406348B2 - Voltage level detection apparatus and method, and laser output control apparatus and method - Google Patents

Description

  The present invention relates to a voltage level detection apparatus and method for controlling a laser output of a laser beam or the like emitted from a light source such as a semiconductor laser onto an information recording medium such as a DVD, and a technique of a laser output control apparatus and method. Related to the field.

  For example, when recording on a phase change information recording medium such as a DVD-RW or a dye-type information recording medium such as a DVD-R, it is necessary to appropriately control the light emission power (recording power) of laser light. is there. In order to emit this laser light with the same light emission power, a current for driving a semiconductor laser (Laser Diode: hereinafter referred to as “LD” as appropriate) (hereinafter referred to as “LD drive current” as appropriate), light emission power, The correlation characteristics of these are easily fluctuated due to self-heating of the LD. For this reason, APC is generally performed as means for stabilizing the light emission power. Here, “APC (Automatic Power Control)” means a monitor current (monitoring current) generated in proportion to the light emission power by causing a part of the laser light emitted from the LD to enter a photo detector (PD). This is a kind of negative feedback (NFB) control method in which the LD drive current is controlled based on the above and the light emission power is controlled. During playback, the LD drive current is generally superimposed with a high-frequency current to suppress noise. However, since it is a constant current in terms of DC, it is easy to configure a relatively low-band feedback loop. APC can be realized.

  On the other hand, when APC is performed during recording, light emission power changes at a high speed in order to form a mark or space, so that a higher degree of control is required as compared with reproduction during which a constant LD drive current is applied.

  More specifically, for example, for a dye-type information recording medium such as a DVD-R, for example, an LD emission waveform rule constituted by two or more emission powers such as bias power, write power, and peak power. When recording is performed by a so-called “strategy” (see FIG. 3 or FIG. 9), the bias power is detected as follows. That is, for example, when space data (or 14T sync pattern data) having a channel clock of the longest data length of 11T is recorded, an LD drive current that emits light with bias power is provided with a sample hold circuit and the like. Detected by a circuit that implements APC (hereinafter referred to as “APC circuit” as appropriate). If the detected LD driving current for emitting laser light with a bias power is used as a reference, the LD driving current for emitting laser light with another level of power is controlled, so that a relatively low cost component Thus, it is possible to accurately control the light emission power.

JP 2002-57403 A

  In recent years, with the increase in recording speed (writing speed) (for example, 16 times speed, 24 times speed or higher), high speed processing is required in APC circuits. More specifically, as the recording speed increases, it is required to shorten the switching time of the light emission power for recording marks and spaces. More specifically, when recording is performed on a DVD-R at 8 × speed, the light emission power must be switched at a time interval of about several tens of nsec.

  However, in the sample hold circuit included in the APC circuit, as the recording speed increases, the appearance frequency of digital noise (so-called ringing component) that occurs when switching from sampling to holding is increased. Due to the influence of this digital noise, an offset (so-called DC offset) as a direct current component is added to the value of the LD drive current that emits laser light with bias power. Therefore, there is a technical problem that it becomes impossible to accurately control the LD drive current for emitting laser light with bias power and other levels of power.

  As described above, there is a technical problem that accurate APC cannot be realized due to the influence of digital noise accompanying an increase in recording speed.

  Therefore, the present invention has been made in view of the above-described problems. For example, even when the light emission power of the laser light is switched at a high speed, the laser light is emitted with a predetermined light emission power and an appropriate negative power is obtained. It is an object of the present invention to provide a voltage level detection apparatus and method capable of detecting a desired voltage level for performing feedback control, and a laser output control apparatus and method.

  In order to solve the above problem, a voltage level detection apparatus according to claim 1 of the present invention detects a desired voltage level in a voltage signal whose voltage level changes stepwise to a binary level or higher. The hold time is set so that the voltage level of the peak-held voltage signal at the end of the peak hold becomes the predetermined voltage level when the voltage signal changes to the low voltage level side. When the peak hold circuit and the voltage signal change to the high voltage level side, the hold time is set so that the voltage level of the bottom held voltage signal at the end of the bottom hold becomes the predetermined voltage level. And a bottom hold circuit.

  According to a fourth aspect of the present invention, in order to solve the above-described problem, a laser output control device is a light source (semiconductor laser) that emits a recording laser beam irradiated to an information recording medium (DVD-R / RW). ), And a laser driving device (LD driver) for driving the light source so that the laser light is emitted in a stepwise manner with two or more powers, and a pulse is output, and a light receiving element that receives the laser light When the light emission output of the received laser light changes to a lower power side, peak holding of the light emission output is started, and the power of the peak held light emission output at the end of the peak hold becomes desired. A peak hold circuit in which a hold time is set so as to obtain a predetermined power, and the light emission when the light emission output of the received laser light changes to a higher power side. A bottom hold circuit in which a hold time is set so that the power of the light emission output held at the end of the bottom hold becomes the predetermined power, and the predetermined power is used as a reference, Control means for performing negative feedback control of the laser driving device so as to emit the laser light.

  According to a seventh aspect of the present invention, there is provided a voltage level detection method for detecting a desired predetermined voltage level in a voltage signal in which the voltage level changes stepwise to a binary level or more in order to solve the above-mentioned problem. A voltage level detection method in an apparatus, wherein when the voltage signal changes to a low voltage level side, the voltage level of the peak-held voltage signal at the end of the peak hold is set to the predetermined voltage level. A peak hold process in which time is set, and when the voltage signal changes to the high voltage level side, the voltage level of the bottom held voltage signal at the end of the bottom hold is held at the predetermined voltage level. And a bottom hold process in which time is set.

  In order to solve the above problems, a laser output control method according to an eighth aspect of the present invention is a light source (semiconductor laser) that emits a recording laser beam that is irradiated onto an information recording medium (DVD-R / RW). A laser output control method in a laser output control apparatus comprising: a laser drive step of driving the light source so that the laser beam emits light so as to change stepwise beyond two powers, and outputs a pulse A light receiving step for receiving the laser light, and when the light emission output of the received laser light changes to a lower power side, the peak hold of the light emission output is started, and the peak hold at the end of the peak hold. A peak hold process in which a hold time is set so that the power of the emitted light output becomes a desired predetermined power, and the emission of the received laser light. The bottom hold of the light emission output is started when the output changes to a higher power side, and the hold time is set so that the power of the bottom held light emission output at the end of the bottom hold becomes the predetermined power. A bottom hold step, and a control step of performing negative feedback control of the laser driving step so that the laser beam is emitted with the predetermined power as a reference.

  The operation and other advantages of the present invention will be made clear from the best mode for carrying out the invention described below.

(Embodiment related to voltage level detection apparatus)
Hereinafter, a voltage level detection apparatus according to an embodiment of the present invention will be described.

  An embodiment according to the voltage level detection apparatus of the present invention is a voltage level detection apparatus for detecting a desired predetermined voltage level in a voltage signal whose voltage level changes stepwise to a binary level or more, wherein the voltage signal is A peak hold circuit in which a hold time is set so that the voltage level of the peak-held voltage signal at the end of the peak hold becomes the predetermined voltage level when changing to the low voltage level side; and A bottom hold circuit in which a hold time is set so that the voltage level of the bottom-held voltage signal at the end of the bottom hold becomes the predetermined voltage level when changing to the high voltage level side.

  According to the embodiment of the voltage level detection apparatus of the present invention, the voltage signal is output so as to change stepwise to, for example, a binary level of a relatively high voltage level and a relatively low voltage level. Is done. This voltage signal may have a pulse shape.

  According to the present embodiment, for example, the peak value (maximum value) of the voltage signal is peak-held, that is, detected and held by the peak hold circuit. In particular, the hold time of the peak hold circuit is set such that the voltage level of the peak-held voltage signal at the end of the peak hold becomes a predetermined voltage level. This peak hold circuit may be set to a predetermined hold time according to the output speed of the voltage signal, for example. The predetermined hold time corresponding to the output speed in the peak hold can be obtained experimentally, empirically, theoretically or by simulation.

  For example, the bottom value (minimum value) of the voltage signal is bottom-held, that is, detected and held by the bottom hold circuit simultaneously with or before or after the peak hold described above. In particular, the hold time of the bottom hold circuit is set so that the voltage level of the bottom-held voltage signal at the end of the bottom hold becomes a predetermined voltage level. This bottom hold circuit may be set to a predetermined hold time according to the output speed of the voltage signal, for example. The predetermined hold time corresponding to the output speed in the bottom hold can be obtained experimentally, empirically, theoretically, or by simulation.

  In one aspect of the embodiment of the voltage level detection apparatus of the present invention, the peak hold circuit includes a second voltage level side where the voltage signal is lower than the first voltage level from the first voltage level. The peak hold of the voltage signal is started when the voltage is changed to a hold time, and the hold time is set so that the voltage level at the end of the peak hold becomes the second voltage level. Bottom-holds the held voltage signal.

  According to this aspect, for example, the voltage signal is output so as to change stepwise to a binary level of a relatively high first voltage level and a relatively low second voltage level.

  In this aspect, first, the peak value (maximum value) of the voltage signal is peak-held, that is, detected and held by the peak hold circuit. In particular, the hold time of the peak hold circuit is such that when the voltage signal changes from the first voltage level to the low voltage level side, the peak hold of the voltage signal is started and the peak held voltage signal at the end of the peak hold is reached. Is set to be the second voltage level. More specifically, the peak hold circuit may include, for example, an NPN transistor, a capacitor, a constant current source, and the like.

  Next, the bottom value (minimum value) of the voltage signal peak-held by the peak hold circuit is bottom-held, that is, detected and held by the bottom hold circuit. More specifically, the bottom hold circuit may include, for example, a PNP transistor, a capacitor, a constant current source, and the like.

  In another aspect of the voltage level detection apparatus of the present invention, the bottom hold circuit includes a first voltage level side where the voltage signal is higher than the second voltage level from the second voltage level. The bottom hold of the voltage signal is started at the time of change to the hold time, the hold time is set so that the voltage level at the end of the bottom hold becomes the first voltage level, and the peak hold circuit Peak-hold the held voltage signal.

  According to this aspect, for example, the voltage signal is output so as to change stepwise to a binary level of a relatively high first voltage level and a relatively low second voltage level.

  In this aspect, first, the bottom value (minimum value) of the voltage signal is bottom-held, that is, detected and held by the bottom hold circuit. In particular, the hold time of the bottom hold circuit is such that the bottom hold of the voltage signal starts when the voltage signal changes from the second voltage level to the high voltage level, and the bottom held voltage signal at the end of the bottom hold Is set to be the first voltage level.

  Next, the peak value (maximum value) of the voltage signal bottom-held by the bottom hold circuit is peak-held, that is, detected and held by the peak hold circuit.

(Embodiment related to laser output control device)
Hereinafter, a laser output control device according to an embodiment of the present invention will be described.

  In an embodiment of the laser output control apparatus of the present invention, a light source (semiconductor laser) that emits a recording laser beam that is irradiated onto an information recording medium (DVD-R / RW), A laser driving device (LD driver) that drives the light source to emit light so as to change stepwise more than one power, and to output a pulse; a light receiving element that receives the laser light; and The peak hold of the light emission output is started when the light emission output changes to a lower power side, and the hold time is set so that the power of the peak held light emission output at the end of the peak hold becomes a desired predetermined power. Start the bottom hold of the light emission output when the set peak hold circuit and the light emission output of the received laser light change to the higher power side A bottom hold circuit in which a hold time is set so that a power of the bottom-held light emission output at the end of the bottom hold becomes the predetermined power, and the laser light is emitted based on the predetermined power. And a control means for performing negative feedback control of the laser driving device.

  According to the embodiment of the laser output control apparatus of the present invention, for example, under the control of a laser drive apparatus such as an LD driver, for example, a write-once type such as a DVD-R / RW or the like by a light source such as a semiconductor laser A rewritable information recording medium is irradiated with a recording laser beam. This laser beam is used, for example, as a light emission power for forming a recording mark, for example, a relatively high power (ie, write power or recording power) and a relatively low power (ie, bias power, or Light is emitted so as to change stepwise more than two powers (reproduction power). For example, the laser light may be received by a light receiving element such as a photo detector (PD). The light emission output of the received laser beam may have a pulse shape. This light output can be monitored to perform negative feedback control.

  According to the present embodiment, for example, the peak value (maximum value) of the monitored light emission output is peak-held, that is, detected and held by the peak hold circuit. In particular, the hold time of this peak hold circuit starts the peak hold of the light emission output when the monitored light emission output changes, for example, to a relatively low power side, and the peak hold at the end of the peak hold is performed. The light emission output power is set to a desired predetermined power.

  For example, the bottom value (minimum value) of the monitored light emission output is bottom-held, that is, detected and held by the bottom hold circuit simultaneously with or before or after the peak hold described above. In particular, the hold time of this bottom hold circuit starts the bottom hold of the light emission output when the monitored light emission output changes, for example, to a relatively high power side, and the bottom hold at the end of the bottom hold. The light emission output power is set to a desired predetermined power.

  Subsequently, under the control of the control means, the laser driving device drives the light source so that the laser light is emitted at a predetermined power, for example, a bias power, based on the bottom-held light emission output. At the same time, the laser drive device drives the light source to emit light for a predetermined time according to the length of the recording mark, for example, with a recording power (write power) obtained by adding a certain amount of power with the predetermined power as a reference. To do.

  If a sample hold circuit is used instead of the peak hold circuit and the bottom hold circuit, it is difficult to cope with an increase in recording speed (writing speed) (for example, 16 times speed, 24 times speed or higher). It is. More specifically, as the recording speed increases, it is required to shorten the switching time between the first power and the second power for recording marks and spaces. More specifically, when recording is performed on the DVD-R at 8 × speed, the first power and the second power must be switched at a time interval of about several tens of nsec. However, in the sample hold circuit included in the APC circuit, as the recording speed increases, the appearance frequency of digital noise (so-called ringing component) that occurs when switching from sampling to holding is increased. Due to the influence of this digital noise, for example, an offset (so-called DC offset) as a direct current component is added to the value of an LD drive current for driving a light source such as a semiconductor laser so that laser light is emitted with bias power. Resulting in. Accordingly, it becomes impossible to perform proper negative feedback control for emitting laser light with a predetermined bias power and other levels of power. As described above, the negative feedback control of the light emission power cannot be realized due to the influence of the digital noise accompanying the increase in the recording speed.

  On the other hand, according to the present embodiment, for example, a peak hold circuit including an NPN transistor, a capacitor, a constant current source, and the like is provided. In particular, this peak hold circuit is set to a predetermined hold time corresponding to the recording speed, for example. The predetermined hold time corresponding to the recording speed can be obtained experimentally, empirically, theoretically or by simulation. In addition, for example, a bottom hold circuit including a PNP transistor, a capacitor, a constant current source, and the like is provided. Since only analog processing is performed by these two circuits, appropriate negative feedback control of the light emission power can be performed without being affected by digital noise that frequently appears as the recording speed increases in the sample and hold method. It can be realized.

  In one aspect of the embodiment of the laser output control apparatus of the present invention, at least one of the peak hold circuit and the bottom hold circuit has a hold time setting means for setting the hold time, and the hold time setting The means sets the hold time based on the recording speed of the information recording medium.

  According to this aspect, the hold time is appropriately set according to the recording speed. Therefore, appropriate negative feedback control of the light emission power can be realized corresponding to the increase in recording speed.

  Further, in the aspect related to the hold time setting means, the hold time setting means sets a current flowing through at least one of the peak hold circuit and the bottom hold circuit to a predetermined value corresponding to the recording speed. The hold time may be set.

  With this configuration, for example, an information recording apparatus such as a DVD recorder requires little or no special adjustment such as adding a specific function or tuning a specific performance. Therefore, it can be applied to various information recording apparatuses.

(Embodiment related to voltage level detection method)
An embodiment according to a voltage level detection method of the present invention is a voltage level detection method in a voltage level detection apparatus that detects a desired voltage level in a voltage signal whose voltage level changes stepwise to a binary level or higher. A peak hold step in which a hold time is set so that the voltage level of the peak-held voltage signal at the end of the peak hold becomes the predetermined voltage level when the voltage signal changes to the low voltage level side; A bottom hold step in which a hold time is set so that a voltage level of the bottom held voltage signal at the end of bottom hold becomes the predetermined voltage level when the voltage signal changes to a high voltage level side; Is provided.

  According to the embodiment of the voltage level detection method of the present invention, it is possible to receive various benefits of the above-described embodiment of the voltage level detection apparatus of the present invention.

  In the embodiment relating to the voltage level detection method of the present invention, it is possible to appropriately adopt the same aspects as various aspects of the embodiment relating to the voltage level detection apparatus described above.

(Embodiment related to laser output control method)
An embodiment according to a laser output control method of the present invention is a laser output control apparatus including a light source (semiconductor laser) that emits a recording laser beam irradiated to an information recording medium (DVD-R / RW). A laser output control method, wherein the laser light is emitted so as to change stepwise beyond two powers, and the light source is driven so as to output a pulse, and light reception for receiving the laser light. A peak hold of the light emission output is started when the light emission output of the received laser light changes to a lower power side, and the power of the peak held light emission output at the end of the peak hold is desired The peak hold process in which the hold time is set so that the predetermined power is obtained, and the light emission output of the received laser light changes to the higher power side A bottom hold step in which a hold time is set so that the bottom hold of the light emission output is started and the power of the bottom held light emission output at the end of the bottom hold becomes the predetermined power; And a control step of performing negative feedback control of the laser driving step so as to emit the laser light with reference to power.

  According to the embodiment of the laser output control method of the present invention, it is possible to receive various benefits of the above-described embodiment of the laser output control device of the present invention.

  In the embodiment related to the laser output control method of the present invention, it is possible to appropriately adopt the same aspects as the various aspects related to the embodiment related to the laser output control apparatus described above.

  Such an operation and other advantages of the present embodiment will be clarified from examples described below.

  As described above, according to the embodiment of the voltage level detection apparatus and method of the present invention, it is possible to appropriately detect a desired voltage signal by including the peak hold circuit and the process and the bottom hold circuit and the process. It becomes possible. According to the embodiment of the laser output control apparatus and method of the present invention, the light source, the laser drive apparatus and process, the light receiving element and process, the peak hold circuit and process, the bottom hold circuit and process, the control means, and By providing a process, it is possible to achieve proper negative feedback control of light emission power without being affected by digital noise that frequently appears with the increase in recording speed that occurred in the sample method Become.

(First embodiment of voltage level detection device and laser output control device)
Hereinafter, a voltage level detection apparatus and a laser output control apparatus according to a first embodiment of the present invention will be described with reference to FIGS. In the following description, for example, an APC (Automatic Power Control) circuit included in an information recording device such as a DVD recorder will be described as an embodiment of the voltage level detection device and the laser output control device of the present invention. To do.

(1) Basic Configuration First, the basic configuration of the APC circuit will be described with reference to FIGS. FIG. 1 is a block diagram schematically showing the basic configuration of an APC circuit according to an embodiment of the voltage level detection device and the laser output control device of the present invention. FIG. 2 is a block diagram (FIG. 2A) schematically showing the basic configuration of the peak hold circuit and the bottom hold circuit of the present invention, and a diagram showing a specific example of a constant current source of the peak hold circuit. FIG. 2B is a schematic circuit diagram (FIG. 2B) and a schematic circuit diagram (FIG. 2C) showing a specific example of the constant current source of the bottom hold circuit.

  As shown in FIG. 1, an APC circuit 100 includes an LD (semiconductor laser) 101 constituting an example of a “light source” according to the present invention, and a PD (photo detector) 102 constituting an example of a “light receiving element” according to the present invention. , An I / V converter (current-voltage converter) 103, an operational amplifier (operational amplifier) 104, a peak hold circuit 200 according to the present invention, a bottom hold circuit 300 according to the present invention, an operational amplifier 105, an adder 107, and The LD driver 108 is an example of the “laser driving device” according to the present invention.

  Furthermore, as shown in FIG. 2A, the peak hold circuit 200 includes an NPN transistor 201, a capacitor 202, and a constant current source 203. Similarly, the bottom hold circuit 300 includes a PNP transistor 301, a capacitor 302, and a constant current source 303.

(2) Operation Principle Next, the operation principle of the APC circuit will be described in detail with reference to FIGS. 1 and 2 as appropriate in addition to FIGS. FIG. 3 schematically shows voltage signal waveforms before and after various operations are performed when a predetermined hold time is set in the peak hold circuit and the bottom hold circuit according to the first embodiment of the present invention. FIG. FIG. 4 is a waveform diagram schematically showing waveforms of voltage signals before and after various operations are performed when the peak hold circuit and the bottom hold circuit according to the first embodiment of the present invention are set shorter than a predetermined hold time. FIG. FIG. 5 is a waveform diagram schematically showing waveforms of voltage signals before and after various operations are performed when the peak hold circuit and the bottom hold circuit according to the first embodiment of the present invention are set longer than a predetermined hold time. FIG.

  As shown in FIG. 1, first, a part of the laser beam LB irradiated by the LD 101 (which may be front light or rear light) is directly or indirectly received by the PD 102. A current signal proportional to the light emission power incident on the PD 102 is output from the PD 102.

  The current signal output from the PD 102 is converted into a voltage signal by the I / V converter 103 in order to simplify subsequent processing. In addition, when processing with all the electric current, it does not need to be converted into a voltage. The waveform of the voltage signal at “point A” in FIG. 1 shows four values as shown in FIG. 3A in the case of a write-once information recording medium such as a DVD-R. More specifically, it corresponds to the bias voltage Vb that is a voltage corresponding to the bias power (reproduction power) of the laser beam LB, the peak voltage Vp that is a voltage corresponding to the peak power of the laser beam LB, and the write power of the laser beam LB. A write voltage Vw, which is a voltage, and a ground voltage GND are shown. Note that the interval in which the voltage maintains the ground voltage GND corresponds to the off-pulse interval Toff of the laser beam LB.

  Returning again to FIG. The voltage signal that has passed the “point A” in FIG. 1 is amplified by the operational amplifier 104 and output to the peak hold circuit 200. In the peak hold circuit 200, the peak value (maximum value) of the voltage signal is peak-held, that is, detected and held for a predetermined hold time HT. In other words, for example, the peak hold circuit 200 is set at a predetermined hold time HT (see the black dotted line in FIG. 3B) corresponding to the output speed of the voltage signal (that is, corresponding to the recording speed). Has been. Therefore, the voltage signal that has passed the “point B” in FIG. 1 starts the peak hold of the voltage signal when the voltage signal changes from the peak voltage Vp to the low voltage level side as shown in FIG. 3B. The peak-held voltage signal at the end of the peak hold, that is, the bottom value (minimum value) of the voltage signal after the peak hold becomes the bias voltage Vb. The predetermined hold time HT corresponding to the output speed can be obtained experimentally, empirically, theoretically, or by simulation. Specifically, it is possible to set a predetermined hold time by adjusting the current of the constant current source 203. More specifically, the discharge amount of the capacitor is changed by changing the current value of the constant current source 203. Accordingly, it is possible to set the predetermined hold time by changing the rate of decrease (slope) of the voltage value indicated by the voltage signal.

  Let us consider a case where the peak hold circuit 200 is set with a hold time HT shorter than the predetermined hold time described above (see the black dotted line in FIG. 4B). In this case, as shown in FIG. 4B, the voltage signal that has passed the “point B” in FIG. 1 has a peak hold of the voltage signal when the voltage signal changes from the peak voltage Vp to the low voltage level side. The voltage signal that is started and peak-held at the end of the peak hold becomes the ground voltage GND. Therefore, as shown in FIG. 4C, the bottom hold circuit 300, which will be described later, bottom-holds at the ground voltage GND lower than the bias voltage Vb. Therefore, proper negative feedback control cannot be realized. Alternatively, let us consider a case where the peak hold circuit 200 is set with a hold time longer than the above-described predetermined hold time HT (see the dotted black line in FIG. 5B). In this case, as shown in FIG. 5B, the voltage signal that has passed the “point B” in FIG. 1 has a peak hold of the voltage signal when the voltage signal changes from the peak voltage Vp to the low voltage level side. The voltage signal that is started and peak-held at the end of the peak hold becomes higher than the bias voltage Vb. Therefore, as shown in FIG. 5C, the bottom hold circuit 300 described later is bottom-held at a voltage higher than the bias voltage Vb. Therefore, proper negative feedback control cannot be realized.

  On the other hand, for example, the peak hold circuit 200 is set at a predetermined hold time HT (see the black dotted line in FIG. 3B) corresponding to the output speed of the voltage signal. Therefore, the bottom value (minimum value) of the peak-held voltage signal is the bias voltage Vb. Therefore, as will be described later, it is possible to realize appropriate negative feedback control.

  Returning to the description of the peak hold circuit 200 shown in FIG. More specifically, as shown in FIG. 2B, the peak hold circuit 200 adjusts the current of the constant current source 203 that holds a certain resistance by adjusting the voltage input to the operational amplifier 104b. It is possible. For example, if the output speed is 8 times the reference speed, the reference value of the voltage input to the operational amplifier 104b is V1 (current: I1), and if the output speed is 16 times the reference speed, it is input to the operational amplifier 104b. When the voltage reference value is V2 (current: I2) and the output speed is 24 times the reference speed, the voltage reference value input to the operational amplifier 104b is set to V3 (current: I3). Also good. On the other hand, as shown in FIG. 2C, by adjusting the voltage input to the operational amplifier 104c, the current of the constant current source 303 that holds a certain resistance can be adjusted. For example, if the output speed is 8 times the reference speed, the reference value of the voltage input to the operational amplifier 104c is V1 ′ (current: I1 ′), and if the output speed is 16 times the reference speed, the operational speed is input to the operational amplifier 104c. If the output voltage is 24 times the reference speed, the reference value of the voltage input to the operational amplifier 104c is V3 '(current: I3'). You may comprise. With this configuration, for example, an information recording apparatus such as a DVD recorder requires little or no special adjustment such as adding a specific function or tuning a specific performance. Therefore, it can be applied to various information recording apparatuses.

  Returning again to FIG. The voltage signal that has passed the “point B” in FIG. 1 is output to the bottom hold circuit 300. In the bottom hold circuit 300, the bottom value (minimum value) of the voltage signal is bottom-held, that is, detected and held at the bottom hold time BHT. In other words, for example, the bottom hold circuit 300 is set with a bottom hold time (see the dotted black line in FIG. 3C) corresponding to the output speed of at least a 1 × speed voltage signal. Therefore, as shown in FIG. 3C, the voltage signal that has passed the “point C” in FIG. 1 becomes the bias voltage Vb as the bottom-held voltage signal.

  Returning again to FIG. The voltage signal that has passed the “point C” in FIG. 1 is amplified by the operational amplifier 105. The adder 107 adds and superimposes a recording signal for emitting a laser beam with another level of power on the amplified voltage signal. Based on the voltage signal and the recording signal, the LD driver 108 drives the LD 101 to emit the laser beam LB with, for example, bias power or peak power. The conversion from voltage to current may be performed in the LD driver 108.

  Based on the operation principle as described above, the laser light LB irradiated by the driven LD 101 is returned to the PD 102 based on the reference current signal converted from the voltage signal and the recording signal. Negative feedback control can be realized.

(Examination of the operational effects of the first embodiment of the voltage level detection device and the laser output control device)
Next, with reference to FIG. 6 to FIG. 8, the operational effects of the first embodiment relating to the voltage level detection device and the laser output control device of the present invention will be examined. FIG. 6 is a block diagram schematically showing the basic configuration of the APC circuit according to the comparative example. FIG. 7 is a waveform diagram schematically showing waveforms of voltage signals before and after various operations such as sample and hold are performed in the sample and hold circuit according to the comparative example. FIG. 8 is a waveform diagram schematically showing that the digital noise greatly affects the reference current signal for emitting laser light with the bias power as the output speed increases in the sample hold circuit according to the comparative example. .

  As shown in FIG. 6, the APC circuit according to the comparative example includes a sample hold circuit 400 instead of the peak hold circuit 200 and the bottom hold circuit 300. As shown in FIGS. 6 and 7B, sampling is performed in a section where the sample pulse is a voltage signal, for example, a bias voltage Vb. On the other hand, holding is performed in a section where the voltage signal is, for example, the peak voltage Vp or the write voltage Vw. Then, as shown in FIG. 7C, based on the sampled bias voltage Vb, the value of the reference current signal for emitting the laser beam with the bias power is obtained.

  However, in the sample and hold circuit 400, as shown in FIGS. 8A to 8C, as the output speed (recording speed) increases, the digital generated when switching from sampling to holding is performed. The appearance frequency of noise (so-called ringing component) increases. Due to the influence of the digital noise, an offset (so-called DC offset) as a direct current component is added to the value of the reference current signal for emitting the laser beam with the bias power. Therefore, it becomes impossible to accurately control the LD driving current for emitting laser light with bias power and other levels of power.

  On the other hand, according to the first embodiment of the voltage level detection apparatus and the laser output control apparatus of the present invention, for example, a peak hold including an NPN transistor 201, a capacitor 202, a constant current source 203, and the like. The circuit 200 is provided. In particular, the peak hold circuit 200 is set to a predetermined hold time corresponding to the recording speed, for example. In addition, for example, a bottom hold circuit 300 including a PNP transistor 301, a capacitor 302, a constant current source 303, and the like is provided. Since both of these circuits perform only analog processing, proper negative feedback control of the light emission power is realized without being affected by digital noise that frequently appears as the recording speed increases in the sample and hold method. It becomes possible.

(Second embodiment of voltage level detection device and laser output control device)
The second embodiment of the voltage level detection apparatus and the laser output control apparatus according to the present invention will be described below with reference to FIG. 1 described above in addition to FIGS. 9 to 11 as appropriate. Here, the basic configuration and operation principle of the second embodiment according to the voltage level detection apparatus and the laser output control apparatus of the present invention are substantially the same as those of the first embodiment. FIG. 9 is a waveform diagram schematically showing waveforms of voltage signals before and after various operations are performed when a predetermined hold time is set in the peak hold circuit and the bottom hold circuit according to the second embodiment of the present invention. It is. FIG. 10 is a waveform diagram schematically showing waveforms of voltage signals before and after various operations are performed in the peak hold circuit and the bottom hold circuit according to the second embodiment of the present invention when set shorter than a predetermined hold time. FIG. FIG. 11 is a waveform diagram schematically showing waveforms of voltage signals before and after various operations are performed in the peak hold circuit and the bottom hold circuit according to the second embodiment of the present invention when set longer than a predetermined hold time. FIG.

  In the second embodiment, for example, a desired erase voltage Ve can be detected from a voltage signal having three values, such as the light emission power of laser light in the case of a rewritable information recording medium such as a DVD-RW. It becomes possible.

  Specifically, the waveform of the voltage signal at “point A” in FIG. 1 shows three values as shown in FIG. 9A in the case of a rewritable information recording medium such as a DVD-RW. . More specifically, the cooling voltage Vc, which is a voltage corresponding to the bias power (reproduction power) of the laser beam LB, the write voltage Vw, which is the voltage corresponding to the write power of the laser beam LB, and the erase power of the laser beam LB. The erase voltage Ve which is a corresponding voltage is shown. Note that the section where the voltage maintains the cooling voltage Vc at the end of the pulse output corresponds to the cooling pulse section of the laser beam LB.

  Returning again to FIG. The voltage signal that has passed the “point A” in FIG. 1 is amplified by the operational amplifier 104 and output to the peak hold circuit 200. In the peak hold circuit 200, the peak value (maximum value) of the voltage signal is peak-held, that is, detected and held for a predetermined hold time HT. In other words, for example, the peak hold circuit 200 is set at a predetermined hold time (see the dotted black line in FIG. 9B) according to the output speed of the voltage signal (that is, corresponding to the recording speed). ing. Accordingly, as shown in FIG. 9B, the voltage signal that has passed the “point B” in FIG. 1 starts peak hold of the voltage signal when the voltage signal changes from the write voltage Vw to the low voltage level side. The peak-held voltage signal at the end of the peak hold, that is, the bottom value (minimum value) of the voltage signal after the peak hold becomes the erase voltage Ve.

  Consider a case where the peak hold circuit 200 is set with a hold time HT shorter than the above-described predetermined hold time (see the black dotted line in FIG. 10B). In this case, as shown in FIG. 10B, the voltage signal that has passed the “point B” in FIG. 1 has a peak hold of the voltage signal when the voltage signal changes from the write voltage Vw to the low voltage level side. The voltage signal that is started and peak-held at the end of the peak hold becomes lower than the erase voltage Ve. Accordingly, as shown in FIG. 10C, the bottom hold circuit 300 bottom-holds at a value lower than the erase voltage Ve. Therefore, proper negative feedback control cannot be realized. Alternatively, let us consider a case where the peak hold circuit 200 is set with a hold time HT longer than the above-mentioned predetermined hold time (see the black dotted line in FIG. 11B). In this case, the voltage signal that has passed the “point B” in FIG. 1 has a peak hold of the voltage signal when the voltage signal changes from the write voltage Vw to the low voltage level side as shown in FIG. The voltage signal that is started and peak-held at the end of the peak hold becomes higher than the erase voltage Ve. Therefore, as shown in FIG. 11C, the bottom hold circuit 300 performs bottom hold at a voltage higher than the erase voltage Ve. Therefore, proper negative feedback control cannot be realized.

  On the other hand, for example, the peak hold circuit 200 is set with a predetermined hold time HT (see the black dotted line in FIG. 9B) corresponding to the output speed of the voltage signal. Accordingly, the bottom value (minimum value) of the peak-held voltage signal is the erase voltage Ve. Therefore, appropriate negative feedback control can be realized.

  In this embodiment, as a specific example of the voltage level detection device, an APC circuit included in an information recording device such as a recorder of a recordable optical disk such as a DVD-R or a DVD-RW has been described. For example, the present invention can also be used in an APC circuit included in an information recording apparatus of an optical information recording medium such as a large capacity recording medium of all CDs, DVDs, and Blu-ray discs.

  The present invention is not limited to the above-described embodiments, and can be changed as appropriate without departing from the spirit or concept of the invention that can be read from the claims and the entire specification. Also, a laser output control apparatus and method are also included in the technical scope of the present invention.

It is a block diagram which shows typically the basic composition of the APC circuit concerning the example of the voltage level detection apparatus of the present invention, and a laser output control device. FIG. 2A is a block diagram schematically showing the basic configuration of the peak hold circuit and bottom hold circuit of the present invention, and a schematic circuit diagram showing a specific example of a constant current source of the peak hold circuit. (FIG. 2B) and a schematic circuit diagram (FIG. 2C) showing a specific example of a constant current source of the bottom hold circuit. FIG. 4 is a waveform diagram schematically showing waveforms of voltage signals before and after various operations are performed when a predetermined hold time is set in the peak hold circuit and the bottom hold circuit according to the first embodiment of the present invention. FIG. 3 is a waveform diagram schematically showing waveforms of voltage signals before and after various operations are performed when the peak hold circuit and the bottom hold circuit according to the first embodiment of the present invention are set to be shorter than a predetermined hold time. FIG. 4 is a waveform diagram schematically showing waveforms of voltage signals before and after various operations are performed when the peak hold circuit and the bottom hold circuit according to the first embodiment of the present invention are set longer than a predetermined hold time. It is a block diagram which shows typically the basic composition of the APC circuit which concerns on a comparative example. It is a wave form diagram which shows typically the waveform of the voltage signal before and after various operations, such as sample hold, are performed in the sample hold circuit concerning a comparative example. In the sample and hold circuit according to the comparative example, it is a waveform diagram schematically showing that digital noise greatly affects a reference current signal for emitting laser light with bias power as the output speed increases. FIG. 6 is a waveform diagram schematically showing waveforms of voltage signals before and after various operations are performed when a predetermined hold time is set in the peak hold circuit and the bottom hold circuit according to the second embodiment of the present invention. In the peak hold circuit and the bottom hold circuit according to the second embodiment of the present invention, it is a waveform diagram schematically showing the waveform of the voltage signal before and after performing various operations when set shorter than a predetermined hold time. In the peak hold circuit and the bottom hold circuit according to the second embodiment of the present invention, it is a waveform diagram schematically showing the waveform of the voltage signal before and after performing various operations when set longer than a predetermined hold time.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 ... APC circuit, 101 ... LD (semiconductor laser), 102 ... PD (photo detector), 103 ... I / V converter, 104 (105) ... Operational amplifier, 107 ... Adder, 108 ... LD driver, 200 ... Peak hold circuit , 300 ... bottom hold circuit, 201 ... NPN type transistor, 202 (302) ... capacitor, 203 (303) ... constant current source, 301 ... PNP type transistor

Claims (8)

A voltage level detecting device for detecting a desired predetermined voltage level in a voltage signal whose voltage level changes stepwise to a binary level or higher,
A peak hold circuit in which a hold time is set such that the voltage level of the peak-held voltage signal at the end of the peak hold becomes the predetermined voltage level when the voltage signal changes to the low voltage level side;
A bottom hold circuit in which a hold time is set so that a voltage level of the bottom held voltage signal at the end of bottom hold becomes the predetermined voltage level when the voltage signal changes to a high voltage level side; A voltage level detection apparatus comprising: The peak hold circuit starts the peak hold of the voltage signal when the voltage signal changes from a first voltage level to a second voltage level that is a lower voltage level than the first voltage level, The hold time is set so that the voltage level at the end of the peak hold becomes the second voltage level,
The voltage level detection apparatus according to claim 1, wherein the bottom hold circuit bottom-holds the peak-held voltage signal. The bottom hold circuit starts the bottom hold of the voltage signal when the voltage signal changes from a second voltage level to a first voltage level that is higher than the second voltage level. A hold time is set so that the voltage level at the end of bottom hold becomes the first voltage level,
The voltage level detection apparatus according to claim 1, wherein the peak hold circuit performs peak hold on the bottom-held voltage signal. A light source that emits a laser beam for recording irradiated to the information recording medium;
A laser driving device for driving the light source so that the laser beam emits light so as to change in a stepped manner more than two powers, and outputs a pulse;
A light receiving element for receiving the laser beam;
When the light emission output of the received laser light changes to a lower power side, the peak hold of the light emission output is started, and the power of the peak held light emission output at the end of the peak hold becomes a desired power A peak hold circuit with a hold time set so that
When the light emission output of the received laser light changes to a higher power side, the bottom hold of the light emission output is started, and the power of the bottom held light emission output at the end of the bottom hold becomes the predetermined power. A bottom hold circuit with a hold time set as
And a control means for performing negative feedback control of the laser driving device so as to emit the laser beam with the predetermined power as a reference. At least one of the peak hold circuit and the bottom hold circuit has a hold time setting means for setting the hold time,
5. The laser output control apparatus according to claim 4, wherein the hold time setting unit sets the hold time based on a recording speed of the information recording medium.   The hold time setting means sets the hold time by setting a current flowing through at least one of the peak hold circuit and the bottom hold circuit to a predetermined value corresponding to the recording speed. Item 6. The laser output control device according to Item 5. A voltage level detection method in a voltage level detection apparatus for detecting a predetermined voltage level desired in a voltage signal whose voltage level changes stepwise to a binary level or higher,
A peak hold step in which a hold time is set so that the voltage level of the peak-held voltage signal at the end of the peak hold becomes the predetermined voltage level when the voltage signal changes to the low voltage level side;
A bottom hold step in which a hold time is set such that the voltage level of the bottom held voltage signal at the end of bottom hold becomes the predetermined voltage level when the voltage signal changes to the high voltage level side. A voltage level detection method comprising: A laser output control method in a laser output control device comprising a light source that emits a recording laser beam irradiated to an information recording medium,
A laser driving step of driving the light source so that the laser beam emits light so as to change stepwise more than two powers, and outputs a pulse;
A light receiving step for receiving the laser beam;
When the light emission output of the received laser light changes to a lower power side, the peak hold of the light emission output is started, and the power of the peak held light emission output at the end of the peak hold becomes a desired power A peak hold process in which the hold time is set to be,
When the light emission output of the received laser light changes to a higher power side, the bottom hold of the light emission output is started, and the power of the bottom held light emission output at the end of the bottom hold becomes the predetermined power. Bottom hold process with hold time set as
And a control step of performing negative feedback control of the laser driving step so as to emit the laser beam with the predetermined power as a reference.

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