JP4370346B2 - Image forming apparatus - Google Patents

Description

  The present invention relates to an image forming apparatus that decompresses and compresses an intermediate code (display list), in particular, compresses bitmap data using a compression / decompression processor, rasterizes a display list, and the data. The present invention relates to an image forming apparatus that performs parallel processing of combining the combined bitmap data and decompressed bitmap data and compression of the combined bitmap data for three bands.

  In the page printer, as the resolution is improved, the necessary memory capacity increases and the processing time becomes longer. On the other hand, it is required to provide a high-speed page printer at a low cost and to shorten the product development period, and it is necessary to suppress an increase in memory capacity, avoid a complicated software configuration, and speed up the processing. is there.

  In Patent Document 1 below, in order to reduce the required memory capacity, one page of print data described in a page description language is divided into, for example, 512 blocks, converted into intermediate codes for each block, and rasterized for each block. Then, it is converted into bitmap data and then compressed and stored in the memory. Further, in order to process the overlap of drawing objects, the compressed data is decompressed, and this is combined with rasterized bitmap data, and then compressed and stored in the memory.

  However, as described in Patent Document 2 below, when a RIP (Raster Image Processor) unit develops a new block of data in a bipmap, the synthesized data is compressed and stored in a memory, and then this block Since it is necessary to wait until the compressed data corresponding to is decompressed, the processing is delayed.

  Therefore, in this patent document 2, blocks are successively rasterized sequentially by the RIP unit, the bitmap data is compressed and stored in the hard disk instead of the memory, and after the bitmap development processing for one page is completed. For each block, a plurality of compressed data to be combined is read from the hard disk and expanded, and these are sequentially combined and stored in the memory.

On the other hand, in Patent Document 3 below, a plurality of hardware RIPs are operated in parallel to increase the processing speed.
JP-A-4-88749 JP-A-9-214709 JP-A-10-289066

  However, in Patent Document 2, a hard disk is used to temporarily store compressed data, and compression and decompression are serially processed, so that speeding up of processing is hindered.

Further, in Patent Document 3, where the process is no disclosure about the band unit for main storage capacity reduction, no disclosure also compression and decompression of the bit map data.

  In view of such problems, an object of the present invention is to provide an image forming apparatus capable of suppressing the increase in necessary memory capacity and relatively easily and rapidly developing print data in a bitmap. is there.

  Another object of the present invention is to provide an image forming apparatus capable of suppressing the increase in required memory capacity and relatively easily and efficiently developing print data in a high-speed bitmap.

In a first aspect of the image forming apparatus according to the present invention, a CPU, a storage device in which a program is stored and a data area is secured and coupled to the CPU, compression of bitmap data, and decompression of compressed bitmap data A compression / decompression processor capable of performing in parallel;
An image forming apparatus that divides print data for one page described in a page description language into a plurality of bands, converts the print data of each band into an intermediate code for each block, and develops the intermediate code as a bitmap.
Each of the data areas has first to third bitmap data areas for one band,
The program gives the CPU a band sequential block sequence for every three bands for each of the first to third tasks,
(A) Except for the first block of each band, one band of compressed data in the data area is decompressed via the compression / decompression processor and stored in the i-th bitmap data area;
(B) rasterizing the intermediate code of one block in the data area and combining it with the data in the i-th bitmap data area;
(C) The data in the i-th bitmap data area is compressed through the compression / decompression processor and stored in the data area.
Each of i = 1 to 3 is executed in parallel by the first to third tasks, and each of the processes (a) and (c) is not executed in parallel by the first to third tasks.

In a second aspect of the image forming apparatus according to the present invention, in the first aspect, the program further executes a fourth task for the CPU.
(D) The print data is converted into an intermediate code for each block for each band in a band sequential block order and stored in the data area;
The fourth task is executed in parallel with the first to third tasks, and after the process (d) is completed, the process (a) is started for the band and block related to the process (d).

In a third aspect of the image forming apparatus according to the present invention, in the second aspect, each of the processes (a) and (c) is completed for each of the first to third bitmap data areas. Information indicating whether or not
The program further causes the CPU to update the information when the processes (a) and (c) are completed for each of the first to third bitmap data areas, and based on the information, the first to third tasks Thus, the processes (a) and (c) are controlled not to be executed in parallel.

  According to the configuration of the first aspect, since the bitmap data area is sufficient for three bands, an increase in necessary memory capacity can be suppressed, and a series of processes of expansion, rasterization, and compression is performed for one band. Is performed sequentially within one task, so there is no need to synchronize between tasks, and since compression and decompression can be performed almost continuously for three bands, print data can be relatively easily The bitmap can be developed at a high speed. In addition, since a common function can be used in the first to third tasks, the memory usage can be reduced. This simplification contributes to shortening the development period and facilitating design changes.

  According to the configuration of the second aspect, display list creation related to rasterization of the first to third tasks is performed in parallel with the first to third tasks in the fourth task. The overhead is smaller than that in the case of creating the file, and the processing efficiency is improved.

  According to the configuration of the third aspect, the first to third tasks can be synchronized relatively easily.

  Other objects, configurations and effects of the present invention will become apparent from the following description.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 17 is a schematic block diagram illustrating a hardware configuration of the image forming apparatus 10 according to the first embodiment of the invention.

  In this image forming apparatus 10, a CPU 11, an EEPROM 12, a RAM 13, a compression / decompression processor 14, a communication interface 15, a panel interface 16, an engine controller 17, and a transport controller 18 are connected by a bus 19, and an engine controller 17 including an interface 16 and an interface. In addition, an operation panel 20, a print engine 21, and a paper transport device 22 are coupled to the transport controller 18. A host computer (not shown) is coupled to the communication interface 15.

  The EEPROM 12 stores an OS (Operating System), a driver, and an application. The RAM 13 stores temporary data.

  The compression / decompression processor 14 is composed of, for example, an ASIC (Application Specific Integrated Circuit), and can perform compression processing and decompression processing simultaneously. The compression / decompression processor 14 includes a compression unit 141, an expansion unit 142 and an expansion unit 143 (see FIG. 1) that can be processed in parallel with each other, and a DMAC (Direct Memory Access Controller), and compresses data in the RAM 13 into a compression unit 141. The decompression unit 142 or the decompression unit 143 can perform block transfer by DMA to perform compression or decompression, and block the result to the RAM 13 or the engine controller 17 by DMA. The DMAC may be separate from the compression / decompression processor 14.

  The operation panel 20 includes keys and a display panel. The engine controller 17 includes a CPU, a memory that stores a print engine control program, and a buffer memory that stores received bitmap data.

  FIG. 1 is a functional block diagram of a part that develops a bitmap of print data received from a host computer.

  This print data is described in a page description language (PDL) and is stored in the buffer memory 131 via the communication interface 15. In FIG. 1, a buffer memory 131, a heap memory 132, and a shared memory 133 are storage areas in the RAM 13. The interpreter 121, the RIP 122, and the control unit 123 all correspond to a part of the application program and are executed by the CPU 11.

  In response to a print request from the host computer, the control unit 123 stores print data from the host computer in the buffer memory 131 via the communication interface 15. The control unit 123 activates the interpreter 121 to convert the print data into a display list (intermediate code) for each page and store the print data in the heap memory 132. The control unit 123 activates the RIP 122 and the compression / decompression processor 14 to perform the processes described later.

  10A to 10C are schematic diagrams for explaining the display list.

  As shown in FIG. 10A, the graphic objects 31 to 34 are described in PDL in this order in the print data 30 for one page, and by rasterizing them in the description order, The graphic object 33 is overwritten on the graphic object 31, and the graphic object 34 is overwritten on the graphic object 33, so that an image as shown in FIG. 10A is obtained. In order to reduce the required memory capacity, as shown in FIG. 10B, the print data 30 is divided into bands 40 to 43, and the divided objects are converted into intermediate codes for high-speed rasterization processing. To do. In general, objects include character objects and image objects in addition to graphic objects. In the intermediate coding of an object, a vector data character object is converted into image data.

  FIG. 10C conceptually shows a state in which each graphic object included in the print data 30 is converted into intermediate code data for each band. The intermediate code block Lij in the figure indicates that it is the jth block constituting the display list of band i. In order to properly combine the figures, the block description order in each band follows the description order of the graphic objects. For example, the block description order in the display list of the band 41 is intermediate code blocks L10, L11, L12, and L21.

  As the number of bands increases, the required memory capacity can be reduced. However, since the total processing time increases, the number of bands is determined according to the capacity of the RAM 13, and this value is, for example, 36. In order to facilitate memory management, the maximum storage capacity of one block is determined, and as many intermediate codes as possible are packed in each block Lij of this capacity.

  FIG. 2 shows the data structure of the display list stored in the heap memory 132. This data structure is a list structure.

  In the L band array 1320, the number of elements is equal to the number of bands, and the element i (i is one of 0 to n) is a pointer of the display list Li. The number of blocks in each display list Li is not constant. FIG. 1 shows a case where the number of blocks in each display list Li is 3 for simplification. In the case of image data, the intermediate code of the block Lij is a code including a pointer indicating the image data storage destination and the number of data bytes, and the image data itself is not included in the block Lij.

  On the other hand, a bitmap data area 133B and a compressed data area 133C are secured in the shared memory 133. The compression / decompression processor 14 includes a compression unit 141 and an expansion unit 142 that can perform parallel processing.

Next, processing of band i by the RIP 122, the compression / decompression processor 14, and the control unit 123 that controls them will be described. The initial value of the block identification variable j is 0. Controller 123 starts control to each page of RIP122, it starts controlling the compression and decompression processor 14 for each band.

  (1) If j = 0, go to step (2). When j> 0, the decompressing unit 142 calls the compressed data stored in the compressed band area Ci, decompresses the compressed data to the original bitmap data, and stores it in the sub-area BMPk.

  (2) The RIP 122 overwrites the bitmap data expanded in (1) by converting the intermediate code block Lij in the heap memory 132 into the bit map data and storing it in the sub-region BMPk.

  (3) The compression unit 141 compresses the bitmap data stored in the sub-region BMPk and stores it in the compressed band region Ci in the compressed data region 133C.

  (4) The RIP 122 increments j by 1, and if the intermediate code block Lij exists in the heap memory 132, returns to the above step (1).

  The compression unit 141 and the decompression unit 142 can be operated in parallel, and the processing by the compression / decompression processor 14 and the software processing for display list creation and rasterization can be performed in parallel. On the other hand, any two of compression processing, decompression processing, and software processing cannot be performed simultaneously for the same band. Therefore, as shown in FIG. 4, three band processing is performed simultaneously. For example, when band 0 is being expanded, band 1 is compressed, and band 2 display list creation and rasterization are serially processed. Since all of these compression, decompression, and rasterization handle bipmap data, as shown in FIG. 1, the bitmap data area 133B has an area for three bands divided into BMP0 to BMP2.

  When the average compression rate of the compression unit 141 is 1 / c (c = size after compression / size before compression) and the number of bands on one page is n + 1, the compressed data and the bits for three bands for the bitmap data for one page The total compression ratio with the map area is 3 / (n + 1) + 1 / c. For example, when n = 35 and c = 10, the compression ratio is 3/36 + 1/10 = 11/60.

  FIG. 3 shows the structure of data related to rasterization, compression, and expansion stored in the shared memory 133.

  In the C band array 1330, the number of elements is equal to the number of bands, and the element i (i is any one of 0 to n) is a pointer of the compression band region Ci. The block maximum number array 1331 has the same number of elements as the number of bands, and the element i stores the block number maximum value je (i) of the band i. The number of elements of the B band array 1332 is 3, and the element k (k is any of 0 to 2) is a pointer of the sub-region BMPk.

  In the band / block number variable group 1333, for the variables R, C, and D, pairs (i, j), (p, q), and (r, s) of the current band number and block number to be processed are respectively stored. Stored. The variables R, C, and D notify the completion of block processing between threads (step S5 in FIG. 5, step S16 in FIG. 6A, and step S24 in FIG. 6B), and processing of the next block In order to make the start point appropriate, that is, for the same band, the rasterization is performed after the expansion is completed, the rasterization is performed after the rasterization is completed, and the compression is performed after the compression is completed. In the example below, the band / block number variable group 1333 stores the band number and block number of the next or processing target being processed, but this data also means the completion of the processing of the previous processing target. is doing.

  FIG. 7 is a schematic timing chart showing parallel processing of the software, the compression unit 141, and the decompression unit 142. FIG. 7 shows a case where each of the bands 0 to 2 has a display list of 3 blocks. FIG. 8 shows a rearrangement of the processing of FIG. 7 for each of the bands BND0 to BND2.

  Lij, Rij, Cij, and Dij indicate display list creation, rasterization, compression, and decompression processing for band i and block j, respectively.

  In FIG. 1 and FIG. 7, in order to simplify the software configuration of the control unit 123, processing start control for the compression unit 141 and the decompression unit 142 is performed by threads Th <b> 1 and Th <b> 2 in the control unit 123, respectively. The processes of the interpreter 121 and the RIP 122 are processes in the thread Th0. That is, parallel processing by three threads is performed.

  The thread Th0 is generated and started by the control unit 123. In the thread Th0, an intermediate code block L00 creation process is performed, and then a rasterize R00 process is performed. When the rasterize R00 is completed, a thread Th1 is generated and started by the thread Th0. The process of compression C00 is performed by the thread Th1 via the compression unit 141, and when the process of compression C00 is completed, Th2 is generated and started by the thread Th1. The threads Th1 and Th2 perform compression C10 and decompression D00 via the compression unit 141 and the decompression unit 142, respectively.

  In general, in the thread Th0, the intermediate code block Lij creation and rasterization Rij processing are performed in the band sequential block order, and the rasterization Rij processing is usually completed at the time when compression Cij is started. Here, the band sequential block sequential means that the initial values of the block j and the band i0 are both 0, and the band i and the block j are changed as follows.

(A) With block j kept constant, band i is sequentially changed to i0, i0 + 1, i0 + 2,
(B) If j is smaller than the block number maximum value je (i), the block j is incremented by 1, and the process returns to (a). Otherwise, the process proceeds to (d).

  (D) If i0 + 2 is smaller than the band number maximum value n, j = 0 and i0 is incremented by 3, and the process returns to (a).

  In the thread Th1, the band p and the block q are updated so that the band sequential block sequential is made in response to the processing completion notification of the compression unit 141 for one block, and the processing of the corresponding rasterization Rpq is completed. Then, the compression unit 141 is caused to start the compression Cpq process. In the test example, as shown in FIG. 7, the compression Cpq could be continuously performed without interruption.

  In the thread Th2, the band r and the block s are updated so that the band sequential block sequential in response to the completion notification of the decompression unit 142 for one block, and the decompression unit 142 starts the process of decompression Drs. However, for each band r, the process of decompression Drs is not started for the last block je (r).

  FIG. 5 is a flowchart showing the processing of the thread Th0. The initial value of i0 is 0. In the following, the step identification codes in the figure are shown in parentheses.

  (S0) The value je (i) stored in the element i of the block maximum number array 1331 is read, and the processing of steps S1 to SA is sequentially repeated for the block j from 0 to je (i).

  (S1) The processes from step S2 to S9 are repeated sequentially for i = i0 to i0 + 2.

  (S2) An intermediate code block Lij is created in the heap memory 132.

  (S3, S4) If j = 0, the sub-region BMPk is cleared to zero. Here, k is a value satisfying i = i0 + k.

  (S5) Whether or not the process of expansion Di (j-1) is completed by looking at the content rs of variable D of band block number variable group 1333 (however, if j = 0, expansion D (i- 1) Whether or not the processing of j has been completed is determined, that is, whether or not r = i and s = j is determined. If the determination is affirmative, the process proceeds to step S6.

  (S6) The intermediate code block Lij is read from the heap memory 132, rasterized, and overwritten on the sub area BMPk of the bitmap data area 133B.

  (S7, S8) If i0 = 0 and j = 0, the thread Th1 is generated and started.

  (S9) The contents (i, j) of the variable R in the band / block number variable group 1333 are updated as described above. That is, (i, j) is set to the next value of the band sequential block sequential.

  (SC) Increment i0 by 3.

  If (SD) i0> n, the process is terminated; otherwise, the process returns to step S0.

  FIG. 6A is a flowchart showing processing in the thread Th1.

  (S10) The contents (p, q) of the variable C in the band / block number variable group 1333 are read, and the compression unit 141 starts the process of compression Cpq. At this time, the compression unit 141 is supplied with the contents of the element i of the C band array 1330 as the compressed data storage destination start address and the contents of the element k of the B band array 1332 as the compression target data start address. Here, k is a remainder when p is divided by 3.

  (S11) Wait for the processing completion event of the compression unit 141 to occur. When this event occurs, the wait state is canceled and the process proceeds to step S12. Since the OS immediately switches to the next thread before the wait state is released, the processing delay of FIG. 5 is prevented.

  (S12, S13) If p = 0 and q = 0, a thread Th2 is generated and started.

  (S14) If p = n and q = je (n), the process ends. If not, the process proceeds to step S15.

  (S15) The contents (p, q) of the variable C in the band block number variable group 1333 are updated as described above.

  (S16) By looking at the contents ij of the variable R in the band block number variable group 1333, it is determined whether or not the processing of Rpq is completed. That is, if 0 ≦ q ≦ je (p) −1, i = It is determined whether or not p and j = q + 1. When q = je (p), it is determined whether i = p + 1 and j = 0. If the determination is affirmative, the process returns to step S10.

  FIG. 6B is a flowchart showing processing in the thread Th3.

  (S20) The contents (r, s) of the variable D in the band / block number variable group 1333 are read, and the decompression unit 142 starts the decompression Dpq process. At this time, the contents of the element i of the C band array 1330 are supplied to the decompression unit 142 as the decompression target start address, and the contents of the element k of the B band array 1332 are provided as the decompression data storage destination top address. Here, k is a remainder when r is divided by 3.

  (S21) Wait for the processing completion event of the decompression unit 142 to occur. When this event occurs, the wait state is canceled and the process proceeds to step S22. Before the wait state is canceled, the OS immediately switches to the next thread.

  (S22) If r = n and s = je (n) −1, the process is terminated; otherwise, the process proceeds to step S23.

  (S23) The contents (r, s) of the variable D of the band / block number variable group 1333 are updated as described above.

  (S24) The contents pq of the variable C in the band / block number variable group 1333 are viewed to determine whether or not the Crs processing has been completed. That is, when 0 ≦ s ≦ je (r) −1, p = It is determined whether r and q = s + 1. When s = je (r), it is determined whether p = r + 1 and q = 0. If the determination is affirmative, the process returns to step S20.

  Through the above processing, one page of compressed data (page data) is generated in the compressed data area 133C. In response to this, the control unit 123 generates and starts a thread ThP included in the control unit 123, which is different from the above three threads.

  In the thread ThP, it is confirmed that the data input of the engine controller 17 is in the ready state, and this page data is expanded in band order via the expansion unit 143 and transferred to the engine controller 17. At this time, for the band i, the contents of the element i of the C band array 1330 are supplied to the decompression unit 143 as the decompression target data start address, and the address of the engine controller 17 as the transfer destination address.

  The engine controller 17 receives the transferred bitmap data, stores it in its buffer memory, converts it into serial data, further converts it into a video signal, and supplies it to the print engine 21. Based on this signal and a control signal from the engine controller 17, the print engine 21 forms an electrostatic latent image on the photosensitive drum, develops it by attaching toner to the photosensitive drum, transfers the toner image to a sheet, and heats it. Then, the toner image is fixed on the paper by pressing. On the other hand, according to the program, the CPU 11 causes the paper transport device 22 to transport the paper to the print engine 21 via the transport controller 18, transports the printed paper, and discharges it onto the tray.

  FIG. 9 is a schematic time chart showing decompression / transfer processing of compressed page data and other processing.

  By such processing, the expansion / rasterization / compression processing of each band of the second page by the threads Th0 to Th2 and the page data expansion / transfer processing of the first page by the thread ThP are executed in parallel. Is the same.

  According to the first embodiment, since the bitmap data area 133B is sufficient for three bands, an increase in necessary memory capacity can be suppressed, and the three bands are shifted in parallel with respect to expansion, rasterization, and compression. Since it is processed, each of compression and decompression can be performed almost continuously, and the print data can be bitmap-developed at high speed. Furthermore, since decompression, rasterization, and compression are performed in parallel by different tasks, there is an effect that compression and decompression can be performed almost continuously relatively easily.

  Since the compression / decompression processor 14 uses the compression / decompression processor 14 and the compression / decompression processor 14 performs the decompression and compression start control by the threads Th1, Th2 and ThP as described above. The CPU load for this process is relatively small. For this reason, the processing delay of the thread Th0 due to these threads is relatively small, and high-speed processing as a whole can be efficiently performed by parallel processing. Further, since the program structure is simplified by the multi-threading, the development period can be shortened and the manufacturing cost can be reduced.

  Note that the page data transfer efficiency may be increased by providing the decompression unit 143 in the engine controller 17 and decompressing the decompression unit 143 on the engine controller 17 side.

  In the first embodiment, the display list creation and rasterization processing are performed in series. However, it is also possible to perform both processes in separate threads, which will be described below as a second embodiment of the present invention.

  As shown in FIG. 12, a thread Th3 for processing only the display list is generated and started before the thread Th0, and the intermediate code block Lij is created by updating (i, j) in the band sequential block order. Process.

  FIG. 11 is a flowchart showing processing in the thread Th0 in this case. A difference from the processing of FIG. 5 is that, in step S3a instead of steps S2 and S5, not only expansion Di (j−1) but also completion of creation of the intermediate code block Lij is awaited. In order to notify the completion of the creation of the intermediate code block Lij, a variable L is added to 1333, and the band number and the block number are updated every time one block of intermediate code creation processing is completed in the thread Th3.

  FIG. 13 is a diagram showing a rearranged process of FIG. 12 for each of the bands BND0 to BN2.

  The other points are the same as those in the first embodiment.

  According to the second embodiment, since display list creation and rasterization are processed in parallel, the respective processes are simplified, and the rasterization execution time is relatively small during the rasterization pause period. The overhead of switching between list creation and rasterization is relatively small and effective as a whole.

  In the first and second embodiments, the case where the decompression start control, rasterization, and compression start control are executed by different threads and three bands are sequentially processed by each thread has been described. It is also possible to execute the decompression start control, rasterization, and compression start control for the minute. In this case, each of the three threads can use the same function that is different only in the variable area.

  Since only one band can be processed at the same time for each of compression and decompression, it is necessary to synchronize between threads. Therefore, as shown in FIG. 15, the compression completion flag Fc (k) and the expansion completion flag Fd (k) are provided in the shared memory 133 for each of the sub-regions BMPk, k = 0 to 2. In the shared memory 133, a band block number variable 1333a indicating how far the creation of the intermediate code block has been completed is provided instead of the band block number variable group 1333 of FIG. Other points in FIG. 15 are the same as those in FIG.

  FIG. 16 is a schematic timing chart of the threads Th0A, Th1A, Th2A, and Th3 and the processing of the compression unit 141 and the expansion unit 142. In FIG. 16, in order to avoid complication, a dotted line indicating a relationship between compression and decompression and a thread describes only the thread Th0A.

  The thread Th3 is the same as that of FIG. 12, and is processed in parallel with the threads Th0A to Th2A. The threads Th0A, Th1A, and Th2A are generated and started at the timing when the creation of the intermediate code blocks L00, L10, and L20 is completed in the thread Th3, respectively. This generation and start may be performed by the thread Th3 or by another thread (not shown).

  In FIG. 12, the second index j of the compressed Cij and the expanded Dij represents the block number, but the corresponding second index in FIG. 16 indicates k of the sub-region BMPk. Therefore, in FIG. 14, these are represented as Cik and Dik. That is, the compression Cik means that the bitmap data of the sub-region BMPk is compressed and stored in the compressed data region of the band i, and the decompression Dik decompresses the data stored in the compressed data region of the band i. Storing in the sub-region BMPk.

  FIG. 14 is a flowchart showing processing executed by an arbitrary thread Thk among the threads Th0A to Th2A.

  (S30) k is substituted into the band identification variable i, and the initial value 0 is substituted into the block identification variable j of this band.

  (S31) The sub-region BMPk is cleared to zero.

  (S32) If the creation of the intermediate code block Lij is completed, the process proceeds to step S33.

  (S33) Rasterize Rij processing is performed.

  (S34) Wait for compression Ci (k-1) to complete. That is, when the processing completion event of the compression unit 141 controlled to start with the thread Th (k−1) A occurs, if the value of the compression completion flag Fc (k−1) in FIG. If this value is set to 0, the process proceeds to step S35. Otherwise, the event handler is exited, and the OS switches to the next thread. However, in Ci (k-1) and Fc (k-1), when k = 0, it is considered that k = 3. Since the OS immediately switches to the next thread before releasing the wait state in which the processing completion event of the compression unit 141 has not occurred, the processing delay in FIG. 14 is prevented. This also applies to other wait states.

  (S35) The compression unit 141 starts the compression Cik process. At this time, the compression unit 141 is supplied with the contents of the element i of the C band array 1330 as the compressed data storage destination start address and the contents of the element k of the B band array 1332 as the compression target data start address.

  (S36) When the processing completion event of the compression unit 141 whose start is controlled in step S35 occurs, the event handler sets the value of the compression completion flag Fc (k) in FIG. 15 to 1, and proceeds to step S37.

(S37) The value of j is updated so that it becomes block sequential.

  (S38) If j = je (i), the process proceeds to step S3C; otherwise, the process proceeds to step S39.

  (S39) Wait for the expansion Di (k-1) to be completed. That is, if the value of the expansion completion flag Fd (k−1) in FIG. 15 is 1, this value is set to 0 and the process proceeds to step S3A. However, in Di (k−1) and Fd (k−1), k = 3 is considered when k = 0.

  (S3A) The expansion unit 142 starts the expansion Dik process. At this time, the contents of the element i of the C band array 1330 are supplied to the decompression unit 142 as the decompression target start address, and the contents of the element k of the B band array 1332 are provided as the decompression data storage destination top address.

  (S3B) When the processing completion event of the decompression unit 142 controlled to start in step S3A occurs, the event handler sets the value of the decompression completion flag Fd (k) in FIG. 15 to 1 and proceeds to step S32.

  (S3C) Increment i by 3 and initialize j to 0.

  (S3D) If i> n, the process is terminated; otherwise, the process returns to step S31.

  The other points are the same as those in the first embodiment.

  According to the third embodiment, since compression and decompression can be performed almost continuously for the three bands, print data can be bitmap-developed at high speed.

  In addition, since a series of processing of expansion, rasterization, and compression is performed sequentially within one thread for one band, it is not necessary to synchronize between the threads.

  Further, since a common function can be used in the threads Th0A to Th2A, the memory usage can be reduced as compared with the cases of the first and second embodiments.

  Furthermore, since the display list creation is executed by a thread different from the threads Th0A to Th2A, the overhead is reduced and the processing efficiency is better than when the display list is created by each of the threads Th0A to Th2A.

  Similarly, when the page data decompression / transfer control is performed by another thread ThP, the overhead is reduced and the processing efficiency is better than when the page data decompression / transfer control is performed by each of the threads Th0A to Th2A.

  The present invention includes various modifications in addition to the above.

  For example, the data update of the band / block number variable group 1333 may be performed before the start of the process such as rasterization.

  In the above-described embodiment, the case has been described in which the combination of two bitmap data is an overwrite of the other bitmap data with respect to one bitmap data. There may be.

  Furthermore, as a multitask, a multiprocess may be used instead of a multithread.

  Further, a double core CPU may be used as the CPU 11, and a combination of one core and a compression / decompression program may be used as a compression / decompression processor. In this case, the compression process and the decompression process are multitasked.

FIG. 4 is a functional block diagram of a portion that develops a bitmap of print data received from a host computer according to an embodiment of the present invention. It is data structure explanatory drawing of a display list. It is data structure explanatory drawing related to rasterization, compression, and expansion | extension. It is band processing order explanatory drawing. 12 is a flowchart showing display list creation and rasterization processing performed in a thread Th0. (A) is a flowchart of compression processing performed in the thread Th1, and (B) is a flowchart of decompression processing performed in the thread Th2. FIG. 7 is a schematic timing chart showing a part of the processing results in FIG. 5, FIG. 6 (A) and FIG. 6 (B). It is a figure which shows what rearranged the process of FIG. 7 for every band BND0-BN2. 10 is a schematic time chart showing decompression / transfer processing of compressed page data and other processing. (A)-(C) are display list schematic explanatory drawings. It is a flowchart which shows the display list preparation and rasterization process which concern on Example 2 of this invention. 12 is a schematic timing chart showing a part of the processing result in the second embodiment. It is a figure which shows what rearranged the process of FIG. 12 for every band BND0-BN2. It is a flowchart which shows the process performed by arbitrary one of thread | sled Th0A-Th2A which concerns on Example 3 of this invention. It is data structure explanatory drawing related to the rasterization based on Example 3 of this invention, compression, and expansion | extension. 10 is a schematic timing chart showing a part of the processing result in the third embodiment. 1 is a schematic block diagram illustrating a hardware configuration of an image forming apparatus according to an embodiment of the present invention.

Explanation of symbols

10 Image forming apparatus 11 CPU
12 EEPROM
121 interpreter 122 RIP
123 Control unit 13 RAM
131 Buffer Memory 132 Heap Memory 133 Shared Memory 133C Compressed Data Area 133B Bitmap Data Area 1320 L Band Array 1330 C Band Array 1331 Block Maximum Number Array 1332 B Band Array 1333 Band Block Number Variable Group 14 Compression / Expansion Processor 141 Compression Unit 142, 143 Expansion unit 15 Communication interface 16 Panel interface 17 Engine controller 18 Transport controller 19 Bus 20 Operation panel 21 Print engine 22 Paper transport device 30 Print data 31-34 Graphic object 40-43 Bands Th0-Th3, Th0A, Th1A, Th2A , ThP thread L0-Ln Display list Lij Intermediate code block Rij Rasterize Cpq Shrinkage Drs extension BND0~BND2 band BMP0~BMP2 sub-region

Claims (5)

A CPU, a storage device in which a program is stored and a data area is secured and coupled to the CPU, and a dedicated compression / decompression processor that can perform compression of bitmap data and decompression of compressed bitmap data in parallel And comprising
An image forming apparatus that divides print data for one page described in a page description language into a plurality of bands, converts the print data of each band into an intermediate code for each block, and develops the intermediate code as a bitmap.
Each of the data areas has first to third bitmap data areas for one band,
The program is the i-task for each of i = 1 to 3,
(A) Except for the first block of each band, one band of compressed data in the data area is decompressed via the compression / decompression processor and stored in the i-th bitmap data area;
(B) rasterizing the intermediate code of one block in the data area and combining it with the data in the i-th bitmap data area;
The data of (c) said i bitmap data area, Ru by compression through the compression and decompression processor is stored in the data area,
The processing is executed in block sequential band order for every three bands, and the first to third tasks are shifted in this order and started to be executed sequentially in parallel and executed in parallel between the first to third tasks (a). And (c) are prevented from being executed in parallel. The program further provides the CPU with a fourth task:
(D) The print data is converted into an intermediate code for each block for each band in a band sequential block order and stored in the data area;
The fourth task is executed in parallel with the first to third tasks, and after the process (d) is completed, the process (a) is started for the band and the block related to the process (d). The image forming apparatus according to 1. The data area further stores information indicating whether or not each of the processes (a) and (c) has been completed for each of the first to third bitmap data areas,
The program further causes the CPU to update the information when the processes (a) and (c) are completed for each of the first to third bitmap data areas, and based on the information, the first to third tasks To control each of the processes (a) and (c) not to be executed in parallel.
The image forming apparatus according to claim 2.   4. The data area according to claim 1, wherein the data area includes an area for storing an intermediate code for each band and for each block, and an area for storing compressed data for each band. The image forming apparatus described in 1.   The image forming apparatus according to claim 1, wherein the compression / decompression processor is an ASIC coupled to the CPU.