JP4364438B2 - Plasma process for depositing silicon nitride with high film quality and low hydrogen content - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method and apparatus for producing a silicon nitride film having a low hydrogen content and high quality.
[0002]
[Prior art]
Nitride films are employed as insulating and passivation films in integrated circuits, and silicon nitride (Si_ThreeN_Four) And a dielectric film including a silicon oxynitride (SiON) film. One method of forming a nitride film is by thermochemical vapor deposition (that is, thermal CVD) at a relatively high temperature (eg, 700 ° C. or higher). When low pressure (LP) technology is employed with a high temperature thermal CVD process, the resulting nitride film is referred to as a low pressure (LP) nitride film or LPCVD nitride film. LP nitride films typically exhibit relatively good film uniformity.
[0003]
LP nitride films are typically not deposited following the formation of metal contacts. This is because the melting point of the metals used in the manufacture of such structures is relatively low (eg, aluminum, aluminum alloys, or other low melting point metals). Accordingly, the process temperature in subsequent steps is limited to about 450 ° C. to avoid damage to the metal contacts. In addition, the high temperatures associated with LP nitride film deposition can cause other problems, including degradation of the tungsten silicide structure, pushing the junction too deeply into the substrate, and chamber contamination.
[0004]
Unfortunately, as indicated above, the high temperatures used to deposit LPCVD nitride films can complicate integration into processes having relatively low heat budgets. There are other problems with the use of LPCVD nitride films. For example, such films exhibit tensile stress rather than compressive stress, leading to poor film quality (eg, cracks, etc.). Such membranes increase the processing time required for their manufacture and are also difficult to integrate into a series of processes. This is because they are deposited using a two-step process and their deposition rate is relatively low. Such a film also deposits a relatively large amount of residue on the inner surface of the chamber, necessitating more frequent chamber cleaning than would otherwise be required.
[0005]
To solve these problems, a plasma enhanced CVD (PECVD) process has been employed to deposit a silicon nitride overcoat at a relatively low temperature. A typical PECVD gas flow chemical for depositing silicon nitride includes a silane and ammonia reactant together with a diluent, such as nitrogen, argon, or helium, and is given by:
SiH_Four + NH_Three + N₂(Diluent) = Si_xN_yH_z
One of the problems associated with low temperature PECVD deposition of nitride films using this chemical is that large amounts of hydrogen are incorporated into the film due to Si-H and N-H bonds. One reason for the high hydrogen content of the resulting PECVD nitride film is the presence of three hydrogen atoms in each ammonia molecule.
[0006]
Large amounts of hydrogen uptake are problematic because of the adverse physical effects that such high concentrations can have on circuit properties. For example, the inclusion of hydrogen in a nitride intermetal dielectric (IMD) layer results in high capacitance of the interconnect and lowers the maximum operating frequency of the circuit. In addition, hydrogen is chemically active and diffuses rapidly. Accordingly, the hydrogen in the nitride IMD film can react with the metal wiring insulated by the nitride IMD film, thereby damaging the wiring and increasing the possibility of device failure.
[0007]
A PECVD system for depositing high quality silicon nitride films is disclosed in US Pat. No. 4,854,263 (“the '263 patent”), which is assigned to the assignee of the present application, The entirety of which is incorporated herein by reference for all purposes. In that patent, a parallel plate RF vacuum chamber has a gas inlet manifold plate having a plurality of openings, each opening having an outlet on the chamber or process side of the plate and on the gas distribution side of the plate. Including an intake. As shown in FIG. 6 of that patent, the outlet is larger than the inlet and promotes process gas dissociation and reactivity.
[0008]
The PECVD system using the RF vacuum chamber disclosed in the '263 patent is useful for forming silicon nitride films using ammonia-free nitrogen chemistry. This is because the disclosed gas intake manifold facilitates the dissociation of nitrogen and facilitates the deposition of silicon nitride at relatively high deposition rates. In the '263 patent, the PECVD nitride film process is performed at a substrate temperature of about 300-360 ° C., and the hydrogen content of the film described in the' 263 patent is between 7 and 10 atomic percent (at%). Met. Therefore, by removing ammonia with the process gas, the resulting hydrogen concentration in the silicon nitride film was reduced.
[0009]
However, PECVD nitride films have certain qualities that prove sub-desirable for certain applications (eg, as gate spacers or etch stop layers). For example, PECVD nitride films tend to exhibit tensile stress rather than compressive stress, which can lead to cracks near the edge of the substrate on which the film is deposited. PECVD nitride films also suffer from poor film quality, as evidenced by the poor sidewall coverage exhibited by some PECVD nitride films. In addition, the etch selectivity of known PECVD nitride films is relatively low. For example, the etching selectivity of one nitride film deposited using the PECVD process is approximately 80 or less. Therefore, LPCVD nitride films are generally utilized for these applications.
[0010]
Thus, there is a need in the art for a nitride layer deposition process that uses a relatively low amount of heat. In addition, such membranes must exhibit low hydrogen content, good film quality, relatively high etch selectivity to oxide, and minimal cracks. Ultimately, the process for depositing such a film should be easily integrated into a series of processes.
[0011]
[Means for Solving the Problems]
The present invention provides a method and apparatus for producing a silicon nitride film having a low hydrogen content and high quality. The present invention requires a relatively low amount of heat allocated in the manufacture of such membranes. As used herein, quality is determined as a combination of step coverage, sidewall coverage, etch selectivity to oxide, moisture resistance, and crack resistance. In particular, the hydrogen content and etch selectivity of nitride films are comparable to those of LP nitrides as well as the step coverage and sidewall coverage of such films. Such membranes provide good moisture resistance as well as good crack resistance because they can tune the compressive stress of the membrane. Because the process of the present invention is performed in a single step and provides a relatively high deposition rate, it is more easily integrated into a series of processes than, for example, an LPCVD nitride process.
[0012]
The film of the present invention is deposited at a relatively high temperature compared to the conventional PECVD silicon nitride process (hence this film is referred to herein as a “high temperature nitride film” or “high temperature nitride layer”). Sometimes). In one embodiment, the high temperature nitride film according to the present invention provides a process gas comprising silane, nitrogen, and in some embodiments ammonia, at a process temperature between about 400 ° C. and about 600 ° C. Use and deposit. Preferably, such films are deposited at process temperatures between about 500 ° C and about 575 ° C. In another aspect of the invention, a helium precursor gas is also included in the process gas.
[0013]
According to another aspect of the invention, step coverage, hydrogen content, etch selectivity to oxide, and other properties of the resulting film are controlled by changing process parameters such as pressure and power. . Embodiments of the present invention include semiconductor devices manufactured using high temperature nitride films deposited according to the present invention. For example, such high temperature nitride films may be employed in the manufacture of structures such as polysilicon gate spacers, shallow isolation trenches, or premetal dielectric layers, or in the manufacture of etch stop layers.
[0014]
In a further aspect of the invention, the flow rate of silane gas is controlled to be in the range of 10 sccm and about 500 sccm, preferably between about 20 sccm and about 100 sccm; the flow rate of nitrogen is about 100 sccm and about 5000 sccm. , Preferably between about 2000 sccm and about 5000 sccm; in use, the ammonia flow rate is between about 0 sccm and about 1000 sccm, preferably between about 10 sccm and about 100 sccm To be controlled. The process pressure is maintained between about 2 Torr and about 8 Torr, preferably between about 5 Torr and about 7 Torr.
[0015]
Other features and advantages of the present invention will become apparent from the following detailed description and the accompanying drawings.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
I. Example CVD system
Certain embodiments of the present invention are deposited using various chemical vapor deposition (CVD) or other types of substrate processing systems. One suitable CVD machine in which the method of the present invention is performed is shown in FIGS. 1A and 1B. These figures are longitudinal sectional views of a chemical vapor deposition system 10 having a vacuum or processing chamber 15 that includes a chamber wall 15a and a chamber lid assembly 15b. Chamber wall 15a and chamber lid assembly 15b are shown in exploded perspective views in FIGS. 1C and 1D.
[0017]
The CVD system 10 includes a gas distribution manifold 11 for distributing process gas to a substrate (not shown) mounted on a pedestal 12 that is heated with a resistance located centrally within the processing chamber, the pedestal being, for example, Supported by a heater base (shown as part of pedestal 12 in FIGS. 1A, 1B, and 1C). The volume between the gas distribution manifold 11 and the pedestal 12 is referred to herein as the deposition zone. A portion of this volume is also referred to in this way. During the process, a substrate (eg, a semiconductor substrate) is positioned on the flat (or slightly convex) surface 12a of the pedestal 12. In view of the high temperatures employed in the present invention, the pedestal 12, preferably made of ceramic material, is adjacent to the lower loading / unloading position (shown in FIG. 1A) and the manifold 11 (FIG. 1A). To the upper process position (indicated by dashed line 14 and shown in FIG. 1B). A central board (not shown) includes sensors for providing information about the position of the substrate. The deposition gas and the carrier gas flow into the chamber 15 through the through hole 13b (FIG. 1D) of the gas distribution front plate 13a. Preferably, a faceplate of the design disclosed in '263 is employed to enhance the dissociation of process gas passing therethrough, and thus improve the deposition of silicon nitride films using the process chemicals of the present invention. The More specifically, the deposition process gas flows through the inlet manifold 11, through the conventional through-hole blocker plate 42, and then through the holes 13b in the gas distribution front plate 13a into the chamber (FIG. 1B). Indicated by arrow 40).
[0018]
Prior to reaching the manifold, deposition gas and carrier gas are input from a gas source 7 through a gas supply conduit 8 (FIG. 1B) to a gas mixing block or system 9 where the gases are combined into a manifold 11. Sent. In some cases, it is possible and desirable to direct deposition gas and carrier gas directly from the supply conduit 8 to the manifold 11, bypassing the gas mixing system 9. In other cases, any of the gas conduits 8 may bypass the gas mixing system 9 and allow gas to enter the bottom of the chamber 12 via a passage (not shown).
[0019]
In general, the supply conduit for each process gas includes (i) several safety shut-off valves (not shown) used to automatically or manually shut off the flow of process gas into the chamber, and ( ii) Includes a mass flow controller (MFC) (also not shown) that measures the flow of gas through the supply conduit. When toxic gases are used in the process, several safety shut-off valves are positioned in each gas supply conduit in a conventional configuration.
[0020]
The deposition process performed in the CVD system 10 can be either a thermal process or a plasma enhanced process. In the plasma enhancement process, an RF power source 44 applies power between the gas distribution front plate 13a and the pedestal 12 to excite the mixed process gas and within the cylindrical area between the front plate 13a and the pedestal 12. A plasma is formed. The components of the plasma react to deposit a desired film on the surface of the semiconductor substrate supported on the pedestal 12. The RF power supply 44 may be a mixed frequency RF power supply that normally supplies power at a high RF frequency (RF1) of 13.56 MHz and a low RF frequency (RF2) of 360 kHz and was introduced into the vacuum chamber 15. Strengthen the decomposition of reactive nuclides. Of course, the RF power supply 44 can supply either single or mixed frequency RF power (or other desired variations) to the manifold 11 to enhance the decomposition of reactive nuclides introduced into the chamber 15. it can. In a thermal process, the RF power supply 44 is not utilized, and the mixed process gas reacts thermally and is heated with resistance to provide the thermal energy required for the reaction, a semiconductor substrate supported on the pedestal 12 A desired film is deposited on the surface of the substrate.
[0021]
During the thermal deposition process, the pedestal 12 is heated, causing the CVD system 10 to heat. In a hot wall system of the type previously described, hot liquid can be circulated through the chamber wall 15a to maintain the chamber wall 15a at an elevated temperature when the plasma is not ignited or during the thermal deposition process. . The fluid used to heat the chamber wall 15a includes a common fluid type (ie, aqueous ethylene glycol or oily heat transfer fluid). This heating beneficially reduces or eliminates the condensation of unwanted reaction products that may otherwise condense on the walls of the cold vacuum passage and migrate back into the processing chamber during periods of no gas flow. Improve the elimination of process gas volatile products and contamination. In the cold wall system, the chamber wall 15a is not heated. This may be done, for example, during a plasma enhanced deposition process. In such a process, the plasma heats the chamber 15 including the chamber wall 15a surrounding the exhaust passage 23 and the shut-off valve 24. However, since the plasma is not expected to be in close proximity to all chamber surfaces, as described above, surface temperature variations may occur.
[0022]
The remainder of the gas mixture that is not deposited in the layer contains reaction products and is evacuated from the chamber by a vacuum pump (not shown). Specifically, the gas is exhausted into an annular exhaust plenum 17 through an annular slot 16 surrounding the reaction zone. The annular slot 16 and plenum 17 are defined by a gap between the top of the chamber wall 15a (including the upper dielectric lining 19) and the bottom of the circular chamber lid 20. The 360 ° circular symmetry and uniformity of the annular slot 16 and plenum 17 is important to achieve a uniform flow of process gas over the substrate so as to deposit a uniform film on the substrate. Gas passes through an observation port (not shown) below the lateral extension 21 of the exhaust plenum 17 and through a downwardly extending gas passage 23 to form a vacuum shut-off valve 24 (whose body is the chamber wall 15a). Flows through the foreline (not shown) and into the discharge outlet 25 which is connected to the external vacuum pump.
[0023]
The resistively heated pedestal 12 substrate support platter is heated using an embedded single loop heating element configured to create two complete turns concentrically. The outer portion of the heating element extends adjacent to the periphery of the support platter, while the inner portion extends on a concentric path having a small diameter. The wiring to the heating element passes through the stem of the pedestal 12. Typically, the pedestal 12 is made of a material that includes aluminum, ceramic, or some combination thereof. However, in high temperature applications, high temperature materials (eg, certain ceramic materials) may be used to avoid the possibility of melting the pedestal 12 due to the high temperatures employed, such as may occur with pedestals made of aluminum. Should be used.
[0024]
Normally, any or all of the hardware in the chamber lining, gas inlet manifold faceplate, and various other processing chambers are made of aluminum, anodized aluminum, or a ceramic material. Again, high temperature materials (eg, certain ceramic materials) are used to avoid the possibility of melting the pedestal 12 (or other chamber components that are maintained at high temperatures) due to the high temperatures employed. Should.
[0025]
Elevating mechanism and motor 32 (FIG. 1A) is used when the substrate is transferred by robot blade (not shown) through insertion / removal opening 26 in the side of chamber 10 into and out of the chamber body. The pedestal 12 and its substrate lifting pins 12b are raised and lowered. The motor 32 raises and lowers the pedestal 12 between the process position 14 and the lower substrate loading position. The motor 32, various valves and MFCs of the gas delivery system, and other components of the CVD system 10 are controlled by the system controller 34 (FIG. 1B) on control lines 36, some of which are shown. Controller 34 relies on feedback from the optical sensor to determine the position of movable mechanical assemblies such as throttle valves and pedestals that are moved by appropriate motors controlled by controller 34.
[0026]
In the preferred embodiment, the system controller 34 includes a hard disk drive (memory 38), a floppy disk drive (not shown), and a processor 37. The processor 37 contains a single board computer (SBC), analog and digital input / output boards, interface boards, and stepper motor controller boards. The various components of the CVD system 10 comply with the Versa Modular European (VME) standard that defines board, card cage, and connector dimensions and types. The VME standard defines that the bus structure also has a 16-bit data bus and a 24-bit address bus.
[0027]
The system controller 34 controls all activities of the CVD system 10. The system controller 34 executes system control software, which is a computer program stored in a computer-readable medium such as the memory 38. Preferably, the memory 38 is a hard disk drive, however, the memory 38 may be other types of memory. The computer program includes a set of instructions that dictate timing, gas mixing, chamber pressure, chamber temperature, RF power level, pedestal position, and other parameters of a particular process. Other computer programs stored in other memory devices may also be used to operate the system controller 34, including, for example, floppy disks or other suitable drives.
[0028]
The interface between the user and the controller 34 is via a CRT monitor 50a and a light pen 50b shown in FIG. 1E, which is a system monitor and CVD system 10 in a substrate processing system that can include one or more chambers. FIG. In the preferred embodiment, two CRT monitors 50a are used, one mounted on the clean room wall for the operator and the other on the back of the wall for the service technician. The CRT monitor 50a displays the same information at the same time, but only one light pen 50b is enabled. A light sensor at the tip of the light pen 50b detects light emitted by the CRT monitor 50a. To select a particular screen or function, the operator touches a designated area of the display screen and presses a button on the pen 50b. The touched area changes its highlight color, otherwise a new menu or screen is displayed, confirming communication between the light pen and the display screen. Other devices, such as a keyboard, mouse, or other pointing or communication device, can be used in place of or in addition to the light pen 50b, allowing the user to communicate with the system controller 34.
[0029]
The process for depositing the film is performed using a computer program product executed by the system controller 34. The computer program code can be written in any conventional computer readable programming language: for example, 68000 assembly language, C, C ++, Pascal, Fortran, etc. Appropriate program code is entered into a single file or multiple files using a conventional text editor and stored or embedded in a computer usable medium, such as a computer memory system. If the entered code text is in a high level language, the code is compiled and the resulting compiler code is then linked with the object code of the pre-compiled Windows library routine. To execute the linked and compiled object code, the system user invokes the object code and causes the computer system to load the code into memory. The CPU then reads and executes the code and performs the tasks identified by the program.
[0030]
FIG. 1F is an exemplary block diagram of a hierarchical control structure of a computer program 70, which is system control software, according to a specific embodiment. Using the light pen interface, the user enters the process set number and processing chamber number into the process selection subroutine 73 in response to a menu or screen displayed on the CRT monitor 50a. A process set is a predetermined set of process parameters required to perform a specified process and is identified by a predetermined set number. The process selection subroutine 73 identifies (i) the desired processing chamber, and (ii) the desired set of process parameters needed to operate the processing chamber to perform the desired process. Process parameters for performing a particular process include, for example, process gas composition and flow rate, temperature, pressure, microwave power level or plasma conditions such as RF power level and low frequency RF frequency, cooling gas pressure, and chamber walls. It relates to process conditions such as temperature. These parameters are provided to the user in the form of a prescription and entered using the interface of the light pen / CRT monitor. Signals for monitoring the process are provided by the analog and digital input boards of the system controller, and signals for controlling the processes are output on the analog and digital output boards of the CVD system 10.
[0031]
Process sequencer subroutine 75 includes program code for accepting the identified processing chamber and process parameter sets from process selection subroutine 73 and for controlling the operation of the various processing chambers. Multiple users can enter process set numbers and process chamber numbers, or users can enter multiple process set numbers and process chamber numbers so that the process sequencer subroutine 75 plans the selected processes in the desired order. Operate to Preferably, the process sequencer subroutine 75 (i) monitors the operation of the processing chamber to determine if the chamber is in use, (ii) what process is being performed in the in-use chamber. And (iii) performing the desired process based on the availability of the processing chamber and the type of process to be performed. Conventional methods of monitoring the processing chamber, such as polling, may be used. When planning which process is to be performed, the process sequencer subroutine 75 will enter each of the process chamber current conditions or requirements that are used in comparison to the desired process conditions for the selected process. It takes into account the “age” of a particular user, or any other relevant factor that the system programmer wishes to include to determine the priorities to plan.
[0032]
After determining which processing chamber and process set combination is to be executed, the process sequencer subroutine 75 initiates the execution of the process set by routing certain process set parameters to the chamber manager subroutine 77a-c, Manager subroutines 77a-c control a plurality of processing tasks in processing chamber 15 in accordance with the process set determined by process sequencer subroutine 75. For example, the chamber manager subroutine 77a includes program code for controlling the operation of sputtering and CVD processes in the processing chamber 15. The chamber manager subroutines 77a-c also control the execution of various chamber component subroutines that control the operation of the chamber components necessary to perform the selected process set. Examples of chamber component subroutines are substrate positioning subroutine 80, process gas control subroutine 83, pressure control subroutine 85, heater control subroutine 87, and plasma control subroutine 90. Those skilled in the art having ordinary skill in the art will readily recognize that other chamber control subroutines can be included depending on what processes are performed in the processing chamber 15.
[0033]
In operation, the chamber manager subroutine 77a selectively plans or calls process component subroutines according to the particular process set being executed. The chamber manager subroutine 77a plans a process component subroutine just like planning the process set in which the process sequencer subroutine 75 is executed and the chamber in which it is executed. Typically, the chamber manager subroutine 77a monitors various chamber components, determines which components need to be operated based on process parameters for the process set being executed, and monitors and Including executing a chamber component subroutine in response to the determining step.
[0034]
The operation of a particular chamber component subroutine is described below with reference to FIG. 1F. The substrate positioning subroutine 80 is used to load the substrate onto the pedestal 12, lift the substrate to the desired height within the processing chamber 15, and control the spacing between the substrate and the gas distribution manifold 11. Contains program code for controlling chamber components. As the substrate is loaded into the processing chamber 15, the pedestal 12 is lowered to receive the substrate, and then the pedestal 12 is raised to the desired height within the processing chamber 15 to bring the substrate into the gas distribution manifold during the process. 11 to a desired distance or interval. In operation, the substrate positioning subroutine 80 controls the movement of the pedestal 12 in response to process set parameters related to the support height transferred from the chamber manager subroutine 77a.
[0035]
The process gas control subroutine 83 has program code for controlling the composition and flow rate of the process gas. The process gas control subroutine 83 also controls the safety shut-off valve open / close position and the mass flow controller ramp up / down to achieve the desired gas flow rate. The process gas control subroutine 83, like all chamber component subroutines, is invoked by the chamber manager subroutine 77a and receives process parameters relating to the desired gas flow rate from the chamber manager subroutine. Normally, the process gas control subroutine 83 opens the gas supply conduit and repeatedly (i) reads the required mass flow controller and (ii) compares the reading with the desired flow received from the chamber manager subroutine 77a. And (iii) operate by adjusting the flow rate of the gas supply conduit when needed. Further, the process gas control subroutine 83 includes monitoring the gas flow rate for a dangerous flow rate and activating a safety shut-off valve when a dangerous condition is detected.
[0036]
The pressure control subroutine 85 includes program code for controlling the pressure in the processing chamber 15 by adjusting the size of the throttle valve opening in the chamber exhaust system. The size of the throttle valve opening is set to control the chamber pressure to a desired level in relation to the total process gas flow, the size of the processing chamber 15, and the pump set point pressure for the exhaust system. When the pressure control subroutine 85 is invoked, the target pressure level is received as a parameter from the chamber manager subroutine 77a. The pressure control subroutine 85 measures the pressure in the processing chamber 15 by reading one or more conventional pressure gauges connected to the chamber, compares the measured value with the target pressure, and corresponds to the PID (proportional, The integral and derivative values are obtained from the stored pressure table, and the throttle valve is adjusted according to the PID value obtained from the pressure table. Alternatively, the pressure control subroutine 85 can be written to open or close the throttle valve to a specific opening size to adjust the processing chamber 15 to the desired pressure.
[0037]
The heater control subroutine 87 includes program code for controlling the current to the heating unit that is used to heat the substrate. The heater control subroutine 87 is also invoked by the chamber manager subroutine 77a and receives the target or set point temperature parameter. The heater control subroutine 87 measures the output voltage of the thermocouple located on the pedestal 12, compares the measured temperature with the set point temperature, and the current applied to the heating unit to achieve the set point temperature. The temperature is measured by increasing or decreasing. The temperature is obtained from the measured voltage by looking at the corresponding temperature in the stored conversion table or by calculating the temperature using a fourth order polynomial. When using the embedded loop to heat the pedestal 12, the heater control subroutine 87 gradually controls the rise / fall of the current applied to the loop. In addition, a built-in fail-safe mode may be included to detect process safety compliance, and the operation of the heating unit can be interrupted if the processing chamber 15 is not properly configured.
[0038]
The plasma control subroutine 90 includes code for setting the low frequency and high frequency RF power levels applied to the process electrodes in the processing chamber 15 and for setting the low frequency RF frequency employed. The plasma control subroutine 90 also includes program code for activating and setting / adjusting the power level applied to the magnetron or other microwave source used in the present invention. The plasma control subroutine 90 is invoked by the chamber manager subroutine 77a in a manner similar to the previously described chamber component subroutines.
[0039]
The above description of the reactor is primarily for illustrative purposes, and other plasma CVD equipment such as an electron cyclotron resonance (ECR) plasma CVD apparatus, an inductively coupled RF high density plasma CVD apparatus, etc. may be employed. In addition, variations of the system described above are possible, such as variations in susceptor design, heater design, RF power frequency, location of RF power connections, and others. In other embodiments, the process is performed in a chamber that uses a quartz lamp to heat the substrate. The layers and methods for forming such layers of the present invention are not limited to any particular apparatus or any particular plasma excitation method.
[0040]
II. Method and apparatus for depositing high temperature nitride films
A process recipe for depositing a PECVD high temperature nitride film on an 8 inch substrate using a DxZ chamber equipped with a ceramic pedestal and manufactured by Applied Materials, Inc. of Santa Clara, California is preferred for the present invention. Table 1 and Table 2 show the embodiments. The steps for depositing the layer are shown in the flow diagram of FIG. 2A.
[0041]
FIG. 2A illustrates a process according to the present invention. At step 200, environmental parameters are set in the processing chamber. This includes setting the pressure and process temperature within the processing chamber 15. The pressure in the processing chamber 15 is set between about 2 torr and about 8 torr, preferably between about 5 torr and about 7 torr. The process temperature is set between about 400 ° C. and about 600 ° C., preferably between about 500 ° C. and about 575 ° C. At step 210, the electrode spacing (ie, the spacing between the pedestal 12 and the gas distribution faceplate 13a) is between about 200 mils and about 600 mils, preferably between about 300 mils and about 600 mils. Is set. Although this is shown as part of the process of FIG. 2, the electrode spacing may be set before any of the processes of the present invention are performed.
[0042]
Next, at step 220, deposition gas is flowed into the processing chamber. Silane (SiH_Four) Is introduced into the processing chamber 15 at a flow rate between about 10 sccm and about 500 sccm. Preferably, the silane is introduced at a flow rate between about 20 sccm and about 100 sccm, and most preferably at a flow rate of about 50 sccm. Nitrogen (N₂) Is introduced into the processing chamber 15 at a flow rate between about 100 sccm and about 5000 sccm. Preferably, nitrogen is introduced at a flow rate between about 2000 sccm and about 5000 sccm, and most preferably at a flow rate of about 4500 sccm.
[0043]
As an option, ammonia (NH_Three) And / or helium (He) may also be introduced into the processing chamber 15. Ammonia is introduced into the processing chamber 15 at a flow rate up to about 5000 sccm. Preferably, ammonia is introduced at a flow rate between about 10 sccm and about 100 sccm, and most preferably at a flow rate of about 30 sccm. Helium is introduced into the processing chamber 15 at a flow rate between about 500 sccm and about 3000 sccm. The preceding gas flow parameters are for a DxZ chamber made by Applied Materials, Inc. of Santa Clara, California, configured to process an 8 inch substrate and equipped with a ceramic pedestal. Other chamber designs may require different flow rates to deposit a film according to the present invention, so the above parameters may vary between substrate processing systems.
[0044]
To begin the deposition of the silicon nitride film according to the present invention, energy is then applied to the deposition gas (step 230). During this step, for example, RF energy is applied to create a plasma from the deposition gas. An RF power level between about 200 W and about 800 W is applied to form a plasma. In the DxZ chamber described above, this is about 0.62 W / cm.²And about 2.48 W / cm²Equal to the RF power density between. Preferably, an RF power level between about 300 W and about 600 W (about 0.93 W / cm²And about 1.86 W / cm²Is applied to form a plasma. These RF power levels are for single frequency technology using a frequency of 13.56 MHz. Mixed frequency techniques can also be employed, using two or more separate frequencies (eg, 2 MHz and 13.56 MHz). At step 240, the plasma is maintained for a period of time to deposit the film to the desired thickness, the thickness being related to the length of time that the plasma is maintained.
[0045]
Table 1 summarizes the range of parameters employed in the high temperature process of the present invention. Table 2 shows the preferred ranges for these parameters.
[0046]
Table 1
Pressure: 2-8 Torr
RF power (density): 200-800 W (0.62-2.48 W / cm²)
Temperature: 400 ° C to 600 ° C
Electrode spacing: 200-600 mil
SiH_FourFlow rate: 10-500 sccm
N₂Flow rate: 100-5000 sccm
NH_ThreeFlow rate: 0-5000 sccm
He flow rate (optional): 500-3000 sccm
[0047]
Table 2 (preferred)
Pressure: 5-7 Torr
RF power (density): 300 to 600 W (0.93 to 1.86 W / cm²)
Temperature: 500 ° C to 575 ° C
Electrode spacing: 300-600 mil
SiH_FourFlow rate: 20-100 sccm
N₂Flow rate: 2000-5000 sccm
NH_ThreeFlow rate: 10-100 sccm
[0048]
From Table 2, it is clear that the preferred flow rate ratio of silane to nitrogen is between about 1: 250 and about 1:20, and the maximum preferred flow rate ratio of ammonia to nitrogen is about 1:20. . By keeping the amount of silane within these ranges, the resulting hydrogen content in the film is kept to a minimum. This is because the amount of silane containing hydrogen should only be sufficient to allow film deposition at an acceptable flow rate. A high proportion results in an undesirably high level of hydrogen content. The maximum ratio of ammonia to nitrogen is also kept relatively low for this reason. As the amount of ammonia is increased, the hydrogen content of the resulting membrane also increases. Thus, these flow ratios ensure that the hydrogen content remains low enough (eg, 10 atomic% (at%) or near) to provide a good quality silicon nitride film with favorable characteristics outlined below. To. The low hydrogen content also provides high etch selectivity to oxide, which is particularly important for etch stop applications. Moreover, the range of silane to nitrogen flow ratios employed here improves plasma stability, thereby providing a more uniform film.
[0049]
III. Experiment and simulation results
The high temperatures used in the process according to the invention are important in producing high quality films produced by the process. By using a relatively high temperature, the hydrogen content is reduced. However, for the current heat budget, the maximum temperature employed in the process of the present invention is limited to about 600 ° C. Conversely, film integrity begins to suffer when the film of the present invention is deposited at process temperatures of about 400 ° C. or less (ie, delamination, cracking, and other such phenomena begin to occur). . Therefore, a temperature exceeding about 400 ° C. and approaching about 600 ° C. is preferable. Such relatively high temperature use also requires the use of pedestals and supports capable of withstanding such temperatures (eg, pedestals and supports made of ceramic materials). This reduction in hydrogen provides higher film quality (reduction of cracks, delamination, etc.).
[0050]
In addition, the hydrogen content is reduced in the process of the present invention by minimizing the amount of ammonia used in the process because ammonia contains hydrogen and nitrogen. For example, experimental measurements were performed using Nuclear Resonance Analysis on silicon nitride films deposited using the LPCVD process, the PECVD process, and the process of the present invention. The LPCVD process deposited a film with a hydrogen content of less than 3 at%. The PECVD process deposited a film having a hydrogen content of about 20 at% at 400 ° C., while depositing a film having a hydrogen content of about 13 at% at 480 ° C. Films deposited by the process of the present invention exhibited a hydrogen content of about 10 at%. Although not as low as LPCVD, the hydrogen content of the film was significantly lower than the hydrogen content of PECVD silicon nitride films, especially PECVD silicon nitride films deposited at low temperatures.
[0051]
The use of a reduced silane flow rate is motivated for similar reasons. Since silane also contains hydrogen, only the amount of silane required for film deposition should be employed. However, this is in tension with the need to maximize throughput by maximizing the deposition rate. The inventors have found that the flow rate provides an acceptable balance between this competing relationship.
[0052]
The selectivity of these membranes relative to the oxide was also measured. Films deposited by the process of the present invention and LPCVD silicon nitride films had a selectivity of at least 100. In contrast, the selectivity of PECVD silicon nitride films to oxide was about 80 or less for films deposited at both 400 ° C. and 480 ° C. Thus, for etch stop applications such as self-aligned and borderless contacts, the film according to the present invention will protect the underlayer better than PECVD silicon nitride films, thereby , Allowing more precise patterning of the layers involved. The films according to the present invention exhibit an etch selectivity for oxides comparable to LPCVD silicon nitride films, although the etch selectivity of LPCVD silicon nitride films may actually be high. All etch selectivity described herein is for etch selectivity to oxide of a given nitride film, as will be appreciated by those skilled in the art.
[0053]
Moreover, the process according to the invention exhibits good process stability. For example, the change in film thickness is 2% or less over the operation of 5000 substrates. At the same operation, the uniformity (% 1-s, 3 mmEE) is well below 2% of the specification accepted for this type of membrane and remains between 1% and 1.5%. The refractive index of the film changes less than 0.01 and remains close to 1.96. The film stress on the substrate in operation is 0.3x10⁹Dyne / cm²(Compressibility) stays close, only 0.3x10⁹Dyne / cm²It changes by (maximum-minimum). In another deposition process according to the present invention, the deposited film is 1 × 10⁹Dyne / cm²To 1.5x10⁹Dyne / cm²Presents a membrane stress of the degree of (compressibility). The wet etch rate (WER) of the film according to the present invention is between about 20 liters / minute and about 40 liters / minute (6: 1 BOE).
[0054]
FIG. 2B shows this data in a diagram. The data was generated using a DxZ chamber manufactured by Applied Materials, Inc. of Santa Clara, California, configured to process 8 inch substrates and equipped with a ceramic pedestal. Wet cleaning steps or preventive maintenance operations in which the chamber vacuum seal was broken and the processing chamber was manually wiped with a cleaning fluid were not performed during the operation of the 5000 substrate described herein.
[0055]
Some of the film properties described herein may be modified by changing the process parameters used in the manufacture of the film. This is illustrated in FIG. 2C, which includes a number of graphs generated by computer simulation of films deposited according to the present invention. These graphs show the relationship between various process parameters and various film properties. More particularly, the graph shows the effect of chamber pressure, RF power, electrode spacing, and various flow rates on film thickness, film uniformity, refractive index, and film stress. The following simulation results assume that other parameters (eg, deposition time) remain constant.
[0056]
As FIG. 2C shows, the simulation suggests that although the pressure, RF power, electrode spacing, and degree are small, an increase in nitrogen flow results in a decrease in film thickness per unit time. Conversely, simulations suggest that the film thickness increases with increasing silane or ammonia flow rate. Simulations suggest that membrane uniformity increases with increasing RF power, electrode spacing, and ammonia flow rate. Simulations also suggest that film uniformity decreases significantly with increasing chamber pressure, but changes in nitrogen and silane flow rates are relatively unaffected.
[0057]
Increases in chamber pressure, RF power, and electrode spacing appear to cause a decrease in the refractive index of the resulting film, while increases in silane and ammonia flow rates cause an increase in refractive index. Looks like. Simulations suggest that changes in the nitrogen flow rate have little effect on the resulting film refractive index and that the film stress changes little with changes in the process gas flow rate. Furthermore, simulations suggest that the membrane stress transition from tension to compression increases with chamber pressure and electrode spacing, while an increase in RF power causes the opposite result.
[0058]
These simulations support the inventor's expectations and understanding of the process characteristics. Simulations can predict that the process according to the present invention provides good film uniformity (changes in process parameters have little effect on film uniformity), and such processes have good control over film stress. (Proven by the effects of chamber pressure, electrode spacing, and RF power on membrane stress). These results are consistent with the inventors' expectations and understanding of the process of the present invention.
[0059]
Thus, compared to PECVD nitride films, films according to the present invention provide better etch selectivity and greater control over film stress. Moreover, the films of the present invention exhibit good sidewall coverage. In contrast to LPCVD nitride films, the film according to the present invention provides a quantity of heat that can be implemented in situations where previously formed layers are sensitive to the temperature of subsequent process steps. Again, the film according to the present invention provides greater control over film stress than the LPCVD nitride film and is compatible with the metal layer forming the wiring. Moreover, the film according to the present invention reduces backside deposition (deposition that occurs on the underside of the substrate), better process integration (because the process is a single step), cleaning when compared to LPCVD nitride processes. Provides a longer average time between and higher deposition rates.
[0060]
IV. Example multilayer structure
Since high temperature nitride films produced in accordance with the present invention have properties (eg, etch selectivity and etch rate) comparable to those of LP nitride layers, such high temperature nitride films have a low assigned heat budget. The process can replace the LP nitride film. For example, the etch selectivity of a high temperature nitride film is comparable to that of an LP nitride film, so if it is desirable to use a lower temperature nitride deposition step, the high temperature nitride film may be LP nitride as an etch stop layer. The membrane can be replaced.
[0061]
FIG. 3 illustrates the use of a high temperature nitride layer as an etch stop layer. Initially, the substrate to be processed is positioned in the PECVD chamber. The substrate will typically include structures that require protection during subsequent etching steps. At step 300, a high temperature nitride layer is deposited on the substrate utilizing the recipe described in Tables 1 and 2 and the step described in FIG. 2A. Next, as shown in FIG. 3, an oxide layer is deposited on the substrate (step 310). A photoresist layer is applied over the oxide layer and then cured (step 320). The photoresist is then patterned using standard photolithographic techniques, if necessary (step 330). Next, an etcher is used to etch away a portion of the oxide layer (step 340). In regions where the high temperature nitride layer is underlying the oxide, etching stops upon encountering that layer because of the relatively high etch selectivity of the high temperature nitride layer to the oxide.
[0062]
FIGS. 4A and 4B illustrate an etch that utilizes a high temperature nitride layer 400 as an etch stop layer to create a structure, referred to herein as a self-aligned contact, that is well known to those skilled in the art. Sectional drawing of the device before and after the step is shown. As shown in FIG. 4A, a mask 410 protects a portion of the silicon oxide layer 420 during the etching operation. Before depositing the high temperature nitride layer 400, the polysilicon layer 430, the silicide layer 440 (which protects the polysilicon layer 430), the oxide layer 445, and the oxide space layer (oxide spacer 450 (1), 450 (2), 450 (3), and 450 (4)) are deposited. As the oxide layer etch proceeds, a portion of the silicon oxide layer 420 is removed. However, once reached, the high temperature nitride layer 400 inhibits further etching and thus protects the underlying layer.
[0063]
FIG. 4B shows the structure in FIG. 4A after the etching process is complete. As described, and as shown in FIG. 4B, the high temperature nitride layer 400 prevents etching of the underlying layer. This allows the process to proceed until the exposed portions of the silicon oxide layer 420 are completely removed while avoiding over-etching that may damage the underlying structure. A suitable chemical is then used to remove the newly exposed portions of the high temperature nitride layer 400. This chemical is selected such that the underlying structure of the high temperature nitride layer 400 is not adversely affected (ie, not etched) by the etching step.
[0064]
FIGS. 4C and 4D show another use of a high temperature nitride layer, the formation of a structure referred to herein as an unbounded contact, which is also a structure well known to those skilled in the art. FIGS. 4C and 4D show cross-sectional views of the device before and after an etching step that creates a borderless contact utilizing the high temperature nitride layer 455 as an etch stop layer. As shown in FIG. 4C, a mask 460 protects a portion of the silicon oxide layer 470 during the etching operation. Before depositing the high temperature nitride layer 455, the polysilicon layer 480, the silicide layer 485 (to protect the polysilicon layer 480), and the oxide space layer (oxide spacers 490 (1) and 490 (2)). Are deposited). A high temperature nitride layer 455 is also deposited over the STI 495. As the oxide layer etch proceeds, a portion of the silicon oxide layer 470 is removed. However, once reached, the high temperature nitride layer 455 inhibits further etching and thus protects the area under the nitride layer.
[0065]
FIG. 4D shows the structure in FIG. 4C after the etching process is complete. As described and as shown in FIG. 4D, the high temperature nitride layer 455 prevents etching of the underlying layer. This allows the process to proceed until the exposed portion of the silicon oxide layer 470 has been completely removed while avoiding overetching that may damage the underlying structure. A suitable chemical is then used to remove the newly exposed portions of the high temperature nitride layer 455. This chemical is selected such that the underlying structure of the high temperature nitride layer 455 is not adversely affected (ie, not etched) by the etching step.
[0066]
Yet another use of the high temperature nitride layer is in the formation of spacers. In a process for forming a silicide electrode in a MOS or bipolar transistor, a spacer layer can be utilized to precisely position the electrode, lightly doped drain, or other structure.
[0067]
5A and 5B show cross-sectional views of a device during formation of a spacer, eg, a logic device having a spacer formed of high temperature nitride material. In FIG. 5A, a polysilicon layer 500 and a silicide layer 510 are deposited on the substrate 520 in that order. Polysilicon layer 500 and silicide layer 510 may be patterned, for example, to form a silicide electrode. A high temperature nitride layer 530 is deposited over the silicide electrode. The high temperature nitride layer 530 may be deposited using a process recipe as shown in Table 1 or Table 2. In FIG. 5B, the high temperature nitride layer 530 is then etched by a process such as sputtering. Etching anisotropically removes the horizontal portion of the high temperature nitride layer 530, thus forming the high temperature nitride spacers 540 (1) -540 (4).
[0068]
Additional uses for the high temperature nitride layer of the present invention include use as a lining layer in shallow trench isolation processes and as a lining layer for premetal dielectric films. In shallow trench isolation techniques, isolation is provided by forming a recess or trench between two active regions on which electronic devices are placed. The trench is filled with an isolation material such as CVD oxide. The quality of the trench isolation process is improved when the nitride lining layer is deposited on the trench walls and base prior to the conformal dielectric layer deposition.
[0069]
FIG. 6 shows a cross section of a substrate having a high temperature nitride layer deposited as a lining layer for shallow trench isolation, and FIG. 7 shows the process steps for forming such a lining layer. FIG. Referring to FIGS. 6 and 7, shallow trenches 700 are first formed in the substrate 702 to isolate islands 704 between the trenches 700 (step 800). A high temperature nitride lining layer 706 is then formed. Deposition of the high temperature nitride lining layer 706 begins with the inflow of process gas into the processing chamber of the substrate processing system (step 810). Such a gas may include, for example, silane and nitrogen.
[0070]
At step 820, environmental parameters are set in the processing chamber. This includes setting the pressure and temperature in the processing chamber to acceptable levels. For example, a pressure between about 2 Torr and about 8 Torr at a temperature between about 400 ° C. and about 600 ° C. may be used to produce a membrane according to the present invention. At step 830, energy is applied to the process gas to allow the reaction to proceed to form the high temperature nitride lining layer 706. This can be, for example, RF or microwave energy, and the application will be maintained until the high temperature nitride lining layer 706 is deposited to an acceptable thickness (step 840). An active device is then formed over the high temperature nitride lining layer 706 (step 850).
[0071]
III. Example transistor structure
FIG. 8 shows a simplified cross-sectional view of an integrated circuit 800 that can be made in accordance with the present invention. As shown, the integrated circuit 800 includes an NMOS transistor 803 and a PMOS transistor 806 that are separated from each other by a field oxide region 820 formed by local oxidation of silicon (LOCOS) or other techniques. Insulated. Alternatively, transistors 803 and 806 may be isolated from each other and electrically isolated by trench isolation (not shown) when transistors 803 and 806 are both NMOS or both PMOS. Each transistor 803 and 806 includes a source area 812, a drain area 815, and a gate area 818.
[0072]
A premetal dielectric (PMD) layer 821 separates the transistors 803 and 806 from the metal layer 840 and has a connection created by a contact 824 between the metal layer 840 and the transistor. Metal layer 840 is one of four metal layers 840, 842, 844 and 846 included in integrated circuit 800. Each metal layer 840, 842, 844, and 846 is separated from the adjacent metal layer by a respective intermetal dielectric (IMD) layer 827, 828, or 829. Adjacent metal layers are connected by vias 826 at selected openings. Deposited over the metal layer 846 is a planarization passivation layer 830.
[0073]
A premetal dielectric layer (eg, PMD 821) may be formed by depositing a dielectric layer over the high temperature nitride layer according to the present invention. For example, in FIG. 8, PMD 821 includes a boron phosphate silicon glass (BPSG) layer 850 deposited on high temperature nitride lining layer 851. FIG. 9 is a flow diagram illustrating the steps of the process for forming such a PMD. Referring to FIGS. 8 and 9, the deposition of the high temperature nitride lining layer 851 is initiated by flowing a deposition gas such as silane and nitrogen into the processing chamber (step 1000). The environmental parameter is then set to the desired level in the processing chamber (step 1010). For example, a pressure between about 2 Torr and about 8 Torr and a temperature between about 400 ° C. and about 600 ° C. may be maintained in the processing chamber. In a process using silane and nitrogen, as described in Table 2, a pressure between about 5 Torr and about 7 Torr and a temperature between about 500 ° C. and about 575 ° C. are maintained in the processing chamber. It is preferable. Next, at step 1020, energy is applied to the process gas to initiate a chemical reaction to deposit the high temperature nitride lining layer 851. For example, RF energy may be applied to generate a plasma from the process gas. Application of energy is maintained to deposit the high temperature nitride lining layer 851 to the desired thickness (step 1030). A dielectric layer, such as a BPSG layer 850, is then deposited over the high temperature nitride lining layer 851 (step 1040).
[0074]
It should be understood that the simplified integrated circuit 800 of FIG. 8 is presented for illustrative purposes only. Those of ordinary skill in the art will be able to practice the invention in the manufacture of other integrated circuits such as microprocessors, application specific integrated circuits (ASICs), memory devices, and the like. Furthermore, the present invention may be applied to the manufacture of PMOS, NMOS, CMOS, bipolar, or BiCMOS devices, among others.
[0075]
The invention has been described with reference to the preferred embodiments. Modifications and substitutions will be apparent to those skilled in the art. In particular, process parameters have been described for specific process chambers and substrate sizes, but conversion to different chambers and substrate sizes is well understood and the flow ratios described herein are easily convertible. . Accordingly, there is no intention to limit the invention except as provided by the appended claims.
[Brief description of the drawings]
1A is a longitudinal cross-sectional view of one embodiment of a chemical vapor deposition apparatus according to the present invention. FIG.
FIG. 1B is a longitudinal cross-sectional view of one embodiment of a chemical vapor deposition apparatus according to the present invention.
1C is an exploded perspective view of a portion of the CVD chamber shown in FIG. 1A.
1D is an exploded perspective view of a portion of the CVD chamber shown in FIG. 1A. FIG.
1E is a simplified diagram of a system monitor and CVD system 10 in a multi-chamber system that can include one or more chambers. FIG.
FIG. 1F is a block diagram of a hierarchical control structure of a computer program 70 that is system control software, in accordance with certain embodiments.
FIG. 2A is a flow diagram illustrating steps for depositing a high temperature nitride film according to the present invention.
FIG. 2B is a set of diagrams showing the stability of the process according to the present invention with respect to film thickness, film uniformity, refractive index, and film stress.
FIG. 2C illustrates the effect of various process parameters on the properties of high temperature nitride films according to the present invention.
FIG. 3 is a flow diagram illustrating steps for utilizing a high temperature PECVD nitride film as an etch stop layer in an oxide etch process.
4A is a cross-sectional view of a device showing high temperature PECVD nitride used as an etch stop layer in a self-aligned contact structure. FIG.
FIG. 4B is a cross-sectional view of a device showing high temperature PECVD nitride used as an etch stop layer in a self-aligned contact structure.
FIG. 4C is a cross-sectional view of a device showing high temperature PECVD nitride used as an etch stop layer in an unbounded contact structure.
FIG. 4D is a cross-sectional view of a device showing high temperature PECVD nitride used as an etch stop layer in an unbounded contact structure.
FIG. 5A is a cross-sectional view of a device showing the formation of a high temperature PECVD nitride layer on a spacer.
FIG. 5B is a cross-sectional view of the device showing the formation of a high temperature PECVD nitride layer on the spacer.
FIG. 6 is a cross-sectional view of a shallow isolation trench structure.
FIG. 7 is a flow diagram illustrating the steps of forming a high temperature nitride lining layer with a shallow isolation trench structure.
FIG. 8 is a cross-sectional view of a premetal dielectric layer.
FIG. 9 is a flow diagram illustrating the steps of forming a high temperature nitride lining layer with a pre-metal dielectric layer.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 7 ... Gas source, 8 ... Gas supply conduit, 9 ... Gas mixing system, 10 ... CVD system, 10 ... Chamber, 10 ... Chemical vapor deposition system, 11 ... Gas distribution manifold, 11 ... Intake manifold, 12 ... Chamber 12 ... Pedestal, 12a ... Surface, 12b ... Substrate lifting pin, 13a ... Gas distribution front plate, 13b ... Through hole, 14 ... Process position, 14 ... Broken line, 15 ... Chamber, 15 ... Processing chamber, 15 ... Vacuum chamber, 15a ... chamber wall, 15b ... chamber lid assembly, 16 ... annular slot, 17 ... annular discharge plenum, 19 ... dielectric lining, 20 ... chamber lid, 21 ... lateral extension, 23 ... gas passage, 23 ... discharge passage, 24 ... Vacuum shut-off valve, 25 ... Discharge outlet, 26 ... Opening, 32 ... Motor, 34 ... System controller, 3 ... control line, 37 ... processor, 38 ... memory, 40 ... arrow, 42 ... blocker plate, 44 ... RF power supply, 50a ... CRT monitor, 50b ... optical pen, 70 ... computer program, 73 ... subroutine for process selection, 75 ... Process sequencer subroutine, 77a ... chamber manager subroutine, 77a-c ... chamber manager subroutine, 80 ... subroutine, 83 ... process gas control subroutine, 85 ... pressure control subroutine, 87 ... heater control subroutine, 90 ... plasma control subroutine, 400 ... high temperature Nitride layer, 410 ... mask, 420 ... silicon oxide layer, 430 ... polysilicon layer, 440 ... silicide layer, 445 ... oxide layer, 450 ... oxide spacer, 455 ... high temperature nitride layer, 460 ... mask, 470 ... Silicon oxide 480 ... polysilicon layer, 485 ... silicide layer, 490 ... oxide spacer, 500 ... polysilicon layer, 510 ... silicide layer, 520 ... substrate, 530 ... high temperature nitride layer, 540 ... high temperature nitride spacer, 700 ... Trench, 702 ... Substrate, 704 ... Island, 706 ... High temperature nitride lining layer, 800 ... Integrated circuit, 803 ... NMOS transistor, 806 ... PMOS transistor, 812 ... Source region, 815 ... Drain region, 818 ... Gate region, 820 ... Field oxide area, 821 ... Premetal dielectric (PMD) layer, 824 ... Contact, 826 ... Via, 827 ... Intermetal dielectric (IMD) layer, 830 ... Planarization passivation layer, 840 ... Metal layer, 846 ... Metal layer , 850 ... Boron phosphate silicon glass (boron phosphate silicon glass) (BPSG) layer, 851... high temperature nitride lining layer.

Claims (14)

A method of depositing a silicon nitride layer in a vacuum chamber, comprising:
Flowing a process gas including a first process gas and a second process gas into the vacuum chamber, wherein the first process gas is silane and the second process gas is nitrogen;
Maintaining a pressure in the vacuum chamber of greater than 2 Torr and less than 8 Torr;
Generating a plasma from the process gas in the vacuum chamber;
Maintaining a temperature between 500 ° C. and 575 ° C. in the vacuum chamber;
To deposit the silicon nitride layer, the method including the step of maintaining said plasma in the vacuum chamber. The step of flowing process gas further comprises maintaining the flow rate of the first process gas between 20 sccm and 500 sccm, and the flow rate of the second process gas between 100 sccm and 5000 sccm. And maintaining the method. The flow rate ratio between the first process gas and said second process gas, 1: 250 and 1: 20. maintained between the method of claim 1. The step of supplying a process gas further comprises maintaining a flow rate of the first process gas between 20 sccm and 100 sccm, and a flow rate of the second process gas between 1000 sccm and 5000 sccm. The method of claim 1 comprising maintaining in between. The method according to any one of claims 1 to 4 , wherein the process gas further comprises a third process gas, and the third process gas is ammonia. The step of flowing the process gas into the vacuum chamber further includes the step of maintaining the flow rate of the first process gas between 20 sccm and 500 sccm, and the flow rate of the second process gas is 100 sccm. The method of claim 5, comprising maintaining between 3 and 5000 sccm, and maintaining the flow rate of the third process gas between 1 sccm and 5000 sccm. The flow rate ratio between the third process gas and said second process gas is 1: is maintained below 20, The method of claim 5. The step of flowing the process gas into the vacuum chamber further comprises maintaining the flow rate of the first process gas between 20 sccm and 100 sccm, and the flow rate of the second process gas at 1000 sccm. The method of claim 5, comprising maintaining between 3 and 5000 sccm, and maintaining a flow rate of the third process gas between 1 sccm and 100 sccm. Furthermore, the pressure comprises maintaining between 5 Torr and 7 Torr, the method according to any one of claims 1-8. It said process gas further includes a fourth process gas, the fourth process gas is helium, the method according to any one of claims 1-9. The step of flowing the process gas into the vacuum chamber further includes the step of maintaining the flow rate of the first process gas between 20 sccm and 100 sccm, and the flow rate of the second process gas is 100 sccm. When the step of maintaining between 5000 sccm, the flow rate of the third process gas, a step of maintaining between 1 sccm and 5000 sccm, the flow rate of the fourth process gas, and 500 sccm and 3000 sccm 11. The method of claim 10, comprising maintaining during 12. The method of claim 11, further comprising maintaining the plasma by applying RF energy at an RF power density between 0.93 W / cm ² and 1.86 W / cm ² . A method of forming a silicon nitride spacer on a substrate having at least one feature, wherein the substrate is disposed in a vacuum chamber, the method including a process gas including a first process gas and a second process gas. A step of flowing into a vacuum chamber, wherein the first process gas is silane and the second process gas is nitrogen, and maintaining a pressure in the vacuum chamber of greater than 2 Torr and less than 8 Torr Generating a plasma from the process gas in the vacuum chamber; maintaining a temperature between 500 ° C. and 575 ° C. in the vacuum chamber; and a silicon nitride layer on at least the feature Maintaining the plasma in the vacuum chamber for deposition; and Method comprising the steps of patterning the silicon nitride layer to form a spacer of at least one of said silicon nitride on Cha. Furthermore, maintaining the pressure between 5 Torr and 7 Torr and applying RF energy at an RF power density between 0.93 W / cm ² and 1.86 W / cm ² and a step of maintaining the plasma the method of claim 13.

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